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Linux/drivers/mtd/nand/docg4.c

  1 /*
  2  *  Copyright © 2012 Mike Dunn <mikedunn@newsguy.com>
  3  *
  4  * mtd nand driver for M-Systems DiskOnChip G4
  5  *
  6  * This program is free software; you can redistribute it and/or modify
  7  * it under the terms of the GNU General Public License as published by
  8  * the Free Software Foundation; either version 2 of the License, or
  9  * (at your option) any later version.
 10  *
 11  * Tested on the Palm Treo 680.  The G4 is also present on Toshiba Portege, Asus
 12  * P526, some HTC smartphones (Wizard, Prophet, ...), O2 XDA Zinc, maybe others.
 13  * Should work on these as well.  Let me know!
 14  *
 15  * TODO:
 16  *
 17  *  Mechanism for management of password-protected areas
 18  *
 19  *  Hamming ecc when reading oob only
 20  *
 21  *  According to the M-Sys documentation, this device is also available in a
 22  *  "dual-die" configuration having a 256MB capacity, but no mechanism for
 23  *  detecting this variant is documented.  Currently this driver assumes 128MB
 24  *  capacity.
 25  *
 26  *  Support for multiple cascaded devices ("floors").  Not sure which gadgets
 27  *  contain multiple G4s in a cascaded configuration, if any.
 28  *
 29  */
 30 
 31 #include <linux/kernel.h>
 32 #include <linux/slab.h>
 33 #include <linux/init.h>
 34 #include <linux/string.h>
 35 #include <linux/sched.h>
 36 #include <linux/delay.h>
 37 #include <linux/module.h>
 38 #include <linux/export.h>
 39 #include <linux/platform_device.h>
 40 #include <linux/io.h>
 41 #include <linux/bitops.h>
 42 #include <linux/mtd/partitions.h>
 43 #include <linux/mtd/mtd.h>
 44 #include <linux/mtd/nand.h>
 45 #include <linux/bch.h>
 46 #include <linux/bitrev.h>
 47 #include <linux/jiffies.h>
 48 
 49 /*
 50  * In "reliable mode" consecutive 2k pages are used in parallel (in some
 51  * fashion) to store the same data.  The data can be read back from the
 52  * even-numbered pages in the normal manner; odd-numbered pages will appear to
 53  * contain junk.  Systems that boot from the docg4 typically write the secondary
 54  * program loader (SPL) code in this mode.  The SPL is loaded by the initial
 55  * program loader (IPL, stored in the docg4's 2k NOR-like region that is mapped
 56  * to the reset vector address).  This module parameter enables you to use this
 57  * driver to write the SPL.  When in this mode, no more than 2k of data can be
 58  * written at a time, because the addresses do not increment in the normal
 59  * manner, and the starting offset must be within an even-numbered 2k region;
 60  * i.e., invalid starting offsets are 0x800, 0xa00, 0xc00, 0xe00, 0x1800,
 61  * 0x1a00, ...  Reliable mode is a special case and should not be used unless
 62  * you know what you're doing.
 63  */
 64 static bool reliable_mode;
 65 module_param(reliable_mode, bool, 0);
 66 MODULE_PARM_DESC(reliable_mode, "pages are programmed in reliable mode");
 67 
 68 /*
 69  * You'll want to ignore badblocks if you're reading a partition that contains
 70  * data written by the TrueFFS library (i.e., by PalmOS, Windows, etc), since
 71  * it does not use mtd nand's method for marking bad blocks (using oob area).
 72  * This will also skip the check of the "page written" flag.
 73  */
 74 static bool ignore_badblocks;
 75 module_param(ignore_badblocks, bool, 0);
 76 MODULE_PARM_DESC(ignore_badblocks, "no badblock checking performed");
 77 
 78 struct docg4_priv {
 79         struct mtd_info *mtd;
 80         struct device *dev;
 81         void __iomem *virtadr;
 82         int status;
 83         struct {
 84                 unsigned int command;
 85                 int column;
 86                 int page;
 87         } last_command;
 88         uint8_t oob_buf[16];
 89         uint8_t ecc_buf[7];
 90         int oob_page;
 91         struct bch_control *bch;
 92 };
 93 
 94 /*
 95  * Defines prefixed with DOCG4 are unique to the diskonchip G4.  All others are
 96  * shared with other diskonchip devices (P3, G3 at least).
 97  *
 98  * Functions with names prefixed with docg4_ are mtd / nand interface functions
 99  * (though they may also be called internally).  All others are internal.
100  */
101 
102 #define DOC_IOSPACE_DATA                0x0800
103 
104 /* register offsets */
105 #define DOC_CHIPID                      0x1000
106 #define DOC_DEVICESELECT                0x100a
107 #define DOC_ASICMODE                    0x100c
108 #define DOC_DATAEND                     0x101e
109 #define DOC_NOP                         0x103e
110 
111 #define DOC_FLASHSEQUENCE               0x1032
112 #define DOC_FLASHCOMMAND                0x1034
113 #define DOC_FLASHADDRESS                0x1036
114 #define DOC_FLASHCONTROL                0x1038
115 #define DOC_ECCCONF0                    0x1040
116 #define DOC_ECCCONF1                    0x1042
117 #define DOC_HAMMINGPARITY               0x1046
118 #define DOC_BCH_SYNDROM(idx)            (0x1048 + idx)
119 
120 #define DOC_ASICMODECONFIRM             0x1072
121 #define DOC_CHIPID_INV                  0x1074
122 #define DOC_POWERMODE                   0x107c
123 
124 #define DOCG4_MYSTERY_REG               0x1050
125 
126 /* apparently used only to write oob bytes 6 and 7 */
127 #define DOCG4_OOB_6_7                   0x1052
128 
129 /* DOC_FLASHSEQUENCE register commands */
130 #define DOC_SEQ_RESET                   0x00
131 #define DOCG4_SEQ_PAGE_READ             0x03
132 #define DOCG4_SEQ_FLUSH                 0x29
133 #define DOCG4_SEQ_PAGEWRITE             0x16
134 #define DOCG4_SEQ_PAGEPROG              0x1e
135 #define DOCG4_SEQ_BLOCKERASE            0x24
136 #define DOCG4_SEQ_SETMODE               0x45
137 
138 /* DOC_FLASHCOMMAND register commands */
139 #define DOCG4_CMD_PAGE_READ             0x00
140 #define DOC_CMD_ERASECYCLE2             0xd0
141 #define DOCG4_CMD_FLUSH                 0x70
142 #define DOCG4_CMD_READ2                 0x30
143 #define DOC_CMD_PROG_BLOCK_ADDR         0x60
144 #define DOCG4_CMD_PAGEWRITE             0x80
145 #define DOC_CMD_PROG_CYCLE2             0x10
146 #define DOCG4_CMD_FAST_MODE             0xa3 /* functionality guessed */
147 #define DOC_CMD_RELIABLE_MODE           0x22
148 #define DOC_CMD_RESET                   0xff
149 
150 /* DOC_POWERMODE register bits */
151 #define DOC_POWERDOWN_READY             0x80
152 
153 /* DOC_FLASHCONTROL register bits */
154 #define DOC_CTRL_CE                     0x10
155 #define DOC_CTRL_UNKNOWN                0x40
156 #define DOC_CTRL_FLASHREADY             0x01
157 
158 /* DOC_ECCCONF0 register bits */
159 #define DOC_ECCCONF0_READ_MODE          0x8000
160 #define DOC_ECCCONF0_UNKNOWN            0x2000
161 #define DOC_ECCCONF0_ECC_ENABLE         0x1000
162 #define DOC_ECCCONF0_DATA_BYTES_MASK    0x07ff
163 
164 /* DOC_ECCCONF1 register bits */
165 #define DOC_ECCCONF1_BCH_SYNDROM_ERR    0x80
166 #define DOC_ECCCONF1_ECC_ENABLE         0x07
167 #define DOC_ECCCONF1_PAGE_IS_WRITTEN    0x20
168 
169 /* DOC_ASICMODE register bits */
170 #define DOC_ASICMODE_RESET              0x00
171 #define DOC_ASICMODE_NORMAL             0x01
172 #define DOC_ASICMODE_POWERDOWN          0x02
173 #define DOC_ASICMODE_MDWREN             0x04
174 #define DOC_ASICMODE_BDETCT_RESET       0x08
175 #define DOC_ASICMODE_RSTIN_RESET        0x10
176 #define DOC_ASICMODE_RAM_WE             0x20
177 
178 /* good status values read after read/write/erase operations */
179 #define DOCG4_PROGSTATUS_GOOD          0x51
180 #define DOCG4_PROGSTATUS_GOOD_2        0xe0
181 
182 /*
183  * On read operations (page and oob-only), the first byte read from I/O reg is a
184  * status.  On error, it reads 0x73; otherwise, it reads either 0x71 (first read
185  * after reset only) or 0x51, so bit 1 is presumed to be an error indicator.
186  */
187 #define DOCG4_READ_ERROR           0x02 /* bit 1 indicates read error */
188 
189 /* anatomy of the device */
190 #define DOCG4_CHIP_SIZE        0x8000000
191 #define DOCG4_PAGE_SIZE        0x200
192 #define DOCG4_PAGES_PER_BLOCK  0x200
193 #define DOCG4_BLOCK_SIZE       (DOCG4_PAGES_PER_BLOCK * DOCG4_PAGE_SIZE)
194 #define DOCG4_NUMBLOCKS        (DOCG4_CHIP_SIZE / DOCG4_BLOCK_SIZE)
195 #define DOCG4_OOB_SIZE         0x10
196 #define DOCG4_CHIP_SHIFT       27    /* log_2(DOCG4_CHIP_SIZE) */
197 #define DOCG4_PAGE_SHIFT       9     /* log_2(DOCG4_PAGE_SIZE) */
198 #define DOCG4_ERASE_SHIFT      18    /* log_2(DOCG4_BLOCK_SIZE) */
199 
200 /* all but the last byte is included in ecc calculation */
201 #define DOCG4_BCH_SIZE         (DOCG4_PAGE_SIZE + DOCG4_OOB_SIZE - 1)
202 
203 #define DOCG4_USERDATA_LEN     520 /* 512 byte page plus 8 oob avail to user */
204 
205 /* expected values from the ID registers */
206 #define DOCG4_IDREG1_VALUE     0x0400
207 #define DOCG4_IDREG2_VALUE     0xfbff
208 
209 /* primitive polynomial used to build the Galois field used by hw ecc gen */
210 #define DOCG4_PRIMITIVE_POLY   0x4443
211 
212 #define DOCG4_M                14  /* Galois field is of order 2^14 */
213 #define DOCG4_T                4   /* BCH alg corrects up to 4 bit errors */
214 
215 #define DOCG4_FACTORY_BBT_PAGE 16 /* page where read-only factory bbt lives */
216 #define DOCG4_REDUNDANT_BBT_PAGE 24 /* page where redundant factory bbt lives */
217 
218 /*
219  * Bytes 0, 1 are used as badblock marker.
220  * Bytes 2 - 6 are available to the user.
221  * Byte 7 is hamming ecc for first 7 oob bytes only.
222  * Bytes 8 - 14 are hw-generated ecc covering entire page + oob bytes 0 - 14.
223  * Byte 15 (the last) is used by the driver as a "page written" flag.
224  */
225 static struct nand_ecclayout docg4_oobinfo = {
226         .eccbytes = 9,
227         .eccpos = {7, 8, 9, 10, 11, 12, 13, 14, 15},
228         .oobfree = { {.offset = 2, .length = 5} }
229 };
230 
231 /*
232  * The device has a nop register which M-Sys claims is for the purpose of
233  * inserting precise delays.  But beware; at least some operations fail if the
234  * nop writes are replaced with a generic delay!
235  */
236 static inline void write_nop(void __iomem *docptr)
237 {
238         writew(0, docptr + DOC_NOP);
239 }
240 
241 static void docg4_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
242 {
243         int i;
244         struct nand_chip *nand = mtd_to_nand(mtd);
245         uint16_t *p = (uint16_t *) buf;
246         len >>= 1;
247 
248         for (i = 0; i < len; i++)
249                 p[i] = readw(nand->IO_ADDR_R);
250 }
251 
252 static void docg4_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
253 {
254         int i;
255         struct nand_chip *nand = mtd_to_nand(mtd);
256         uint16_t *p = (uint16_t *) buf;
257         len >>= 1;
258 
259         for (i = 0; i < len; i++)
260                 writew(p[i], nand->IO_ADDR_W);
261 }
262 
263 static int poll_status(struct docg4_priv *doc)
264 {
265         /*
266          * Busy-wait for the FLASHREADY bit to be set in the FLASHCONTROL
267          * register.  Operations known to take a long time (e.g., block erase)
268          * should sleep for a while before calling this.
269          */
270 
271         uint16_t flash_status;
272         unsigned long timeo;
273         void __iomem *docptr = doc->virtadr;
274 
275         dev_dbg(doc->dev, "%s...\n", __func__);
276 
277         /* hardware quirk requires reading twice initially */
278         flash_status = readw(docptr + DOC_FLASHCONTROL);
279 
280         timeo = jiffies + msecs_to_jiffies(200); /* generous timeout */
281         do {
282                 cpu_relax();
283                 flash_status = readb(docptr + DOC_FLASHCONTROL);
284         } while (!(flash_status & DOC_CTRL_FLASHREADY) &&
285                  time_before(jiffies, timeo));
286 
287         if (unlikely(!(flash_status & DOC_CTRL_FLASHREADY))) {
288                 dev_err(doc->dev, "%s: timed out!\n", __func__);
289                 return NAND_STATUS_FAIL;
290         }
291 
292         return 0;
293 }
294 
295 
296 static int docg4_wait(struct mtd_info *mtd, struct nand_chip *nand)
297 {
298 
299         struct docg4_priv *doc = nand_get_controller_data(nand);
300         int status = NAND_STATUS_WP;       /* inverse logic?? */
301         dev_dbg(doc->dev, "%s...\n", __func__);
302 
303         /* report any previously unreported error */
304         if (doc->status) {
305                 status |= doc->status;
306                 doc->status = 0;
307                 return status;
308         }
309 
310         status |= poll_status(doc);
311         return status;
312 }
313 
314 static void docg4_select_chip(struct mtd_info *mtd, int chip)
315 {
316         /*
317          * Select among multiple cascaded chips ("floors").  Multiple floors are
318          * not yet supported, so the only valid non-negative value is 0.
319          */
320         struct nand_chip *nand = mtd_to_nand(mtd);
321         struct docg4_priv *doc = nand_get_controller_data(nand);
322         void __iomem *docptr = doc->virtadr;
323 
324         dev_dbg(doc->dev, "%s: chip %d\n", __func__, chip);
325 
326         if (chip < 0)
327                 return;         /* deselected */
328 
329         if (chip > 0)
330                 dev_warn(doc->dev, "multiple floors currently unsupported\n");
331 
332         writew(0, docptr + DOC_DEVICESELECT);
333 }
334 
335 static void reset(struct mtd_info *mtd)
336 {
337         /* full device reset */
338 
339         struct nand_chip *nand = mtd_to_nand(mtd);
340         struct docg4_priv *doc = nand_get_controller_data(nand);
341         void __iomem *docptr = doc->virtadr;
342 
343         writew(DOC_ASICMODE_RESET | DOC_ASICMODE_MDWREN,
344                docptr + DOC_ASICMODE);
345         writew(~(DOC_ASICMODE_RESET | DOC_ASICMODE_MDWREN),
346                docptr + DOC_ASICMODECONFIRM);
347         write_nop(docptr);
348 
349         writew(DOC_ASICMODE_NORMAL | DOC_ASICMODE_MDWREN,
350                docptr + DOC_ASICMODE);
351         writew(~(DOC_ASICMODE_NORMAL | DOC_ASICMODE_MDWREN),
352                docptr + DOC_ASICMODECONFIRM);
353 
354         writew(DOC_ECCCONF1_ECC_ENABLE, docptr + DOC_ECCCONF1);
355 
356         poll_status(doc);
357 }
358 
359 static void read_hw_ecc(void __iomem *docptr, uint8_t *ecc_buf)
360 {
361         /* read the 7 hw-generated ecc bytes */
362 
363         int i;
364         for (i = 0; i < 7; i++) { /* hw quirk; read twice */
365                 ecc_buf[i] = readb(docptr + DOC_BCH_SYNDROM(i));
366                 ecc_buf[i] = readb(docptr + DOC_BCH_SYNDROM(i));
367         }
368 }
369 
370 static int correct_data(struct mtd_info *mtd, uint8_t *buf, int page)
371 {
372         /*
373          * Called after a page read when hardware reports bitflips.
374          * Up to four bitflips can be corrected.
375          */
376 
377         struct nand_chip *nand = mtd_to_nand(mtd);
378         struct docg4_priv *doc = nand_get_controller_data(nand);
379         void __iomem *docptr = doc->virtadr;
380         int i, numerrs, errpos[4];
381         const uint8_t blank_read_hwecc[8] = {
382                 0xcf, 0x72, 0xfc, 0x1b, 0xa9, 0xc7, 0xb9, 0 };
383 
384         read_hw_ecc(docptr, doc->ecc_buf); /* read 7 hw-generated ecc bytes */
385 
386         /* check if read error is due to a blank page */
387         if (!memcmp(doc->ecc_buf, blank_read_hwecc, 7))
388                 return 0;       /* yes */
389 
390         /* skip additional check of "written flag" if ignore_badblocks */
391         if (ignore_badblocks == false) {
392 
393                 /*
394                  * If the hw ecc bytes are not those of a blank page, there's
395                  * still a chance that the page is blank, but was read with
396                  * errors.  Check the "written flag" in last oob byte, which
397                  * is set to zero when a page is written.  If more than half
398                  * the bits are set, assume a blank page.  Unfortunately, the
399                  * bit flips(s) are not reported in stats.
400                  */
401 
402                 if (nand->oob_poi[15]) {
403                         int bit, numsetbits = 0;
404                         unsigned long written_flag = nand->oob_poi[15];
405                         for_each_set_bit(bit, &written_flag, 8)
406                                 numsetbits++;
407                         if (numsetbits > 4) { /* assume blank */
408                                 dev_warn(doc->dev,
409                                          "error(s) in blank page "
410                                          "at offset %08x\n",
411                                          page * DOCG4_PAGE_SIZE);
412                                 return 0;
413                         }
414                 }
415         }
416 
417         /*
418          * The hardware ecc unit produces oob_ecc ^ calc_ecc.  The kernel's bch
419          * algorithm is used to decode this.  However the hw operates on page
420          * data in a bit order that is the reverse of that of the bch alg,
421          * requiring that the bits be reversed on the result.  Thanks to Ivan
422          * Djelic for his analysis!
423          */
424         for (i = 0; i < 7; i++)
425                 doc->ecc_buf[i] = bitrev8(doc->ecc_buf[i]);
426 
427         numerrs = decode_bch(doc->bch, NULL, DOCG4_USERDATA_LEN, NULL,
428                              doc->ecc_buf, NULL, errpos);
429 
430         if (numerrs == -EBADMSG) {
431                 dev_warn(doc->dev, "uncorrectable errors at offset %08x\n",
432                          page * DOCG4_PAGE_SIZE);
433                 return -EBADMSG;
434         }
435 
436         BUG_ON(numerrs < 0);    /* -EINVAL, or anything other than -EBADMSG */
437 
438         /* undo last step in BCH alg (modulo mirroring not needed) */
439         for (i = 0; i < numerrs; i++)
440                 errpos[i] = (errpos[i] & ~7)|(7-(errpos[i] & 7));
441 
442         /* fix the errors */
443         for (i = 0; i < numerrs; i++) {
444 
445                 /* ignore if error within oob ecc bytes */
446                 if (errpos[i] > DOCG4_USERDATA_LEN * 8)
447                         continue;
448 
449                 /* if error within oob area preceeding ecc bytes... */
450                 if (errpos[i] > DOCG4_PAGE_SIZE * 8)
451                         change_bit(errpos[i] - DOCG4_PAGE_SIZE * 8,
452                                    (unsigned long *)nand->oob_poi);
453 
454                 else    /* error in page data */
455                         change_bit(errpos[i], (unsigned long *)buf);
456         }
457 
458         dev_notice(doc->dev, "%d error(s) corrected at offset %08x\n",
459                    numerrs, page * DOCG4_PAGE_SIZE);
460 
461         return numerrs;
462 }
463 
464 static uint8_t docg4_read_byte(struct mtd_info *mtd)
465 {
466         struct nand_chip *nand = mtd_to_nand(mtd);
467         struct docg4_priv *doc = nand_get_controller_data(nand);
468 
469         dev_dbg(doc->dev, "%s\n", __func__);
470 
471         if (doc->last_command.command == NAND_CMD_STATUS) {
472                 int status;
473 
474                 /*
475                  * Previous nand command was status request, so nand
476                  * infrastructure code expects to read the status here.  If an
477                  * error occurred in a previous operation, report it.
478                  */
479                 doc->last_command.command = 0;
480 
481                 if (doc->status) {
482                         status = doc->status;
483                         doc->status = 0;
484                 }
485 
486                 /* why is NAND_STATUS_WP inverse logic?? */
487                 else
488                         status = NAND_STATUS_WP | NAND_STATUS_READY;
489 
490                 return status;
491         }
492 
493         dev_warn(doc->dev, "unexpected call to read_byte()\n");
494 
495         return 0;
496 }
497 
498 static void write_addr(struct docg4_priv *doc, uint32_t docg4_addr)
499 {
500         /* write the four address bytes packed in docg4_addr to the device */
501 
502         void __iomem *docptr = doc->virtadr;
503         writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
504         docg4_addr >>= 8;
505         writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
506         docg4_addr >>= 8;
507         writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
508         docg4_addr >>= 8;
509         writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
510 }
511 
512 static int read_progstatus(struct docg4_priv *doc)
513 {
514         /*
515          * This apparently checks the status of programming.  Done after an
516          * erasure, and after page data is written.  On error, the status is
517          * saved, to be later retrieved by the nand infrastructure code.
518          */
519         void __iomem *docptr = doc->virtadr;
520 
521         /* status is read from the I/O reg */
522         uint16_t status1 = readw(docptr + DOC_IOSPACE_DATA);
523         uint16_t status2 = readw(docptr + DOC_IOSPACE_DATA);
524         uint16_t status3 = readw(docptr + DOCG4_MYSTERY_REG);
525 
526         dev_dbg(doc->dev, "docg4: %s: %02x %02x %02x\n",
527               __func__, status1, status2, status3);
528 
529         if (status1 != DOCG4_PROGSTATUS_GOOD
530             || status2 != DOCG4_PROGSTATUS_GOOD_2
531             || status3 != DOCG4_PROGSTATUS_GOOD_2) {
532                 doc->status = NAND_STATUS_FAIL;
533                 dev_warn(doc->dev, "read_progstatus failed: "
534                          "%02x, %02x, %02x\n", status1, status2, status3);
535                 return -EIO;
536         }
537         return 0;
538 }
539 
540 static int pageprog(struct mtd_info *mtd)
541 {
542         /*
543          * Final step in writing a page.  Writes the contents of its
544          * internal buffer out to the flash array, or some such.
545          */
546 
547         struct nand_chip *nand = mtd_to_nand(mtd);
548         struct docg4_priv *doc = nand_get_controller_data(nand);
549         void __iomem *docptr = doc->virtadr;
550         int retval = 0;
551 
552         dev_dbg(doc->dev, "docg4: %s\n", __func__);
553 
554         writew(DOCG4_SEQ_PAGEPROG, docptr + DOC_FLASHSEQUENCE);
555         writew(DOC_CMD_PROG_CYCLE2, docptr + DOC_FLASHCOMMAND);
556         write_nop(docptr);
557         write_nop(docptr);
558 
559         /* Just busy-wait; usleep_range() slows things down noticeably. */
560         poll_status(doc);
561 
562         writew(DOCG4_SEQ_FLUSH, docptr + DOC_FLASHSEQUENCE);
563         writew(DOCG4_CMD_FLUSH, docptr + DOC_FLASHCOMMAND);
564         writew(DOC_ECCCONF0_READ_MODE | 4, docptr + DOC_ECCCONF0);
565         write_nop(docptr);
566         write_nop(docptr);
567         write_nop(docptr);
568         write_nop(docptr);
569         write_nop(docptr);
570 
571         retval = read_progstatus(doc);
572         writew(0, docptr + DOC_DATAEND);
573         write_nop(docptr);
574         poll_status(doc);
575         write_nop(docptr);
576 
577         return retval;
578 }
579 
580 static void sequence_reset(struct mtd_info *mtd)
581 {
582         /* common starting sequence for all operations */
583 
584         struct nand_chip *nand = mtd_to_nand(mtd);
585         struct docg4_priv *doc = nand_get_controller_data(nand);
586         void __iomem *docptr = doc->virtadr;
587 
588         writew(DOC_CTRL_UNKNOWN | DOC_CTRL_CE, docptr + DOC_FLASHCONTROL);
589         writew(DOC_SEQ_RESET, docptr + DOC_FLASHSEQUENCE);
590         writew(DOC_CMD_RESET, docptr + DOC_FLASHCOMMAND);
591         write_nop(docptr);
592         write_nop(docptr);
593         poll_status(doc);
594         write_nop(docptr);
595 }
596 
597 static void read_page_prologue(struct mtd_info *mtd, uint32_t docg4_addr)
598 {
599         /* first step in reading a page */
600 
601         struct nand_chip *nand = mtd_to_nand(mtd);
602         struct docg4_priv *doc = nand_get_controller_data(nand);
603         void __iomem *docptr = doc->virtadr;
604 
605         dev_dbg(doc->dev,
606               "docg4: %s: g4 page %08x\n", __func__, docg4_addr);
607 
608         sequence_reset(mtd);
609 
610         writew(DOCG4_SEQ_PAGE_READ, docptr + DOC_FLASHSEQUENCE);
611         writew(DOCG4_CMD_PAGE_READ, docptr + DOC_FLASHCOMMAND);
612         write_nop(docptr);
613 
614         write_addr(doc, docg4_addr);
615 
616         write_nop(docptr);
617         writew(DOCG4_CMD_READ2, docptr + DOC_FLASHCOMMAND);
618         write_nop(docptr);
619         write_nop(docptr);
620 
621         poll_status(doc);
622 }
623 
624 static void write_page_prologue(struct mtd_info *mtd, uint32_t docg4_addr)
625 {
626         /* first step in writing a page */
627 
628         struct nand_chip *nand = mtd_to_nand(mtd);
629         struct docg4_priv *doc = nand_get_controller_data(nand);
630         void __iomem *docptr = doc->virtadr;
631 
632         dev_dbg(doc->dev,
633               "docg4: %s: g4 addr: %x\n", __func__, docg4_addr);
634         sequence_reset(mtd);
635 
636         if (unlikely(reliable_mode)) {
637                 writew(DOCG4_SEQ_SETMODE, docptr + DOC_FLASHSEQUENCE);
638                 writew(DOCG4_CMD_FAST_MODE, docptr + DOC_FLASHCOMMAND);
639                 writew(DOC_CMD_RELIABLE_MODE, docptr + DOC_FLASHCOMMAND);
640                 write_nop(docptr);
641         }
642 
643         writew(DOCG4_SEQ_PAGEWRITE, docptr + DOC_FLASHSEQUENCE);
644         writew(DOCG4_CMD_PAGEWRITE, docptr + DOC_FLASHCOMMAND);
645         write_nop(docptr);
646         write_addr(doc, docg4_addr);
647         write_nop(docptr);
648         write_nop(docptr);
649         poll_status(doc);
650 }
651 
652 static uint32_t mtd_to_docg4_address(int page, int column)
653 {
654         /*
655          * Convert mtd address to format used by the device, 32 bit packed.
656          *
657          * Some notes on G4 addressing... The M-Sys documentation on this device
658          * claims that pages are 2K in length, and indeed, the format of the
659          * address used by the device reflects that.  But within each page are
660          * four 512 byte "sub-pages", each with its own oob data that is
661          * read/written immediately after the 512 bytes of page data.  This oob
662          * data contains the ecc bytes for the preceeding 512 bytes.
663          *
664          * Rather than tell the mtd nand infrastructure that page size is 2k,
665          * with four sub-pages each, we engage in a little subterfuge and tell
666          * the infrastructure code that pages are 512 bytes in size.  This is
667          * done because during the course of reverse-engineering the device, I
668          * never observed an instance where an entire 2K "page" was read or
669          * written as a unit.  Each "sub-page" is always addressed individually,
670          * its data read/written, and ecc handled before the next "sub-page" is
671          * addressed.
672          *
673          * This requires us to convert addresses passed by the mtd nand
674          * infrastructure code to those used by the device.
675          *
676          * The address that is written to the device consists of four bytes: the
677          * first two are the 2k page number, and the second is the index into
678          * the page.  The index is in terms of 16-bit half-words and includes
679          * the preceeding oob data, so e.g., the index into the second
680          * "sub-page" is 0x108, and the full device address of the start of mtd
681          * page 0x201 is 0x00800108.
682          */
683         int g4_page = page / 4;                       /* device's 2K page */
684         int g4_index = (page % 4) * 0x108 + column/2; /* offset into page */
685         return (g4_page << 16) | g4_index;            /* pack */
686 }
687 
688 static void docg4_command(struct mtd_info *mtd, unsigned command, int column,
689                           int page_addr)
690 {
691         /* handle standard nand commands */
692 
693         struct nand_chip *nand = mtd_to_nand(mtd);
694         struct docg4_priv *doc = nand_get_controller_data(nand);
695         uint32_t g4_addr = mtd_to_docg4_address(page_addr, column);
696 
697         dev_dbg(doc->dev, "%s %x, page_addr=%x, column=%x\n",
698               __func__, command, page_addr, column);
699 
700         /*
701          * Save the command and its arguments.  This enables emulation of
702          * standard flash devices, and also some optimizations.
703          */
704         doc->last_command.command = command;
705         doc->last_command.column = column;
706         doc->last_command.page = page_addr;
707 
708         switch (command) {
709 
710         case NAND_CMD_RESET:
711                 reset(mtd);
712                 break;
713 
714         case NAND_CMD_READ0:
715                 read_page_prologue(mtd, g4_addr);
716                 break;
717 
718         case NAND_CMD_STATUS:
719                 /* next call to read_byte() will expect a status */
720                 break;
721 
722         case NAND_CMD_SEQIN:
723                 if (unlikely(reliable_mode)) {
724                         uint16_t g4_page = g4_addr >> 16;
725 
726                         /* writes to odd-numbered 2k pages are invalid */
727                         if (g4_page & 0x01)
728                                 dev_warn(doc->dev,
729                                          "invalid reliable mode address\n");
730                 }
731 
732                 write_page_prologue(mtd, g4_addr);
733 
734                 /* hack for deferred write of oob bytes */
735                 if (doc->oob_page == page_addr)
736                         memcpy(nand->oob_poi, doc->oob_buf, 16);
737                 break;
738 
739         case NAND_CMD_PAGEPROG:
740                 pageprog(mtd);
741                 break;
742 
743         /* we don't expect these, based on review of nand_base.c */
744         case NAND_CMD_READOOB:
745         case NAND_CMD_READID:
746         case NAND_CMD_ERASE1:
747         case NAND_CMD_ERASE2:
748                 dev_warn(doc->dev, "docg4_command: "
749                          "unexpected nand command 0x%x\n", command);
750                 break;
751 
752         }
753 }
754 
755 static int read_page(struct mtd_info *mtd, struct nand_chip *nand,
756                      uint8_t *buf, int page, bool use_ecc)
757 {
758         struct docg4_priv *doc = nand_get_controller_data(nand);
759         void __iomem *docptr = doc->virtadr;
760         uint16_t status, edc_err, *buf16;
761         int bits_corrected = 0;
762 
763         dev_dbg(doc->dev, "%s: page %08x\n", __func__, page);
764 
765         writew(DOC_ECCCONF0_READ_MODE |
766                DOC_ECCCONF0_ECC_ENABLE |
767                DOC_ECCCONF0_UNKNOWN |
768                DOCG4_BCH_SIZE,
769                docptr + DOC_ECCCONF0);
770         write_nop(docptr);
771         write_nop(docptr);
772         write_nop(docptr);
773         write_nop(docptr);
774         write_nop(docptr);
775 
776         /* the 1st byte from the I/O reg is a status; the rest is page data */
777         status = readw(docptr + DOC_IOSPACE_DATA);
778         if (status & DOCG4_READ_ERROR) {
779                 dev_err(doc->dev,
780                         "docg4_read_page: bad status: 0x%02x\n", status);
781                 writew(0, docptr + DOC_DATAEND);
782                 return -EIO;
783         }
784 
785         dev_dbg(doc->dev, "%s: status = 0x%x\n", __func__, status);
786 
787         docg4_read_buf(mtd, buf, DOCG4_PAGE_SIZE); /* read the page data */
788 
789         /* this device always reads oob after page data */
790         /* first 14 oob bytes read from I/O reg */
791         docg4_read_buf(mtd, nand->oob_poi, 14);
792 
793         /* last 2 read from another reg */
794         buf16 = (uint16_t *)(nand->oob_poi + 14);
795         *buf16 = readw(docptr + DOCG4_MYSTERY_REG);
796 
797         write_nop(docptr);
798 
799         if (likely(use_ecc == true)) {
800 
801                 /* read the register that tells us if bitflip(s) detected  */
802                 edc_err = readw(docptr + DOC_ECCCONF1);
803                 edc_err = readw(docptr + DOC_ECCCONF1);
804                 dev_dbg(doc->dev, "%s: edc_err = 0x%02x\n", __func__, edc_err);
805 
806                 /* If bitflips are reported, attempt to correct with ecc */
807                 if (edc_err & DOC_ECCCONF1_BCH_SYNDROM_ERR) {
808                         bits_corrected = correct_data(mtd, buf, page);
809                         if (bits_corrected == -EBADMSG)
810                                 mtd->ecc_stats.failed++;
811                         else
812                                 mtd->ecc_stats.corrected += bits_corrected;
813                 }
814         }
815 
816         writew(0, docptr + DOC_DATAEND);
817         if (bits_corrected == -EBADMSG)   /* uncorrectable errors */
818                 return 0;
819         return bits_corrected;
820 }
821 
822 
823 static int docg4_read_page_raw(struct mtd_info *mtd, struct nand_chip *nand,
824                                uint8_t *buf, int oob_required, int page)
825 {
826         return read_page(mtd, nand, buf, page, false);
827 }
828 
829 static int docg4_read_page(struct mtd_info *mtd, struct nand_chip *nand,
830                            uint8_t *buf, int oob_required, int page)
831 {
832         return read_page(mtd, nand, buf, page, true);
833 }
834 
835 static int docg4_read_oob(struct mtd_info *mtd, struct nand_chip *nand,
836                           int page)
837 {
838         struct docg4_priv *doc = nand_get_controller_data(nand);
839         void __iomem *docptr = doc->virtadr;
840         uint16_t status;
841 
842         dev_dbg(doc->dev, "%s: page %x\n", __func__, page);
843 
844         docg4_command(mtd, NAND_CMD_READ0, nand->ecc.size, page);
845 
846         writew(DOC_ECCCONF0_READ_MODE | DOCG4_OOB_SIZE, docptr + DOC_ECCCONF0);
847         write_nop(docptr);
848         write_nop(docptr);
849         write_nop(docptr);
850         write_nop(docptr);
851         write_nop(docptr);
852 
853         /* the 1st byte from the I/O reg is a status; the rest is oob data */
854         status = readw(docptr + DOC_IOSPACE_DATA);
855         if (status & DOCG4_READ_ERROR) {
856                 dev_warn(doc->dev,
857                          "docg4_read_oob failed: status = 0x%02x\n", status);
858                 return -EIO;
859         }
860 
861         dev_dbg(doc->dev, "%s: status = 0x%x\n", __func__, status);
862 
863         docg4_read_buf(mtd, nand->oob_poi, 16);
864 
865         write_nop(docptr);
866         write_nop(docptr);
867         write_nop(docptr);
868         writew(0, docptr + DOC_DATAEND);
869         write_nop(docptr);
870 
871         return 0;
872 }
873 
874 static int docg4_erase_block(struct mtd_info *mtd, int page)
875 {
876         struct nand_chip *nand = mtd_to_nand(mtd);
877         struct docg4_priv *doc = nand_get_controller_data(nand);
878         void __iomem *docptr = doc->virtadr;
879         uint16_t g4_page;
880 
881         dev_dbg(doc->dev, "%s: page %04x\n", __func__, page);
882 
883         sequence_reset(mtd);
884 
885         writew(DOCG4_SEQ_BLOCKERASE, docptr + DOC_FLASHSEQUENCE);
886         writew(DOC_CMD_PROG_BLOCK_ADDR, docptr + DOC_FLASHCOMMAND);
887         write_nop(docptr);
888 
889         /* only 2 bytes of address are written to specify erase block */
890         g4_page = (uint16_t)(page / 4);  /* to g4's 2k page addressing */
891         writeb(g4_page & 0xff, docptr + DOC_FLASHADDRESS);
892         g4_page >>= 8;
893         writeb(g4_page & 0xff, docptr + DOC_FLASHADDRESS);
894         write_nop(docptr);
895 
896         /* start the erasure */
897         writew(DOC_CMD_ERASECYCLE2, docptr + DOC_FLASHCOMMAND);
898         write_nop(docptr);
899         write_nop(docptr);
900 
901         usleep_range(500, 1000); /* erasure is long; take a snooze */
902         poll_status(doc);
903         writew(DOCG4_SEQ_FLUSH, docptr + DOC_FLASHSEQUENCE);
904         writew(DOCG4_CMD_FLUSH, docptr + DOC_FLASHCOMMAND);
905         writew(DOC_ECCCONF0_READ_MODE | 4, docptr + DOC_ECCCONF0);
906         write_nop(docptr);
907         write_nop(docptr);
908         write_nop(docptr);
909         write_nop(docptr);
910         write_nop(docptr);
911 
912         read_progstatus(doc);
913 
914         writew(0, docptr + DOC_DATAEND);
915         write_nop(docptr);
916         poll_status(doc);
917         write_nop(docptr);
918 
919         return nand->waitfunc(mtd, nand);
920 }
921 
922 static int write_page(struct mtd_info *mtd, struct nand_chip *nand,
923                        const uint8_t *buf, bool use_ecc)
924 {
925         struct docg4_priv *doc = nand_get_controller_data(nand);
926         void __iomem *docptr = doc->virtadr;
927         uint8_t ecc_buf[8];
928 
929         dev_dbg(doc->dev, "%s...\n", __func__);
930 
931         writew(DOC_ECCCONF0_ECC_ENABLE |
932                DOC_ECCCONF0_UNKNOWN |
933                DOCG4_BCH_SIZE,
934                docptr + DOC_ECCCONF0);
935         write_nop(docptr);
936 
937         /* write the page data */
938         docg4_write_buf16(mtd, buf, DOCG4_PAGE_SIZE);
939 
940         /* oob bytes 0 through 5 are written to I/O reg */
941         docg4_write_buf16(mtd, nand->oob_poi, 6);
942 
943         /* oob byte 6 written to a separate reg */
944         writew(nand->oob_poi[6], docptr + DOCG4_OOB_6_7);
945 
946         write_nop(docptr);
947         write_nop(docptr);
948 
949         /* write hw-generated ecc bytes to oob */
950         if (likely(use_ecc == true)) {
951                 /* oob byte 7 is hamming code */
952                 uint8_t hamming = readb(docptr + DOC_HAMMINGPARITY);
953                 hamming = readb(docptr + DOC_HAMMINGPARITY); /* 2nd read */
954                 writew(hamming, docptr + DOCG4_OOB_6_7);
955                 write_nop(docptr);
956 
957                 /* read the 7 bch bytes from ecc regs */
958                 read_hw_ecc(docptr, ecc_buf);
959                 ecc_buf[7] = 0;         /* clear the "page written" flag */
960         }
961 
962         /* write user-supplied bytes to oob */
963         else {
964                 writew(nand->oob_poi[7], docptr + DOCG4_OOB_6_7);
965                 write_nop(docptr);
966                 memcpy(ecc_buf, &nand->oob_poi[8], 8);
967         }
968 
969         docg4_write_buf16(mtd, ecc_buf, 8);
970         write_nop(docptr);
971         write_nop(docptr);
972         writew(0, docptr + DOC_DATAEND);
973         write_nop(docptr);
974 
975         return 0;
976 }
977 
978 static int docg4_write_page_raw(struct mtd_info *mtd, struct nand_chip *nand,
979                                 const uint8_t *buf, int oob_required, int page)
980 {
981         return write_page(mtd, nand, buf, false);
982 }
983 
984 static int docg4_write_page(struct mtd_info *mtd, struct nand_chip *nand,
985                              const uint8_t *buf, int oob_required, int page)
986 {
987         return write_page(mtd, nand, buf, true);
988 }
989 
990 static int docg4_write_oob(struct mtd_info *mtd, struct nand_chip *nand,
991                            int page)
992 {
993         /*
994          * Writing oob-only is not really supported, because MLC nand must write
995          * oob bytes at the same time as page data.  Nonetheless, we save the
996          * oob buffer contents here, and then write it along with the page data
997          * if the same page is subsequently written.  This allows user space
998          * utilities that write the oob data prior to the page data to work
999          * (e.g., nandwrite).  The disdvantage is that, if the intention was to
1000          * write oob only, the operation is quietly ignored.  Also, oob can get
1001          * corrupted if two concurrent processes are running nandwrite.
1002          */
1003 
1004         /* note that bytes 7..14 are hw generated hamming/ecc and overwritten */
1005         struct docg4_priv *doc = nand_get_controller_data(nand);
1006         doc->oob_page = page;
1007         memcpy(doc->oob_buf, nand->oob_poi, 16);
1008         return 0;
1009 }
1010 
1011 static int __init read_factory_bbt(struct mtd_info *mtd)
1012 {
1013         /*
1014          * The device contains a read-only factory bad block table.  Read it and
1015          * update the memory-based bbt accordingly.
1016          */
1017 
1018         struct nand_chip *nand = mtd_to_nand(mtd);
1019         struct docg4_priv *doc = nand_get_controller_data(nand);
1020         uint32_t g4_addr = mtd_to_docg4_address(DOCG4_FACTORY_BBT_PAGE, 0);
1021         uint8_t *buf;
1022         int i, block;
1023         __u32 eccfailed_stats = mtd->ecc_stats.failed;
1024 
1025         buf = kzalloc(DOCG4_PAGE_SIZE, GFP_KERNEL);
1026         if (buf == NULL)
1027                 return -ENOMEM;
1028 
1029         read_page_prologue(mtd, g4_addr);
1030         docg4_read_page(mtd, nand, buf, 0, DOCG4_FACTORY_BBT_PAGE);
1031 
1032         /*
1033          * If no memory-based bbt was created, exit.  This will happen if module
1034          * parameter ignore_badblocks is set.  Then why even call this function?
1035          * For an unknown reason, block erase always fails if it's the first
1036          * operation after device power-up.  The above read ensures it never is.
1037          * Ugly, I know.
1038          */
1039         if (nand->bbt == NULL)  /* no memory-based bbt */
1040                 goto exit;
1041 
1042         if (mtd->ecc_stats.failed > eccfailed_stats) {
1043                 /*
1044                  * Whoops, an ecc failure ocurred reading the factory bbt.
1045                  * It is stored redundantly, so we get another chance.
1046                  */
1047                 eccfailed_stats = mtd->ecc_stats.failed;
1048                 docg4_read_page(mtd, nand, buf, 0, DOCG4_REDUNDANT_BBT_PAGE);
1049                 if (mtd->ecc_stats.failed > eccfailed_stats) {
1050                         dev_warn(doc->dev,
1051                                  "The factory bbt could not be read!\n");
1052                         goto exit;
1053                 }
1054         }
1055 
1056         /*
1057          * Parse factory bbt and update memory-based bbt.  Factory bbt format is
1058          * simple: one bit per block, block numbers increase left to right (msb
1059          * to lsb).  Bit clear means bad block.
1060          */
1061         for (i = block = 0; block < DOCG4_NUMBLOCKS; block += 8, i++) {
1062                 int bitnum;
1063                 unsigned long bits = ~buf[i];
1064                 for_each_set_bit(bitnum, &bits, 8) {
1065                         int badblock = block + 7 - bitnum;
1066                         nand->bbt[badblock / 4] |=
1067                                 0x03 << ((badblock % 4) * 2);
1068                         mtd->ecc_stats.badblocks++;
1069                         dev_notice(doc->dev, "factory-marked bad block: %d\n",
1070                                    badblock);
1071                 }
1072         }
1073  exit:
1074         kfree(buf);
1075         return 0;
1076 }
1077 
1078 static int docg4_block_markbad(struct mtd_info *mtd, loff_t ofs)
1079 {
1080         /*
1081          * Mark a block as bad.  Bad blocks are marked in the oob area of the
1082          * first page of the block.  The default scan_bbt() in the nand
1083          * infrastructure code works fine for building the memory-based bbt
1084          * during initialization, as does the nand infrastructure function that
1085          * checks if a block is bad by reading the bbt.  This function replaces
1086          * the nand default because writes to oob-only are not supported.
1087          */
1088 
1089         int ret, i;
1090         uint8_t *buf;
1091         struct nand_chip *nand = mtd_to_nand(mtd);
1092         struct docg4_priv *doc = nand_get_controller_data(nand);
1093         struct nand_bbt_descr *bbtd = nand->badblock_pattern;
1094         int page = (int)(ofs >> nand->page_shift);
1095         uint32_t g4_addr = mtd_to_docg4_address(page, 0);
1096 
1097         dev_dbg(doc->dev, "%s: %08llx\n", __func__, ofs);
1098 
1099         if (unlikely(ofs & (DOCG4_BLOCK_SIZE - 1)))
1100                 dev_warn(doc->dev, "%s: ofs %llx not start of block!\n",
1101                          __func__, ofs);
1102 
1103         /* allocate blank buffer for page data */
1104         buf = kzalloc(DOCG4_PAGE_SIZE, GFP_KERNEL);
1105         if (buf == NULL)
1106                 return -ENOMEM;
1107 
1108         /* write bit-wise negation of pattern to oob buffer */
1109         memset(nand->oob_poi, 0xff, mtd->oobsize);
1110         for (i = 0; i < bbtd->len; i++)
1111                 nand->oob_poi[bbtd->offs + i] = ~bbtd->pattern[i];
1112 
1113         /* write first page of block */
1114         write_page_prologue(mtd, g4_addr);
1115         docg4_write_page(mtd, nand, buf, 1, page);
1116         ret = pageprog(mtd);
1117 
1118         kfree(buf);
1119 
1120         return ret;
1121 }
1122 
1123 static int docg4_block_neverbad(struct mtd_info *mtd, loff_t ofs)
1124 {
1125         /* only called when module_param ignore_badblocks is set */
1126         return 0;
1127 }
1128 
1129 static int docg4_suspend(struct platform_device *pdev, pm_message_t state)
1130 {
1131         /*
1132          * Put the device into "deep power-down" mode.  Note that CE# must be
1133          * deasserted for this to take effect.  The xscale, e.g., can be
1134          * configured to float this signal when the processor enters power-down,
1135          * and a suitable pull-up ensures its deassertion.
1136          */
1137 
1138         int i;
1139         uint8_t pwr_down;
1140         struct docg4_priv *doc = platform_get_drvdata(pdev);
1141         void __iomem *docptr = doc->virtadr;
1142 
1143         dev_dbg(doc->dev, "%s...\n", __func__);
1144 
1145         /* poll the register that tells us we're ready to go to sleep */
1146         for (i = 0; i < 10; i++) {
1147                 pwr_down = readb(docptr + DOC_POWERMODE);
1148                 if (pwr_down & DOC_POWERDOWN_READY)
1149                         break;
1150                 usleep_range(1000, 4000);
1151         }
1152 
1153         if (pwr_down & DOC_POWERDOWN_READY) {
1154                 dev_err(doc->dev, "suspend failed; "
1155                         "timeout polling DOC_POWERDOWN_READY\n");
1156                 return -EIO;
1157         }
1158 
1159         writew(DOC_ASICMODE_POWERDOWN | DOC_ASICMODE_MDWREN,
1160                docptr + DOC_ASICMODE);
1161         writew(~(DOC_ASICMODE_POWERDOWN | DOC_ASICMODE_MDWREN),
1162                docptr + DOC_ASICMODECONFIRM);
1163 
1164         write_nop(docptr);
1165 
1166         return 0;
1167 }
1168 
1169 static int docg4_resume(struct platform_device *pdev)
1170 {
1171 
1172         /*
1173          * Exit power-down.  Twelve consecutive reads of the address below
1174          * accomplishes this, assuming CE# has been asserted.
1175          */
1176 
1177         struct docg4_priv *doc = platform_get_drvdata(pdev);
1178         void __iomem *docptr = doc->virtadr;
1179         int i;
1180 
1181         dev_dbg(doc->dev, "%s...\n", __func__);
1182 
1183         for (i = 0; i < 12; i++)
1184                 readb(docptr + 0x1fff);
1185 
1186         return 0;
1187 }
1188 
1189 static void __init init_mtd_structs(struct mtd_info *mtd)
1190 {
1191         /* initialize mtd and nand data structures */
1192 
1193         /*
1194          * Note that some of the following initializations are not usually
1195          * required within a nand driver because they are performed by the nand
1196          * infrastructure code as part of nand_scan().  In this case they need
1197          * to be initialized here because we skip call to nand_scan_ident() (the
1198          * first half of nand_scan()).  The call to nand_scan_ident() is skipped
1199          * because for this device the chip id is not read in the manner of a
1200          * standard nand device.  Unfortunately, nand_scan_ident() does other
1201          * things as well, such as call nand_set_defaults().
1202          */
1203 
1204         struct nand_chip *nand = mtd_to_nand(mtd);
1205         struct docg4_priv *doc = nand_get_controller_data(nand);
1206 
1207         mtd->size = DOCG4_CHIP_SIZE;
1208         mtd->name = "Msys_Diskonchip_G4";
1209         mtd->writesize = DOCG4_PAGE_SIZE;
1210         mtd->erasesize = DOCG4_BLOCK_SIZE;
1211         mtd->oobsize = DOCG4_OOB_SIZE;
1212         nand->chipsize = DOCG4_CHIP_SIZE;
1213         nand->chip_shift = DOCG4_CHIP_SHIFT;
1214         nand->bbt_erase_shift = nand->phys_erase_shift = DOCG4_ERASE_SHIFT;
1215         nand->chip_delay = 20;
1216         nand->page_shift = DOCG4_PAGE_SHIFT;
1217         nand->pagemask = 0x3ffff;
1218         nand->badblockpos = NAND_LARGE_BADBLOCK_POS;
1219         nand->badblockbits = 8;
1220         nand->ecc.layout = &docg4_oobinfo;
1221         nand->ecc.mode = NAND_ECC_HW_SYNDROME;
1222         nand->ecc.size = DOCG4_PAGE_SIZE;
1223         nand->ecc.prepad = 8;
1224         nand->ecc.bytes = 8;
1225         nand->ecc.strength = DOCG4_T;
1226         nand->options = NAND_BUSWIDTH_16 | NAND_NO_SUBPAGE_WRITE;
1227         nand->IO_ADDR_R = nand->IO_ADDR_W = doc->virtadr + DOC_IOSPACE_DATA;
1228         nand->controller = &nand->hwcontrol;
1229         spin_lock_init(&nand->controller->lock);
1230         init_waitqueue_head(&nand->controller->wq);
1231 
1232         /* methods */
1233         nand->cmdfunc = docg4_command;
1234         nand->waitfunc = docg4_wait;
1235         nand->select_chip = docg4_select_chip;
1236         nand->read_byte = docg4_read_byte;
1237         nand->block_markbad = docg4_block_markbad;
1238         nand->read_buf = docg4_read_buf;
1239         nand->write_buf = docg4_write_buf16;
1240         nand->erase = docg4_erase_block;
1241         nand->ecc.read_page = docg4_read_page;
1242         nand->ecc.write_page = docg4_write_page;
1243         nand->ecc.read_page_raw = docg4_read_page_raw;
1244         nand->ecc.write_page_raw = docg4_write_page_raw;
1245         nand->ecc.read_oob = docg4_read_oob;
1246         nand->ecc.write_oob = docg4_write_oob;
1247 
1248         /*
1249          * The way the nand infrastructure code is written, a memory-based bbt
1250          * is not created if NAND_SKIP_BBTSCAN is set.  With no memory bbt,
1251          * nand->block_bad() is used.  So when ignoring bad blocks, we skip the
1252          * scan and define a dummy block_bad() which always returns 0.
1253          */
1254         if (ignore_badblocks) {
1255                 nand->options |= NAND_SKIP_BBTSCAN;
1256                 nand->block_bad = docg4_block_neverbad;
1257         }
1258 
1259 }
1260 
1261 static int __init read_id_reg(struct mtd_info *mtd)
1262 {
1263         struct nand_chip *nand = mtd_to_nand(mtd);
1264         struct docg4_priv *doc = nand_get_controller_data(nand);
1265         void __iomem *docptr = doc->virtadr;
1266         uint16_t id1, id2;
1267 
1268         /* check for presence of g4 chip by reading id registers */
1269         id1 = readw(docptr + DOC_CHIPID);
1270         id1 = readw(docptr + DOCG4_MYSTERY_REG);
1271         id2 = readw(docptr + DOC_CHIPID_INV);
1272         id2 = readw(docptr + DOCG4_MYSTERY_REG);
1273 
1274         if (id1 == DOCG4_IDREG1_VALUE && id2 == DOCG4_IDREG2_VALUE) {
1275                 dev_info(doc->dev,
1276                          "NAND device: 128MiB Diskonchip G4 detected\n");
1277                 return 0;
1278         }
1279 
1280         return -ENODEV;
1281 }
1282 
1283 static char const *part_probes[] = { "cmdlinepart", "saftlpart", NULL };
1284 
1285 static int __init probe_docg4(struct platform_device *pdev)
1286 {
1287         struct mtd_info *mtd;
1288         struct nand_chip *nand;
1289         void __iomem *virtadr;
1290         struct docg4_priv *doc;
1291         int len, retval;
1292         struct resource *r;
1293         struct device *dev = &pdev->dev;
1294 
1295         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1296         if (r == NULL) {
1297                 dev_err(dev, "no io memory resource defined!\n");
1298                 return -ENODEV;
1299         }
1300 
1301         virtadr = ioremap(r->start, resource_size(r));
1302         if (!virtadr) {
1303                 dev_err(dev, "Diskonchip ioremap failed: %pR\n", r);
1304                 return -EIO;
1305         }
1306 
1307         len = sizeof(struct nand_chip) + sizeof(struct docg4_priv);
1308         nand = kzalloc(len, GFP_KERNEL);
1309         if (nand == NULL) {
1310                 retval = -ENOMEM;
1311                 goto fail_unmap;
1312         }
1313 
1314         mtd = nand_to_mtd(nand);
1315         doc = (struct docg4_priv *) (nand + 1);
1316         nand_set_controller_data(nand, doc);
1317         mtd->dev.parent = &pdev->dev;
1318         doc->virtadr = virtadr;
1319         doc->dev = dev;
1320 
1321         init_mtd_structs(mtd);
1322 
1323         /* initialize kernel bch algorithm */
1324         doc->bch = init_bch(DOCG4_M, DOCG4_T, DOCG4_PRIMITIVE_POLY);
1325         if (doc->bch == NULL) {
1326                 retval = -EINVAL;
1327                 goto fail;
1328         }
1329 
1330         platform_set_drvdata(pdev, doc);
1331 
1332         reset(mtd);
1333         retval = read_id_reg(mtd);
1334         if (retval == -ENODEV) {
1335                 dev_warn(dev, "No diskonchip G4 device found.\n");
1336                 goto fail;
1337         }
1338 
1339         retval = nand_scan_tail(mtd);
1340         if (retval)
1341                 goto fail;
1342 
1343         retval = read_factory_bbt(mtd);
1344         if (retval)
1345                 goto fail;
1346 
1347         retval = mtd_device_parse_register(mtd, part_probes, NULL, NULL, 0);
1348         if (retval)
1349                 goto fail;
1350 
1351         doc->mtd = mtd;
1352         return 0;
1353 
1354 fail:
1355         nand_release(mtd); /* deletes partitions and mtd devices */
1356         free_bch(doc->bch);
1357         kfree(nand);
1358 
1359 fail_unmap:
1360         iounmap(virtadr);
1361 
1362         return retval;
1363 }
1364 
1365 static int __exit cleanup_docg4(struct platform_device *pdev)
1366 {
1367         struct docg4_priv *doc = platform_get_drvdata(pdev);
1368         nand_release(doc->mtd);
1369         free_bch(doc->bch);
1370         kfree(mtd_to_nand(doc->mtd));
1371         iounmap(doc->virtadr);
1372         return 0;
1373 }
1374 
1375 static struct platform_driver docg4_driver = {
1376         .driver         = {
1377                 .name   = "docg4",
1378         },
1379         .suspend        = docg4_suspend,
1380         .resume         = docg4_resume,
1381         .remove         = __exit_p(cleanup_docg4),
1382 };
1383 
1384 module_platform_driver_probe(docg4_driver, probe_docg4);
1385 
1386 MODULE_LICENSE("GPL");
1387 MODULE_AUTHOR("Mike Dunn");
1388 MODULE_DESCRIPTION("M-Systems DiskOnChip G4 device driver");
1389 

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