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Linux/drivers/mtd/nand/ams-delta.c

  1 /*
  2  *  drivers/mtd/nand/ams-delta.c
  3  *
  4  *  Copyright (C) 2006 Jonathan McDowell <noodles@earth.li>
  5  *
  6  *  Derived from drivers/mtd/toto.c
  7  *  Converted to platform driver by Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
  8  *  Partially stolen from drivers/mtd/nand/plat_nand.c
  9  *
 10  * This program is free software; you can redistribute it and/or modify
 11  * it under the terms of the GNU General Public License version 2 as
 12  * published by the Free Software Foundation.
 13  *
 14  *  Overview:
 15  *   This is a device driver for the NAND flash device found on the
 16  *   Amstrad E3 (Delta).
 17  */
 18 
 19 #include <linux/slab.h>
 20 #include <linux/module.h>
 21 #include <linux/delay.h>
 22 #include <linux/mtd/mtd.h>
 23 #include <linux/mtd/nand.h>
 24 #include <linux/mtd/partitions.h>
 25 #include <linux/gpio.h>
 26 #include <linux/platform_data/gpio-omap.h>
 27 
 28 #include <asm/io.h>
 29 #include <asm/sizes.h>
 30 
 31 #include <mach/board-ams-delta.h>
 32 
 33 #include <mach/hardware.h>
 34 
 35 /*
 36  * MTD structure for E3 (Delta)
 37  */
 38 static struct mtd_info *ams_delta_mtd = NULL;
 39 
 40 /*
 41  * Define partitions for flash devices
 42  */
 43 
 44 static struct mtd_partition partition_info[] = {
 45         { .name         = "Kernel",
 46           .offset       = 0,
 47           .size         = 3 * SZ_1M + SZ_512K },
 48         { .name         = "u-boot",
 49           .offset       = 3 * SZ_1M + SZ_512K,
 50           .size         = SZ_256K },
 51         { .name         = "u-boot params",
 52           .offset       = 3 * SZ_1M + SZ_512K + SZ_256K,
 53           .size         = SZ_256K },
 54         { .name         = "Amstrad LDR",
 55           .offset       = 4 * SZ_1M,
 56           .size         = SZ_256K },
 57         { .name         = "File system",
 58           .offset       = 4 * SZ_1M + 1 * SZ_256K,
 59           .size         = 27 * SZ_1M },
 60         { .name         = "PBL reserved",
 61           .offset       = 32 * SZ_1M - 3 * SZ_256K,
 62           .size         =  3 * SZ_256K },
 63 };
 64 
 65 static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte)
 66 {
 67         struct nand_chip *this = mtd->priv;
 68         void __iomem *io_base = this->priv;
 69 
 70         writew(0, io_base + OMAP_MPUIO_IO_CNTL);
 71         writew(byte, this->IO_ADDR_W);
 72         gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 0);
 73         ndelay(40);
 74         gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 1);
 75 }
 76 
 77 static u_char ams_delta_read_byte(struct mtd_info *mtd)
 78 {
 79         u_char res;
 80         struct nand_chip *this = mtd->priv;
 81         void __iomem *io_base = this->priv;
 82 
 83         gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 0);
 84         ndelay(40);
 85         writew(~0, io_base + OMAP_MPUIO_IO_CNTL);
 86         res = readw(this->IO_ADDR_R);
 87         gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 1);
 88 
 89         return res;
 90 }
 91 
 92 static void ams_delta_write_buf(struct mtd_info *mtd, const u_char *buf,
 93                                 int len)
 94 {
 95         int i;
 96 
 97         for (i=0; i<len; i++)
 98                 ams_delta_write_byte(mtd, buf[i]);
 99 }
100 
101 static void ams_delta_read_buf(struct mtd_info *mtd, u_char *buf, int len)
102 {
103         int i;
104 
105         for (i=0; i<len; i++)
106                 buf[i] = ams_delta_read_byte(mtd);
107 }
108 
109 /*
110  * Command control function
111  *
112  * ctrl:
113  * NAND_NCE: bit 0 -> bit 2
114  * NAND_CLE: bit 1 -> bit 7
115  * NAND_ALE: bit 2 -> bit 6
116  */
117 static void ams_delta_hwcontrol(struct mtd_info *mtd, int cmd,
118                                 unsigned int ctrl)
119 {
120 
121         if (ctrl & NAND_CTRL_CHANGE) {
122                 gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NCE,
123                                 (ctrl & NAND_NCE) == 0);
124                 gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_CLE,
125                                 (ctrl & NAND_CLE) != 0);
126                 gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_ALE,
127                                 (ctrl & NAND_ALE) != 0);
128         }
129 
130         if (cmd != NAND_CMD_NONE)
131                 ams_delta_write_byte(mtd, cmd);
132 }
133 
134 static int ams_delta_nand_ready(struct mtd_info *mtd)
135 {
136         return gpio_get_value(AMS_DELTA_GPIO_PIN_NAND_RB);
137 }
138 
139 static const struct gpio _mandatory_gpio[] = {
140         {
141                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_NCE,
142                 .flags  = GPIOF_OUT_INIT_HIGH,
143                 .label  = "nand_nce",
144         },
145         {
146                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_NRE,
147                 .flags  = GPIOF_OUT_INIT_HIGH,
148                 .label  = "nand_nre",
149         },
150         {
151                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_NWP,
152                 .flags  = GPIOF_OUT_INIT_HIGH,
153                 .label  = "nand_nwp",
154         },
155         {
156                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_NWE,
157                 .flags  = GPIOF_OUT_INIT_HIGH,
158                 .label  = "nand_nwe",
159         },
160         {
161                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_ALE,
162                 .flags  = GPIOF_OUT_INIT_LOW,
163                 .label  = "nand_ale",
164         },
165         {
166                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_CLE,
167                 .flags  = GPIOF_OUT_INIT_LOW,
168                 .label  = "nand_cle",
169         },
170 };
171 
172 /*
173  * Main initialization routine
174  */
175 static int ams_delta_init(struct platform_device *pdev)
176 {
177         struct nand_chip *this;
178         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
179         void __iomem *io_base;
180         int err = 0;
181 
182         if (!res)
183                 return -ENXIO;
184 
185         /* Allocate memory for MTD device structure and private data */
186         ams_delta_mtd = kmalloc(sizeof(struct mtd_info) +
187                                 sizeof(struct nand_chip), GFP_KERNEL);
188         if (!ams_delta_mtd) {
189                 printk (KERN_WARNING "Unable to allocate E3 NAND MTD device structure.\n");
190                 err = -ENOMEM;
191                 goto out;
192         }
193 
194         ams_delta_mtd->owner = THIS_MODULE;
195 
196         /* Get pointer to private data */
197         this = (struct nand_chip *) (&ams_delta_mtd[1]);
198 
199         /* Initialize structures */
200         memset(ams_delta_mtd, 0, sizeof(struct mtd_info));
201         memset(this, 0, sizeof(struct nand_chip));
202 
203         /* Link the private data with the MTD structure */
204         ams_delta_mtd->priv = this;
205 
206         /*
207          * Don't try to request the memory region from here,
208          * it should have been already requested from the
209          * gpio-omap driver and requesting it again would fail.
210          */
211 
212         io_base = ioremap(res->start, resource_size(res));
213         if (io_base == NULL) {
214                 dev_err(&pdev->dev, "ioremap failed\n");
215                 err = -EIO;
216                 goto out_free;
217         }
218 
219         this->priv = io_base;
220 
221         /* Set address of NAND IO lines */
222         this->IO_ADDR_R = io_base + OMAP_MPUIO_INPUT_LATCH;
223         this->IO_ADDR_W = io_base + OMAP_MPUIO_OUTPUT;
224         this->read_byte = ams_delta_read_byte;
225         this->write_buf = ams_delta_write_buf;
226         this->read_buf = ams_delta_read_buf;
227         this->cmd_ctrl = ams_delta_hwcontrol;
228         if (gpio_request(AMS_DELTA_GPIO_PIN_NAND_RB, "nand_rdy") == 0) {
229                 this->dev_ready = ams_delta_nand_ready;
230         } else {
231                 this->dev_ready = NULL;
232                 printk(KERN_NOTICE "Couldn't request gpio for Delta NAND ready.\n");
233         }
234         /* 25 us command delay time */
235         this->chip_delay = 30;
236         this->ecc.mode = NAND_ECC_SOFT;
237 
238         platform_set_drvdata(pdev, io_base);
239 
240         /* Set chip enabled, but  */
241         err = gpio_request_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
242         if (err)
243                 goto out_gpio;
244 
245         /* Scan to find existence of the device */
246         if (nand_scan(ams_delta_mtd, 1)) {
247                 err = -ENXIO;
248                 goto out_mtd;
249         }
250 
251         /* Register the partitions */
252         mtd_device_register(ams_delta_mtd, partition_info,
253                             ARRAY_SIZE(partition_info));
254 
255         goto out;
256 
257  out_mtd:
258         gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
259 out_gpio:
260         gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
261         iounmap(io_base);
262 out_free:
263         kfree(ams_delta_mtd);
264  out:
265         return err;
266 }
267 
268 /*
269  * Clean up routine
270  */
271 static int ams_delta_cleanup(struct platform_device *pdev)
272 {
273         void __iomem *io_base = platform_get_drvdata(pdev);
274 
275         /* Release resources, unregister device */
276         nand_release(ams_delta_mtd);
277 
278         gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
279         gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
280         iounmap(io_base);
281 
282         /* Free the MTD device structure */
283         kfree(ams_delta_mtd);
284 
285         return 0;
286 }
287 
288 static struct platform_driver ams_delta_nand_driver = {
289         .probe          = ams_delta_init,
290         .remove         = ams_delta_cleanup,
291         .driver         = {
292                 .name   = "ams-delta-nand",
293                 .owner  = THIS_MODULE,
294         },
295 };
296 
297 module_platform_driver(ams_delta_nand_driver);
298 
299 MODULE_LICENSE("GPL");
300 MODULE_AUTHOR("Jonathan McDowell <noodles@earth.li>");
301 MODULE_DESCRIPTION("Glue layer for NAND flash on Amstrad E3 (Delta)");
302 

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