Version:  2.0.40 2.2.26 2.4.37 2.6.39 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15

Linux/drivers/mmc/host/sdhci-s3c.c

  1 /* linux/drivers/mmc/host/sdhci-s3c.c
  2  *
  3  * Copyright 2008 Openmoko Inc.
  4  * Copyright 2008 Simtec Electronics
  5  *      Ben Dooks <ben@simtec.co.uk>
  6  *      http://armlinux.simtec.co.uk/
  7  *
  8  * SDHCI (HSMMC) support for Samsung SoC
  9  *
 10  * This program is free software; you can redistribute it and/or modify
 11  * it under the terms of the GNU General Public License version 2 as
 12  * published by the Free Software Foundation.
 13  */
 14 
 15 #include <linux/delay.h>
 16 #include <linux/dma-mapping.h>
 17 #include <linux/platform_device.h>
 18 #include <linux/platform_data/mmc-sdhci-s3c.h>
 19 #include <linux/slab.h>
 20 #include <linux/clk.h>
 21 #include <linux/io.h>
 22 #include <linux/gpio.h>
 23 #include <linux/module.h>
 24 #include <linux/of.h>
 25 #include <linux/of_gpio.h>
 26 #include <linux/pm.h>
 27 #include <linux/pm_runtime.h>
 28 
 29 #include <linux/mmc/host.h>
 30 
 31 #include "sdhci-s3c-regs.h"
 32 #include "sdhci.h"
 33 
 34 #define MAX_BUS_CLK     (4)
 35 
 36 /* Number of gpio's used is max data bus width + command and clock lines */
 37 #define NUM_GPIOS(x)    (x + 2)
 38 
 39 /**
 40  * struct sdhci_s3c - S3C SDHCI instance
 41  * @host: The SDHCI host created
 42  * @pdev: The platform device we where created from.
 43  * @ioarea: The resource created when we claimed the IO area.
 44  * @pdata: The platform data for this controller.
 45  * @cur_clk: The index of the current bus clock.
 46  * @clk_io: The clock for the internal bus interface.
 47  * @clk_bus: The clocks that are available for the SD/MMC bus clock.
 48  */
 49 struct sdhci_s3c {
 50         struct sdhci_host       *host;
 51         struct platform_device  *pdev;
 52         struct resource         *ioarea;
 53         struct s3c_sdhci_platdata *pdata;
 54         int                     cur_clk;
 55         int                     ext_cd_irq;
 56         int                     ext_cd_gpio;
 57 
 58         struct clk              *clk_io;
 59         struct clk              *clk_bus[MAX_BUS_CLK];
 60         unsigned long           clk_rates[MAX_BUS_CLK];
 61 };
 62 
 63 /**
 64  * struct sdhci_s3c_driver_data - S3C SDHCI platform specific driver data
 65  * @sdhci_quirks: sdhci host specific quirks.
 66  *
 67  * Specifies platform specific configuration of sdhci controller.
 68  * Note: A structure for driver specific platform data is used for future
 69  * expansion of its usage.
 70  */
 71 struct sdhci_s3c_drv_data {
 72         unsigned int    sdhci_quirks;
 73 };
 74 
 75 static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host)
 76 {
 77         return sdhci_priv(host);
 78 }
 79 
 80 /**
 81  * sdhci_s3c_get_max_clk - callback to get maximum clock frequency.
 82  * @host: The SDHCI host instance.
 83  *
 84  * Callback to return the maximum clock rate acheivable by the controller.
 85 */
 86 static unsigned int sdhci_s3c_get_max_clk(struct sdhci_host *host)
 87 {
 88         struct sdhci_s3c *ourhost = to_s3c(host);
 89         unsigned long rate, max = 0;
 90         int src;
 91 
 92         for (src = 0; src < MAX_BUS_CLK; src++) {
 93                 rate = ourhost->clk_rates[src];
 94                 if (rate > max)
 95                         max = rate;
 96         }
 97 
 98         return max;
 99 }
100 
101 /**
102  * sdhci_s3c_consider_clock - consider one the bus clocks for current setting
103  * @ourhost: Our SDHCI instance.
104  * @src: The source clock index.
105  * @wanted: The clock frequency wanted.
106  */
107 static unsigned int sdhci_s3c_consider_clock(struct sdhci_s3c *ourhost,
108                                              unsigned int src,
109                                              unsigned int wanted)
110 {
111         unsigned long rate;
112         struct clk *clksrc = ourhost->clk_bus[src];
113         int shift;
114 
115         if (IS_ERR(clksrc))
116                 return UINT_MAX;
117 
118         /*
119          * If controller uses a non-standard clock division, find the best clock
120          * speed possible with selected clock source and skip the division.
121          */
122         if (ourhost->host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) {
123                 rate = clk_round_rate(clksrc, wanted);
124                 return wanted - rate;
125         }
126 
127         rate = ourhost->clk_rates[src];
128 
129         for (shift = 0; shift <= 8; ++shift) {
130                 if ((rate >> shift) <= wanted)
131                         break;
132         }
133 
134         if (shift > 8) {
135                 dev_dbg(&ourhost->pdev->dev,
136                         "clk %d: rate %ld, min rate %lu > wanted %u\n",
137                         src, rate, rate / 256, wanted);
138                 return UINT_MAX;
139         }
140 
141         dev_dbg(&ourhost->pdev->dev, "clk %d: rate %ld, want %d, got %ld\n",
142                 src, rate, wanted, rate >> shift);
143 
144         return wanted - (rate >> shift);
145 }
146 
147 /**
148  * sdhci_s3c_set_clock - callback on clock change
149  * @host: The SDHCI host being changed
150  * @clock: The clock rate being requested.
151  *
152  * When the card's clock is going to be changed, look at the new frequency
153  * and find the best clock source to go with it.
154 */
155 static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
156 {
157         struct sdhci_s3c *ourhost = to_s3c(host);
158         unsigned int best = UINT_MAX;
159         unsigned int delta;
160         int best_src = 0;
161         int src;
162         u32 ctrl;
163 
164         /* don't bother if the clock is going off. */
165         if (clock == 0)
166                 return;
167 
168         for (src = 0; src < MAX_BUS_CLK; src++) {
169                 delta = sdhci_s3c_consider_clock(ourhost, src, clock);
170                 if (delta < best) {
171                         best = delta;
172                         best_src = src;
173                 }
174         }
175 
176         dev_dbg(&ourhost->pdev->dev,
177                 "selected source %d, clock %d, delta %d\n",
178                  best_src, clock, best);
179 
180         /* select the new clock source */
181         if (ourhost->cur_clk != best_src) {
182                 struct clk *clk = ourhost->clk_bus[best_src];
183 
184                 clk_prepare_enable(clk);
185                 if (ourhost->cur_clk >= 0)
186                         clk_disable_unprepare(
187                                         ourhost->clk_bus[ourhost->cur_clk]);
188 
189                 ourhost->cur_clk = best_src;
190                 host->max_clk = ourhost->clk_rates[best_src];
191         }
192 
193         /* turn clock off to card before changing clock source */
194         writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
195 
196         ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
197         ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
198         ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
199         writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
200 
201         /* reprogram default hardware configuration */
202         writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA,
203                 host->ioaddr + S3C64XX_SDHCI_CONTROL4);
204 
205         ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
206         ctrl |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
207                   S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
208                   S3C_SDHCI_CTRL2_ENFBCLKRX |
209                   S3C_SDHCI_CTRL2_DFCNT_NONE |
210                   S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
211         writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
212 
213         /* reconfigure the controller for new clock rate */
214         ctrl = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
215         if (clock < 25 * 1000000)
216                 ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 | S3C_SDHCI_CTRL3_FCSEL2);
217         writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);
218 }
219 
220 /**
221  * sdhci_s3c_get_min_clock - callback to get minimal supported clock value
222  * @host: The SDHCI host being queried
223  *
224  * To init mmc host properly a minimal clock value is needed. For high system
225  * bus clock's values the standard formula gives values out of allowed range.
226  * The clock still can be set to lower values, if clock source other then
227  * system bus is selected.
228 */
229 static unsigned int sdhci_s3c_get_min_clock(struct sdhci_host *host)
230 {
231         struct sdhci_s3c *ourhost = to_s3c(host);
232         unsigned long rate, min = ULONG_MAX;
233         int src;
234 
235         for (src = 0; src < MAX_BUS_CLK; src++) {
236                 rate = ourhost->clk_rates[src] / 256;
237                 if (!rate)
238                         continue;
239                 if (rate < min)
240                         min = rate;
241         }
242 
243         return min;
244 }
245 
246 /* sdhci_cmu_get_max_clk - callback to get maximum clock frequency.*/
247 static unsigned int sdhci_cmu_get_max_clock(struct sdhci_host *host)
248 {
249         struct sdhci_s3c *ourhost = to_s3c(host);
250         unsigned long rate, max = 0;
251         int src;
252 
253         for (src = 0; src < MAX_BUS_CLK; src++) {
254                 struct clk *clk;
255 
256                 clk = ourhost->clk_bus[src];
257                 if (IS_ERR(clk))
258                         continue;
259 
260                 rate = clk_round_rate(clk, ULONG_MAX);
261                 if (rate > max)
262                         max = rate;
263         }
264 
265         return max;
266 }
267 
268 /* sdhci_cmu_get_min_clock - callback to get minimal supported clock value. */
269 static unsigned int sdhci_cmu_get_min_clock(struct sdhci_host *host)
270 {
271         struct sdhci_s3c *ourhost = to_s3c(host);
272         unsigned long rate, min = ULONG_MAX;
273         int src;
274 
275         for (src = 0; src < MAX_BUS_CLK; src++) {
276                 struct clk *clk;
277 
278                 clk = ourhost->clk_bus[src];
279                 if (IS_ERR(clk))
280                         continue;
281 
282                 rate = clk_round_rate(clk, 0);
283                 if (rate < min)
284                         min = rate;
285         }
286 
287         return min;
288 }
289 
290 /* sdhci_cmu_set_clock - callback on clock change.*/
291 static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock)
292 {
293         struct sdhci_s3c *ourhost = to_s3c(host);
294         struct device *dev = &ourhost->pdev->dev;
295         unsigned long timeout;
296         u16 clk = 0;
297 
298         /* If the clock is going off, set to 0 at clock control register */
299         if (clock == 0) {
300                 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
301                 host->clock = clock;
302                 return;
303         }
304 
305         sdhci_s3c_set_clock(host, clock);
306 
307         clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock);
308 
309         host->clock = clock;
310 
311         clk = SDHCI_CLOCK_INT_EN;
312         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
313 
314         /* Wait max 20 ms */
315         timeout = 20;
316         while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
317                 & SDHCI_CLOCK_INT_STABLE)) {
318                 if (timeout == 0) {
319                         dev_err(dev, "%s: Internal clock never stabilised.\n",
320                                 mmc_hostname(host->mmc));
321                         return;
322                 }
323                 timeout--;
324                 mdelay(1);
325         }
326 
327         clk |= SDHCI_CLOCK_CARD_EN;
328         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
329 }
330 
331 /**
332  * sdhci_s3c_platform_bus_width - support 8bit buswidth
333  * @host: The SDHCI host being queried
334  * @width: MMC_BUS_WIDTH_ macro for the bus width being requested
335  *
336  * We have 8-bit width support but is not a v3 controller.
337  * So we add platform_bus_width() and support 8bit width.
338  */
339 static int sdhci_s3c_platform_bus_width(struct sdhci_host *host, int width)
340 {
341         u8 ctrl;
342 
343         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
344 
345         switch (width) {
346         case MMC_BUS_WIDTH_8:
347                 ctrl |= SDHCI_CTRL_8BITBUS;
348                 ctrl &= ~SDHCI_CTRL_4BITBUS;
349                 break;
350         case MMC_BUS_WIDTH_4:
351                 ctrl |= SDHCI_CTRL_4BITBUS;
352                 ctrl &= ~SDHCI_CTRL_8BITBUS;
353                 break;
354         default:
355                 ctrl &= ~SDHCI_CTRL_4BITBUS;
356                 ctrl &= ~SDHCI_CTRL_8BITBUS;
357                 break;
358         }
359 
360         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
361 
362         return 0;
363 }
364 
365 static struct sdhci_ops sdhci_s3c_ops = {
366         .get_max_clock          = sdhci_s3c_get_max_clk,
367         .set_clock              = sdhci_s3c_set_clock,
368         .get_min_clock          = sdhci_s3c_get_min_clock,
369         .platform_bus_width     = sdhci_s3c_platform_bus_width,
370 };
371 
372 static void sdhci_s3c_notify_change(struct platform_device *dev, int state)
373 {
374         struct sdhci_host *host = platform_get_drvdata(dev);
375 #ifdef CONFIG_PM_RUNTIME
376         struct sdhci_s3c *sc = sdhci_priv(host);
377 #endif
378         unsigned long flags;
379 
380         if (host) {
381                 spin_lock_irqsave(&host->lock, flags);
382                 if (state) {
383                         dev_dbg(&dev->dev, "card inserted.\n");
384 #ifdef CONFIG_PM_RUNTIME
385                         clk_prepare_enable(sc->clk_io);
386 #endif
387                         host->flags &= ~SDHCI_DEVICE_DEAD;
388                         host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
389                 } else {
390                         dev_dbg(&dev->dev, "card removed.\n");
391                         host->flags |= SDHCI_DEVICE_DEAD;
392                         host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
393 #ifdef CONFIG_PM_RUNTIME
394                         clk_disable_unprepare(sc->clk_io);
395 #endif
396                 }
397                 tasklet_schedule(&host->card_tasklet);
398                 spin_unlock_irqrestore(&host->lock, flags);
399         }
400 }
401 
402 static irqreturn_t sdhci_s3c_gpio_card_detect_thread(int irq, void *dev_id)
403 {
404         struct sdhci_s3c *sc = dev_id;
405         int status = gpio_get_value(sc->ext_cd_gpio);
406         if (sc->pdata->ext_cd_gpio_invert)
407                 status = !status;
408         sdhci_s3c_notify_change(sc->pdev, status);
409         return IRQ_HANDLED;
410 }
411 
412 static void sdhci_s3c_setup_card_detect_gpio(struct sdhci_s3c *sc)
413 {
414         struct s3c_sdhci_platdata *pdata = sc->pdata;
415         struct device *dev = &sc->pdev->dev;
416 
417         if (devm_gpio_request(dev, pdata->ext_cd_gpio, "SDHCI EXT CD") == 0) {
418                 sc->ext_cd_gpio = pdata->ext_cd_gpio;
419                 sc->ext_cd_irq = gpio_to_irq(pdata->ext_cd_gpio);
420                 if (sc->ext_cd_irq &&
421                     request_threaded_irq(sc->ext_cd_irq, NULL,
422                                          sdhci_s3c_gpio_card_detect_thread,
423                                          IRQF_TRIGGER_RISING |
424                                          IRQF_TRIGGER_FALLING |
425                                          IRQF_ONESHOT,
426                                          dev_name(dev), sc) == 0) {
427                         int status = gpio_get_value(sc->ext_cd_gpio);
428                         if (pdata->ext_cd_gpio_invert)
429                                 status = !status;
430                         sdhci_s3c_notify_change(sc->pdev, status);
431                 } else {
432                         dev_warn(dev, "cannot request irq for card detect\n");
433                         sc->ext_cd_irq = 0;
434                 }
435         } else {
436                 dev_err(dev, "cannot request gpio for card detect\n");
437         }
438 }
439 
440 #ifdef CONFIG_OF
441 static int sdhci_s3c_parse_dt(struct device *dev,
442                 struct sdhci_host *host, struct s3c_sdhci_platdata *pdata)
443 {
444         struct device_node *node = dev->of_node;
445         struct sdhci_s3c *ourhost = to_s3c(host);
446         u32 max_width;
447         int gpio;
448 
449         /* if the bus-width property is not specified, assume width as 1 */
450         if (of_property_read_u32(node, "bus-width", &max_width))
451                 max_width = 1;
452         pdata->max_width = max_width;
453 
454         /* get the card detection method */
455         if (of_get_property(node, "broken-cd", NULL)) {
456                 pdata->cd_type = S3C_SDHCI_CD_NONE;
457                 return 0;
458         }
459 
460         if (of_get_property(node, "non-removable", NULL)) {
461                 pdata->cd_type = S3C_SDHCI_CD_PERMANENT;
462                 return 0;
463         }
464 
465         gpio = of_get_named_gpio(node, "cd-gpios", 0);
466         if (gpio_is_valid(gpio)) {
467                 pdata->cd_type = S3C_SDHCI_CD_GPIO;
468                 pdata->ext_cd_gpio = gpio;
469                 ourhost->ext_cd_gpio = -1;
470                 if (of_get_property(node, "cd-inverted", NULL))
471                         pdata->ext_cd_gpio_invert = 1;
472                 return 0;
473         } else if (gpio != -ENOENT) {
474                 dev_err(dev, "invalid card detect gpio specified\n");
475                 return -EINVAL;
476         }
477 
478         /* assuming internal card detect that will be configured by pinctrl */
479         pdata->cd_type = S3C_SDHCI_CD_INTERNAL;
480         return 0;
481 }
482 #else
483 static int sdhci_s3c_parse_dt(struct device *dev,
484                 struct sdhci_host *host, struct s3c_sdhci_platdata *pdata)
485 {
486         return -EINVAL;
487 }
488 #endif
489 
490 static const struct of_device_id sdhci_s3c_dt_match[];
491 
492 static inline struct sdhci_s3c_drv_data *sdhci_s3c_get_driver_data(
493                         struct platform_device *pdev)
494 {
495 #ifdef CONFIG_OF
496         if (pdev->dev.of_node) {
497                 const struct of_device_id *match;
498                 match = of_match_node(sdhci_s3c_dt_match, pdev->dev.of_node);
499                 return (struct sdhci_s3c_drv_data *)match->data;
500         }
501 #endif
502         return (struct sdhci_s3c_drv_data *)
503                         platform_get_device_id(pdev)->driver_data;
504 }
505 
506 static int sdhci_s3c_probe(struct platform_device *pdev)
507 {
508         struct s3c_sdhci_platdata *pdata;
509         struct sdhci_s3c_drv_data *drv_data;
510         struct device *dev = &pdev->dev;
511         struct sdhci_host *host;
512         struct sdhci_s3c *sc;
513         struct resource *res;
514         int ret, irq, ptr, clks;
515 
516         if (!pdev->dev.platform_data && !pdev->dev.of_node) {
517                 dev_err(dev, "no device data specified\n");
518                 return -ENOENT;
519         }
520 
521         irq = platform_get_irq(pdev, 0);
522         if (irq < 0) {
523                 dev_err(dev, "no irq specified\n");
524                 return irq;
525         }
526 
527         host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c));
528         if (IS_ERR(host)) {
529                 dev_err(dev, "sdhci_alloc_host() failed\n");
530                 return PTR_ERR(host);
531         }
532         sc = sdhci_priv(host);
533 
534         pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
535         if (!pdata) {
536                 ret = -ENOMEM;
537                 goto err_pdata_io_clk;
538         }
539 
540         if (pdev->dev.of_node) {
541                 ret = sdhci_s3c_parse_dt(&pdev->dev, host, pdata);
542                 if (ret)
543                         goto err_pdata_io_clk;
544         } else {
545                 memcpy(pdata, pdev->dev.platform_data, sizeof(*pdata));
546                 sc->ext_cd_gpio = -1; /* invalid gpio number */
547         }
548 
549         drv_data = sdhci_s3c_get_driver_data(pdev);
550 
551         sc->host = host;
552         sc->pdev = pdev;
553         sc->pdata = pdata;
554         sc->cur_clk = -1;
555 
556         platform_set_drvdata(pdev, host);
557 
558         sc->clk_io = devm_clk_get(dev, "hsmmc");
559         if (IS_ERR(sc->clk_io)) {
560                 dev_err(dev, "failed to get io clock\n");
561                 ret = PTR_ERR(sc->clk_io);
562                 goto err_pdata_io_clk;
563         }
564 
565         /* enable the local io clock and keep it running for the moment. */
566         clk_prepare_enable(sc->clk_io);
567 
568         for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
569                 char name[14];
570 
571                 snprintf(name, 14, "mmc_busclk.%d", ptr);
572                 sc->clk_bus[ptr] = devm_clk_get(dev, name);
573                 if (IS_ERR(sc->clk_bus[ptr]))
574                         continue;
575 
576                 clks++;
577                 sc->clk_rates[ptr] = clk_get_rate(sc->clk_bus[ptr]);
578 
579                 dev_info(dev, "clock source %d: %s (%ld Hz)\n",
580                                 ptr, name, sc->clk_rates[ptr]);
581         }
582 
583         if (clks == 0) {
584                 dev_err(dev, "failed to find any bus clocks\n");
585                 ret = -ENOENT;
586                 goto err_no_busclks;
587         }
588 
589         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
590         host->ioaddr = devm_ioremap_resource(&pdev->dev, res);
591         if (IS_ERR(host->ioaddr)) {
592                 ret = PTR_ERR(host->ioaddr);
593                 goto err_req_regs;
594         }
595 
596         /* Ensure we have minimal gpio selected CMD/CLK/Detect */
597         if (pdata->cfg_gpio)
598                 pdata->cfg_gpio(pdev, pdata->max_width);
599 
600         host->hw_name = "samsung-hsmmc";
601         host->ops = &sdhci_s3c_ops;
602         host->quirks = 0;
603         host->quirks2 = 0;
604         host->irq = irq;
605 
606         /* Setup quirks for the controller */
607         host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC;
608         host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
609         if (drv_data)
610                 host->quirks |= drv_data->sdhci_quirks;
611 
612 #ifndef CONFIG_MMC_SDHCI_S3C_DMA
613 
614         /* we currently see overruns on errors, so disable the SDMA
615          * support as well. */
616         host->quirks |= SDHCI_QUIRK_BROKEN_DMA;
617 
618 #endif /* CONFIG_MMC_SDHCI_S3C_DMA */
619 
620         /* It seems we do not get an DATA transfer complete on non-busy
621          * transfers, not sure if this is a problem with this specific
622          * SDHCI block, or a missing configuration that needs to be set. */
623         host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ;
624 
625         /* This host supports the Auto CMD12 */
626         host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
627 
628         /* Samsung SoCs need BROKEN_ADMA_ZEROLEN_DESC */
629         host->quirks |= SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC;
630 
631         if (pdata->cd_type == S3C_SDHCI_CD_NONE ||
632             pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
633                 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
634 
635         if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
636                 host->mmc->caps = MMC_CAP_NONREMOVABLE;
637 
638         switch (pdata->max_width) {
639         case 8:
640                 host->mmc->caps |= MMC_CAP_8_BIT_DATA;
641         case 4:
642                 host->mmc->caps |= MMC_CAP_4_BIT_DATA;
643                 break;
644         }
645 
646         if (pdata->pm_caps)
647                 host->mmc->pm_caps |= pdata->pm_caps;
648 
649         host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
650                          SDHCI_QUIRK_32BIT_DMA_SIZE);
651 
652         /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */
653         host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK;
654 
655         /*
656          * If controller does not have internal clock divider,
657          * we can use overriding functions instead of default.
658          */
659         if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) {
660                 sdhci_s3c_ops.set_clock = sdhci_cmu_set_clock;
661                 sdhci_s3c_ops.get_min_clock = sdhci_cmu_get_min_clock;
662                 sdhci_s3c_ops.get_max_clock = sdhci_cmu_get_max_clock;
663         }
664 
665         /* It supports additional host capabilities if needed */
666         if (pdata->host_caps)
667                 host->mmc->caps |= pdata->host_caps;
668 
669         if (pdata->host_caps2)
670                 host->mmc->caps2 |= pdata->host_caps2;
671 
672         pm_runtime_enable(&pdev->dev);
673         pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
674         pm_runtime_use_autosuspend(&pdev->dev);
675         pm_suspend_ignore_children(&pdev->dev, 1);
676 
677         ret = sdhci_add_host(host);
678         if (ret) {
679                 dev_err(dev, "sdhci_add_host() failed\n");
680                 pm_runtime_forbid(&pdev->dev);
681                 pm_runtime_get_noresume(&pdev->dev);
682                 goto err_req_regs;
683         }
684 
685         /* The following two methods of card detection might call
686            sdhci_s3c_notify_change() immediately, so they can be called
687            only after sdhci_add_host(). Setup errors are ignored. */
688         if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_init)
689                 pdata->ext_cd_init(&sdhci_s3c_notify_change);
690         if (pdata->cd_type == S3C_SDHCI_CD_GPIO &&
691             gpio_is_valid(pdata->ext_cd_gpio))
692                 sdhci_s3c_setup_card_detect_gpio(sc);
693 
694 #ifdef CONFIG_PM_RUNTIME
695         if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL)
696                 clk_disable_unprepare(sc->clk_io);
697 #endif
698         return 0;
699 
700  err_req_regs:
701  err_no_busclks:
702         clk_disable_unprepare(sc->clk_io);
703 
704  err_pdata_io_clk:
705         sdhci_free_host(host);
706 
707         return ret;
708 }
709 
710 static int sdhci_s3c_remove(struct platform_device *pdev)
711 {
712         struct sdhci_host *host =  platform_get_drvdata(pdev);
713         struct sdhci_s3c *sc = sdhci_priv(host);
714         struct s3c_sdhci_platdata *pdata = sc->pdata;
715 
716         if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_cleanup)
717                 pdata->ext_cd_cleanup(&sdhci_s3c_notify_change);
718 
719         if (sc->ext_cd_irq)
720                 free_irq(sc->ext_cd_irq, sc);
721 
722 #ifdef CONFIG_PM_RUNTIME
723         if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL)
724                 clk_prepare_enable(sc->clk_io);
725 #endif
726         sdhci_remove_host(host, 1);
727 
728         pm_runtime_dont_use_autosuspend(&pdev->dev);
729         pm_runtime_disable(&pdev->dev);
730 
731         clk_disable_unprepare(sc->clk_io);
732 
733         sdhci_free_host(host);
734 
735         return 0;
736 }
737 
738 #ifdef CONFIG_PM_SLEEP
739 static int sdhci_s3c_suspend(struct device *dev)
740 {
741         struct sdhci_host *host = dev_get_drvdata(dev);
742 
743         return sdhci_suspend_host(host);
744 }
745 
746 static int sdhci_s3c_resume(struct device *dev)
747 {
748         struct sdhci_host *host = dev_get_drvdata(dev);
749 
750         return sdhci_resume_host(host);
751 }
752 #endif
753 
754 #ifdef CONFIG_PM_RUNTIME
755 static int sdhci_s3c_runtime_suspend(struct device *dev)
756 {
757         struct sdhci_host *host = dev_get_drvdata(dev);
758         struct sdhci_s3c *ourhost = to_s3c(host);
759         struct clk *busclk = ourhost->clk_io;
760         int ret;
761 
762         ret = sdhci_runtime_suspend_host(host);
763 
764         if (ourhost->cur_clk >= 0)
765                 clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]);
766         clk_disable_unprepare(busclk);
767         return ret;
768 }
769 
770 static int sdhci_s3c_runtime_resume(struct device *dev)
771 {
772         struct sdhci_host *host = dev_get_drvdata(dev);
773         struct sdhci_s3c *ourhost = to_s3c(host);
774         struct clk *busclk = ourhost->clk_io;
775         int ret;
776 
777         clk_prepare_enable(busclk);
778         if (ourhost->cur_clk >= 0)
779                 clk_prepare_enable(ourhost->clk_bus[ourhost->cur_clk]);
780         ret = sdhci_runtime_resume_host(host);
781         return ret;
782 }
783 #endif
784 
785 #ifdef CONFIG_PM
786 static const struct dev_pm_ops sdhci_s3c_pmops = {
787         SET_SYSTEM_SLEEP_PM_OPS(sdhci_s3c_suspend, sdhci_s3c_resume)
788         SET_RUNTIME_PM_OPS(sdhci_s3c_runtime_suspend, sdhci_s3c_runtime_resume,
789                            NULL)
790 };
791 
792 #define SDHCI_S3C_PMOPS (&sdhci_s3c_pmops)
793 
794 #else
795 #define SDHCI_S3C_PMOPS NULL
796 #endif
797 
798 #if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS4212)
799 static struct sdhci_s3c_drv_data exynos4_sdhci_drv_data = {
800         .sdhci_quirks = SDHCI_QUIRK_NONSTANDARD_CLOCK,
801 };
802 #define EXYNOS4_SDHCI_DRV_DATA ((kernel_ulong_t)&exynos4_sdhci_drv_data)
803 #else
804 #define EXYNOS4_SDHCI_DRV_DATA ((kernel_ulong_t)NULL)
805 #endif
806 
807 static struct platform_device_id sdhci_s3c_driver_ids[] = {
808         {
809                 .name           = "s3c-sdhci",
810                 .driver_data    = (kernel_ulong_t)NULL,
811         }, {
812                 .name           = "exynos4-sdhci",
813                 .driver_data    = EXYNOS4_SDHCI_DRV_DATA,
814         },
815         { }
816 };
817 MODULE_DEVICE_TABLE(platform, sdhci_s3c_driver_ids);
818 
819 #ifdef CONFIG_OF
820 static const struct of_device_id sdhci_s3c_dt_match[] = {
821         { .compatible = "samsung,s3c6410-sdhci", },
822         { .compatible = "samsung,exynos4210-sdhci",
823                 .data = (void *)EXYNOS4_SDHCI_DRV_DATA },
824         {},
825 };
826 MODULE_DEVICE_TABLE(of, sdhci_s3c_dt_match);
827 #endif
828 
829 static struct platform_driver sdhci_s3c_driver = {
830         .probe          = sdhci_s3c_probe,
831         .remove         = sdhci_s3c_remove,
832         .id_table       = sdhci_s3c_driver_ids,
833         .driver         = {
834                 .owner  = THIS_MODULE,
835                 .name   = "s3c-sdhci",
836                 .of_match_table = of_match_ptr(sdhci_s3c_dt_match),
837                 .pm     = SDHCI_S3C_PMOPS,
838         },
839 };
840 
841 module_platform_driver(sdhci_s3c_driver);
842 
843 MODULE_DESCRIPTION("Samsung SDHCI (HSMMC) glue");
844 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
845 MODULE_LICENSE("GPL v2");
846 MODULE_ALIAS("platform:s3c-sdhci");
847 

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