Version:  2.6.34 2.6.35 2.6.36 2.6.37 2.6.38 2.6.39 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14

Linux/drivers/mmc/host/sdhci-pci.c

  1 /*  linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
  2  *
  3  *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
  4  *
  5  * This program is free software; you can redistribute it and/or modify
  6  * it under the terms of the GNU General Public License as published by
  7  * the Free Software Foundation; either version 2 of the License, or (at
  8  * your option) any later version.
  9  *
 10  * Thanks to the following companies for their support:
 11  *
 12  *     - JMicron (hardware and technical support)
 13  */
 14 
 15 #include <linux/delay.h>
 16 #include <linux/highmem.h>
 17 #include <linux/module.h>
 18 #include <linux/pci.h>
 19 #include <linux/dma-mapping.h>
 20 #include <linux/slab.h>
 21 #include <linux/device.h>
 22 #include <linux/mmc/host.h>
 23 #include <linux/scatterlist.h>
 24 #include <linux/io.h>
 25 #include <linux/gpio.h>
 26 #include <linux/pm_runtime.h>
 27 #include <linux/mmc/sdhci-pci-data.h>
 28 
 29 #include "sdhci.h"
 30 #include "sdhci-pci.h"
 31 #include "sdhci-pci-o2micro.h"
 32 
 33 /*****************************************************************************\
 34  *                                                                           *
 35  * Hardware specific quirk handling                                          *
 36  *                                                                           *
 37 \*****************************************************************************/
 38 
 39 static int ricoh_probe(struct sdhci_pci_chip *chip)
 40 {
 41         if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
 42             chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
 43                 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
 44         return 0;
 45 }
 46 
 47 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
 48 {
 49         slot->host->caps =
 50                 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
 51                         & SDHCI_TIMEOUT_CLK_MASK) |
 52 
 53                 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
 54                         & SDHCI_CLOCK_BASE_MASK) |
 55 
 56                 SDHCI_TIMEOUT_CLK_UNIT |
 57                 SDHCI_CAN_VDD_330 |
 58                 SDHCI_CAN_DO_HISPD |
 59                 SDHCI_CAN_DO_SDMA;
 60         return 0;
 61 }
 62 
 63 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
 64 {
 65         /* Apply a delay to allow controller to settle */
 66         /* Otherwise it becomes confused if card state changed
 67                 during suspend */
 68         msleep(500);
 69         return 0;
 70 }
 71 
 72 static const struct sdhci_pci_fixes sdhci_ricoh = {
 73         .probe          = ricoh_probe,
 74         .quirks         = SDHCI_QUIRK_32BIT_DMA_ADDR |
 75                           SDHCI_QUIRK_FORCE_DMA |
 76                           SDHCI_QUIRK_CLOCK_BEFORE_RESET,
 77 };
 78 
 79 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
 80         .probe_slot     = ricoh_mmc_probe_slot,
 81         .resume         = ricoh_mmc_resume,
 82         .quirks         = SDHCI_QUIRK_32BIT_DMA_ADDR |
 83                           SDHCI_QUIRK_CLOCK_BEFORE_RESET |
 84                           SDHCI_QUIRK_NO_CARD_NO_RESET |
 85                           SDHCI_QUIRK_MISSING_CAPS
 86 };
 87 
 88 static const struct sdhci_pci_fixes sdhci_ene_712 = {
 89         .quirks         = SDHCI_QUIRK_SINGLE_POWER_WRITE |
 90                           SDHCI_QUIRK_BROKEN_DMA,
 91 };
 92 
 93 static const struct sdhci_pci_fixes sdhci_ene_714 = {
 94         .quirks         = SDHCI_QUIRK_SINGLE_POWER_WRITE |
 95                           SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
 96                           SDHCI_QUIRK_BROKEN_DMA,
 97 };
 98 
 99 static const struct sdhci_pci_fixes sdhci_cafe = {
100         .quirks         = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
101                           SDHCI_QUIRK_NO_BUSY_IRQ |
102                           SDHCI_QUIRK_BROKEN_CARD_DETECTION |
103                           SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
104 };
105 
106 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
107 {
108         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
109         return 0;
110 }
111 
112 /*
113  * ADMA operation is disabled for Moorestown platform due to
114  * hardware bugs.
115  */
116 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
117 {
118         /*
119          * slots number is fixed here for MRST as SDIO3/5 are never used and
120          * have hardware bugs.
121          */
122         chip->num_slots = 1;
123         return 0;
124 }
125 
126 static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
127 {
128         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
129         return 0;
130 }
131 
132 #ifdef CONFIG_PM_RUNTIME
133 
134 static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
135 {
136         struct sdhci_pci_slot *slot = dev_id;
137         struct sdhci_host *host = slot->host;
138 
139         mmc_detect_change(host->mmc, msecs_to_jiffies(200));
140         return IRQ_HANDLED;
141 }
142 
143 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
144 {
145         int err, irq, gpio = slot->cd_gpio;
146 
147         slot->cd_gpio = -EINVAL;
148         slot->cd_irq = -EINVAL;
149 
150         if (!gpio_is_valid(gpio))
151                 return;
152 
153         err = gpio_request(gpio, "sd_cd");
154         if (err < 0)
155                 goto out;
156 
157         err = gpio_direction_input(gpio);
158         if (err < 0)
159                 goto out_free;
160 
161         irq = gpio_to_irq(gpio);
162         if (irq < 0)
163                 goto out_free;
164 
165         err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
166                           IRQF_TRIGGER_FALLING, "sd_cd", slot);
167         if (err)
168                 goto out_free;
169 
170         slot->cd_gpio = gpio;
171         slot->cd_irq = irq;
172 
173         return;
174 
175 out_free:
176         gpio_free(gpio);
177 out:
178         dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
179 }
180 
181 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
182 {
183         if (slot->cd_irq >= 0)
184                 free_irq(slot->cd_irq, slot);
185         if (gpio_is_valid(slot->cd_gpio))
186                 gpio_free(slot->cd_gpio);
187 }
188 
189 #else
190 
191 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
192 {
193 }
194 
195 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
196 {
197 }
198 
199 #endif
200 
201 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
202 {
203         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
204         slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC |
205                                   MMC_CAP2_HC_ERASE_SZ;
206         return 0;
207 }
208 
209 static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
210 {
211         slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
212         return 0;
213 }
214 
215 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
216         .quirks         = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
217         .probe_slot     = mrst_hc_probe_slot,
218 };
219 
220 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
221         .quirks         = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
222         .probe          = mrst_hc_probe,
223 };
224 
225 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
226         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
227         .allow_runtime_pm = true,
228         .own_cd_for_runtime_pm = true,
229 };
230 
231 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
232         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
233         .quirks2        = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
234         .allow_runtime_pm = true,
235         .probe_slot     = mfd_sdio_probe_slot,
236 };
237 
238 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
239         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
240         .allow_runtime_pm = true,
241         .probe_slot     = mfd_emmc_probe_slot,
242 };
243 
244 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
245         .quirks         = SDHCI_QUIRK_BROKEN_ADMA,
246         .probe_slot     = pch_hc_probe_slot,
247 };
248 
249 static void sdhci_pci_int_hw_reset(struct sdhci_host *host)
250 {
251         u8 reg;
252 
253         reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
254         reg |= 0x10;
255         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
256         /* For eMMC, minimum is 1us but give it 9us for good measure */
257         udelay(9);
258         reg &= ~0x10;
259         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
260         /* For eMMC, minimum is 200us but give it 300us for good measure */
261         usleep_range(300, 1000);
262 }
263 
264 static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
265 {
266         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
267                                  MMC_CAP_HW_RESET;
268         slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
269         slot->hw_reset = sdhci_pci_int_hw_reset;
270         return 0;
271 }
272 
273 static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
274 {
275         slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
276         return 0;
277 }
278 
279 static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
280         .allow_runtime_pm = true,
281         .probe_slot     = byt_emmc_probe_slot,
282 };
283 
284 static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
285         .quirks2        = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
286         .allow_runtime_pm = true,
287         .probe_slot     = byt_sdio_probe_slot,
288 };
289 
290 static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
291         .quirks2        = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON,
292         .allow_runtime_pm = true,
293         .own_cd_for_runtime_pm = true,
294 };
295 
296 /* Define Host controllers for Intel Merrifield platform */
297 #define INTEL_MRFL_EMMC_0       0
298 #define INTEL_MRFL_EMMC_1       1
299 
300 static int intel_mrfl_mmc_probe_slot(struct sdhci_pci_slot *slot)
301 {
302         if ((PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_0) &&
303             (PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_1))
304                 /* SD support is not ready yet */
305                 return -ENODEV;
306 
307         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
308                                  MMC_CAP_1_8V_DDR;
309 
310         return 0;
311 }
312 
313 static const struct sdhci_pci_fixes sdhci_intel_mrfl_mmc = {
314         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
315         .quirks2        = SDHCI_QUIRK2_BROKEN_HS200,
316         .probe_slot     = intel_mrfl_mmc_probe_slot,
317 };
318 
319 /* O2Micro extra registers */
320 #define O2_SD_LOCK_WP           0xD3
321 #define O2_SD_MULTI_VCC3V       0xEE
322 #define O2_SD_CLKREQ            0xEC
323 #define O2_SD_CAPS              0xE0
324 #define O2_SD_ADMA1             0xE2
325 #define O2_SD_ADMA2             0xE7
326 #define O2_SD_INF_MOD           0xF1
327 
328 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
329 {
330         u8 scratch;
331         int ret;
332 
333         ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
334         if (ret)
335                 return ret;
336 
337         /*
338          * Turn PMOS on [bit 0], set over current detection to 2.4 V
339          * [bit 1:2] and enable over current debouncing [bit 6].
340          */
341         if (on)
342                 scratch |= 0x47;
343         else
344                 scratch &= ~0x47;
345 
346         ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
347         if (ret)
348                 return ret;
349 
350         return 0;
351 }
352 
353 static int jmicron_probe(struct sdhci_pci_chip *chip)
354 {
355         int ret;
356         u16 mmcdev = 0;
357 
358         if (chip->pdev->revision == 0) {
359                 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
360                           SDHCI_QUIRK_32BIT_DMA_SIZE |
361                           SDHCI_QUIRK_32BIT_ADMA_SIZE |
362                           SDHCI_QUIRK_RESET_AFTER_REQUEST |
363                           SDHCI_QUIRK_BROKEN_SMALL_PIO;
364         }
365 
366         /*
367          * JMicron chips can have two interfaces to the same hardware
368          * in order to work around limitations in Microsoft's driver.
369          * We need to make sure we only bind to one of them.
370          *
371          * This code assumes two things:
372          *
373          * 1. The PCI code adds subfunctions in order.
374          *
375          * 2. The MMC interface has a lower subfunction number
376          *    than the SD interface.
377          */
378         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
379                 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
380         else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
381                 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
382 
383         if (mmcdev) {
384                 struct pci_dev *sd_dev;
385 
386                 sd_dev = NULL;
387                 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
388                                                 mmcdev, sd_dev)) != NULL) {
389                         if ((PCI_SLOT(chip->pdev->devfn) ==
390                                 PCI_SLOT(sd_dev->devfn)) &&
391                                 (chip->pdev->bus == sd_dev->bus))
392                                 break;
393                 }
394 
395                 if (sd_dev) {
396                         pci_dev_put(sd_dev);
397                         dev_info(&chip->pdev->dev, "Refusing to bind to "
398                                 "secondary interface.\n");
399                         return -ENODEV;
400                 }
401         }
402 
403         /*
404          * JMicron chips need a bit of a nudge to enable the power
405          * output pins.
406          */
407         ret = jmicron_pmos(chip, 1);
408         if (ret) {
409                 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
410                 return ret;
411         }
412 
413         /* quirk for unsable RO-detection on JM388 chips */
414         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
415             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
416                 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
417 
418         return 0;
419 }
420 
421 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
422 {
423         u8 scratch;
424 
425         scratch = readb(host->ioaddr + 0xC0);
426 
427         if (on)
428                 scratch |= 0x01;
429         else
430                 scratch &= ~0x01;
431 
432         writeb(scratch, host->ioaddr + 0xC0);
433 }
434 
435 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
436 {
437         if (slot->chip->pdev->revision == 0) {
438                 u16 version;
439 
440                 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
441                 version = (version & SDHCI_VENDOR_VER_MASK) >>
442                         SDHCI_VENDOR_VER_SHIFT;
443 
444                 /*
445                  * Older versions of the chip have lots of nasty glitches
446                  * in the ADMA engine. It's best just to avoid it
447                  * completely.
448                  */
449                 if (version < 0xAC)
450                         slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
451         }
452 
453         /* JM388 MMC doesn't support 1.8V while SD supports it */
454         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
455                 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
456                         MMC_VDD_29_30 | MMC_VDD_30_31 |
457                         MMC_VDD_165_195; /* allow 1.8V */
458                 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
459                         MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
460         }
461 
462         /*
463          * The secondary interface requires a bit set to get the
464          * interrupts.
465          */
466         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
467             slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
468                 jmicron_enable_mmc(slot->host, 1);
469 
470         slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
471 
472         return 0;
473 }
474 
475 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
476 {
477         if (dead)
478                 return;
479 
480         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
481             slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
482                 jmicron_enable_mmc(slot->host, 0);
483 }
484 
485 static int jmicron_suspend(struct sdhci_pci_chip *chip)
486 {
487         int i;
488 
489         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
490             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
491                 for (i = 0; i < chip->num_slots; i++)
492                         jmicron_enable_mmc(chip->slots[i]->host, 0);
493         }
494 
495         return 0;
496 }
497 
498 static int jmicron_resume(struct sdhci_pci_chip *chip)
499 {
500         int ret, i;
501 
502         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
503             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
504                 for (i = 0; i < chip->num_slots; i++)
505                         jmicron_enable_mmc(chip->slots[i]->host, 1);
506         }
507 
508         ret = jmicron_pmos(chip, 1);
509         if (ret) {
510                 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
511                 return ret;
512         }
513 
514         return 0;
515 }
516 
517 static const struct sdhci_pci_fixes sdhci_o2 = {
518         .probe = sdhci_pci_o2_probe,
519         .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
520         .probe_slot = sdhci_pci_o2_probe_slot,
521         .resume = sdhci_pci_o2_resume,
522 };
523 
524 static const struct sdhci_pci_fixes sdhci_jmicron = {
525         .probe          = jmicron_probe,
526 
527         .probe_slot     = jmicron_probe_slot,
528         .remove_slot    = jmicron_remove_slot,
529 
530         .suspend        = jmicron_suspend,
531         .resume         = jmicron_resume,
532 };
533 
534 /* SysKonnect CardBus2SDIO extra registers */
535 #define SYSKT_CTRL              0x200
536 #define SYSKT_RDFIFO_STAT       0x204
537 #define SYSKT_WRFIFO_STAT       0x208
538 #define SYSKT_POWER_DATA        0x20c
539 #define   SYSKT_POWER_330       0xef
540 #define   SYSKT_POWER_300       0xf8
541 #define   SYSKT_POWER_184       0xcc
542 #define SYSKT_POWER_CMD         0x20d
543 #define   SYSKT_POWER_START     (1 << 7)
544 #define SYSKT_POWER_STATUS      0x20e
545 #define   SYSKT_POWER_STATUS_OK (1 << 0)
546 #define SYSKT_BOARD_REV         0x210
547 #define SYSKT_CHIP_REV          0x211
548 #define SYSKT_CONF_DATA         0x212
549 #define   SYSKT_CONF_DATA_1V8   (1 << 2)
550 #define   SYSKT_CONF_DATA_2V5   (1 << 1)
551 #define   SYSKT_CONF_DATA_3V3   (1 << 0)
552 
553 static int syskt_probe(struct sdhci_pci_chip *chip)
554 {
555         if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
556                 chip->pdev->class &= ~0x0000FF;
557                 chip->pdev->class |= PCI_SDHCI_IFDMA;
558         }
559         return 0;
560 }
561 
562 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
563 {
564         int tm, ps;
565 
566         u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
567         u8  chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
568         dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
569                                          "board rev %d.%d, chip rev %d.%d\n",
570                                          board_rev >> 4, board_rev & 0xf,
571                                          chip_rev >> 4,  chip_rev & 0xf);
572         if (chip_rev >= 0x20)
573                 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
574 
575         writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
576         writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
577         udelay(50);
578         tm = 10;  /* Wait max 1 ms */
579         do {
580                 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
581                 if (ps & SYSKT_POWER_STATUS_OK)
582                         break;
583                 udelay(100);
584         } while (--tm);
585         if (!tm) {
586                 dev_err(&slot->chip->pdev->dev,
587                         "power regulator never stabilized");
588                 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
589                 return -ENODEV;
590         }
591 
592         return 0;
593 }
594 
595 static const struct sdhci_pci_fixes sdhci_syskt = {
596         .quirks         = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
597         .probe          = syskt_probe,
598         .probe_slot     = syskt_probe_slot,
599 };
600 
601 static int via_probe(struct sdhci_pci_chip *chip)
602 {
603         if (chip->pdev->revision == 0x10)
604                 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
605 
606         return 0;
607 }
608 
609 static const struct sdhci_pci_fixes sdhci_via = {
610         .probe          = via_probe,
611 };
612 
613 static const struct pci_device_id pci_ids[] = {
614         {
615                 .vendor         = PCI_VENDOR_ID_RICOH,
616                 .device         = PCI_DEVICE_ID_RICOH_R5C822,
617                 .subvendor      = PCI_ANY_ID,
618                 .subdevice      = PCI_ANY_ID,
619                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh,
620         },
621 
622         {
623                 .vendor         = PCI_VENDOR_ID_RICOH,
624                 .device         = 0x843,
625                 .subvendor      = PCI_ANY_ID,
626                 .subdevice      = PCI_ANY_ID,
627                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
628         },
629 
630         {
631                 .vendor         = PCI_VENDOR_ID_RICOH,
632                 .device         = 0xe822,
633                 .subvendor      = PCI_ANY_ID,
634                 .subdevice      = PCI_ANY_ID,
635                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
636         },
637 
638         {
639                 .vendor         = PCI_VENDOR_ID_RICOH,
640                 .device         = 0xe823,
641                 .subvendor      = PCI_ANY_ID,
642                 .subdevice      = PCI_ANY_ID,
643                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
644         },
645 
646         {
647                 .vendor         = PCI_VENDOR_ID_ENE,
648                 .device         = PCI_DEVICE_ID_ENE_CB712_SD,
649                 .subvendor      = PCI_ANY_ID,
650                 .subdevice      = PCI_ANY_ID,
651                 .driver_data    = (kernel_ulong_t)&sdhci_ene_712,
652         },
653 
654         {
655                 .vendor         = PCI_VENDOR_ID_ENE,
656                 .device         = PCI_DEVICE_ID_ENE_CB712_SD_2,
657                 .subvendor      = PCI_ANY_ID,
658                 .subdevice      = PCI_ANY_ID,
659                 .driver_data    = (kernel_ulong_t)&sdhci_ene_712,
660         },
661 
662         {
663                 .vendor         = PCI_VENDOR_ID_ENE,
664                 .device         = PCI_DEVICE_ID_ENE_CB714_SD,
665                 .subvendor      = PCI_ANY_ID,
666                 .subdevice      = PCI_ANY_ID,
667                 .driver_data    = (kernel_ulong_t)&sdhci_ene_714,
668         },
669 
670         {
671                 .vendor         = PCI_VENDOR_ID_ENE,
672                 .device         = PCI_DEVICE_ID_ENE_CB714_SD_2,
673                 .subvendor      = PCI_ANY_ID,
674                 .subdevice      = PCI_ANY_ID,
675                 .driver_data    = (kernel_ulong_t)&sdhci_ene_714,
676         },
677 
678         {
679                 .vendor         = PCI_VENDOR_ID_MARVELL,
680                 .device         = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
681                 .subvendor      = PCI_ANY_ID,
682                 .subdevice      = PCI_ANY_ID,
683                 .driver_data    = (kernel_ulong_t)&sdhci_cafe,
684         },
685 
686         {
687                 .vendor         = PCI_VENDOR_ID_JMICRON,
688                 .device         = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
689                 .subvendor      = PCI_ANY_ID,
690                 .subdevice      = PCI_ANY_ID,
691                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
692         },
693 
694         {
695                 .vendor         = PCI_VENDOR_ID_JMICRON,
696                 .device         = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
697                 .subvendor      = PCI_ANY_ID,
698                 .subdevice      = PCI_ANY_ID,
699                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
700         },
701 
702         {
703                 .vendor         = PCI_VENDOR_ID_JMICRON,
704                 .device         = PCI_DEVICE_ID_JMICRON_JMB388_SD,
705                 .subvendor      = PCI_ANY_ID,
706                 .subdevice      = PCI_ANY_ID,
707                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
708         },
709 
710         {
711                 .vendor         = PCI_VENDOR_ID_JMICRON,
712                 .device         = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
713                 .subvendor      = PCI_ANY_ID,
714                 .subdevice      = PCI_ANY_ID,
715                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
716         },
717 
718         {
719                 .vendor         = PCI_VENDOR_ID_SYSKONNECT,
720                 .device         = 0x8000,
721                 .subvendor      = PCI_ANY_ID,
722                 .subdevice      = PCI_ANY_ID,
723                 .driver_data    = (kernel_ulong_t)&sdhci_syskt,
724         },
725 
726         {
727                 .vendor         = PCI_VENDOR_ID_VIA,
728                 .device         = 0x95d0,
729                 .subvendor      = PCI_ANY_ID,
730                 .subdevice      = PCI_ANY_ID,
731                 .driver_data    = (kernel_ulong_t)&sdhci_via,
732         },
733 
734         {
735                 .vendor         = PCI_VENDOR_ID_INTEL,
736                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD0,
737                 .subvendor      = PCI_ANY_ID,
738                 .subdevice      = PCI_ANY_ID,
739                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
740         },
741 
742         {
743                 .vendor         = PCI_VENDOR_ID_INTEL,
744                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD1,
745                 .subvendor      = PCI_ANY_ID,
746                 .subdevice      = PCI_ANY_ID,
747                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
748         },
749 
750         {
751                 .vendor         = PCI_VENDOR_ID_INTEL,
752                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD2,
753                 .subvendor      = PCI_ANY_ID,
754                 .subdevice      = PCI_ANY_ID,
755                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
756         },
757 
758         {
759                 .vendor         = PCI_VENDOR_ID_INTEL,
760                 .device         = PCI_DEVICE_ID_INTEL_MFD_SD,
761                 .subvendor      = PCI_ANY_ID,
762                 .subdevice      = PCI_ANY_ID,
763                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sd,
764         },
765 
766         {
767                 .vendor         = PCI_VENDOR_ID_INTEL,
768                 .device         = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
769                 .subvendor      = PCI_ANY_ID,
770                 .subdevice      = PCI_ANY_ID,
771                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
772         },
773 
774         {
775                 .vendor         = PCI_VENDOR_ID_INTEL,
776                 .device         = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
777                 .subvendor      = PCI_ANY_ID,
778                 .subdevice      = PCI_ANY_ID,
779                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
780         },
781 
782         {
783                 .vendor         = PCI_VENDOR_ID_INTEL,
784                 .device         = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
785                 .subvendor      = PCI_ANY_ID,
786                 .subdevice      = PCI_ANY_ID,
787                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
788         },
789 
790         {
791                 .vendor         = PCI_VENDOR_ID_INTEL,
792                 .device         = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
793                 .subvendor      = PCI_ANY_ID,
794                 .subdevice      = PCI_ANY_ID,
795                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
796         },
797 
798         {
799                 .vendor         = PCI_VENDOR_ID_INTEL,
800                 .device         = PCI_DEVICE_ID_INTEL_PCH_SDIO0,
801                 .subvendor      = PCI_ANY_ID,
802                 .subdevice      = PCI_ANY_ID,
803                 .driver_data    = (kernel_ulong_t)&sdhci_intel_pch_sdio,
804         },
805 
806         {
807                 .vendor         = PCI_VENDOR_ID_INTEL,
808                 .device         = PCI_DEVICE_ID_INTEL_PCH_SDIO1,
809                 .subvendor      = PCI_ANY_ID,
810                 .subdevice      = PCI_ANY_ID,
811                 .driver_data    = (kernel_ulong_t)&sdhci_intel_pch_sdio,
812         },
813 
814         {
815                 .vendor         = PCI_VENDOR_ID_INTEL,
816                 .device         = PCI_DEVICE_ID_INTEL_BYT_EMMC,
817                 .subvendor      = PCI_ANY_ID,
818                 .subdevice      = PCI_ANY_ID,
819                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
820         },
821 
822         {
823                 .vendor         = PCI_VENDOR_ID_INTEL,
824                 .device         = PCI_DEVICE_ID_INTEL_BYT_SDIO,
825                 .subvendor      = PCI_ANY_ID,
826                 .subdevice      = PCI_ANY_ID,
827                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
828         },
829 
830         {
831                 .vendor         = PCI_VENDOR_ID_INTEL,
832                 .device         = PCI_DEVICE_ID_INTEL_BYT_SD,
833                 .subvendor      = PCI_ANY_ID,
834                 .subdevice      = PCI_ANY_ID,
835                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
836         },
837 
838         {
839                 .vendor         = PCI_VENDOR_ID_INTEL,
840                 .device         = PCI_DEVICE_ID_INTEL_BYT_EMMC2,
841                 .subvendor      = PCI_ANY_ID,
842                 .subdevice      = PCI_ANY_ID,
843                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
844         },
845 
846 
847         {
848                 .vendor         = PCI_VENDOR_ID_INTEL,
849                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO0,
850                 .subvendor      = PCI_ANY_ID,
851                 .subdevice      = PCI_ANY_ID,
852                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sd,
853         },
854 
855         {
856                 .vendor         = PCI_VENDOR_ID_INTEL,
857                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO1,
858                 .subvendor      = PCI_ANY_ID,
859                 .subdevice      = PCI_ANY_ID,
860                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
861         },
862 
863         {
864                 .vendor         = PCI_VENDOR_ID_INTEL,
865                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO2,
866                 .subvendor      = PCI_ANY_ID,
867                 .subdevice      = PCI_ANY_ID,
868                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
869         },
870 
871         {
872                 .vendor         = PCI_VENDOR_ID_INTEL,
873                 .device         = PCI_DEVICE_ID_INTEL_CLV_EMMC0,
874                 .subvendor      = PCI_ANY_ID,
875                 .subdevice      = PCI_ANY_ID,
876                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
877         },
878 
879         {
880                 .vendor         = PCI_VENDOR_ID_INTEL,
881                 .device         = PCI_DEVICE_ID_INTEL_CLV_EMMC1,
882                 .subvendor      = PCI_ANY_ID,
883                 .subdevice      = PCI_ANY_ID,
884                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
885         },
886 
887         {
888                 .vendor         = PCI_VENDOR_ID_INTEL,
889                 .device         = PCI_DEVICE_ID_INTEL_MRFL_MMC,
890                 .subvendor      = PCI_ANY_ID,
891                 .subdevice      = PCI_ANY_ID,
892                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrfl_mmc,
893         },
894         {
895                 .vendor         = PCI_VENDOR_ID_O2,
896                 .device         = PCI_DEVICE_ID_O2_8120,
897                 .subvendor      = PCI_ANY_ID,
898                 .subdevice      = PCI_ANY_ID,
899                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
900         },
901 
902         {
903                 .vendor         = PCI_VENDOR_ID_O2,
904                 .device         = PCI_DEVICE_ID_O2_8220,
905                 .subvendor      = PCI_ANY_ID,
906                 .subdevice      = PCI_ANY_ID,
907                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
908         },
909 
910         {
911                 .vendor         = PCI_VENDOR_ID_O2,
912                 .device         = PCI_DEVICE_ID_O2_8221,
913                 .subvendor      = PCI_ANY_ID,
914                 .subdevice      = PCI_ANY_ID,
915                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
916         },
917 
918         {
919                 .vendor         = PCI_VENDOR_ID_O2,
920                 .device         = PCI_DEVICE_ID_O2_8320,
921                 .subvendor      = PCI_ANY_ID,
922                 .subdevice      = PCI_ANY_ID,
923                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
924         },
925 
926         {
927                 .vendor         = PCI_VENDOR_ID_O2,
928                 .device         = PCI_DEVICE_ID_O2_8321,
929                 .subvendor      = PCI_ANY_ID,
930                 .subdevice      = PCI_ANY_ID,
931                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
932         },
933 
934         {
935                 .vendor         = PCI_VENDOR_ID_O2,
936                 .device         = PCI_DEVICE_ID_O2_FUJIN2,
937                 .subvendor      = PCI_ANY_ID,
938                 .subdevice      = PCI_ANY_ID,
939                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
940         },
941 
942         {
943                 .vendor         = PCI_VENDOR_ID_O2,
944                 .device         = PCI_DEVICE_ID_O2_SDS0,
945                 .subvendor      = PCI_ANY_ID,
946                 .subdevice      = PCI_ANY_ID,
947                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
948         },
949 
950         {
951                 .vendor         = PCI_VENDOR_ID_O2,
952                 .device         = PCI_DEVICE_ID_O2_SDS1,
953                 .subvendor      = PCI_ANY_ID,
954                 .subdevice      = PCI_ANY_ID,
955                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
956         },
957 
958         {
959                 .vendor         = PCI_VENDOR_ID_O2,
960                 .device         = PCI_DEVICE_ID_O2_SEABIRD0,
961                 .subvendor      = PCI_ANY_ID,
962                 .subdevice      = PCI_ANY_ID,
963                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
964         },
965 
966         {
967                 .vendor         = PCI_VENDOR_ID_O2,
968                 .device         = PCI_DEVICE_ID_O2_SEABIRD1,
969                 .subvendor      = PCI_ANY_ID,
970                 .subdevice      = PCI_ANY_ID,
971                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
972         },
973 
974         {       /* Generic SD host controller */
975                 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
976         },
977 
978         { /* end: all zeroes */ },
979 };
980 
981 MODULE_DEVICE_TABLE(pci, pci_ids);
982 
983 /*****************************************************************************\
984  *                                                                           *
985  * SDHCI core callbacks                                                      *
986  *                                                                           *
987 \*****************************************************************************/
988 
989 static int sdhci_pci_enable_dma(struct sdhci_host *host)
990 {
991         struct sdhci_pci_slot *slot;
992         struct pci_dev *pdev;
993         int ret;
994 
995         slot = sdhci_priv(host);
996         pdev = slot->chip->pdev;
997 
998         if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
999                 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
1000                 (host->flags & SDHCI_USE_SDMA)) {
1001                 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
1002                         "doesn't fully claim to support it.\n");
1003         }
1004 
1005         ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1006         if (ret)
1007                 return ret;
1008 
1009         pci_set_master(pdev);
1010 
1011         return 0;
1012 }
1013 
1014 static int sdhci_pci_bus_width(struct sdhci_host *host, int width)
1015 {
1016         u8 ctrl;
1017 
1018         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1019 
1020         switch (width) {
1021         case MMC_BUS_WIDTH_8:
1022                 ctrl |= SDHCI_CTRL_8BITBUS;
1023                 ctrl &= ~SDHCI_CTRL_4BITBUS;
1024                 break;
1025         case MMC_BUS_WIDTH_4:
1026                 ctrl |= SDHCI_CTRL_4BITBUS;
1027                 ctrl &= ~SDHCI_CTRL_8BITBUS;
1028                 break;
1029         default:
1030                 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
1031                 break;
1032         }
1033 
1034         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1035 
1036         return 0;
1037 }
1038 
1039 static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host)
1040 {
1041         struct sdhci_pci_slot *slot = sdhci_priv(host);
1042         int rst_n_gpio = slot->rst_n_gpio;
1043 
1044         if (!gpio_is_valid(rst_n_gpio))
1045                 return;
1046         gpio_set_value_cansleep(rst_n_gpio, 0);
1047         /* For eMMC, minimum is 1us but give it 10us for good measure */
1048         udelay(10);
1049         gpio_set_value_cansleep(rst_n_gpio, 1);
1050         /* For eMMC, minimum is 200us but give it 300us for good measure */
1051         usleep_range(300, 1000);
1052 }
1053 
1054 static void sdhci_pci_hw_reset(struct sdhci_host *host)
1055 {
1056         struct sdhci_pci_slot *slot = sdhci_priv(host);
1057 
1058         if (slot->hw_reset)
1059                 slot->hw_reset(host);
1060 }
1061 
1062 static const struct sdhci_ops sdhci_pci_ops = {
1063         .enable_dma     = sdhci_pci_enable_dma,
1064         .platform_bus_width     = sdhci_pci_bus_width,
1065         .hw_reset               = sdhci_pci_hw_reset,
1066 };
1067 
1068 /*****************************************************************************\
1069  *                                                                           *
1070  * Suspend/resume                                                            *
1071  *                                                                           *
1072 \*****************************************************************************/
1073 
1074 #ifdef CONFIG_PM
1075 
1076 static int sdhci_pci_suspend(struct device *dev)
1077 {
1078         struct pci_dev *pdev = to_pci_dev(dev);
1079         struct sdhci_pci_chip *chip;
1080         struct sdhci_pci_slot *slot;
1081         mmc_pm_flag_t slot_pm_flags;
1082         mmc_pm_flag_t pm_flags = 0;
1083         int i, ret;
1084 
1085         chip = pci_get_drvdata(pdev);
1086         if (!chip)
1087                 return 0;
1088 
1089         for (i = 0; i < chip->num_slots; i++) {
1090                 slot = chip->slots[i];
1091                 if (!slot)
1092                         continue;
1093 
1094                 ret = sdhci_suspend_host(slot->host);
1095 
1096                 if (ret)
1097                         goto err_pci_suspend;
1098 
1099                 slot_pm_flags = slot->host->mmc->pm_flags;
1100                 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1101                         sdhci_enable_irq_wakeups(slot->host);
1102 
1103                 pm_flags |= slot_pm_flags;
1104         }
1105 
1106         if (chip->fixes && chip->fixes->suspend) {
1107                 ret = chip->fixes->suspend(chip);
1108                 if (ret)
1109                         goto err_pci_suspend;
1110         }
1111 
1112         pci_save_state(pdev);
1113         if (pm_flags & MMC_PM_KEEP_POWER) {
1114                 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ) {
1115                         pci_pme_active(pdev, true);
1116                         pci_enable_wake(pdev, PCI_D3hot, 1);
1117                 }
1118                 pci_set_power_state(pdev, PCI_D3hot);
1119         } else {
1120                 pci_enable_wake(pdev, PCI_D3hot, 0);
1121                 pci_disable_device(pdev);
1122                 pci_set_power_state(pdev, PCI_D3hot);
1123         }
1124 
1125         return 0;
1126 
1127 err_pci_suspend:
1128         while (--i >= 0)
1129                 sdhci_resume_host(chip->slots[i]->host);
1130         return ret;
1131 }
1132 
1133 static int sdhci_pci_resume(struct device *dev)
1134 {
1135         struct pci_dev *pdev = to_pci_dev(dev);
1136         struct sdhci_pci_chip *chip;
1137         struct sdhci_pci_slot *slot;
1138         int i, ret;
1139 
1140         chip = pci_get_drvdata(pdev);
1141         if (!chip)
1142                 return 0;
1143 
1144         pci_set_power_state(pdev, PCI_D0);
1145         pci_restore_state(pdev);
1146         ret = pci_enable_device(pdev);
1147         if (ret)
1148                 return ret;
1149 
1150         if (chip->fixes && chip->fixes->resume) {
1151                 ret = chip->fixes->resume(chip);
1152                 if (ret)
1153                         return ret;
1154         }
1155 
1156         for (i = 0; i < chip->num_slots; i++) {
1157                 slot = chip->slots[i];
1158                 if (!slot)
1159                         continue;
1160 
1161                 ret = sdhci_resume_host(slot->host);
1162                 if (ret)
1163                         return ret;
1164         }
1165 
1166         return 0;
1167 }
1168 
1169 #else /* CONFIG_PM */
1170 
1171 #define sdhci_pci_suspend NULL
1172 #define sdhci_pci_resume NULL
1173 
1174 #endif /* CONFIG_PM */
1175 
1176 #ifdef CONFIG_PM_RUNTIME
1177 
1178 static int sdhci_pci_runtime_suspend(struct device *dev)
1179 {
1180         struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1181         struct sdhci_pci_chip *chip;
1182         struct sdhci_pci_slot *slot;
1183         int i, ret;
1184 
1185         chip = pci_get_drvdata(pdev);
1186         if (!chip)
1187                 return 0;
1188 
1189         for (i = 0; i < chip->num_slots; i++) {
1190                 slot = chip->slots[i];
1191                 if (!slot)
1192                         continue;
1193 
1194                 ret = sdhci_runtime_suspend_host(slot->host);
1195 
1196                 if (ret)
1197                         goto err_pci_runtime_suspend;
1198         }
1199 
1200         if (chip->fixes && chip->fixes->suspend) {
1201                 ret = chip->fixes->suspend(chip);
1202                 if (ret)
1203                         goto err_pci_runtime_suspend;
1204         }
1205 
1206         return 0;
1207 
1208 err_pci_runtime_suspend:
1209         while (--i >= 0)
1210                 sdhci_runtime_resume_host(chip->slots[i]->host);
1211         return ret;
1212 }
1213 
1214 static int sdhci_pci_runtime_resume(struct device *dev)
1215 {
1216         struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1217         struct sdhci_pci_chip *chip;
1218         struct sdhci_pci_slot *slot;
1219         int i, ret;
1220 
1221         chip = pci_get_drvdata(pdev);
1222         if (!chip)
1223                 return 0;
1224 
1225         if (chip->fixes && chip->fixes->resume) {
1226                 ret = chip->fixes->resume(chip);
1227                 if (ret)
1228                         return ret;
1229         }
1230 
1231         for (i = 0; i < chip->num_slots; i++) {
1232                 slot = chip->slots[i];
1233                 if (!slot)
1234                         continue;
1235 
1236                 ret = sdhci_runtime_resume_host(slot->host);
1237                 if (ret)
1238                         return ret;
1239         }
1240 
1241         return 0;
1242 }
1243 
1244 static int sdhci_pci_runtime_idle(struct device *dev)
1245 {
1246         return 0;
1247 }
1248 
1249 #else
1250 
1251 #define sdhci_pci_runtime_suspend       NULL
1252 #define sdhci_pci_runtime_resume        NULL
1253 #define sdhci_pci_runtime_idle          NULL
1254 
1255 #endif
1256 
1257 static const struct dev_pm_ops sdhci_pci_pm_ops = {
1258         .suspend = sdhci_pci_suspend,
1259         .resume = sdhci_pci_resume,
1260         .runtime_suspend = sdhci_pci_runtime_suspend,
1261         .runtime_resume = sdhci_pci_runtime_resume,
1262         .runtime_idle = sdhci_pci_runtime_idle,
1263 };
1264 
1265 /*****************************************************************************\
1266  *                                                                           *
1267  * Device probing/removal                                                    *
1268  *                                                                           *
1269 \*****************************************************************************/
1270 
1271 static struct sdhci_pci_slot *sdhci_pci_probe_slot(
1272         struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
1273         int slotno)
1274 {
1275         struct sdhci_pci_slot *slot;
1276         struct sdhci_host *host;
1277         int ret, bar = first_bar + slotno;
1278 
1279         if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1280                 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
1281                 return ERR_PTR(-ENODEV);
1282         }
1283 
1284         if (pci_resource_len(pdev, bar) < 0x100) {
1285                 dev_err(&pdev->dev, "Invalid iomem size. You may "
1286                         "experience problems.\n");
1287         }
1288 
1289         if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1290                 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
1291                 return ERR_PTR(-ENODEV);
1292         }
1293 
1294         if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1295                 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
1296                 return ERR_PTR(-ENODEV);
1297         }
1298 
1299         host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
1300         if (IS_ERR(host)) {
1301                 dev_err(&pdev->dev, "cannot allocate host\n");
1302                 return ERR_CAST(host);
1303         }
1304 
1305         slot = sdhci_priv(host);
1306 
1307         slot->chip = chip;
1308         slot->host = host;
1309         slot->pci_bar = bar;
1310         slot->rst_n_gpio = -EINVAL;
1311         slot->cd_gpio = -EINVAL;
1312 
1313         /* Retrieve platform data if there is any */
1314         if (*sdhci_pci_get_data)
1315                 slot->data = sdhci_pci_get_data(pdev, slotno);
1316 
1317         if (slot->data) {
1318                 if (slot->data->setup) {
1319                         ret = slot->data->setup(slot->data);
1320                         if (ret) {
1321                                 dev_err(&pdev->dev, "platform setup failed\n");
1322                                 goto free;
1323                         }
1324                 }
1325                 slot->rst_n_gpio = slot->data->rst_n_gpio;
1326                 slot->cd_gpio = slot->data->cd_gpio;
1327         }
1328 
1329         host->hw_name = "PCI";
1330         host->ops = &sdhci_pci_ops;
1331         host->quirks = chip->quirks;
1332         host->quirks2 = chip->quirks2;
1333 
1334         host->irq = pdev->irq;
1335 
1336         ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
1337         if (ret) {
1338                 dev_err(&pdev->dev, "cannot request region\n");
1339                 goto cleanup;
1340         }
1341 
1342         host->ioaddr = pci_ioremap_bar(pdev, bar);
1343         if (!host->ioaddr) {
1344                 dev_err(&pdev->dev, "failed to remap registers\n");
1345                 ret = -ENOMEM;
1346                 goto release;
1347         }
1348 
1349         if (chip->fixes && chip->fixes->probe_slot) {
1350                 ret = chip->fixes->probe_slot(slot);
1351                 if (ret)
1352                         goto unmap;
1353         }
1354 
1355         if (gpio_is_valid(slot->rst_n_gpio)) {
1356                 if (!gpio_request(slot->rst_n_gpio, "eMMC_reset")) {
1357                         gpio_direction_output(slot->rst_n_gpio, 1);
1358                         slot->host->mmc->caps |= MMC_CAP_HW_RESET;
1359                         slot->hw_reset = sdhci_pci_gpio_hw_reset;
1360                 } else {
1361                         dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
1362                         slot->rst_n_gpio = -EINVAL;
1363                 }
1364         }
1365 
1366         host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1367         host->mmc->slotno = slotno;
1368         host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
1369 
1370         ret = sdhci_add_host(host);
1371         if (ret)
1372                 goto remove;
1373 
1374         sdhci_pci_add_own_cd(slot);
1375 
1376         /*
1377          * Check if the chip needs a separate GPIO for card detect to wake up
1378          * from runtime suspend.  If it is not there, don't allow runtime PM.
1379          * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure.
1380          */
1381         if (chip->fixes && chip->fixes->own_cd_for_runtime_pm &&
1382             !gpio_is_valid(slot->cd_gpio))
1383                 chip->allow_runtime_pm = false;
1384 
1385         return slot;
1386 
1387 remove:
1388         if (gpio_is_valid(slot->rst_n_gpio))
1389                 gpio_free(slot->rst_n_gpio);
1390 
1391         if (chip->fixes && chip->fixes->remove_slot)
1392                 chip->fixes->remove_slot(slot, 0);
1393 
1394 unmap:
1395         iounmap(host->ioaddr);
1396 
1397 release:
1398         pci_release_region(pdev, bar);
1399 
1400 cleanup:
1401         if (slot->data && slot->data->cleanup)
1402                 slot->data->cleanup(slot->data);
1403 
1404 free:
1405         sdhci_free_host(host);
1406 
1407         return ERR_PTR(ret);
1408 }
1409 
1410 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1411 {
1412         int dead;
1413         u32 scratch;
1414 
1415         sdhci_pci_remove_own_cd(slot);
1416 
1417         dead = 0;
1418         scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1419         if (scratch == (u32)-1)
1420                 dead = 1;
1421 
1422         sdhci_remove_host(slot->host, dead);
1423 
1424         if (gpio_is_valid(slot->rst_n_gpio))
1425                 gpio_free(slot->rst_n_gpio);
1426 
1427         if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1428                 slot->chip->fixes->remove_slot(slot, dead);
1429 
1430         if (slot->data && slot->data->cleanup)
1431                 slot->data->cleanup(slot->data);
1432 
1433         pci_release_region(slot->chip->pdev, slot->pci_bar);
1434 
1435         sdhci_free_host(slot->host);
1436 }
1437 
1438 static void sdhci_pci_runtime_pm_allow(struct device *dev)
1439 {
1440         pm_runtime_put_noidle(dev);
1441         pm_runtime_allow(dev);
1442         pm_runtime_set_autosuspend_delay(dev, 50);
1443         pm_runtime_use_autosuspend(dev);
1444         pm_suspend_ignore_children(dev, 1);
1445 }
1446 
1447 static void sdhci_pci_runtime_pm_forbid(struct device *dev)
1448 {
1449         pm_runtime_forbid(dev);
1450         pm_runtime_get_noresume(dev);
1451 }
1452 
1453 static int sdhci_pci_probe(struct pci_dev *pdev,
1454                                      const struct pci_device_id *ent)
1455 {
1456         struct sdhci_pci_chip *chip;
1457         struct sdhci_pci_slot *slot;
1458 
1459         u8 slots, first_bar;
1460         int ret, i;
1461 
1462         BUG_ON(pdev == NULL);
1463         BUG_ON(ent == NULL);
1464 
1465         dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1466                  (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1467 
1468         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1469         if (ret)
1470                 return ret;
1471 
1472         slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1473         dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1474         if (slots == 0)
1475                 return -ENODEV;
1476 
1477         BUG_ON(slots > MAX_SLOTS);
1478 
1479         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1480         if (ret)
1481                 return ret;
1482 
1483         first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1484 
1485         if (first_bar > 5) {
1486                 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1487                 return -ENODEV;
1488         }
1489 
1490         ret = pci_enable_device(pdev);
1491         if (ret)
1492                 return ret;
1493 
1494         chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1495         if (!chip) {
1496                 ret = -ENOMEM;
1497                 goto err;
1498         }
1499 
1500         chip->pdev = pdev;
1501         chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1502         if (chip->fixes) {
1503                 chip->quirks = chip->fixes->quirks;
1504                 chip->quirks2 = chip->fixes->quirks2;
1505                 chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
1506         }
1507         chip->num_slots = slots;
1508 
1509         pci_set_drvdata(pdev, chip);
1510 
1511         if (chip->fixes && chip->fixes->probe) {
1512                 ret = chip->fixes->probe(chip);
1513                 if (ret)
1514                         goto free;
1515         }
1516 
1517         slots = chip->num_slots;        /* Quirk may have changed this */
1518 
1519         for (i = 0; i < slots; i++) {
1520                 slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
1521                 if (IS_ERR(slot)) {
1522                         for (i--; i >= 0; i--)
1523                                 sdhci_pci_remove_slot(chip->slots[i]);
1524                         ret = PTR_ERR(slot);
1525                         goto free;
1526                 }
1527 
1528                 chip->slots[i] = slot;
1529         }
1530 
1531         if (chip->allow_runtime_pm)
1532                 sdhci_pci_runtime_pm_allow(&pdev->dev);
1533 
1534         return 0;
1535 
1536 free:
1537         pci_set_drvdata(pdev, NULL);
1538         kfree(chip);
1539 
1540 err:
1541         pci_disable_device(pdev);
1542         return ret;
1543 }
1544 
1545 static void sdhci_pci_remove(struct pci_dev *pdev)
1546 {
1547         int i;
1548         struct sdhci_pci_chip *chip;
1549 
1550         chip = pci_get_drvdata(pdev);
1551 
1552         if (chip) {
1553                 if (chip->allow_runtime_pm)
1554                         sdhci_pci_runtime_pm_forbid(&pdev->dev);
1555 
1556                 for (i = 0; i < chip->num_slots; i++)
1557                         sdhci_pci_remove_slot(chip->slots[i]);
1558 
1559                 pci_set_drvdata(pdev, NULL);
1560                 kfree(chip);
1561         }
1562 
1563         pci_disable_device(pdev);
1564 }
1565 
1566 static struct pci_driver sdhci_driver = {
1567         .name =         "sdhci-pci",
1568         .id_table =     pci_ids,
1569         .probe =        sdhci_pci_probe,
1570         .remove =       sdhci_pci_remove,
1571         .driver =       {
1572                 .pm =   &sdhci_pci_pm_ops
1573         },
1574 };
1575 
1576 module_pci_driver(sdhci_driver);
1577 
1578 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1579 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1580 MODULE_LICENSE("GPL");
1581 

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