Version:  2.0.40 2.2.26 2.4.37 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16

Linux/drivers/mmc/host/sdhci-pci.c

  1 /*  linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
  2  *
  3  *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
  4  *
  5  * This program is free software; you can redistribute it and/or modify
  6  * it under the terms of the GNU General Public License as published by
  7  * the Free Software Foundation; either version 2 of the License, or (at
  8  * your option) any later version.
  9  *
 10  * Thanks to the following companies for their support:
 11  *
 12  *     - JMicron (hardware and technical support)
 13  */
 14 
 15 #include <linux/delay.h>
 16 #include <linux/highmem.h>
 17 #include <linux/module.h>
 18 #include <linux/pci.h>
 19 #include <linux/dma-mapping.h>
 20 #include <linux/slab.h>
 21 #include <linux/device.h>
 22 #include <linux/mmc/host.h>
 23 #include <linux/scatterlist.h>
 24 #include <linux/io.h>
 25 #include <linux/gpio.h>
 26 #include <linux/pm_runtime.h>
 27 #include <linux/mmc/sdhci-pci-data.h>
 28 
 29 #include "sdhci.h"
 30 #include "sdhci-pci.h"
 31 #include "sdhci-pci-o2micro.h"
 32 
 33 /*****************************************************************************\
 34  *                                                                           *
 35  * Hardware specific quirk handling                                          *
 36  *                                                                           *
 37 \*****************************************************************************/
 38 
 39 static int ricoh_probe(struct sdhci_pci_chip *chip)
 40 {
 41         if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
 42             chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
 43                 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
 44         return 0;
 45 }
 46 
 47 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
 48 {
 49         slot->host->caps =
 50                 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
 51                         & SDHCI_TIMEOUT_CLK_MASK) |
 52 
 53                 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
 54                         & SDHCI_CLOCK_BASE_MASK) |
 55 
 56                 SDHCI_TIMEOUT_CLK_UNIT |
 57                 SDHCI_CAN_VDD_330 |
 58                 SDHCI_CAN_DO_HISPD |
 59                 SDHCI_CAN_DO_SDMA;
 60         return 0;
 61 }
 62 
 63 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
 64 {
 65         /* Apply a delay to allow controller to settle */
 66         /* Otherwise it becomes confused if card state changed
 67                 during suspend */
 68         msleep(500);
 69         return 0;
 70 }
 71 
 72 static const struct sdhci_pci_fixes sdhci_ricoh = {
 73         .probe          = ricoh_probe,
 74         .quirks         = SDHCI_QUIRK_32BIT_DMA_ADDR |
 75                           SDHCI_QUIRK_FORCE_DMA |
 76                           SDHCI_QUIRK_CLOCK_BEFORE_RESET,
 77 };
 78 
 79 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
 80         .probe_slot     = ricoh_mmc_probe_slot,
 81         .resume         = ricoh_mmc_resume,
 82         .quirks         = SDHCI_QUIRK_32BIT_DMA_ADDR |
 83                           SDHCI_QUIRK_CLOCK_BEFORE_RESET |
 84                           SDHCI_QUIRK_NO_CARD_NO_RESET |
 85                           SDHCI_QUIRK_MISSING_CAPS
 86 };
 87 
 88 static const struct sdhci_pci_fixes sdhci_ene_712 = {
 89         .quirks         = SDHCI_QUIRK_SINGLE_POWER_WRITE |
 90                           SDHCI_QUIRK_BROKEN_DMA,
 91 };
 92 
 93 static const struct sdhci_pci_fixes sdhci_ene_714 = {
 94         .quirks         = SDHCI_QUIRK_SINGLE_POWER_WRITE |
 95                           SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
 96                           SDHCI_QUIRK_BROKEN_DMA,
 97 };
 98 
 99 static const struct sdhci_pci_fixes sdhci_cafe = {
100         .quirks         = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
101                           SDHCI_QUIRK_NO_BUSY_IRQ |
102                           SDHCI_QUIRK_BROKEN_CARD_DETECTION |
103                           SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
104 };
105 
106 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
107 {
108         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
109         return 0;
110 }
111 
112 /*
113  * ADMA operation is disabled for Moorestown platform due to
114  * hardware bugs.
115  */
116 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
117 {
118         /*
119          * slots number is fixed here for MRST as SDIO3/5 are never used and
120          * have hardware bugs.
121          */
122         chip->num_slots = 1;
123         return 0;
124 }
125 
126 static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
127 {
128         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
129         return 0;
130 }
131 
132 #ifdef CONFIG_PM_RUNTIME
133 
134 static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
135 {
136         struct sdhci_pci_slot *slot = dev_id;
137         struct sdhci_host *host = slot->host;
138 
139         mmc_detect_change(host->mmc, msecs_to_jiffies(200));
140         return IRQ_HANDLED;
141 }
142 
143 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
144 {
145         int err, irq, gpio = slot->cd_gpio;
146 
147         slot->cd_gpio = -EINVAL;
148         slot->cd_irq = -EINVAL;
149 
150         if (!gpio_is_valid(gpio))
151                 return;
152 
153         err = gpio_request(gpio, "sd_cd");
154         if (err < 0)
155                 goto out;
156 
157         err = gpio_direction_input(gpio);
158         if (err < 0)
159                 goto out_free;
160 
161         irq = gpio_to_irq(gpio);
162         if (irq < 0)
163                 goto out_free;
164 
165         err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
166                           IRQF_TRIGGER_FALLING, "sd_cd", slot);
167         if (err)
168                 goto out_free;
169 
170         slot->cd_gpio = gpio;
171         slot->cd_irq = irq;
172 
173         return;
174 
175 out_free:
176         gpio_free(gpio);
177 out:
178         dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
179 }
180 
181 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
182 {
183         if (slot->cd_irq >= 0)
184                 free_irq(slot->cd_irq, slot);
185         if (gpio_is_valid(slot->cd_gpio))
186                 gpio_free(slot->cd_gpio);
187 }
188 
189 #else
190 
191 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
192 {
193 }
194 
195 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
196 {
197 }
198 
199 #endif
200 
201 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
202 {
203         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
204         slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC |
205                                   MMC_CAP2_HC_ERASE_SZ;
206         return 0;
207 }
208 
209 static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
210 {
211         slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
212         return 0;
213 }
214 
215 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
216         .quirks         = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
217         .probe_slot     = mrst_hc_probe_slot,
218 };
219 
220 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
221         .quirks         = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
222         .probe          = mrst_hc_probe,
223 };
224 
225 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
226         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
227         .allow_runtime_pm = true,
228         .own_cd_for_runtime_pm = true,
229 };
230 
231 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
232         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
233         .quirks2        = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
234         .allow_runtime_pm = true,
235         .probe_slot     = mfd_sdio_probe_slot,
236 };
237 
238 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
239         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
240         .allow_runtime_pm = true,
241         .probe_slot     = mfd_emmc_probe_slot,
242 };
243 
244 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
245         .quirks         = SDHCI_QUIRK_BROKEN_ADMA,
246         .probe_slot     = pch_hc_probe_slot,
247 };
248 
249 static void sdhci_pci_int_hw_reset(struct sdhci_host *host)
250 {
251         u8 reg;
252 
253         reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
254         reg |= 0x10;
255         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
256         /* For eMMC, minimum is 1us but give it 9us for good measure */
257         udelay(9);
258         reg &= ~0x10;
259         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
260         /* For eMMC, minimum is 200us but give it 300us for good measure */
261         usleep_range(300, 1000);
262 }
263 
264 static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
265 {
266         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
267                                  MMC_CAP_HW_RESET;
268         slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
269         slot->hw_reset = sdhci_pci_int_hw_reset;
270         return 0;
271 }
272 
273 static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
274 {
275         slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
276         return 0;
277 }
278 
279 static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
280         .allow_runtime_pm = true,
281         .probe_slot     = byt_emmc_probe_slot,
282 };
283 
284 static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
285         .quirks2        = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
286         .allow_runtime_pm = true,
287         .probe_slot     = byt_sdio_probe_slot,
288 };
289 
290 static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
291         .quirks2        = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON,
292         .allow_runtime_pm = true,
293         .own_cd_for_runtime_pm = true,
294 };
295 
296 /* Define Host controllers for Intel Merrifield platform */
297 #define INTEL_MRFL_EMMC_0       0
298 #define INTEL_MRFL_EMMC_1       1
299 
300 static int intel_mrfl_mmc_probe_slot(struct sdhci_pci_slot *slot)
301 {
302         if ((PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_0) &&
303             (PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_1))
304                 /* SD support is not ready yet */
305                 return -ENODEV;
306 
307         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
308                                  MMC_CAP_1_8V_DDR;
309 
310         return 0;
311 }
312 
313 static const struct sdhci_pci_fixes sdhci_intel_mrfl_mmc = {
314         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
315         .quirks2        = SDHCI_QUIRK2_BROKEN_HS200,
316         .probe_slot     = intel_mrfl_mmc_probe_slot,
317 };
318 
319 /* O2Micro extra registers */
320 #define O2_SD_LOCK_WP           0xD3
321 #define O2_SD_MULTI_VCC3V       0xEE
322 #define O2_SD_CLKREQ            0xEC
323 #define O2_SD_CAPS              0xE0
324 #define O2_SD_ADMA1             0xE2
325 #define O2_SD_ADMA2             0xE7
326 #define O2_SD_INF_MOD           0xF1
327 
328 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
329 {
330         u8 scratch;
331         int ret;
332 
333         ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
334         if (ret)
335                 return ret;
336 
337         /*
338          * Turn PMOS on [bit 0], set over current detection to 2.4 V
339          * [bit 1:2] and enable over current debouncing [bit 6].
340          */
341         if (on)
342                 scratch |= 0x47;
343         else
344                 scratch &= ~0x47;
345 
346         ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
347         if (ret)
348                 return ret;
349 
350         return 0;
351 }
352 
353 static int jmicron_probe(struct sdhci_pci_chip *chip)
354 {
355         int ret;
356         u16 mmcdev = 0;
357 
358         if (chip->pdev->revision == 0) {
359                 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
360                           SDHCI_QUIRK_32BIT_DMA_SIZE |
361                           SDHCI_QUIRK_32BIT_ADMA_SIZE |
362                           SDHCI_QUIRK_RESET_AFTER_REQUEST |
363                           SDHCI_QUIRK_BROKEN_SMALL_PIO;
364         }
365 
366         /*
367          * JMicron chips can have two interfaces to the same hardware
368          * in order to work around limitations in Microsoft's driver.
369          * We need to make sure we only bind to one of them.
370          *
371          * This code assumes two things:
372          *
373          * 1. The PCI code adds subfunctions in order.
374          *
375          * 2. The MMC interface has a lower subfunction number
376          *    than the SD interface.
377          */
378         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
379                 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
380         else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
381                 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
382 
383         if (mmcdev) {
384                 struct pci_dev *sd_dev;
385 
386                 sd_dev = NULL;
387                 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
388                                                 mmcdev, sd_dev)) != NULL) {
389                         if ((PCI_SLOT(chip->pdev->devfn) ==
390                                 PCI_SLOT(sd_dev->devfn)) &&
391                                 (chip->pdev->bus == sd_dev->bus))
392                                 break;
393                 }
394 
395                 if (sd_dev) {
396                         pci_dev_put(sd_dev);
397                         dev_info(&chip->pdev->dev, "Refusing to bind to "
398                                 "secondary interface.\n");
399                         return -ENODEV;
400                 }
401         }
402 
403         /*
404          * JMicron chips need a bit of a nudge to enable the power
405          * output pins.
406          */
407         ret = jmicron_pmos(chip, 1);
408         if (ret) {
409                 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
410                 return ret;
411         }
412 
413         /* quirk for unsable RO-detection on JM388 chips */
414         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
415             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
416                 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
417 
418         return 0;
419 }
420 
421 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
422 {
423         u8 scratch;
424 
425         scratch = readb(host->ioaddr + 0xC0);
426 
427         if (on)
428                 scratch |= 0x01;
429         else
430                 scratch &= ~0x01;
431 
432         writeb(scratch, host->ioaddr + 0xC0);
433 }
434 
435 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
436 {
437         if (slot->chip->pdev->revision == 0) {
438                 u16 version;
439 
440                 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
441                 version = (version & SDHCI_VENDOR_VER_MASK) >>
442                         SDHCI_VENDOR_VER_SHIFT;
443 
444                 /*
445                  * Older versions of the chip have lots of nasty glitches
446                  * in the ADMA engine. It's best just to avoid it
447                  * completely.
448                  */
449                 if (version < 0xAC)
450                         slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
451         }
452 
453         /* JM388 MMC doesn't support 1.8V while SD supports it */
454         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
455                 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
456                         MMC_VDD_29_30 | MMC_VDD_30_31 |
457                         MMC_VDD_165_195; /* allow 1.8V */
458                 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
459                         MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
460         }
461 
462         /*
463          * The secondary interface requires a bit set to get the
464          * interrupts.
465          */
466         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
467             slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
468                 jmicron_enable_mmc(slot->host, 1);
469 
470         slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
471 
472         return 0;
473 }
474 
475 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
476 {
477         if (dead)
478                 return;
479 
480         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
481             slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
482                 jmicron_enable_mmc(slot->host, 0);
483 }
484 
485 static int jmicron_suspend(struct sdhci_pci_chip *chip)
486 {
487         int i;
488 
489         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
490             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
491                 for (i = 0; i < chip->num_slots; i++)
492                         jmicron_enable_mmc(chip->slots[i]->host, 0);
493         }
494 
495         return 0;
496 }
497 
498 static int jmicron_resume(struct sdhci_pci_chip *chip)
499 {
500         int ret, i;
501 
502         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
503             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
504                 for (i = 0; i < chip->num_slots; i++)
505                         jmicron_enable_mmc(chip->slots[i]->host, 1);
506         }
507 
508         ret = jmicron_pmos(chip, 1);
509         if (ret) {
510                 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
511                 return ret;
512         }
513 
514         return 0;
515 }
516 
517 static const struct sdhci_pci_fixes sdhci_o2 = {
518         .probe = sdhci_pci_o2_probe,
519         .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
520         .probe_slot = sdhci_pci_o2_probe_slot,
521         .resume = sdhci_pci_o2_resume,
522 };
523 
524 static const struct sdhci_pci_fixes sdhci_jmicron = {
525         .probe          = jmicron_probe,
526 
527         .probe_slot     = jmicron_probe_slot,
528         .remove_slot    = jmicron_remove_slot,
529 
530         .suspend        = jmicron_suspend,
531         .resume         = jmicron_resume,
532 };
533 
534 /* SysKonnect CardBus2SDIO extra registers */
535 #define SYSKT_CTRL              0x200
536 #define SYSKT_RDFIFO_STAT       0x204
537 #define SYSKT_WRFIFO_STAT       0x208
538 #define SYSKT_POWER_DATA        0x20c
539 #define   SYSKT_POWER_330       0xef
540 #define   SYSKT_POWER_300       0xf8
541 #define   SYSKT_POWER_184       0xcc
542 #define SYSKT_POWER_CMD         0x20d
543 #define   SYSKT_POWER_START     (1 << 7)
544 #define SYSKT_POWER_STATUS      0x20e
545 #define   SYSKT_POWER_STATUS_OK (1 << 0)
546 #define SYSKT_BOARD_REV         0x210
547 #define SYSKT_CHIP_REV          0x211
548 #define SYSKT_CONF_DATA         0x212
549 #define   SYSKT_CONF_DATA_1V8   (1 << 2)
550 #define   SYSKT_CONF_DATA_2V5   (1 << 1)
551 #define   SYSKT_CONF_DATA_3V3   (1 << 0)
552 
553 static int syskt_probe(struct sdhci_pci_chip *chip)
554 {
555         if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
556                 chip->pdev->class &= ~0x0000FF;
557                 chip->pdev->class |= PCI_SDHCI_IFDMA;
558         }
559         return 0;
560 }
561 
562 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
563 {
564         int tm, ps;
565 
566         u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
567         u8  chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
568         dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
569                                          "board rev %d.%d, chip rev %d.%d\n",
570                                          board_rev >> 4, board_rev & 0xf,
571                                          chip_rev >> 4,  chip_rev & 0xf);
572         if (chip_rev >= 0x20)
573                 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
574 
575         writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
576         writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
577         udelay(50);
578         tm = 10;  /* Wait max 1 ms */
579         do {
580                 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
581                 if (ps & SYSKT_POWER_STATUS_OK)
582                         break;
583                 udelay(100);
584         } while (--tm);
585         if (!tm) {
586                 dev_err(&slot->chip->pdev->dev,
587                         "power regulator never stabilized");
588                 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
589                 return -ENODEV;
590         }
591 
592         return 0;
593 }
594 
595 static const struct sdhci_pci_fixes sdhci_syskt = {
596         .quirks         = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
597         .probe          = syskt_probe,
598         .probe_slot     = syskt_probe_slot,
599 };
600 
601 static int via_probe(struct sdhci_pci_chip *chip)
602 {
603         if (chip->pdev->revision == 0x10)
604                 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
605 
606         return 0;
607 }
608 
609 static const struct sdhci_pci_fixes sdhci_via = {
610         .probe          = via_probe,
611 };
612 
613 static int rtsx_probe_slot(struct sdhci_pci_slot *slot)
614 {
615         slot->host->mmc->caps2 |= MMC_CAP2_HS200;
616         return 0;
617 }
618 
619 static const struct sdhci_pci_fixes sdhci_rtsx = {
620         .quirks2        = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
621                         SDHCI_QUIRK2_BROKEN_DDR50,
622         .probe_slot     = rtsx_probe_slot,
623 };
624 
625 static const struct pci_device_id pci_ids[] = {
626         {
627                 .vendor         = PCI_VENDOR_ID_RICOH,
628                 .device         = PCI_DEVICE_ID_RICOH_R5C822,
629                 .subvendor      = PCI_ANY_ID,
630                 .subdevice      = PCI_ANY_ID,
631                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh,
632         },
633 
634         {
635                 .vendor         = PCI_VENDOR_ID_RICOH,
636                 .device         = 0x843,
637                 .subvendor      = PCI_ANY_ID,
638                 .subdevice      = PCI_ANY_ID,
639                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
640         },
641 
642         {
643                 .vendor         = PCI_VENDOR_ID_RICOH,
644                 .device         = 0xe822,
645                 .subvendor      = PCI_ANY_ID,
646                 .subdevice      = PCI_ANY_ID,
647                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
648         },
649 
650         {
651                 .vendor         = PCI_VENDOR_ID_RICOH,
652                 .device         = 0xe823,
653                 .subvendor      = PCI_ANY_ID,
654                 .subdevice      = PCI_ANY_ID,
655                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
656         },
657 
658         {
659                 .vendor         = PCI_VENDOR_ID_ENE,
660                 .device         = PCI_DEVICE_ID_ENE_CB712_SD,
661                 .subvendor      = PCI_ANY_ID,
662                 .subdevice      = PCI_ANY_ID,
663                 .driver_data    = (kernel_ulong_t)&sdhci_ene_712,
664         },
665 
666         {
667                 .vendor         = PCI_VENDOR_ID_ENE,
668                 .device         = PCI_DEVICE_ID_ENE_CB712_SD_2,
669                 .subvendor      = PCI_ANY_ID,
670                 .subdevice      = PCI_ANY_ID,
671                 .driver_data    = (kernel_ulong_t)&sdhci_ene_712,
672         },
673 
674         {
675                 .vendor         = PCI_VENDOR_ID_ENE,
676                 .device         = PCI_DEVICE_ID_ENE_CB714_SD,
677                 .subvendor      = PCI_ANY_ID,
678                 .subdevice      = PCI_ANY_ID,
679                 .driver_data    = (kernel_ulong_t)&sdhci_ene_714,
680         },
681 
682         {
683                 .vendor         = PCI_VENDOR_ID_ENE,
684                 .device         = PCI_DEVICE_ID_ENE_CB714_SD_2,
685                 .subvendor      = PCI_ANY_ID,
686                 .subdevice      = PCI_ANY_ID,
687                 .driver_data    = (kernel_ulong_t)&sdhci_ene_714,
688         },
689 
690         {
691                 .vendor         = PCI_VENDOR_ID_MARVELL,
692                 .device         = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
693                 .subvendor      = PCI_ANY_ID,
694                 .subdevice      = PCI_ANY_ID,
695                 .driver_data    = (kernel_ulong_t)&sdhci_cafe,
696         },
697 
698         {
699                 .vendor         = PCI_VENDOR_ID_JMICRON,
700                 .device         = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
701                 .subvendor      = PCI_ANY_ID,
702                 .subdevice      = PCI_ANY_ID,
703                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
704         },
705 
706         {
707                 .vendor         = PCI_VENDOR_ID_JMICRON,
708                 .device         = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
709                 .subvendor      = PCI_ANY_ID,
710                 .subdevice      = PCI_ANY_ID,
711                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
712         },
713 
714         {
715                 .vendor         = PCI_VENDOR_ID_JMICRON,
716                 .device         = PCI_DEVICE_ID_JMICRON_JMB388_SD,
717                 .subvendor      = PCI_ANY_ID,
718                 .subdevice      = PCI_ANY_ID,
719                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
720         },
721 
722         {
723                 .vendor         = PCI_VENDOR_ID_JMICRON,
724                 .device         = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
725                 .subvendor      = PCI_ANY_ID,
726                 .subdevice      = PCI_ANY_ID,
727                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
728         },
729 
730         {
731                 .vendor         = PCI_VENDOR_ID_SYSKONNECT,
732                 .device         = 0x8000,
733                 .subvendor      = PCI_ANY_ID,
734                 .subdevice      = PCI_ANY_ID,
735                 .driver_data    = (kernel_ulong_t)&sdhci_syskt,
736         },
737 
738         {
739                 .vendor         = PCI_VENDOR_ID_VIA,
740                 .device         = 0x95d0,
741                 .subvendor      = PCI_ANY_ID,
742                 .subdevice      = PCI_ANY_ID,
743                 .driver_data    = (kernel_ulong_t)&sdhci_via,
744         },
745 
746         {
747                 .vendor         = PCI_VENDOR_ID_REALTEK,
748                 .device         = 0x5250,
749                 .subvendor      = PCI_ANY_ID,
750                 .subdevice      = PCI_ANY_ID,
751                 .driver_data    = (kernel_ulong_t)&sdhci_rtsx,
752         },
753 
754         {
755                 .vendor         = PCI_VENDOR_ID_INTEL,
756                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD0,
757                 .subvendor      = PCI_ANY_ID,
758                 .subdevice      = PCI_ANY_ID,
759                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
760         },
761 
762         {
763                 .vendor         = PCI_VENDOR_ID_INTEL,
764                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD1,
765                 .subvendor      = PCI_ANY_ID,
766                 .subdevice      = PCI_ANY_ID,
767                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
768         },
769 
770         {
771                 .vendor         = PCI_VENDOR_ID_INTEL,
772                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD2,
773                 .subvendor      = PCI_ANY_ID,
774                 .subdevice      = PCI_ANY_ID,
775                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
776         },
777 
778         {
779                 .vendor         = PCI_VENDOR_ID_INTEL,
780                 .device         = PCI_DEVICE_ID_INTEL_MFD_SD,
781                 .subvendor      = PCI_ANY_ID,
782                 .subdevice      = PCI_ANY_ID,
783                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sd,
784         },
785 
786         {
787                 .vendor         = PCI_VENDOR_ID_INTEL,
788                 .device         = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
789                 .subvendor      = PCI_ANY_ID,
790                 .subdevice      = PCI_ANY_ID,
791                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
792         },
793 
794         {
795                 .vendor         = PCI_VENDOR_ID_INTEL,
796                 .device         = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
797                 .subvendor      = PCI_ANY_ID,
798                 .subdevice      = PCI_ANY_ID,
799                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
800         },
801 
802         {
803                 .vendor         = PCI_VENDOR_ID_INTEL,
804                 .device         = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
805                 .subvendor      = PCI_ANY_ID,
806                 .subdevice      = PCI_ANY_ID,
807                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
808         },
809 
810         {
811                 .vendor         = PCI_VENDOR_ID_INTEL,
812                 .device         = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
813                 .subvendor      = PCI_ANY_ID,
814                 .subdevice      = PCI_ANY_ID,
815                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
816         },
817 
818         {
819                 .vendor         = PCI_VENDOR_ID_INTEL,
820                 .device         = PCI_DEVICE_ID_INTEL_PCH_SDIO0,
821                 .subvendor      = PCI_ANY_ID,
822                 .subdevice      = PCI_ANY_ID,
823                 .driver_data    = (kernel_ulong_t)&sdhci_intel_pch_sdio,
824         },
825 
826         {
827                 .vendor         = PCI_VENDOR_ID_INTEL,
828                 .device         = PCI_DEVICE_ID_INTEL_PCH_SDIO1,
829                 .subvendor      = PCI_ANY_ID,
830                 .subdevice      = PCI_ANY_ID,
831                 .driver_data    = (kernel_ulong_t)&sdhci_intel_pch_sdio,
832         },
833 
834         {
835                 .vendor         = PCI_VENDOR_ID_INTEL,
836                 .device         = PCI_DEVICE_ID_INTEL_BYT_EMMC,
837                 .subvendor      = PCI_ANY_ID,
838                 .subdevice      = PCI_ANY_ID,
839                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
840         },
841 
842         {
843                 .vendor         = PCI_VENDOR_ID_INTEL,
844                 .device         = PCI_DEVICE_ID_INTEL_BYT_SDIO,
845                 .subvendor      = PCI_ANY_ID,
846                 .subdevice      = PCI_ANY_ID,
847                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
848         },
849 
850         {
851                 .vendor         = PCI_VENDOR_ID_INTEL,
852                 .device         = PCI_DEVICE_ID_INTEL_BYT_SD,
853                 .subvendor      = PCI_ANY_ID,
854                 .subdevice      = PCI_ANY_ID,
855                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
856         },
857 
858         {
859                 .vendor         = PCI_VENDOR_ID_INTEL,
860                 .device         = PCI_DEVICE_ID_INTEL_BYT_EMMC2,
861                 .subvendor      = PCI_ANY_ID,
862                 .subdevice      = PCI_ANY_ID,
863                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
864         },
865 
866 
867         {
868                 .vendor         = PCI_VENDOR_ID_INTEL,
869                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO0,
870                 .subvendor      = PCI_ANY_ID,
871                 .subdevice      = PCI_ANY_ID,
872                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sd,
873         },
874 
875         {
876                 .vendor         = PCI_VENDOR_ID_INTEL,
877                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO1,
878                 .subvendor      = PCI_ANY_ID,
879                 .subdevice      = PCI_ANY_ID,
880                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
881         },
882 
883         {
884                 .vendor         = PCI_VENDOR_ID_INTEL,
885                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO2,
886                 .subvendor      = PCI_ANY_ID,
887                 .subdevice      = PCI_ANY_ID,
888                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
889         },
890 
891         {
892                 .vendor         = PCI_VENDOR_ID_INTEL,
893                 .device         = PCI_DEVICE_ID_INTEL_CLV_EMMC0,
894                 .subvendor      = PCI_ANY_ID,
895                 .subdevice      = PCI_ANY_ID,
896                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
897         },
898 
899         {
900                 .vendor         = PCI_VENDOR_ID_INTEL,
901                 .device         = PCI_DEVICE_ID_INTEL_CLV_EMMC1,
902                 .subvendor      = PCI_ANY_ID,
903                 .subdevice      = PCI_ANY_ID,
904                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
905         },
906 
907         {
908                 .vendor         = PCI_VENDOR_ID_INTEL,
909                 .device         = PCI_DEVICE_ID_INTEL_MRFL_MMC,
910                 .subvendor      = PCI_ANY_ID,
911                 .subdevice      = PCI_ANY_ID,
912                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrfl_mmc,
913         },
914         {
915                 .vendor         = PCI_VENDOR_ID_O2,
916                 .device         = PCI_DEVICE_ID_O2_8120,
917                 .subvendor      = PCI_ANY_ID,
918                 .subdevice      = PCI_ANY_ID,
919                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
920         },
921 
922         {
923                 .vendor         = PCI_VENDOR_ID_O2,
924                 .device         = PCI_DEVICE_ID_O2_8220,
925                 .subvendor      = PCI_ANY_ID,
926                 .subdevice      = PCI_ANY_ID,
927                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
928         },
929 
930         {
931                 .vendor         = PCI_VENDOR_ID_O2,
932                 .device         = PCI_DEVICE_ID_O2_8221,
933                 .subvendor      = PCI_ANY_ID,
934                 .subdevice      = PCI_ANY_ID,
935                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
936         },
937 
938         {
939                 .vendor         = PCI_VENDOR_ID_O2,
940                 .device         = PCI_DEVICE_ID_O2_8320,
941                 .subvendor      = PCI_ANY_ID,
942                 .subdevice      = PCI_ANY_ID,
943                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
944         },
945 
946         {
947                 .vendor         = PCI_VENDOR_ID_O2,
948                 .device         = PCI_DEVICE_ID_O2_8321,
949                 .subvendor      = PCI_ANY_ID,
950                 .subdevice      = PCI_ANY_ID,
951                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
952         },
953 
954         {
955                 .vendor         = PCI_VENDOR_ID_O2,
956                 .device         = PCI_DEVICE_ID_O2_FUJIN2,
957                 .subvendor      = PCI_ANY_ID,
958                 .subdevice      = PCI_ANY_ID,
959                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
960         },
961 
962         {
963                 .vendor         = PCI_VENDOR_ID_O2,
964                 .device         = PCI_DEVICE_ID_O2_SDS0,
965                 .subvendor      = PCI_ANY_ID,
966                 .subdevice      = PCI_ANY_ID,
967                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
968         },
969 
970         {
971                 .vendor         = PCI_VENDOR_ID_O2,
972                 .device         = PCI_DEVICE_ID_O2_SDS1,
973                 .subvendor      = PCI_ANY_ID,
974                 .subdevice      = PCI_ANY_ID,
975                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
976         },
977 
978         {
979                 .vendor         = PCI_VENDOR_ID_O2,
980                 .device         = PCI_DEVICE_ID_O2_SEABIRD0,
981                 .subvendor      = PCI_ANY_ID,
982                 .subdevice      = PCI_ANY_ID,
983                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
984         },
985 
986         {
987                 .vendor         = PCI_VENDOR_ID_O2,
988                 .device         = PCI_DEVICE_ID_O2_SEABIRD1,
989                 .subvendor      = PCI_ANY_ID,
990                 .subdevice      = PCI_ANY_ID,
991                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
992         },
993 
994         {       /* Generic SD host controller */
995                 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
996         },
997 
998         { /* end: all zeroes */ },
999 };
1000 
1001 MODULE_DEVICE_TABLE(pci, pci_ids);
1002 
1003 /*****************************************************************************\
1004  *                                                                           *
1005  * SDHCI core callbacks                                                      *
1006  *                                                                           *
1007 \*****************************************************************************/
1008 
1009 static int sdhci_pci_enable_dma(struct sdhci_host *host)
1010 {
1011         struct sdhci_pci_slot *slot;
1012         struct pci_dev *pdev;
1013         int ret;
1014 
1015         slot = sdhci_priv(host);
1016         pdev = slot->chip->pdev;
1017 
1018         if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
1019                 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
1020                 (host->flags & SDHCI_USE_SDMA)) {
1021                 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
1022                         "doesn't fully claim to support it.\n");
1023         }
1024 
1025         ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1026         if (ret)
1027                 return ret;
1028 
1029         pci_set_master(pdev);
1030 
1031         return 0;
1032 }
1033 
1034 static void sdhci_pci_set_bus_width(struct sdhci_host *host, int width)
1035 {
1036         u8 ctrl;
1037 
1038         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1039 
1040         switch (width) {
1041         case MMC_BUS_WIDTH_8:
1042                 ctrl |= SDHCI_CTRL_8BITBUS;
1043                 ctrl &= ~SDHCI_CTRL_4BITBUS;
1044                 break;
1045         case MMC_BUS_WIDTH_4:
1046                 ctrl |= SDHCI_CTRL_4BITBUS;
1047                 ctrl &= ~SDHCI_CTRL_8BITBUS;
1048                 break;
1049         default:
1050                 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
1051                 break;
1052         }
1053 
1054         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1055 }
1056 
1057 static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host)
1058 {
1059         struct sdhci_pci_slot *slot = sdhci_priv(host);
1060         int rst_n_gpio = slot->rst_n_gpio;
1061 
1062         if (!gpio_is_valid(rst_n_gpio))
1063                 return;
1064         gpio_set_value_cansleep(rst_n_gpio, 0);
1065         /* For eMMC, minimum is 1us but give it 10us for good measure */
1066         udelay(10);
1067         gpio_set_value_cansleep(rst_n_gpio, 1);
1068         /* For eMMC, minimum is 200us but give it 300us for good measure */
1069         usleep_range(300, 1000);
1070 }
1071 
1072 static void sdhci_pci_hw_reset(struct sdhci_host *host)
1073 {
1074         struct sdhci_pci_slot *slot = sdhci_priv(host);
1075 
1076         if (slot->hw_reset)
1077                 slot->hw_reset(host);
1078 }
1079 
1080 static const struct sdhci_ops sdhci_pci_ops = {
1081         .set_clock      = sdhci_set_clock,
1082         .enable_dma     = sdhci_pci_enable_dma,
1083         .set_bus_width  = sdhci_pci_set_bus_width,
1084         .reset          = sdhci_reset,
1085         .set_uhs_signaling = sdhci_set_uhs_signaling,
1086         .hw_reset               = sdhci_pci_hw_reset,
1087 };
1088 
1089 /*****************************************************************************\
1090  *                                                                           *
1091  * Suspend/resume                                                            *
1092  *                                                                           *
1093 \*****************************************************************************/
1094 
1095 #ifdef CONFIG_PM
1096 
1097 static int sdhci_pci_suspend(struct device *dev)
1098 {
1099         struct pci_dev *pdev = to_pci_dev(dev);
1100         struct sdhci_pci_chip *chip;
1101         struct sdhci_pci_slot *slot;
1102         mmc_pm_flag_t slot_pm_flags;
1103         mmc_pm_flag_t pm_flags = 0;
1104         int i, ret;
1105 
1106         chip = pci_get_drvdata(pdev);
1107         if (!chip)
1108                 return 0;
1109 
1110         for (i = 0; i < chip->num_slots; i++) {
1111                 slot = chip->slots[i];
1112                 if (!slot)
1113                         continue;
1114 
1115                 ret = sdhci_suspend_host(slot->host);
1116 
1117                 if (ret)
1118                         goto err_pci_suspend;
1119 
1120                 slot_pm_flags = slot->host->mmc->pm_flags;
1121                 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1122                         sdhci_enable_irq_wakeups(slot->host);
1123 
1124                 pm_flags |= slot_pm_flags;
1125         }
1126 
1127         if (chip->fixes && chip->fixes->suspend) {
1128                 ret = chip->fixes->suspend(chip);
1129                 if (ret)
1130                         goto err_pci_suspend;
1131         }
1132 
1133         pci_save_state(pdev);
1134         if (pm_flags & MMC_PM_KEEP_POWER) {
1135                 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ) {
1136                         pci_pme_active(pdev, true);
1137                         pci_enable_wake(pdev, PCI_D3hot, 1);
1138                 }
1139                 pci_set_power_state(pdev, PCI_D3hot);
1140         } else {
1141                 pci_enable_wake(pdev, PCI_D3hot, 0);
1142                 pci_disable_device(pdev);
1143                 pci_set_power_state(pdev, PCI_D3hot);
1144         }
1145 
1146         return 0;
1147 
1148 err_pci_suspend:
1149         while (--i >= 0)
1150                 sdhci_resume_host(chip->slots[i]->host);
1151         return ret;
1152 }
1153 
1154 static int sdhci_pci_resume(struct device *dev)
1155 {
1156         struct pci_dev *pdev = to_pci_dev(dev);
1157         struct sdhci_pci_chip *chip;
1158         struct sdhci_pci_slot *slot;
1159         int i, ret;
1160 
1161         chip = pci_get_drvdata(pdev);
1162         if (!chip)
1163                 return 0;
1164 
1165         pci_set_power_state(pdev, PCI_D0);
1166         pci_restore_state(pdev);
1167         ret = pci_enable_device(pdev);
1168         if (ret)
1169                 return ret;
1170 
1171         if (chip->fixes && chip->fixes->resume) {
1172                 ret = chip->fixes->resume(chip);
1173                 if (ret)
1174                         return ret;
1175         }
1176 
1177         for (i = 0; i < chip->num_slots; i++) {
1178                 slot = chip->slots[i];
1179                 if (!slot)
1180                         continue;
1181 
1182                 ret = sdhci_resume_host(slot->host);
1183                 if (ret)
1184                         return ret;
1185         }
1186 
1187         return 0;
1188 }
1189 
1190 #else /* CONFIG_PM */
1191 
1192 #define sdhci_pci_suspend NULL
1193 #define sdhci_pci_resume NULL
1194 
1195 #endif /* CONFIG_PM */
1196 
1197 #ifdef CONFIG_PM_RUNTIME
1198 
1199 static int sdhci_pci_runtime_suspend(struct device *dev)
1200 {
1201         struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1202         struct sdhci_pci_chip *chip;
1203         struct sdhci_pci_slot *slot;
1204         int i, ret;
1205 
1206         chip = pci_get_drvdata(pdev);
1207         if (!chip)
1208                 return 0;
1209 
1210         for (i = 0; i < chip->num_slots; i++) {
1211                 slot = chip->slots[i];
1212                 if (!slot)
1213                         continue;
1214 
1215                 ret = sdhci_runtime_suspend_host(slot->host);
1216 
1217                 if (ret)
1218                         goto err_pci_runtime_suspend;
1219         }
1220 
1221         if (chip->fixes && chip->fixes->suspend) {
1222                 ret = chip->fixes->suspend(chip);
1223                 if (ret)
1224                         goto err_pci_runtime_suspend;
1225         }
1226 
1227         return 0;
1228 
1229 err_pci_runtime_suspend:
1230         while (--i >= 0)
1231                 sdhci_runtime_resume_host(chip->slots[i]->host);
1232         return ret;
1233 }
1234 
1235 static int sdhci_pci_runtime_resume(struct device *dev)
1236 {
1237         struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1238         struct sdhci_pci_chip *chip;
1239         struct sdhci_pci_slot *slot;
1240         int i, ret;
1241 
1242         chip = pci_get_drvdata(pdev);
1243         if (!chip)
1244                 return 0;
1245 
1246         if (chip->fixes && chip->fixes->resume) {
1247                 ret = chip->fixes->resume(chip);
1248                 if (ret)
1249                         return ret;
1250         }
1251 
1252         for (i = 0; i < chip->num_slots; i++) {
1253                 slot = chip->slots[i];
1254                 if (!slot)
1255                         continue;
1256 
1257                 ret = sdhci_runtime_resume_host(slot->host);
1258                 if (ret)
1259                         return ret;
1260         }
1261 
1262         return 0;
1263 }
1264 
1265 static int sdhci_pci_runtime_idle(struct device *dev)
1266 {
1267         return 0;
1268 }
1269 
1270 #else
1271 
1272 #define sdhci_pci_runtime_suspend       NULL
1273 #define sdhci_pci_runtime_resume        NULL
1274 #define sdhci_pci_runtime_idle          NULL
1275 
1276 #endif
1277 
1278 static const struct dev_pm_ops sdhci_pci_pm_ops = {
1279         .suspend = sdhci_pci_suspend,
1280         .resume = sdhci_pci_resume,
1281         .runtime_suspend = sdhci_pci_runtime_suspend,
1282         .runtime_resume = sdhci_pci_runtime_resume,
1283         .runtime_idle = sdhci_pci_runtime_idle,
1284 };
1285 
1286 /*****************************************************************************\
1287  *                                                                           *
1288  * Device probing/removal                                                    *
1289  *                                                                           *
1290 \*****************************************************************************/
1291 
1292 static struct sdhci_pci_slot *sdhci_pci_probe_slot(
1293         struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
1294         int slotno)
1295 {
1296         struct sdhci_pci_slot *slot;
1297         struct sdhci_host *host;
1298         int ret, bar = first_bar + slotno;
1299 
1300         if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1301                 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
1302                 return ERR_PTR(-ENODEV);
1303         }
1304 
1305         if (pci_resource_len(pdev, bar) < 0x100) {
1306                 dev_err(&pdev->dev, "Invalid iomem size. You may "
1307                         "experience problems.\n");
1308         }
1309 
1310         if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1311                 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
1312                 return ERR_PTR(-ENODEV);
1313         }
1314 
1315         if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1316                 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
1317                 return ERR_PTR(-ENODEV);
1318         }
1319 
1320         host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
1321         if (IS_ERR(host)) {
1322                 dev_err(&pdev->dev, "cannot allocate host\n");
1323                 return ERR_CAST(host);
1324         }
1325 
1326         slot = sdhci_priv(host);
1327 
1328         slot->chip = chip;
1329         slot->host = host;
1330         slot->pci_bar = bar;
1331         slot->rst_n_gpio = -EINVAL;
1332         slot->cd_gpio = -EINVAL;
1333 
1334         /* Retrieve platform data if there is any */
1335         if (*sdhci_pci_get_data)
1336                 slot->data = sdhci_pci_get_data(pdev, slotno);
1337 
1338         if (slot->data) {
1339                 if (slot->data->setup) {
1340                         ret = slot->data->setup(slot->data);
1341                         if (ret) {
1342                                 dev_err(&pdev->dev, "platform setup failed\n");
1343                                 goto free;
1344                         }
1345                 }
1346                 slot->rst_n_gpio = slot->data->rst_n_gpio;
1347                 slot->cd_gpio = slot->data->cd_gpio;
1348         }
1349 
1350         host->hw_name = "PCI";
1351         host->ops = &sdhci_pci_ops;
1352         host->quirks = chip->quirks;
1353         host->quirks2 = chip->quirks2;
1354 
1355         host->irq = pdev->irq;
1356 
1357         ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
1358         if (ret) {
1359                 dev_err(&pdev->dev, "cannot request region\n");
1360                 goto cleanup;
1361         }
1362 
1363         host->ioaddr = pci_ioremap_bar(pdev, bar);
1364         if (!host->ioaddr) {
1365                 dev_err(&pdev->dev, "failed to remap registers\n");
1366                 ret = -ENOMEM;
1367                 goto release;
1368         }
1369 
1370         if (chip->fixes && chip->fixes->probe_slot) {
1371                 ret = chip->fixes->probe_slot(slot);
1372                 if (ret)
1373                         goto unmap;
1374         }
1375 
1376         if (gpio_is_valid(slot->rst_n_gpio)) {
1377                 if (!gpio_request(slot->rst_n_gpio, "eMMC_reset")) {
1378                         gpio_direction_output(slot->rst_n_gpio, 1);
1379                         slot->host->mmc->caps |= MMC_CAP_HW_RESET;
1380                         slot->hw_reset = sdhci_pci_gpio_hw_reset;
1381                 } else {
1382                         dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
1383                         slot->rst_n_gpio = -EINVAL;
1384                 }
1385         }
1386 
1387         host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1388         host->mmc->slotno = slotno;
1389         host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
1390 
1391         ret = sdhci_add_host(host);
1392         if (ret)
1393                 goto remove;
1394 
1395         sdhci_pci_add_own_cd(slot);
1396 
1397         /*
1398          * Check if the chip needs a separate GPIO for card detect to wake up
1399          * from runtime suspend.  If it is not there, don't allow runtime PM.
1400          * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure.
1401          */
1402         if (chip->fixes && chip->fixes->own_cd_for_runtime_pm &&
1403             !gpio_is_valid(slot->cd_gpio))
1404                 chip->allow_runtime_pm = false;
1405 
1406         return slot;
1407 
1408 remove:
1409         if (gpio_is_valid(slot->rst_n_gpio))
1410                 gpio_free(slot->rst_n_gpio);
1411 
1412         if (chip->fixes && chip->fixes->remove_slot)
1413                 chip->fixes->remove_slot(slot, 0);
1414 
1415 unmap:
1416         iounmap(host->ioaddr);
1417 
1418 release:
1419         pci_release_region(pdev, bar);
1420 
1421 cleanup:
1422         if (slot->data && slot->data->cleanup)
1423                 slot->data->cleanup(slot->data);
1424 
1425 free:
1426         sdhci_free_host(host);
1427 
1428         return ERR_PTR(ret);
1429 }
1430 
1431 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1432 {
1433         int dead;
1434         u32 scratch;
1435 
1436         sdhci_pci_remove_own_cd(slot);
1437 
1438         dead = 0;
1439         scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1440         if (scratch == (u32)-1)
1441                 dead = 1;
1442 
1443         sdhci_remove_host(slot->host, dead);
1444 
1445         if (gpio_is_valid(slot->rst_n_gpio))
1446                 gpio_free(slot->rst_n_gpio);
1447 
1448         if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1449                 slot->chip->fixes->remove_slot(slot, dead);
1450 
1451         if (slot->data && slot->data->cleanup)
1452                 slot->data->cleanup(slot->data);
1453 
1454         pci_release_region(slot->chip->pdev, slot->pci_bar);
1455 
1456         sdhci_free_host(slot->host);
1457 }
1458 
1459 static void sdhci_pci_runtime_pm_allow(struct device *dev)
1460 {
1461         pm_runtime_put_noidle(dev);
1462         pm_runtime_allow(dev);
1463         pm_runtime_set_autosuspend_delay(dev, 50);
1464         pm_runtime_use_autosuspend(dev);
1465         pm_suspend_ignore_children(dev, 1);
1466 }
1467 
1468 static void sdhci_pci_runtime_pm_forbid(struct device *dev)
1469 {
1470         pm_runtime_forbid(dev);
1471         pm_runtime_get_noresume(dev);
1472 }
1473 
1474 static int sdhci_pci_probe(struct pci_dev *pdev,
1475                                      const struct pci_device_id *ent)
1476 {
1477         struct sdhci_pci_chip *chip;
1478         struct sdhci_pci_slot *slot;
1479 
1480         u8 slots, first_bar;
1481         int ret, i;
1482 
1483         BUG_ON(pdev == NULL);
1484         BUG_ON(ent == NULL);
1485 
1486         dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1487                  (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1488 
1489         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1490         if (ret)
1491                 return ret;
1492 
1493         slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1494         dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1495         if (slots == 0)
1496                 return -ENODEV;
1497 
1498         BUG_ON(slots > MAX_SLOTS);
1499 
1500         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1501         if (ret)
1502                 return ret;
1503 
1504         first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1505 
1506         if (first_bar > 5) {
1507                 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1508                 return -ENODEV;
1509         }
1510 
1511         ret = pci_enable_device(pdev);
1512         if (ret)
1513                 return ret;
1514 
1515         chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1516         if (!chip) {
1517                 ret = -ENOMEM;
1518                 goto err;
1519         }
1520 
1521         chip->pdev = pdev;
1522         chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1523         if (chip->fixes) {
1524                 chip->quirks = chip->fixes->quirks;
1525                 chip->quirks2 = chip->fixes->quirks2;
1526                 chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
1527         }
1528         chip->num_slots = slots;
1529 
1530         pci_set_drvdata(pdev, chip);
1531 
1532         if (chip->fixes && chip->fixes->probe) {
1533                 ret = chip->fixes->probe(chip);
1534                 if (ret)
1535                         goto free;
1536         }
1537 
1538         slots = chip->num_slots;        /* Quirk may have changed this */
1539 
1540         for (i = 0; i < slots; i++) {
1541                 slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
1542                 if (IS_ERR(slot)) {
1543                         for (i--; i >= 0; i--)
1544                                 sdhci_pci_remove_slot(chip->slots[i]);
1545                         ret = PTR_ERR(slot);
1546                         goto free;
1547                 }
1548 
1549                 chip->slots[i] = slot;
1550         }
1551 
1552         if (chip->allow_runtime_pm)
1553                 sdhci_pci_runtime_pm_allow(&pdev->dev);
1554 
1555         return 0;
1556 
1557 free:
1558         pci_set_drvdata(pdev, NULL);
1559         kfree(chip);
1560 
1561 err:
1562         pci_disable_device(pdev);
1563         return ret;
1564 }
1565 
1566 static void sdhci_pci_remove(struct pci_dev *pdev)
1567 {
1568         int i;
1569         struct sdhci_pci_chip *chip;
1570 
1571         chip = pci_get_drvdata(pdev);
1572 
1573         if (chip) {
1574                 if (chip->allow_runtime_pm)
1575                         sdhci_pci_runtime_pm_forbid(&pdev->dev);
1576 
1577                 for (i = 0; i < chip->num_slots; i++)
1578                         sdhci_pci_remove_slot(chip->slots[i]);
1579 
1580                 pci_set_drvdata(pdev, NULL);
1581                 kfree(chip);
1582         }
1583 
1584         pci_disable_device(pdev);
1585 }
1586 
1587 static struct pci_driver sdhci_driver = {
1588         .name =         "sdhci-pci",
1589         .id_table =     pci_ids,
1590         .probe =        sdhci_pci_probe,
1591         .remove =       sdhci_pci_remove,
1592         .driver =       {
1593                 .pm =   &sdhci_pci_pm_ops
1594         },
1595 };
1596 
1597 module_pci_driver(sdhci_driver);
1598 
1599 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1600 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1601 MODULE_LICENSE("GPL");
1602 

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