Version:  2.0.40 2.2.26 2.4.37 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1

Linux/drivers/mmc/host/sdhci-pci.c

  1 /*  linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
  2  *
  3  *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
  4  *
  5  * This program is free software; you can redistribute it and/or modify
  6  * it under the terms of the GNU General Public License as published by
  7  * the Free Software Foundation; either version 2 of the License, or (at
  8  * your option) any later version.
  9  *
 10  * Thanks to the following companies for their support:
 11  *
 12  *     - JMicron (hardware and technical support)
 13  */
 14 
 15 #include <linux/delay.h>
 16 #include <linux/highmem.h>
 17 #include <linux/module.h>
 18 #include <linux/pci.h>
 19 #include <linux/dma-mapping.h>
 20 #include <linux/slab.h>
 21 #include <linux/device.h>
 22 #include <linux/mmc/host.h>
 23 #include <linux/scatterlist.h>
 24 #include <linux/io.h>
 25 #include <linux/gpio.h>
 26 #include <linux/pm_runtime.h>
 27 #include <linux/mmc/slot-gpio.h>
 28 #include <linux/mmc/sdhci-pci-data.h>
 29 
 30 #include "sdhci.h"
 31 #include "sdhci-pci.h"
 32 #include "sdhci-pci-o2micro.h"
 33 
 34 /*****************************************************************************\
 35  *                                                                           *
 36  * Hardware specific quirk handling                                          *
 37  *                                                                           *
 38 \*****************************************************************************/
 39 
 40 static int ricoh_probe(struct sdhci_pci_chip *chip)
 41 {
 42         if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
 43             chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
 44                 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
 45         return 0;
 46 }
 47 
 48 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
 49 {
 50         slot->host->caps =
 51                 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
 52                         & SDHCI_TIMEOUT_CLK_MASK) |
 53 
 54                 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
 55                         & SDHCI_CLOCK_BASE_MASK) |
 56 
 57                 SDHCI_TIMEOUT_CLK_UNIT |
 58                 SDHCI_CAN_VDD_330 |
 59                 SDHCI_CAN_DO_HISPD |
 60                 SDHCI_CAN_DO_SDMA;
 61         return 0;
 62 }
 63 
 64 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
 65 {
 66         /* Apply a delay to allow controller to settle */
 67         /* Otherwise it becomes confused if card state changed
 68                 during suspend */
 69         msleep(500);
 70         return 0;
 71 }
 72 
 73 static const struct sdhci_pci_fixes sdhci_ricoh = {
 74         .probe          = ricoh_probe,
 75         .quirks         = SDHCI_QUIRK_32BIT_DMA_ADDR |
 76                           SDHCI_QUIRK_FORCE_DMA |
 77                           SDHCI_QUIRK_CLOCK_BEFORE_RESET,
 78 };
 79 
 80 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
 81         .probe_slot     = ricoh_mmc_probe_slot,
 82         .resume         = ricoh_mmc_resume,
 83         .quirks         = SDHCI_QUIRK_32BIT_DMA_ADDR |
 84                           SDHCI_QUIRK_CLOCK_BEFORE_RESET |
 85                           SDHCI_QUIRK_NO_CARD_NO_RESET |
 86                           SDHCI_QUIRK_MISSING_CAPS
 87 };
 88 
 89 static const struct sdhci_pci_fixes sdhci_ene_712 = {
 90         .quirks         = SDHCI_QUIRK_SINGLE_POWER_WRITE |
 91                           SDHCI_QUIRK_BROKEN_DMA,
 92 };
 93 
 94 static const struct sdhci_pci_fixes sdhci_ene_714 = {
 95         .quirks         = SDHCI_QUIRK_SINGLE_POWER_WRITE |
 96                           SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
 97                           SDHCI_QUIRK_BROKEN_DMA,
 98 };
 99 
100 static const struct sdhci_pci_fixes sdhci_cafe = {
101         .quirks         = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
102                           SDHCI_QUIRK_NO_BUSY_IRQ |
103                           SDHCI_QUIRK_BROKEN_CARD_DETECTION |
104                           SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
105 };
106 
107 static const struct sdhci_pci_fixes sdhci_intel_qrk = {
108         .quirks         = SDHCI_QUIRK_NO_HISPD_BIT,
109 };
110 
111 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
112 {
113         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
114         return 0;
115 }
116 
117 /*
118  * ADMA operation is disabled for Moorestown platform due to
119  * hardware bugs.
120  */
121 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
122 {
123         /*
124          * slots number is fixed here for MRST as SDIO3/5 are never used and
125          * have hardware bugs.
126          */
127         chip->num_slots = 1;
128         return 0;
129 }
130 
131 static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
132 {
133         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
134         return 0;
135 }
136 
137 #ifdef CONFIG_PM
138 
139 static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
140 {
141         struct sdhci_pci_slot *slot = dev_id;
142         struct sdhci_host *host = slot->host;
143 
144         mmc_detect_change(host->mmc, msecs_to_jiffies(200));
145         return IRQ_HANDLED;
146 }
147 
148 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
149 {
150         int err, irq, gpio = slot->cd_gpio;
151 
152         slot->cd_gpio = -EINVAL;
153         slot->cd_irq = -EINVAL;
154 
155         if (!gpio_is_valid(gpio))
156                 return;
157 
158         err = gpio_request(gpio, "sd_cd");
159         if (err < 0)
160                 goto out;
161 
162         err = gpio_direction_input(gpio);
163         if (err < 0)
164                 goto out_free;
165 
166         irq = gpio_to_irq(gpio);
167         if (irq < 0)
168                 goto out_free;
169 
170         err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
171                           IRQF_TRIGGER_FALLING, "sd_cd", slot);
172         if (err)
173                 goto out_free;
174 
175         slot->cd_gpio = gpio;
176         slot->cd_irq = irq;
177 
178         return;
179 
180 out_free:
181         gpio_free(gpio);
182 out:
183         dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
184 }
185 
186 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
187 {
188         if (slot->cd_irq >= 0)
189                 free_irq(slot->cd_irq, slot);
190         if (gpio_is_valid(slot->cd_gpio))
191                 gpio_free(slot->cd_gpio);
192 }
193 
194 #else
195 
196 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
197 {
198 }
199 
200 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
201 {
202 }
203 
204 #endif
205 
206 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
207 {
208         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
209         slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC |
210                                   MMC_CAP2_HC_ERASE_SZ;
211         return 0;
212 }
213 
214 static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
215 {
216         slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
217         return 0;
218 }
219 
220 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
221         .quirks         = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
222         .probe_slot     = mrst_hc_probe_slot,
223 };
224 
225 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
226         .quirks         = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
227         .probe          = mrst_hc_probe,
228 };
229 
230 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
231         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
232         .allow_runtime_pm = true,
233         .own_cd_for_runtime_pm = true,
234 };
235 
236 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
237         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
238         .quirks2        = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
239         .allow_runtime_pm = true,
240         .probe_slot     = mfd_sdio_probe_slot,
241 };
242 
243 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
244         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
245         .allow_runtime_pm = true,
246         .probe_slot     = mfd_emmc_probe_slot,
247 };
248 
249 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
250         .quirks         = SDHCI_QUIRK_BROKEN_ADMA,
251         .probe_slot     = pch_hc_probe_slot,
252 };
253 
254 static void sdhci_pci_int_hw_reset(struct sdhci_host *host)
255 {
256         u8 reg;
257 
258         reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
259         reg |= 0x10;
260         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
261         /* For eMMC, minimum is 1us but give it 9us for good measure */
262         udelay(9);
263         reg &= ~0x10;
264         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
265         /* For eMMC, minimum is 200us but give it 300us for good measure */
266         usleep_range(300, 1000);
267 }
268 
269 static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
270 {
271         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
272                                  MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
273                                  MMC_CAP_BUS_WIDTH_TEST |
274                                  MMC_CAP_WAIT_WHILE_BUSY;
275         slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
276         slot->hw_reset = sdhci_pci_int_hw_reset;
277         if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC)
278                 slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
279         return 0;
280 }
281 
282 static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
283 {
284         slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE |
285                                  MMC_CAP_BUS_WIDTH_TEST |
286                                  MMC_CAP_WAIT_WHILE_BUSY;
287         return 0;
288 }
289 
290 static int byt_sd_probe_slot(struct sdhci_pci_slot *slot)
291 {
292         slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST |
293                                  MMC_CAP_WAIT_WHILE_BUSY;
294         slot->cd_con_id = NULL;
295         slot->cd_idx = 0;
296         slot->cd_override_level = true;
297         return 0;
298 }
299 
300 static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
301         .allow_runtime_pm = true,
302         .probe_slot     = byt_emmc_probe_slot,
303         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
304         .quirks2        = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
305                           SDHCI_QUIRK2_STOP_WITH_TC,
306 };
307 
308 static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
309         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
310         .quirks2        = SDHCI_QUIRK2_HOST_OFF_CARD_ON |
311                         SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
312         .allow_runtime_pm = true,
313         .probe_slot     = byt_sdio_probe_slot,
314 };
315 
316 static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
317         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
318         .quirks2        = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
319                           SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
320                           SDHCI_QUIRK2_STOP_WITH_TC,
321         .allow_runtime_pm = true,
322         .own_cd_for_runtime_pm = true,
323         .probe_slot     = byt_sd_probe_slot,
324 };
325 
326 /* Define Host controllers for Intel Merrifield platform */
327 #define INTEL_MRFL_EMMC_0       0
328 #define INTEL_MRFL_EMMC_1       1
329 
330 static int intel_mrfl_mmc_probe_slot(struct sdhci_pci_slot *slot)
331 {
332         if ((PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_0) &&
333             (PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_1))
334                 /* SD support is not ready yet */
335                 return -ENODEV;
336 
337         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
338                                  MMC_CAP_1_8V_DDR;
339 
340         return 0;
341 }
342 
343 static const struct sdhci_pci_fixes sdhci_intel_mrfl_mmc = {
344         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
345         .quirks2        = SDHCI_QUIRK2_BROKEN_HS200 |
346                         SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
347         .allow_runtime_pm = true,
348         .probe_slot     = intel_mrfl_mmc_probe_slot,
349 };
350 
351 /* O2Micro extra registers */
352 #define O2_SD_LOCK_WP           0xD3
353 #define O2_SD_MULTI_VCC3V       0xEE
354 #define O2_SD_CLKREQ            0xEC
355 #define O2_SD_CAPS              0xE0
356 #define O2_SD_ADMA1             0xE2
357 #define O2_SD_ADMA2             0xE7
358 #define O2_SD_INF_MOD           0xF1
359 
360 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
361 {
362         u8 scratch;
363         int ret;
364 
365         ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
366         if (ret)
367                 return ret;
368 
369         /*
370          * Turn PMOS on [bit 0], set over current detection to 2.4 V
371          * [bit 1:2] and enable over current debouncing [bit 6].
372          */
373         if (on)
374                 scratch |= 0x47;
375         else
376                 scratch &= ~0x47;
377 
378         ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
379         if (ret)
380                 return ret;
381 
382         return 0;
383 }
384 
385 static int jmicron_probe(struct sdhci_pci_chip *chip)
386 {
387         int ret;
388         u16 mmcdev = 0;
389 
390         if (chip->pdev->revision == 0) {
391                 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
392                           SDHCI_QUIRK_32BIT_DMA_SIZE |
393                           SDHCI_QUIRK_32BIT_ADMA_SIZE |
394                           SDHCI_QUIRK_RESET_AFTER_REQUEST |
395                           SDHCI_QUIRK_BROKEN_SMALL_PIO;
396         }
397 
398         /*
399          * JMicron chips can have two interfaces to the same hardware
400          * in order to work around limitations in Microsoft's driver.
401          * We need to make sure we only bind to one of them.
402          *
403          * This code assumes two things:
404          *
405          * 1. The PCI code adds subfunctions in order.
406          *
407          * 2. The MMC interface has a lower subfunction number
408          *    than the SD interface.
409          */
410         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
411                 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
412         else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
413                 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
414 
415         if (mmcdev) {
416                 struct pci_dev *sd_dev;
417 
418                 sd_dev = NULL;
419                 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
420                                                 mmcdev, sd_dev)) != NULL) {
421                         if ((PCI_SLOT(chip->pdev->devfn) ==
422                                 PCI_SLOT(sd_dev->devfn)) &&
423                                 (chip->pdev->bus == sd_dev->bus))
424                                 break;
425                 }
426 
427                 if (sd_dev) {
428                         pci_dev_put(sd_dev);
429                         dev_info(&chip->pdev->dev, "Refusing to bind to "
430                                 "secondary interface.\n");
431                         return -ENODEV;
432                 }
433         }
434 
435         /*
436          * JMicron chips need a bit of a nudge to enable the power
437          * output pins.
438          */
439         ret = jmicron_pmos(chip, 1);
440         if (ret) {
441                 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
442                 return ret;
443         }
444 
445         /* quirk for unsable RO-detection on JM388 chips */
446         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
447             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
448                 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
449 
450         return 0;
451 }
452 
453 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
454 {
455         u8 scratch;
456 
457         scratch = readb(host->ioaddr + 0xC0);
458 
459         if (on)
460                 scratch |= 0x01;
461         else
462                 scratch &= ~0x01;
463 
464         writeb(scratch, host->ioaddr + 0xC0);
465 }
466 
467 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
468 {
469         if (slot->chip->pdev->revision == 0) {
470                 u16 version;
471 
472                 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
473                 version = (version & SDHCI_VENDOR_VER_MASK) >>
474                         SDHCI_VENDOR_VER_SHIFT;
475 
476                 /*
477                  * Older versions of the chip have lots of nasty glitches
478                  * in the ADMA engine. It's best just to avoid it
479                  * completely.
480                  */
481                 if (version < 0xAC)
482                         slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
483         }
484 
485         /* JM388 MMC doesn't support 1.8V while SD supports it */
486         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
487                 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
488                         MMC_VDD_29_30 | MMC_VDD_30_31 |
489                         MMC_VDD_165_195; /* allow 1.8V */
490                 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
491                         MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
492         }
493 
494         /*
495          * The secondary interface requires a bit set to get the
496          * interrupts.
497          */
498         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
499             slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
500                 jmicron_enable_mmc(slot->host, 1);
501 
502         slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
503 
504         return 0;
505 }
506 
507 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
508 {
509         if (dead)
510                 return;
511 
512         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
513             slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
514                 jmicron_enable_mmc(slot->host, 0);
515 }
516 
517 static int jmicron_suspend(struct sdhci_pci_chip *chip)
518 {
519         int i;
520 
521         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
522             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
523                 for (i = 0; i < chip->num_slots; i++)
524                         jmicron_enable_mmc(chip->slots[i]->host, 0);
525         }
526 
527         return 0;
528 }
529 
530 static int jmicron_resume(struct sdhci_pci_chip *chip)
531 {
532         int ret, i;
533 
534         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
535             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
536                 for (i = 0; i < chip->num_slots; i++)
537                         jmicron_enable_mmc(chip->slots[i]->host, 1);
538         }
539 
540         ret = jmicron_pmos(chip, 1);
541         if (ret) {
542                 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
543                 return ret;
544         }
545 
546         return 0;
547 }
548 
549 static const struct sdhci_pci_fixes sdhci_o2 = {
550         .probe = sdhci_pci_o2_probe,
551         .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
552         .probe_slot = sdhci_pci_o2_probe_slot,
553         .resume = sdhci_pci_o2_resume,
554 };
555 
556 static const struct sdhci_pci_fixes sdhci_jmicron = {
557         .probe          = jmicron_probe,
558 
559         .probe_slot     = jmicron_probe_slot,
560         .remove_slot    = jmicron_remove_slot,
561 
562         .suspend        = jmicron_suspend,
563         .resume         = jmicron_resume,
564 };
565 
566 /* SysKonnect CardBus2SDIO extra registers */
567 #define SYSKT_CTRL              0x200
568 #define SYSKT_RDFIFO_STAT       0x204
569 #define SYSKT_WRFIFO_STAT       0x208
570 #define SYSKT_POWER_DATA        0x20c
571 #define   SYSKT_POWER_330       0xef
572 #define   SYSKT_POWER_300       0xf8
573 #define   SYSKT_POWER_184       0xcc
574 #define SYSKT_POWER_CMD         0x20d
575 #define   SYSKT_POWER_START     (1 << 7)
576 #define SYSKT_POWER_STATUS      0x20e
577 #define   SYSKT_POWER_STATUS_OK (1 << 0)
578 #define SYSKT_BOARD_REV         0x210
579 #define SYSKT_CHIP_REV          0x211
580 #define SYSKT_CONF_DATA         0x212
581 #define   SYSKT_CONF_DATA_1V8   (1 << 2)
582 #define   SYSKT_CONF_DATA_2V5   (1 << 1)
583 #define   SYSKT_CONF_DATA_3V3   (1 << 0)
584 
585 static int syskt_probe(struct sdhci_pci_chip *chip)
586 {
587         if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
588                 chip->pdev->class &= ~0x0000FF;
589                 chip->pdev->class |= PCI_SDHCI_IFDMA;
590         }
591         return 0;
592 }
593 
594 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
595 {
596         int tm, ps;
597 
598         u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
599         u8  chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
600         dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
601                                          "board rev %d.%d, chip rev %d.%d\n",
602                                          board_rev >> 4, board_rev & 0xf,
603                                          chip_rev >> 4,  chip_rev & 0xf);
604         if (chip_rev >= 0x20)
605                 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
606 
607         writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
608         writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
609         udelay(50);
610         tm = 10;  /* Wait max 1 ms */
611         do {
612                 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
613                 if (ps & SYSKT_POWER_STATUS_OK)
614                         break;
615                 udelay(100);
616         } while (--tm);
617         if (!tm) {
618                 dev_err(&slot->chip->pdev->dev,
619                         "power regulator never stabilized");
620                 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
621                 return -ENODEV;
622         }
623 
624         return 0;
625 }
626 
627 static const struct sdhci_pci_fixes sdhci_syskt = {
628         .quirks         = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
629         .probe          = syskt_probe,
630         .probe_slot     = syskt_probe_slot,
631 };
632 
633 static int via_probe(struct sdhci_pci_chip *chip)
634 {
635         if (chip->pdev->revision == 0x10)
636                 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
637 
638         return 0;
639 }
640 
641 static const struct sdhci_pci_fixes sdhci_via = {
642         .probe          = via_probe,
643 };
644 
645 static int rtsx_probe_slot(struct sdhci_pci_slot *slot)
646 {
647         slot->host->mmc->caps2 |= MMC_CAP2_HS200;
648         return 0;
649 }
650 
651 static const struct sdhci_pci_fixes sdhci_rtsx = {
652         .quirks2        = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
653                         SDHCI_QUIRK2_BROKEN_64_BIT_DMA |
654                         SDHCI_QUIRK2_BROKEN_DDR50,
655         .probe_slot     = rtsx_probe_slot,
656 };
657 
658 static int amd_probe(struct sdhci_pci_chip *chip)
659 {
660         struct pci_dev  *smbus_dev;
661 
662         smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
663                         PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);
664 
665         if (smbus_dev && (smbus_dev->revision < 0x51)) {
666                 chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD;
667                 chip->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
668         }
669 
670         return 0;
671 }
672 
673 static const struct sdhci_pci_fixes sdhci_amd = {
674         .probe          = amd_probe,
675 };
676 
677 static const struct pci_device_id pci_ids[] = {
678         {
679                 .vendor         = PCI_VENDOR_ID_RICOH,
680                 .device         = PCI_DEVICE_ID_RICOH_R5C822,
681                 .subvendor      = PCI_ANY_ID,
682                 .subdevice      = PCI_ANY_ID,
683                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh,
684         },
685 
686         {
687                 .vendor         = PCI_VENDOR_ID_RICOH,
688                 .device         = 0x843,
689                 .subvendor      = PCI_ANY_ID,
690                 .subdevice      = PCI_ANY_ID,
691                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
692         },
693 
694         {
695                 .vendor         = PCI_VENDOR_ID_RICOH,
696                 .device         = 0xe822,
697                 .subvendor      = PCI_ANY_ID,
698                 .subdevice      = PCI_ANY_ID,
699                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
700         },
701 
702         {
703                 .vendor         = PCI_VENDOR_ID_RICOH,
704                 .device         = 0xe823,
705                 .subvendor      = PCI_ANY_ID,
706                 .subdevice      = PCI_ANY_ID,
707                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
708         },
709 
710         {
711                 .vendor         = PCI_VENDOR_ID_ENE,
712                 .device         = PCI_DEVICE_ID_ENE_CB712_SD,
713                 .subvendor      = PCI_ANY_ID,
714                 .subdevice      = PCI_ANY_ID,
715                 .driver_data    = (kernel_ulong_t)&sdhci_ene_712,
716         },
717 
718         {
719                 .vendor         = PCI_VENDOR_ID_ENE,
720                 .device         = PCI_DEVICE_ID_ENE_CB712_SD_2,
721                 .subvendor      = PCI_ANY_ID,
722                 .subdevice      = PCI_ANY_ID,
723                 .driver_data    = (kernel_ulong_t)&sdhci_ene_712,
724         },
725 
726         {
727                 .vendor         = PCI_VENDOR_ID_ENE,
728                 .device         = PCI_DEVICE_ID_ENE_CB714_SD,
729                 .subvendor      = PCI_ANY_ID,
730                 .subdevice      = PCI_ANY_ID,
731                 .driver_data    = (kernel_ulong_t)&sdhci_ene_714,
732         },
733 
734         {
735                 .vendor         = PCI_VENDOR_ID_ENE,
736                 .device         = PCI_DEVICE_ID_ENE_CB714_SD_2,
737                 .subvendor      = PCI_ANY_ID,
738                 .subdevice      = PCI_ANY_ID,
739                 .driver_data    = (kernel_ulong_t)&sdhci_ene_714,
740         },
741 
742         {
743                 .vendor         = PCI_VENDOR_ID_MARVELL,
744                 .device         = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
745                 .subvendor      = PCI_ANY_ID,
746                 .subdevice      = PCI_ANY_ID,
747                 .driver_data    = (kernel_ulong_t)&sdhci_cafe,
748         },
749 
750         {
751                 .vendor         = PCI_VENDOR_ID_JMICRON,
752                 .device         = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
753                 .subvendor      = PCI_ANY_ID,
754                 .subdevice      = PCI_ANY_ID,
755                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
756         },
757 
758         {
759                 .vendor         = PCI_VENDOR_ID_JMICRON,
760                 .device         = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
761                 .subvendor      = PCI_ANY_ID,
762                 .subdevice      = PCI_ANY_ID,
763                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
764         },
765 
766         {
767                 .vendor         = PCI_VENDOR_ID_JMICRON,
768                 .device         = PCI_DEVICE_ID_JMICRON_JMB388_SD,
769                 .subvendor      = PCI_ANY_ID,
770                 .subdevice      = PCI_ANY_ID,
771                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
772         },
773 
774         {
775                 .vendor         = PCI_VENDOR_ID_JMICRON,
776                 .device         = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
777                 .subvendor      = PCI_ANY_ID,
778                 .subdevice      = PCI_ANY_ID,
779                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
780         },
781 
782         {
783                 .vendor         = PCI_VENDOR_ID_SYSKONNECT,
784                 .device         = 0x8000,
785                 .subvendor      = PCI_ANY_ID,
786                 .subdevice      = PCI_ANY_ID,
787                 .driver_data    = (kernel_ulong_t)&sdhci_syskt,
788         },
789 
790         {
791                 .vendor         = PCI_VENDOR_ID_VIA,
792                 .device         = 0x95d0,
793                 .subvendor      = PCI_ANY_ID,
794                 .subdevice      = PCI_ANY_ID,
795                 .driver_data    = (kernel_ulong_t)&sdhci_via,
796         },
797 
798         {
799                 .vendor         = PCI_VENDOR_ID_REALTEK,
800                 .device         = 0x5250,
801                 .subvendor      = PCI_ANY_ID,
802                 .subdevice      = PCI_ANY_ID,
803                 .driver_data    = (kernel_ulong_t)&sdhci_rtsx,
804         },
805 
806         {
807                 .vendor         = PCI_VENDOR_ID_INTEL,
808                 .device         = PCI_DEVICE_ID_INTEL_QRK_SD,
809                 .subvendor      = PCI_ANY_ID,
810                 .subdevice      = PCI_ANY_ID,
811                 .driver_data    = (kernel_ulong_t)&sdhci_intel_qrk,
812         },
813 
814         {
815                 .vendor         = PCI_VENDOR_ID_INTEL,
816                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD0,
817                 .subvendor      = PCI_ANY_ID,
818                 .subdevice      = PCI_ANY_ID,
819                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
820         },
821 
822         {
823                 .vendor         = PCI_VENDOR_ID_INTEL,
824                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD1,
825                 .subvendor      = PCI_ANY_ID,
826                 .subdevice      = PCI_ANY_ID,
827                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
828         },
829 
830         {
831                 .vendor         = PCI_VENDOR_ID_INTEL,
832                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD2,
833                 .subvendor      = PCI_ANY_ID,
834                 .subdevice      = PCI_ANY_ID,
835                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
836         },
837 
838         {
839                 .vendor         = PCI_VENDOR_ID_INTEL,
840                 .device         = PCI_DEVICE_ID_INTEL_MFD_SD,
841                 .subvendor      = PCI_ANY_ID,
842                 .subdevice      = PCI_ANY_ID,
843                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sd,
844         },
845 
846         {
847                 .vendor         = PCI_VENDOR_ID_INTEL,
848                 .device         = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
849                 .subvendor      = PCI_ANY_ID,
850                 .subdevice      = PCI_ANY_ID,
851                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
852         },
853 
854         {
855                 .vendor         = PCI_VENDOR_ID_INTEL,
856                 .device         = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
857                 .subvendor      = PCI_ANY_ID,
858                 .subdevice      = PCI_ANY_ID,
859                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
860         },
861 
862         {
863                 .vendor         = PCI_VENDOR_ID_INTEL,
864                 .device         = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
865                 .subvendor      = PCI_ANY_ID,
866                 .subdevice      = PCI_ANY_ID,
867                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
868         },
869 
870         {
871                 .vendor         = PCI_VENDOR_ID_INTEL,
872                 .device         = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
873                 .subvendor      = PCI_ANY_ID,
874                 .subdevice      = PCI_ANY_ID,
875                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
876         },
877 
878         {
879                 .vendor         = PCI_VENDOR_ID_INTEL,
880                 .device         = PCI_DEVICE_ID_INTEL_PCH_SDIO0,
881                 .subvendor      = PCI_ANY_ID,
882                 .subdevice      = PCI_ANY_ID,
883                 .driver_data    = (kernel_ulong_t)&sdhci_intel_pch_sdio,
884         },
885 
886         {
887                 .vendor         = PCI_VENDOR_ID_INTEL,
888                 .device         = PCI_DEVICE_ID_INTEL_PCH_SDIO1,
889                 .subvendor      = PCI_ANY_ID,
890                 .subdevice      = PCI_ANY_ID,
891                 .driver_data    = (kernel_ulong_t)&sdhci_intel_pch_sdio,
892         },
893 
894         {
895                 .vendor         = PCI_VENDOR_ID_INTEL,
896                 .device         = PCI_DEVICE_ID_INTEL_BYT_EMMC,
897                 .subvendor      = PCI_ANY_ID,
898                 .subdevice      = PCI_ANY_ID,
899                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
900         },
901 
902         {
903                 .vendor         = PCI_VENDOR_ID_INTEL,
904                 .device         = PCI_DEVICE_ID_INTEL_BYT_SDIO,
905                 .subvendor      = PCI_ANY_ID,
906                 .subdevice      = PCI_ANY_ID,
907                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
908         },
909 
910         {
911                 .vendor         = PCI_VENDOR_ID_INTEL,
912                 .device         = PCI_DEVICE_ID_INTEL_BYT_SD,
913                 .subvendor      = PCI_ANY_ID,
914                 .subdevice      = PCI_ANY_ID,
915                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
916         },
917 
918         {
919                 .vendor         = PCI_VENDOR_ID_INTEL,
920                 .device         = PCI_DEVICE_ID_INTEL_BYT_EMMC2,
921                 .subvendor      = PCI_ANY_ID,
922                 .subdevice      = PCI_ANY_ID,
923                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
924         },
925 
926         {
927                 .vendor         = PCI_VENDOR_ID_INTEL,
928                 .device         = PCI_DEVICE_ID_INTEL_BSW_EMMC,
929                 .subvendor      = PCI_ANY_ID,
930                 .subdevice      = PCI_ANY_ID,
931                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
932         },
933 
934         {
935                 .vendor         = PCI_VENDOR_ID_INTEL,
936                 .device         = PCI_DEVICE_ID_INTEL_BSW_SDIO,
937                 .subvendor      = PCI_ANY_ID,
938                 .subdevice      = PCI_ANY_ID,
939                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
940         },
941 
942         {
943                 .vendor         = PCI_VENDOR_ID_INTEL,
944                 .device         = PCI_DEVICE_ID_INTEL_BSW_SD,
945                 .subvendor      = PCI_ANY_ID,
946                 .subdevice      = PCI_ANY_ID,
947                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
948         },
949 
950         {
951                 .vendor         = PCI_VENDOR_ID_INTEL,
952                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO0,
953                 .subvendor      = PCI_ANY_ID,
954                 .subdevice      = PCI_ANY_ID,
955                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sd,
956         },
957 
958         {
959                 .vendor         = PCI_VENDOR_ID_INTEL,
960                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO1,
961                 .subvendor      = PCI_ANY_ID,
962                 .subdevice      = PCI_ANY_ID,
963                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
964         },
965 
966         {
967                 .vendor         = PCI_VENDOR_ID_INTEL,
968                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO2,
969                 .subvendor      = PCI_ANY_ID,
970                 .subdevice      = PCI_ANY_ID,
971                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
972         },
973 
974         {
975                 .vendor         = PCI_VENDOR_ID_INTEL,
976                 .device         = PCI_DEVICE_ID_INTEL_CLV_EMMC0,
977                 .subvendor      = PCI_ANY_ID,
978                 .subdevice      = PCI_ANY_ID,
979                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
980         },
981 
982         {
983                 .vendor         = PCI_VENDOR_ID_INTEL,
984                 .device         = PCI_DEVICE_ID_INTEL_CLV_EMMC1,
985                 .subvendor      = PCI_ANY_ID,
986                 .subdevice      = PCI_ANY_ID,
987                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
988         },
989 
990         {
991                 .vendor         = PCI_VENDOR_ID_INTEL,
992                 .device         = PCI_DEVICE_ID_INTEL_MRFL_MMC,
993                 .subvendor      = PCI_ANY_ID,
994                 .subdevice      = PCI_ANY_ID,
995                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrfl_mmc,
996         },
997 
998         {
999                 .vendor         = PCI_VENDOR_ID_INTEL,
1000                 .device         = PCI_DEVICE_ID_INTEL_SPT_EMMC,
1001                 .subvendor      = PCI_ANY_ID,
1002                 .subdevice      = PCI_ANY_ID,
1003                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1004         },
1005 
1006         {
1007                 .vendor         = PCI_VENDOR_ID_INTEL,
1008                 .device         = PCI_DEVICE_ID_INTEL_SPT_SDIO,
1009                 .subvendor      = PCI_ANY_ID,
1010                 .subdevice      = PCI_ANY_ID,
1011                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1012         },
1013 
1014         {
1015                 .vendor         = PCI_VENDOR_ID_INTEL,
1016                 .device         = PCI_DEVICE_ID_INTEL_SPT_SD,
1017                 .subvendor      = PCI_ANY_ID,
1018                 .subdevice      = PCI_ANY_ID,
1019                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1020         },
1021 
1022         {
1023                 .vendor         = PCI_VENDOR_ID_O2,
1024                 .device         = PCI_DEVICE_ID_O2_8120,
1025                 .subvendor      = PCI_ANY_ID,
1026                 .subdevice      = PCI_ANY_ID,
1027                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1028         },
1029 
1030         {
1031                 .vendor         = PCI_VENDOR_ID_O2,
1032                 .device         = PCI_DEVICE_ID_O2_8220,
1033                 .subvendor      = PCI_ANY_ID,
1034                 .subdevice      = PCI_ANY_ID,
1035                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1036         },
1037 
1038         {
1039                 .vendor         = PCI_VENDOR_ID_O2,
1040                 .device         = PCI_DEVICE_ID_O2_8221,
1041                 .subvendor      = PCI_ANY_ID,
1042                 .subdevice      = PCI_ANY_ID,
1043                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1044         },
1045 
1046         {
1047                 .vendor         = PCI_VENDOR_ID_O2,
1048                 .device         = PCI_DEVICE_ID_O2_8320,
1049                 .subvendor      = PCI_ANY_ID,
1050                 .subdevice      = PCI_ANY_ID,
1051                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1052         },
1053 
1054         {
1055                 .vendor         = PCI_VENDOR_ID_O2,
1056                 .device         = PCI_DEVICE_ID_O2_8321,
1057                 .subvendor      = PCI_ANY_ID,
1058                 .subdevice      = PCI_ANY_ID,
1059                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1060         },
1061 
1062         {
1063                 .vendor         = PCI_VENDOR_ID_O2,
1064                 .device         = PCI_DEVICE_ID_O2_FUJIN2,
1065                 .subvendor      = PCI_ANY_ID,
1066                 .subdevice      = PCI_ANY_ID,
1067                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1068         },
1069 
1070         {
1071                 .vendor         = PCI_VENDOR_ID_O2,
1072                 .device         = PCI_DEVICE_ID_O2_SDS0,
1073                 .subvendor      = PCI_ANY_ID,
1074                 .subdevice      = PCI_ANY_ID,
1075                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1076         },
1077 
1078         {
1079                 .vendor         = PCI_VENDOR_ID_O2,
1080                 .device         = PCI_DEVICE_ID_O2_SDS1,
1081                 .subvendor      = PCI_ANY_ID,
1082                 .subdevice      = PCI_ANY_ID,
1083                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1084         },
1085 
1086         {
1087                 .vendor         = PCI_VENDOR_ID_O2,
1088                 .device         = PCI_DEVICE_ID_O2_SEABIRD0,
1089                 .subvendor      = PCI_ANY_ID,
1090                 .subdevice      = PCI_ANY_ID,
1091                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1092         },
1093 
1094         {
1095                 .vendor         = PCI_VENDOR_ID_O2,
1096                 .device         = PCI_DEVICE_ID_O2_SEABIRD1,
1097                 .subvendor      = PCI_ANY_ID,
1098                 .subdevice      = PCI_ANY_ID,
1099                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1100         },
1101         {
1102                 .vendor         = PCI_VENDOR_ID_AMD,
1103                 .device         = PCI_ANY_ID,
1104                 .class          = PCI_CLASS_SYSTEM_SDHCI << 8,
1105                 .class_mask     = 0xFFFF00,
1106                 .subvendor      = PCI_ANY_ID,
1107                 .subdevice      = PCI_ANY_ID,
1108                 .driver_data    = (kernel_ulong_t)&sdhci_amd,
1109         },
1110         {       /* Generic SD host controller */
1111                 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
1112         },
1113 
1114         { /* end: all zeroes */ },
1115 };
1116 
1117 MODULE_DEVICE_TABLE(pci, pci_ids);
1118 
1119 /*****************************************************************************\
1120  *                                                                           *
1121  * SDHCI core callbacks                                                      *
1122  *                                                                           *
1123 \*****************************************************************************/
1124 
1125 static int sdhci_pci_enable_dma(struct sdhci_host *host)
1126 {
1127         struct sdhci_pci_slot *slot;
1128         struct pci_dev *pdev;
1129         int ret = -1;
1130 
1131         slot = sdhci_priv(host);
1132         pdev = slot->chip->pdev;
1133 
1134         if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
1135                 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
1136                 (host->flags & SDHCI_USE_SDMA)) {
1137                 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
1138                         "doesn't fully claim to support it.\n");
1139         }
1140 
1141         if (host->flags & SDHCI_USE_64_BIT_DMA) {
1142                 if (host->quirks2 & SDHCI_QUIRK2_BROKEN_64_BIT_DMA) {
1143                         host->flags &= ~SDHCI_USE_64_BIT_DMA;
1144                 } else {
1145                         ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
1146                         if (ret)
1147                                 dev_warn(&pdev->dev, "Failed to set 64-bit DMA mask\n");
1148                 }
1149         }
1150         if (ret)
1151                 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1152         if (ret)
1153                 return ret;
1154 
1155         pci_set_master(pdev);
1156 
1157         return 0;
1158 }
1159 
1160 static void sdhci_pci_set_bus_width(struct sdhci_host *host, int width)
1161 {
1162         u8 ctrl;
1163 
1164         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1165 
1166         switch (width) {
1167         case MMC_BUS_WIDTH_8:
1168                 ctrl |= SDHCI_CTRL_8BITBUS;
1169                 ctrl &= ~SDHCI_CTRL_4BITBUS;
1170                 break;
1171         case MMC_BUS_WIDTH_4:
1172                 ctrl |= SDHCI_CTRL_4BITBUS;
1173                 ctrl &= ~SDHCI_CTRL_8BITBUS;
1174                 break;
1175         default:
1176                 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
1177                 break;
1178         }
1179 
1180         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1181 }
1182 
1183 static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host)
1184 {
1185         struct sdhci_pci_slot *slot = sdhci_priv(host);
1186         int rst_n_gpio = slot->rst_n_gpio;
1187 
1188         if (!gpio_is_valid(rst_n_gpio))
1189                 return;
1190         gpio_set_value_cansleep(rst_n_gpio, 0);
1191         /* For eMMC, minimum is 1us but give it 10us for good measure */
1192         udelay(10);
1193         gpio_set_value_cansleep(rst_n_gpio, 1);
1194         /* For eMMC, minimum is 200us but give it 300us for good measure */
1195         usleep_range(300, 1000);
1196 }
1197 
1198 static void sdhci_pci_hw_reset(struct sdhci_host *host)
1199 {
1200         struct sdhci_pci_slot *slot = sdhci_priv(host);
1201 
1202         if (slot->hw_reset)
1203                 slot->hw_reset(host);
1204 }
1205 
1206 static const struct sdhci_ops sdhci_pci_ops = {
1207         .set_clock      = sdhci_set_clock,
1208         .enable_dma     = sdhci_pci_enable_dma,
1209         .set_bus_width  = sdhci_pci_set_bus_width,
1210         .reset          = sdhci_reset,
1211         .set_uhs_signaling = sdhci_set_uhs_signaling,
1212         .hw_reset               = sdhci_pci_hw_reset,
1213 };
1214 
1215 /*****************************************************************************\
1216  *                                                                           *
1217  * Suspend/resume                                                            *
1218  *                                                                           *
1219 \*****************************************************************************/
1220 
1221 #ifdef CONFIG_PM
1222 
1223 static int sdhci_pci_suspend(struct device *dev)
1224 {
1225         struct pci_dev *pdev = to_pci_dev(dev);
1226         struct sdhci_pci_chip *chip;
1227         struct sdhci_pci_slot *slot;
1228         mmc_pm_flag_t slot_pm_flags;
1229         mmc_pm_flag_t pm_flags = 0;
1230         int i, ret;
1231 
1232         chip = pci_get_drvdata(pdev);
1233         if (!chip)
1234                 return 0;
1235 
1236         for (i = 0; i < chip->num_slots; i++) {
1237                 slot = chip->slots[i];
1238                 if (!slot)
1239                         continue;
1240 
1241                 ret = sdhci_suspend_host(slot->host);
1242 
1243                 if (ret)
1244                         goto err_pci_suspend;
1245 
1246                 slot_pm_flags = slot->host->mmc->pm_flags;
1247                 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1248                         sdhci_enable_irq_wakeups(slot->host);
1249 
1250                 pm_flags |= slot_pm_flags;
1251         }
1252 
1253         if (chip->fixes && chip->fixes->suspend) {
1254                 ret = chip->fixes->suspend(chip);
1255                 if (ret)
1256                         goto err_pci_suspend;
1257         }
1258 
1259         if (pm_flags & MMC_PM_KEEP_POWER) {
1260                 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1261                         device_init_wakeup(dev, true);
1262                 else
1263                         device_init_wakeup(dev, false);
1264         } else
1265                 device_init_wakeup(dev, false);
1266 
1267         return 0;
1268 
1269 err_pci_suspend:
1270         while (--i >= 0)
1271                 sdhci_resume_host(chip->slots[i]->host);
1272         return ret;
1273 }
1274 
1275 static int sdhci_pci_resume(struct device *dev)
1276 {
1277         struct pci_dev *pdev = to_pci_dev(dev);
1278         struct sdhci_pci_chip *chip;
1279         struct sdhci_pci_slot *slot;
1280         int i, ret;
1281 
1282         chip = pci_get_drvdata(pdev);
1283         if (!chip)
1284                 return 0;
1285 
1286         if (chip->fixes && chip->fixes->resume) {
1287                 ret = chip->fixes->resume(chip);
1288                 if (ret)
1289                         return ret;
1290         }
1291 
1292         for (i = 0; i < chip->num_slots; i++) {
1293                 slot = chip->slots[i];
1294                 if (!slot)
1295                         continue;
1296 
1297                 ret = sdhci_resume_host(slot->host);
1298                 if (ret)
1299                         return ret;
1300         }
1301 
1302         return 0;
1303 }
1304 
1305 static int sdhci_pci_runtime_suspend(struct device *dev)
1306 {
1307         struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1308         struct sdhci_pci_chip *chip;
1309         struct sdhci_pci_slot *slot;
1310         int i, ret;
1311 
1312         chip = pci_get_drvdata(pdev);
1313         if (!chip)
1314                 return 0;
1315 
1316         for (i = 0; i < chip->num_slots; i++) {
1317                 slot = chip->slots[i];
1318                 if (!slot)
1319                         continue;
1320 
1321                 ret = sdhci_runtime_suspend_host(slot->host);
1322 
1323                 if (ret)
1324                         goto err_pci_runtime_suspend;
1325         }
1326 
1327         if (chip->fixes && chip->fixes->suspend) {
1328                 ret = chip->fixes->suspend(chip);
1329                 if (ret)
1330                         goto err_pci_runtime_suspend;
1331         }
1332 
1333         return 0;
1334 
1335 err_pci_runtime_suspend:
1336         while (--i >= 0)
1337                 sdhci_runtime_resume_host(chip->slots[i]->host);
1338         return ret;
1339 }
1340 
1341 static int sdhci_pci_runtime_resume(struct device *dev)
1342 {
1343         struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1344         struct sdhci_pci_chip *chip;
1345         struct sdhci_pci_slot *slot;
1346         int i, ret;
1347 
1348         chip = pci_get_drvdata(pdev);
1349         if (!chip)
1350                 return 0;
1351 
1352         if (chip->fixes && chip->fixes->resume) {
1353                 ret = chip->fixes->resume(chip);
1354                 if (ret)
1355                         return ret;
1356         }
1357 
1358         for (i = 0; i < chip->num_slots; i++) {
1359                 slot = chip->slots[i];
1360                 if (!slot)
1361                         continue;
1362 
1363                 ret = sdhci_runtime_resume_host(slot->host);
1364                 if (ret)
1365                         return ret;
1366         }
1367 
1368         return 0;
1369 }
1370 
1371 #else /* CONFIG_PM */
1372 
1373 #define sdhci_pci_suspend NULL
1374 #define sdhci_pci_resume NULL
1375 
1376 #endif /* CONFIG_PM */
1377 
1378 static const struct dev_pm_ops sdhci_pci_pm_ops = {
1379         .suspend = sdhci_pci_suspend,
1380         .resume = sdhci_pci_resume,
1381         SET_RUNTIME_PM_OPS(sdhci_pci_runtime_suspend,
1382                         sdhci_pci_runtime_resume, NULL)
1383 };
1384 
1385 /*****************************************************************************\
1386  *                                                                           *
1387  * Device probing/removal                                                    *
1388  *                                                                           *
1389 \*****************************************************************************/
1390 
1391 static struct sdhci_pci_slot *sdhci_pci_probe_slot(
1392         struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
1393         int slotno)
1394 {
1395         struct sdhci_pci_slot *slot;
1396         struct sdhci_host *host;
1397         int ret, bar = first_bar + slotno;
1398 
1399         if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1400                 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
1401                 return ERR_PTR(-ENODEV);
1402         }
1403 
1404         if (pci_resource_len(pdev, bar) < 0x100) {
1405                 dev_err(&pdev->dev, "Invalid iomem size. You may "
1406                         "experience problems.\n");
1407         }
1408 
1409         if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1410                 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
1411                 return ERR_PTR(-ENODEV);
1412         }
1413 
1414         if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1415                 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
1416                 return ERR_PTR(-ENODEV);
1417         }
1418 
1419         host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
1420         if (IS_ERR(host)) {
1421                 dev_err(&pdev->dev, "cannot allocate host\n");
1422                 return ERR_CAST(host);
1423         }
1424 
1425         slot = sdhci_priv(host);
1426 
1427         slot->chip = chip;
1428         slot->host = host;
1429         slot->pci_bar = bar;
1430         slot->rst_n_gpio = -EINVAL;
1431         slot->cd_gpio = -EINVAL;
1432         slot->cd_idx = -1;
1433 
1434         /* Retrieve platform data if there is any */
1435         if (*sdhci_pci_get_data)
1436                 slot->data = sdhci_pci_get_data(pdev, slotno);
1437 
1438         if (slot->data) {
1439                 if (slot->data->setup) {
1440                         ret = slot->data->setup(slot->data);
1441                         if (ret) {
1442                                 dev_err(&pdev->dev, "platform setup failed\n");
1443                                 goto free;
1444                         }
1445                 }
1446                 slot->rst_n_gpio = slot->data->rst_n_gpio;
1447                 slot->cd_gpio = slot->data->cd_gpio;
1448         }
1449 
1450         host->hw_name = "PCI";
1451         host->ops = &sdhci_pci_ops;
1452         host->quirks = chip->quirks;
1453         host->quirks2 = chip->quirks2;
1454 
1455         host->irq = pdev->irq;
1456 
1457         ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
1458         if (ret) {
1459                 dev_err(&pdev->dev, "cannot request region\n");
1460                 goto cleanup;
1461         }
1462 
1463         host->ioaddr = pci_ioremap_bar(pdev, bar);
1464         if (!host->ioaddr) {
1465                 dev_err(&pdev->dev, "failed to remap registers\n");
1466                 ret = -ENOMEM;
1467                 goto release;
1468         }
1469 
1470         if (chip->fixes && chip->fixes->probe_slot) {
1471                 ret = chip->fixes->probe_slot(slot);
1472                 if (ret)
1473                         goto unmap;
1474         }
1475 
1476         if (gpio_is_valid(slot->rst_n_gpio)) {
1477                 if (!gpio_request(slot->rst_n_gpio, "eMMC_reset")) {
1478                         gpio_direction_output(slot->rst_n_gpio, 1);
1479                         slot->host->mmc->caps |= MMC_CAP_HW_RESET;
1480                         slot->hw_reset = sdhci_pci_gpio_hw_reset;
1481                 } else {
1482                         dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
1483                         slot->rst_n_gpio = -EINVAL;
1484                 }
1485         }
1486 
1487         host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1488         host->mmc->slotno = slotno;
1489         host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
1490 
1491         if (slot->cd_idx >= 0 &&
1492             mmc_gpiod_request_cd(host->mmc, slot->cd_con_id, slot->cd_idx,
1493                                  slot->cd_override_level, 0, NULL)) {
1494                 dev_warn(&pdev->dev, "failed to setup card detect gpio\n");
1495                 slot->cd_idx = -1;
1496         }
1497 
1498         ret = sdhci_add_host(host);
1499         if (ret)
1500                 goto remove;
1501 
1502         sdhci_pci_add_own_cd(slot);
1503 
1504         /*
1505          * Check if the chip needs a separate GPIO for card detect to wake up
1506          * from runtime suspend.  If it is not there, don't allow runtime PM.
1507          * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure.
1508          */
1509         if (chip->fixes && chip->fixes->own_cd_for_runtime_pm &&
1510             !gpio_is_valid(slot->cd_gpio) && slot->cd_idx < 0)
1511                 chip->allow_runtime_pm = false;
1512 
1513         return slot;
1514 
1515 remove:
1516         if (gpio_is_valid(slot->rst_n_gpio))
1517                 gpio_free(slot->rst_n_gpio);
1518 
1519         if (chip->fixes && chip->fixes->remove_slot)
1520                 chip->fixes->remove_slot(slot, 0);
1521 
1522 unmap:
1523         iounmap(host->ioaddr);
1524 
1525 release:
1526         pci_release_region(pdev, bar);
1527 
1528 cleanup:
1529         if (slot->data && slot->data->cleanup)
1530                 slot->data->cleanup(slot->data);
1531 
1532 free:
1533         sdhci_free_host(host);
1534 
1535         return ERR_PTR(ret);
1536 }
1537 
1538 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1539 {
1540         int dead;
1541         u32 scratch;
1542 
1543         sdhci_pci_remove_own_cd(slot);
1544 
1545         dead = 0;
1546         scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1547         if (scratch == (u32)-1)
1548                 dead = 1;
1549 
1550         sdhci_remove_host(slot->host, dead);
1551 
1552         if (gpio_is_valid(slot->rst_n_gpio))
1553                 gpio_free(slot->rst_n_gpio);
1554 
1555         if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1556                 slot->chip->fixes->remove_slot(slot, dead);
1557 
1558         if (slot->data && slot->data->cleanup)
1559                 slot->data->cleanup(slot->data);
1560 
1561         pci_release_region(slot->chip->pdev, slot->pci_bar);
1562 
1563         sdhci_free_host(slot->host);
1564 }
1565 
1566 static void sdhci_pci_runtime_pm_allow(struct device *dev)
1567 {
1568         pm_runtime_put_noidle(dev);
1569         pm_runtime_allow(dev);
1570         pm_runtime_set_autosuspend_delay(dev, 50);
1571         pm_runtime_use_autosuspend(dev);
1572         pm_suspend_ignore_children(dev, 1);
1573 }
1574 
1575 static void sdhci_pci_runtime_pm_forbid(struct device *dev)
1576 {
1577         pm_runtime_forbid(dev);
1578         pm_runtime_get_noresume(dev);
1579 }
1580 
1581 static int sdhci_pci_probe(struct pci_dev *pdev,
1582                                      const struct pci_device_id *ent)
1583 {
1584         struct sdhci_pci_chip *chip;
1585         struct sdhci_pci_slot *slot;
1586 
1587         u8 slots, first_bar;
1588         int ret, i;
1589 
1590         BUG_ON(pdev == NULL);
1591         BUG_ON(ent == NULL);
1592 
1593         dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1594                  (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1595 
1596         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1597         if (ret)
1598                 return ret;
1599 
1600         slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1601         dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1602         if (slots == 0)
1603                 return -ENODEV;
1604 
1605         BUG_ON(slots > MAX_SLOTS);
1606 
1607         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1608         if (ret)
1609                 return ret;
1610 
1611         first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1612 
1613         if (first_bar > 5) {
1614                 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1615                 return -ENODEV;
1616         }
1617 
1618         ret = pci_enable_device(pdev);
1619         if (ret)
1620                 return ret;
1621 
1622         chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1623         if (!chip) {
1624                 ret = -ENOMEM;
1625                 goto err;
1626         }
1627 
1628         chip->pdev = pdev;
1629         chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1630         if (chip->fixes) {
1631                 chip->quirks = chip->fixes->quirks;
1632                 chip->quirks2 = chip->fixes->quirks2;
1633                 chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
1634         }
1635         chip->num_slots = slots;
1636 
1637         pci_set_drvdata(pdev, chip);
1638 
1639         if (chip->fixes && chip->fixes->probe) {
1640                 ret = chip->fixes->probe(chip);
1641                 if (ret)
1642                         goto free;
1643         }
1644 
1645         slots = chip->num_slots;        /* Quirk may have changed this */
1646 
1647         for (i = 0; i < slots; i++) {
1648                 slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
1649                 if (IS_ERR(slot)) {
1650                         for (i--; i >= 0; i--)
1651                                 sdhci_pci_remove_slot(chip->slots[i]);
1652                         ret = PTR_ERR(slot);
1653                         goto free;
1654                 }
1655 
1656                 chip->slots[i] = slot;
1657         }
1658 
1659         if (chip->allow_runtime_pm)
1660                 sdhci_pci_runtime_pm_allow(&pdev->dev);
1661 
1662         return 0;
1663 
1664 free:
1665         pci_set_drvdata(pdev, NULL);
1666         kfree(chip);
1667 
1668 err:
1669         pci_disable_device(pdev);
1670         return ret;
1671 }
1672 
1673 static void sdhci_pci_remove(struct pci_dev *pdev)
1674 {
1675         int i;
1676         struct sdhci_pci_chip *chip;
1677 
1678         chip = pci_get_drvdata(pdev);
1679 
1680         if (chip) {
1681                 if (chip->allow_runtime_pm)
1682                         sdhci_pci_runtime_pm_forbid(&pdev->dev);
1683 
1684                 for (i = 0; i < chip->num_slots; i++)
1685                         sdhci_pci_remove_slot(chip->slots[i]);
1686 
1687                 pci_set_drvdata(pdev, NULL);
1688                 kfree(chip);
1689         }
1690 
1691         pci_disable_device(pdev);
1692 }
1693 
1694 static struct pci_driver sdhci_driver = {
1695         .name =         "sdhci-pci",
1696         .id_table =     pci_ids,
1697         .probe =        sdhci_pci_probe,
1698         .remove =       sdhci_pci_remove,
1699         .driver =       {
1700                 .pm =   &sdhci_pci_pm_ops
1701         },
1702 };
1703 
1704 module_pci_driver(sdhci_driver);
1705 
1706 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1707 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1708 MODULE_LICENSE("GPL");
1709 

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