Version:  2.0.40 2.2.26 2.4.37 2.6.39 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15

Linux/drivers/mmc/host/mxs-mmc.c

  1 /*
  2  * Portions copyright (C) 2003 Russell King, PXA MMCI Driver
  3  * Portions copyright (C) 2004-2005 Pierre Ossman, W83L51xD SD/MMC driver
  4  *
  5  * Copyright 2008 Embedded Alley Solutions, Inc.
  6  * Copyright 2009-2011 Freescale Semiconductor, Inc.
  7  *
  8  * This program is free software; you can redistribute it and/or modify
  9  * it under the terms of the GNU General Public License as published by
 10  * the Free Software Foundation; either version 2 of the License, or
 11  * (at your option) any later version.
 12  *
 13  * This program is distributed in the hope that it will be useful,
 14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 16  * GNU General Public License for more details.
 17  *
 18  * You should have received a copy of the GNU General Public License along
 19  * with this program; if not, write to the Free Software Foundation, Inc.,
 20  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 21  */
 22 
 23 #include <linux/kernel.h>
 24 #include <linux/init.h>
 25 #include <linux/ioport.h>
 26 #include <linux/of.h>
 27 #include <linux/of_device.h>
 28 #include <linux/of_gpio.h>
 29 #include <linux/platform_device.h>
 30 #include <linux/delay.h>
 31 #include <linux/interrupt.h>
 32 #include <linux/dma-mapping.h>
 33 #include <linux/dmaengine.h>
 34 #include <linux/highmem.h>
 35 #include <linux/clk.h>
 36 #include <linux/err.h>
 37 #include <linux/completion.h>
 38 #include <linux/mmc/host.h>
 39 #include <linux/mmc/mmc.h>
 40 #include <linux/mmc/sdio.h>
 41 #include <linux/mmc/slot-gpio.h>
 42 #include <linux/gpio.h>
 43 #include <linux/regulator/consumer.h>
 44 #include <linux/module.h>
 45 #include <linux/stmp_device.h>
 46 #include <linux/spi/mxs-spi.h>
 47 
 48 #define DRIVER_NAME     "mxs-mmc"
 49 
 50 #define MXS_MMC_IRQ_BITS        (BM_SSP_CTRL1_SDIO_IRQ          | \
 51                                  BM_SSP_CTRL1_RESP_ERR_IRQ      | \
 52                                  BM_SSP_CTRL1_RESP_TIMEOUT_IRQ  | \
 53                                  BM_SSP_CTRL1_DATA_TIMEOUT_IRQ  | \
 54                                  BM_SSP_CTRL1_DATA_CRC_IRQ      | \
 55                                  BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ | \
 56                                  BM_SSP_CTRL1_RECV_TIMEOUT_IRQ  | \
 57                                  BM_SSP_CTRL1_FIFO_OVERRUN_IRQ)
 58 
 59 /* card detect polling timeout */
 60 #define MXS_MMC_DETECT_TIMEOUT                  (HZ/2)
 61 
 62 struct mxs_mmc_host {
 63         struct mxs_ssp                  ssp;
 64 
 65         struct mmc_host                 *mmc;
 66         struct mmc_request              *mrq;
 67         struct mmc_command              *cmd;
 68         struct mmc_data                 *data;
 69 
 70         unsigned char                   bus_width;
 71         spinlock_t                      lock;
 72         int                             sdio_irq_en;
 73 };
 74 
 75 static int mxs_mmc_get_cd(struct mmc_host *mmc)
 76 {
 77         struct mxs_mmc_host *host = mmc_priv(mmc);
 78         struct mxs_ssp *ssp = &host->ssp;
 79         int present, ret;
 80 
 81         ret = mmc_gpio_get_cd(mmc);
 82         if (ret >= 0)
 83                 return ret;
 84 
 85         present = !(readl(ssp->base + HW_SSP_STATUS(ssp)) &
 86                         BM_SSP_STATUS_CARD_DETECT);
 87 
 88         if (mmc->caps2 & MMC_CAP2_CD_ACTIVE_HIGH)
 89                 present = !present;
 90 
 91         return present;
 92 }
 93 
 94 static int mxs_mmc_reset(struct mxs_mmc_host *host)
 95 {
 96         struct mxs_ssp *ssp = &host->ssp;
 97         u32 ctrl0, ctrl1;
 98         int ret;
 99 
100         ret = stmp_reset_block(ssp->base);
101         if (ret)
102                 return ret;
103 
104         ctrl0 = BM_SSP_CTRL0_IGNORE_CRC;
105         ctrl1 = BF_SSP(0x3, CTRL1_SSP_MODE) |
106                 BF_SSP(0x7, CTRL1_WORD_LENGTH) |
107                 BM_SSP_CTRL1_DMA_ENABLE |
108                 BM_SSP_CTRL1_POLARITY |
109                 BM_SSP_CTRL1_RECV_TIMEOUT_IRQ_EN |
110                 BM_SSP_CTRL1_DATA_CRC_IRQ_EN |
111                 BM_SSP_CTRL1_DATA_TIMEOUT_IRQ_EN |
112                 BM_SSP_CTRL1_RESP_TIMEOUT_IRQ_EN |
113                 BM_SSP_CTRL1_RESP_ERR_IRQ_EN;
114 
115         writel(BF_SSP(0xffff, TIMING_TIMEOUT) |
116                BF_SSP(2, TIMING_CLOCK_DIVIDE) |
117                BF_SSP(0, TIMING_CLOCK_RATE),
118                ssp->base + HW_SSP_TIMING(ssp));
119 
120         if (host->sdio_irq_en) {
121                 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
122                 ctrl1 |= BM_SSP_CTRL1_SDIO_IRQ_EN;
123         }
124 
125         writel(ctrl0, ssp->base + HW_SSP_CTRL0);
126         writel(ctrl1, ssp->base + HW_SSP_CTRL1(ssp));
127         return 0;
128 }
129 
130 static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
131                               struct mmc_command *cmd);
132 
133 static void mxs_mmc_request_done(struct mxs_mmc_host *host)
134 {
135         struct mmc_command *cmd = host->cmd;
136         struct mmc_data *data = host->data;
137         struct mmc_request *mrq = host->mrq;
138         struct mxs_ssp *ssp = &host->ssp;
139 
140         if (mmc_resp_type(cmd) & MMC_RSP_PRESENT) {
141                 if (mmc_resp_type(cmd) & MMC_RSP_136) {
142                         cmd->resp[3] = readl(ssp->base + HW_SSP_SDRESP0(ssp));
143                         cmd->resp[2] = readl(ssp->base + HW_SSP_SDRESP1(ssp));
144                         cmd->resp[1] = readl(ssp->base + HW_SSP_SDRESP2(ssp));
145                         cmd->resp[0] = readl(ssp->base + HW_SSP_SDRESP3(ssp));
146                 } else {
147                         cmd->resp[0] = readl(ssp->base + HW_SSP_SDRESP0(ssp));
148                 }
149         }
150 
151         if (data) {
152                 dma_unmap_sg(mmc_dev(host->mmc), data->sg,
153                              data->sg_len, ssp->dma_dir);
154                 /*
155                  * If there was an error on any block, we mark all
156                  * data blocks as being in error.
157                  */
158                 if (!data->error)
159                         data->bytes_xfered = data->blocks * data->blksz;
160                 else
161                         data->bytes_xfered = 0;
162 
163                 host->data = NULL;
164                 if (mrq->stop) {
165                         mxs_mmc_start_cmd(host, mrq->stop);
166                         return;
167                 }
168         }
169 
170         host->mrq = NULL;
171         mmc_request_done(host->mmc, mrq);
172 }
173 
174 static void mxs_mmc_dma_irq_callback(void *param)
175 {
176         struct mxs_mmc_host *host = param;
177 
178         mxs_mmc_request_done(host);
179 }
180 
181 static irqreturn_t mxs_mmc_irq_handler(int irq, void *dev_id)
182 {
183         struct mxs_mmc_host *host = dev_id;
184         struct mmc_command *cmd = host->cmd;
185         struct mmc_data *data = host->data;
186         struct mxs_ssp *ssp = &host->ssp;
187         u32 stat;
188 
189         spin_lock(&host->lock);
190 
191         stat = readl(ssp->base + HW_SSP_CTRL1(ssp));
192         writel(stat & MXS_MMC_IRQ_BITS,
193                ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_CLR);
194 
195         spin_unlock(&host->lock);
196 
197         if ((stat & BM_SSP_CTRL1_SDIO_IRQ) && (stat & BM_SSP_CTRL1_SDIO_IRQ_EN))
198                 mmc_signal_sdio_irq(host->mmc);
199 
200         if (stat & BM_SSP_CTRL1_RESP_TIMEOUT_IRQ)
201                 cmd->error = -ETIMEDOUT;
202         else if (stat & BM_SSP_CTRL1_RESP_ERR_IRQ)
203                 cmd->error = -EIO;
204 
205         if (data) {
206                 if (stat & (BM_SSP_CTRL1_DATA_TIMEOUT_IRQ |
207                             BM_SSP_CTRL1_RECV_TIMEOUT_IRQ))
208                         data->error = -ETIMEDOUT;
209                 else if (stat & BM_SSP_CTRL1_DATA_CRC_IRQ)
210                         data->error = -EILSEQ;
211                 else if (stat & (BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ |
212                                  BM_SSP_CTRL1_FIFO_OVERRUN_IRQ))
213                         data->error = -EIO;
214         }
215 
216         return IRQ_HANDLED;
217 }
218 
219 static struct dma_async_tx_descriptor *mxs_mmc_prep_dma(
220         struct mxs_mmc_host *host, unsigned long flags)
221 {
222         struct mxs_ssp *ssp = &host->ssp;
223         struct dma_async_tx_descriptor *desc;
224         struct mmc_data *data = host->data;
225         struct scatterlist * sgl;
226         unsigned int sg_len;
227 
228         if (data) {
229                 /* data */
230                 dma_map_sg(mmc_dev(host->mmc), data->sg,
231                            data->sg_len, ssp->dma_dir);
232                 sgl = data->sg;
233                 sg_len = data->sg_len;
234         } else {
235                 /* pio */
236                 sgl = (struct scatterlist *) ssp->ssp_pio_words;
237                 sg_len = SSP_PIO_NUM;
238         }
239 
240         desc = dmaengine_prep_slave_sg(ssp->dmach,
241                                 sgl, sg_len, ssp->slave_dirn, flags);
242         if (desc) {
243                 desc->callback = mxs_mmc_dma_irq_callback;
244                 desc->callback_param = host;
245         } else {
246                 if (data)
247                         dma_unmap_sg(mmc_dev(host->mmc), data->sg,
248                                      data->sg_len, ssp->dma_dir);
249         }
250 
251         return desc;
252 }
253 
254 static void mxs_mmc_bc(struct mxs_mmc_host *host)
255 {
256         struct mxs_ssp *ssp = &host->ssp;
257         struct mmc_command *cmd = host->cmd;
258         struct dma_async_tx_descriptor *desc;
259         u32 ctrl0, cmd0, cmd1;
260 
261         ctrl0 = BM_SSP_CTRL0_ENABLE | BM_SSP_CTRL0_IGNORE_CRC;
262         cmd0 = BF_SSP(cmd->opcode, CMD0_CMD) | BM_SSP_CMD0_APPEND_8CYC;
263         cmd1 = cmd->arg;
264 
265         if (host->sdio_irq_en) {
266                 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
267                 cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
268         }
269 
270         ssp->ssp_pio_words[0] = ctrl0;
271         ssp->ssp_pio_words[1] = cmd0;
272         ssp->ssp_pio_words[2] = cmd1;
273         ssp->dma_dir = DMA_NONE;
274         ssp->slave_dirn = DMA_TRANS_NONE;
275         desc = mxs_mmc_prep_dma(host, DMA_CTRL_ACK);
276         if (!desc)
277                 goto out;
278 
279         dmaengine_submit(desc);
280         dma_async_issue_pending(ssp->dmach);
281         return;
282 
283 out:
284         dev_warn(mmc_dev(host->mmc),
285                  "%s: failed to prep dma\n", __func__);
286 }
287 
288 static void mxs_mmc_ac(struct mxs_mmc_host *host)
289 {
290         struct mxs_ssp *ssp = &host->ssp;
291         struct mmc_command *cmd = host->cmd;
292         struct dma_async_tx_descriptor *desc;
293         u32 ignore_crc, get_resp, long_resp;
294         u32 ctrl0, cmd0, cmd1;
295 
296         ignore_crc = (mmc_resp_type(cmd) & MMC_RSP_CRC) ?
297                         0 : BM_SSP_CTRL0_IGNORE_CRC;
298         get_resp = (mmc_resp_type(cmd) & MMC_RSP_PRESENT) ?
299                         BM_SSP_CTRL0_GET_RESP : 0;
300         long_resp = (mmc_resp_type(cmd) & MMC_RSP_136) ?
301                         BM_SSP_CTRL0_LONG_RESP : 0;
302 
303         ctrl0 = BM_SSP_CTRL0_ENABLE | ignore_crc | get_resp | long_resp;
304         cmd0 = BF_SSP(cmd->opcode, CMD0_CMD);
305         cmd1 = cmd->arg;
306 
307         if (host->sdio_irq_en) {
308                 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
309                 cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
310         }
311 
312         ssp->ssp_pio_words[0] = ctrl0;
313         ssp->ssp_pio_words[1] = cmd0;
314         ssp->ssp_pio_words[2] = cmd1;
315         ssp->dma_dir = DMA_NONE;
316         ssp->slave_dirn = DMA_TRANS_NONE;
317         desc = mxs_mmc_prep_dma(host, DMA_CTRL_ACK);
318         if (!desc)
319                 goto out;
320 
321         dmaengine_submit(desc);
322         dma_async_issue_pending(ssp->dmach);
323         return;
324 
325 out:
326         dev_warn(mmc_dev(host->mmc),
327                  "%s: failed to prep dma\n", __func__);
328 }
329 
330 static unsigned short mxs_ns_to_ssp_ticks(unsigned clock_rate, unsigned ns)
331 {
332         const unsigned int ssp_timeout_mul = 4096;
333         /*
334          * Calculate ticks in ms since ns are large numbers
335          * and might overflow
336          */
337         const unsigned int clock_per_ms = clock_rate / 1000;
338         const unsigned int ms = ns / 1000;
339         const unsigned int ticks = ms * clock_per_ms;
340         const unsigned int ssp_ticks = ticks / ssp_timeout_mul;
341 
342         WARN_ON(ssp_ticks == 0);
343         return ssp_ticks;
344 }
345 
346 static void mxs_mmc_adtc(struct mxs_mmc_host *host)
347 {
348         struct mmc_command *cmd = host->cmd;
349         struct mmc_data *data = cmd->data;
350         struct dma_async_tx_descriptor *desc;
351         struct scatterlist *sgl = data->sg, *sg;
352         unsigned int sg_len = data->sg_len;
353         unsigned int i;
354 
355         unsigned short dma_data_dir, timeout;
356         enum dma_transfer_direction slave_dirn;
357         unsigned int data_size = 0, log2_blksz;
358         unsigned int blocks = data->blocks;
359 
360         struct mxs_ssp *ssp = &host->ssp;
361 
362         u32 ignore_crc, get_resp, long_resp, read;
363         u32 ctrl0, cmd0, cmd1, val;
364 
365         ignore_crc = (mmc_resp_type(cmd) & MMC_RSP_CRC) ?
366                         0 : BM_SSP_CTRL0_IGNORE_CRC;
367         get_resp = (mmc_resp_type(cmd) & MMC_RSP_PRESENT) ?
368                         BM_SSP_CTRL0_GET_RESP : 0;
369         long_resp = (mmc_resp_type(cmd) & MMC_RSP_136) ?
370                         BM_SSP_CTRL0_LONG_RESP : 0;
371 
372         if (data->flags & MMC_DATA_WRITE) {
373                 dma_data_dir = DMA_TO_DEVICE;
374                 slave_dirn = DMA_MEM_TO_DEV;
375                 read = 0;
376         } else {
377                 dma_data_dir = DMA_FROM_DEVICE;
378                 slave_dirn = DMA_DEV_TO_MEM;
379                 read = BM_SSP_CTRL0_READ;
380         }
381 
382         ctrl0 = BF_SSP(host->bus_width, CTRL0_BUS_WIDTH) |
383                 ignore_crc | get_resp | long_resp |
384                 BM_SSP_CTRL0_DATA_XFER | read |
385                 BM_SSP_CTRL0_WAIT_FOR_IRQ |
386                 BM_SSP_CTRL0_ENABLE;
387 
388         cmd0 = BF_SSP(cmd->opcode, CMD0_CMD);
389 
390         /* get logarithm to base 2 of block size for setting register */
391         log2_blksz = ilog2(data->blksz);
392 
393         /*
394          * take special care of the case that data size from data->sg
395          * is not equal to blocks x blksz
396          */
397         for_each_sg(sgl, sg, sg_len, i)
398                 data_size += sg->length;
399 
400         if (data_size != data->blocks * data->blksz)
401                 blocks = 1;
402 
403         /* xfer count, block size and count need to be set differently */
404         if (ssp_is_old(ssp)) {
405                 ctrl0 |= BF_SSP(data_size, CTRL0_XFER_COUNT);
406                 cmd0 |= BF_SSP(log2_blksz, CMD0_BLOCK_SIZE) |
407                         BF_SSP(blocks - 1, CMD0_BLOCK_COUNT);
408         } else {
409                 writel(data_size, ssp->base + HW_SSP_XFER_SIZE);
410                 writel(BF_SSP(log2_blksz, BLOCK_SIZE_BLOCK_SIZE) |
411                        BF_SSP(blocks - 1, BLOCK_SIZE_BLOCK_COUNT),
412                        ssp->base + HW_SSP_BLOCK_SIZE);
413         }
414 
415         if ((cmd->opcode == MMC_STOP_TRANSMISSION) ||
416             (cmd->opcode == SD_IO_RW_EXTENDED))
417                 cmd0 |= BM_SSP_CMD0_APPEND_8CYC;
418 
419         cmd1 = cmd->arg;
420 
421         if (host->sdio_irq_en) {
422                 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
423                 cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
424         }
425 
426         /* set the timeout count */
427         timeout = mxs_ns_to_ssp_ticks(ssp->clk_rate, data->timeout_ns);
428         val = readl(ssp->base + HW_SSP_TIMING(ssp));
429         val &= ~(BM_SSP_TIMING_TIMEOUT);
430         val |= BF_SSP(timeout, TIMING_TIMEOUT);
431         writel(val, ssp->base + HW_SSP_TIMING(ssp));
432 
433         /* pio */
434         ssp->ssp_pio_words[0] = ctrl0;
435         ssp->ssp_pio_words[1] = cmd0;
436         ssp->ssp_pio_words[2] = cmd1;
437         ssp->dma_dir = DMA_NONE;
438         ssp->slave_dirn = DMA_TRANS_NONE;
439         desc = mxs_mmc_prep_dma(host, 0);
440         if (!desc)
441                 goto out;
442 
443         /* append data sg */
444         WARN_ON(host->data != NULL);
445         host->data = data;
446         ssp->dma_dir = dma_data_dir;
447         ssp->slave_dirn = slave_dirn;
448         desc = mxs_mmc_prep_dma(host, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
449         if (!desc)
450                 goto out;
451 
452         dmaengine_submit(desc);
453         dma_async_issue_pending(ssp->dmach);
454         return;
455 out:
456         dev_warn(mmc_dev(host->mmc),
457                  "%s: failed to prep dma\n", __func__);
458 }
459 
460 static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
461                               struct mmc_command *cmd)
462 {
463         host->cmd = cmd;
464 
465         switch (mmc_cmd_type(cmd)) {
466         case MMC_CMD_BC:
467                 mxs_mmc_bc(host);
468                 break;
469         case MMC_CMD_BCR:
470                 mxs_mmc_ac(host);
471                 break;
472         case MMC_CMD_AC:
473                 mxs_mmc_ac(host);
474                 break;
475         case MMC_CMD_ADTC:
476                 mxs_mmc_adtc(host);
477                 break;
478         default:
479                 dev_warn(mmc_dev(host->mmc),
480                          "%s: unknown MMC command\n", __func__);
481                 break;
482         }
483 }
484 
485 static void mxs_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
486 {
487         struct mxs_mmc_host *host = mmc_priv(mmc);
488 
489         WARN_ON(host->mrq != NULL);
490         host->mrq = mrq;
491         mxs_mmc_start_cmd(host, mrq->cmd);
492 }
493 
494 static void mxs_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
495 {
496         struct mxs_mmc_host *host = mmc_priv(mmc);
497 
498         if (ios->bus_width == MMC_BUS_WIDTH_8)
499                 host->bus_width = 2;
500         else if (ios->bus_width == MMC_BUS_WIDTH_4)
501                 host->bus_width = 1;
502         else
503                 host->bus_width = 0;
504 
505         if (ios->clock)
506                 mxs_ssp_set_clk_rate(&host->ssp, ios->clock);
507 }
508 
509 static void mxs_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
510 {
511         struct mxs_mmc_host *host = mmc_priv(mmc);
512         struct mxs_ssp *ssp = &host->ssp;
513         unsigned long flags;
514 
515         spin_lock_irqsave(&host->lock, flags);
516 
517         host->sdio_irq_en = enable;
518 
519         if (enable) {
520                 writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
521                        ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
522                 writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
523                        ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_SET);
524         } else {
525                 writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
526                        ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
527                 writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
528                        ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_CLR);
529         }
530 
531         spin_unlock_irqrestore(&host->lock, flags);
532 
533         if (enable && readl(ssp->base + HW_SSP_STATUS(ssp)) &
534                         BM_SSP_STATUS_SDIO_IRQ)
535                 mmc_signal_sdio_irq(host->mmc);
536 
537 }
538 
539 static const struct mmc_host_ops mxs_mmc_ops = {
540         .request = mxs_mmc_request,
541         .get_ro = mmc_gpio_get_ro,
542         .get_cd = mxs_mmc_get_cd,
543         .set_ios = mxs_mmc_set_ios,
544         .enable_sdio_irq = mxs_mmc_enable_sdio_irq,
545 };
546 
547 static struct platform_device_id mxs_ssp_ids[] = {
548         {
549                 .name = "imx23-mmc",
550                 .driver_data = IMX23_SSP,
551         }, {
552                 .name = "imx28-mmc",
553                 .driver_data = IMX28_SSP,
554         }, {
555                 /* sentinel */
556         }
557 };
558 MODULE_DEVICE_TABLE(platform, mxs_ssp_ids);
559 
560 static const struct of_device_id mxs_mmc_dt_ids[] = {
561         { .compatible = "fsl,imx23-mmc", .data = (void *) IMX23_SSP, },
562         { .compatible = "fsl,imx28-mmc", .data = (void *) IMX28_SSP, },
563         { /* sentinel */ }
564 };
565 MODULE_DEVICE_TABLE(of, mxs_mmc_dt_ids);
566 
567 static int mxs_mmc_probe(struct platform_device *pdev)
568 {
569         const struct of_device_id *of_id =
570                         of_match_device(mxs_mmc_dt_ids, &pdev->dev);
571         struct mxs_mmc_host *host;
572         struct mmc_host *mmc;
573         struct resource *iores;
574         int ret = 0, irq_err;
575         struct regulator *reg_vmmc;
576         struct mxs_ssp *ssp;
577 
578         iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
579         irq_err = platform_get_irq(pdev, 0);
580         if (!iores || irq_err < 0)
581                 return -EINVAL;
582 
583         mmc = mmc_alloc_host(sizeof(struct mxs_mmc_host), &pdev->dev);
584         if (!mmc)
585                 return -ENOMEM;
586 
587         host = mmc_priv(mmc);
588         ssp = &host->ssp;
589         ssp->dev = &pdev->dev;
590         ssp->base = devm_ioremap_resource(&pdev->dev, iores);
591         if (IS_ERR(ssp->base)) {
592                 ret = PTR_ERR(ssp->base);
593                 goto out_mmc_free;
594         }
595 
596         ssp->devid = (enum mxs_ssp_id) of_id->data;
597 
598         host->mmc = mmc;
599         host->sdio_irq_en = 0;
600 
601         reg_vmmc = devm_regulator_get(&pdev->dev, "vmmc");
602         if (!IS_ERR(reg_vmmc)) {
603                 ret = regulator_enable(reg_vmmc);
604                 if (ret) {
605                         dev_err(&pdev->dev,
606                                 "Failed to enable vmmc regulator: %d\n", ret);
607                         goto out_mmc_free;
608                 }
609         }
610 
611         ssp->clk = devm_clk_get(&pdev->dev, NULL);
612         if (IS_ERR(ssp->clk)) {
613                 ret = PTR_ERR(ssp->clk);
614                 goto out_mmc_free;
615         }
616         clk_prepare_enable(ssp->clk);
617 
618         ret = mxs_mmc_reset(host);
619         if (ret) {
620                 dev_err(&pdev->dev, "Failed to reset mmc: %d\n", ret);
621                 goto out_clk_disable;
622         }
623 
624         ssp->dmach = dma_request_slave_channel(&pdev->dev, "rx-tx");
625         if (!ssp->dmach) {
626                 dev_err(mmc_dev(host->mmc),
627                         "%s: failed to request dma\n", __func__);
628                 ret = -ENODEV;
629                 goto out_clk_disable;
630         }
631 
632         /* set mmc core parameters */
633         mmc->ops = &mxs_mmc_ops;
634         mmc->caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED |
635                     MMC_CAP_SDIO_IRQ | MMC_CAP_NEEDS_POLL;
636 
637         mmc->f_min = 400000;
638         mmc->f_max = 288000000;
639 
640         ret = mmc_of_parse(mmc);
641         if (ret)
642                 goto out_clk_disable;
643 
644         mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
645 
646         mmc->max_segs = 52;
647         mmc->max_blk_size = 1 << 0xf;
648         mmc->max_blk_count = (ssp_is_old(ssp)) ? 0xff : 0xffffff;
649         mmc->max_req_size = (ssp_is_old(ssp)) ? 0xffff : 0xffffffff;
650         mmc->max_seg_size = dma_get_max_seg_size(ssp->dmach->device->dev);
651 
652         platform_set_drvdata(pdev, mmc);
653 
654         ret = devm_request_irq(&pdev->dev, irq_err, mxs_mmc_irq_handler, 0,
655                                DRIVER_NAME, host);
656         if (ret)
657                 goto out_free_dma;
658 
659         spin_lock_init(&host->lock);
660 
661         ret = mmc_add_host(mmc);
662         if (ret)
663                 goto out_free_dma;
664 
665         dev_info(mmc_dev(host->mmc), "initialized\n");
666 
667         return 0;
668 
669 out_free_dma:
670         if (ssp->dmach)
671                 dma_release_channel(ssp->dmach);
672 out_clk_disable:
673         clk_disable_unprepare(ssp->clk);
674 out_mmc_free:
675         mmc_free_host(mmc);
676         return ret;
677 }
678 
679 static int mxs_mmc_remove(struct platform_device *pdev)
680 {
681         struct mmc_host *mmc = platform_get_drvdata(pdev);
682         struct mxs_mmc_host *host = mmc_priv(mmc);
683         struct mxs_ssp *ssp = &host->ssp;
684 
685         mmc_remove_host(mmc);
686 
687         if (ssp->dmach)
688                 dma_release_channel(ssp->dmach);
689 
690         clk_disable_unprepare(ssp->clk);
691 
692         mmc_free_host(mmc);
693 
694         return 0;
695 }
696 
697 #ifdef CONFIG_PM
698 static int mxs_mmc_suspend(struct device *dev)
699 {
700         struct mmc_host *mmc = dev_get_drvdata(dev);
701         struct mxs_mmc_host *host = mmc_priv(mmc);
702         struct mxs_ssp *ssp = &host->ssp;
703 
704         clk_disable_unprepare(ssp->clk);
705         return 0;
706 }
707 
708 static int mxs_mmc_resume(struct device *dev)
709 {
710         struct mmc_host *mmc = dev_get_drvdata(dev);
711         struct mxs_mmc_host *host = mmc_priv(mmc);
712         struct mxs_ssp *ssp = &host->ssp;
713 
714         clk_prepare_enable(ssp->clk);
715         return 0;
716 }
717 
718 static const struct dev_pm_ops mxs_mmc_pm_ops = {
719         .suspend        = mxs_mmc_suspend,
720         .resume         = mxs_mmc_resume,
721 };
722 #endif
723 
724 static struct platform_driver mxs_mmc_driver = {
725         .probe          = mxs_mmc_probe,
726         .remove         = mxs_mmc_remove,
727         .id_table       = mxs_ssp_ids,
728         .driver         = {
729                 .name   = DRIVER_NAME,
730                 .owner  = THIS_MODULE,
731 #ifdef CONFIG_PM
732                 .pm     = &mxs_mmc_pm_ops,
733 #endif
734                 .of_match_table = mxs_mmc_dt_ids,
735         },
736 };
737 
738 module_platform_driver(mxs_mmc_driver);
739 
740 MODULE_DESCRIPTION("FREESCALE MXS MMC peripheral");
741 MODULE_AUTHOR("Freescale Semiconductor");
742 MODULE_LICENSE("GPL");
743 MODULE_ALIAS("platform:" DRIVER_NAME);
744 

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