Version:  2.0.40 2.2.26 2.4.37 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17

Linux/drivers/mmc/host/cb710-mmc.c

  1 /*
  2  *  cb710/mmc.c
  3  *
  4  *  Copyright by Michał Mirosław, 2008-2009
  5  *
  6  * This program is free software; you can redistribute it and/or modify
  7  * it under the terms of the GNU General Public License version 2 as
  8  * published by the Free Software Foundation.
  9  */
 10 #include <linux/kernel.h>
 11 #include <linux/module.h>
 12 #include <linux/pci.h>
 13 #include <linux/delay.h>
 14 #include "cb710-mmc.h"
 15 
 16 static const u8 cb710_clock_divider_log2[8] = {
 17 /*      1, 2, 4, 8, 16, 32, 128, 512 */
 18         0, 1, 2, 3,  4,  5,   7,   9
 19 };
 20 #define CB710_MAX_DIVIDER_IDX   \
 21         (ARRAY_SIZE(cb710_clock_divider_log2) - 1)
 22 
 23 static const u8 cb710_src_freq_mhz[16] = {
 24         33, 10, 20, 25, 30, 35, 40, 45,
 25         50, 55, 60, 65, 70, 75, 80, 85
 26 };
 27 
 28 static void cb710_mmc_select_clock_divider(struct mmc_host *mmc, int hz)
 29 {
 30         struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
 31         struct pci_dev *pdev = cb710_slot_to_chip(slot)->pdev;
 32         u32 src_freq_idx;
 33         u32 divider_idx;
 34         int src_hz;
 35 
 36         /* on CB710 in HP nx9500:
 37          *   src_freq_idx == 0
 38          *   indexes 1-7 work as written in the table
 39          *   indexes 0,8-15 give no clock output
 40          */
 41         pci_read_config_dword(pdev, 0x48, &src_freq_idx);
 42         src_freq_idx = (src_freq_idx >> 16) & 0xF;
 43         src_hz = cb710_src_freq_mhz[src_freq_idx] * 1000000;
 44 
 45         for (divider_idx = 0; divider_idx < CB710_MAX_DIVIDER_IDX; ++divider_idx) {
 46                 if (hz >= src_hz >> cb710_clock_divider_log2[divider_idx])
 47                         break;
 48         }
 49 
 50         if (src_freq_idx)
 51                 divider_idx |= 0x8;
 52         else if (divider_idx == 0)
 53                 divider_idx = 1;
 54 
 55         cb710_pci_update_config_reg(pdev, 0x40, ~0xF0000000, divider_idx << 28);
 56 
 57         dev_dbg(cb710_slot_dev(slot),
 58                 "clock set to %d Hz, wanted %d Hz; src_freq_idx = %d, divider_idx = %d|%d\n",
 59                 src_hz >> cb710_clock_divider_log2[divider_idx & 7],
 60                 hz, src_freq_idx, divider_idx & 7, divider_idx & 8);
 61 }
 62 
 63 static void __cb710_mmc_enable_irq(struct cb710_slot *slot,
 64         unsigned short enable, unsigned short mask)
 65 {
 66         /* clear global IE
 67          * - it gets set later if any interrupt sources are enabled */
 68         mask |= CB710_MMC_IE_IRQ_ENABLE;
 69 
 70         /* look like interrupt is fired whenever
 71          * WORD[0x0C] & WORD[0x10] != 0;
 72          * -> bit 15 port 0x0C seems to be global interrupt enable
 73          */
 74 
 75         enable = (cb710_read_port_16(slot, CB710_MMC_IRQ_ENABLE_PORT)
 76                 & ~mask) | enable;
 77 
 78         if (enable)
 79                 enable |= CB710_MMC_IE_IRQ_ENABLE;
 80 
 81         cb710_write_port_16(slot, CB710_MMC_IRQ_ENABLE_PORT, enable);
 82 }
 83 
 84 static void cb710_mmc_enable_irq(struct cb710_slot *slot,
 85         unsigned short enable, unsigned short mask)
 86 {
 87         struct cb710_mmc_reader *reader = mmc_priv(cb710_slot_to_mmc(slot));
 88         unsigned long flags;
 89 
 90         spin_lock_irqsave(&reader->irq_lock, flags);
 91         /* this is the only thing irq_lock protects */
 92         __cb710_mmc_enable_irq(slot, enable, mask);
 93         spin_unlock_irqrestore(&reader->irq_lock, flags);
 94 }
 95 
 96 static void cb710_mmc_reset_events(struct cb710_slot *slot)
 97 {
 98         cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT, 0xFF);
 99         cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT, 0xFF);
100         cb710_write_port_8(slot, CB710_MMC_STATUS2_PORT, 0xFF);
101 }
102 
103 static void cb710_mmc_enable_4bit_data(struct cb710_slot *slot, int enable)
104 {
105         if (enable)
106                 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT,
107                         CB710_MMC_C1_4BIT_DATA_BUS, 0);
108         else
109                 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT,
110                         0, CB710_MMC_C1_4BIT_DATA_BUS);
111 }
112 
113 static int cb710_check_event(struct cb710_slot *slot, u8 what)
114 {
115         u16 status;
116 
117         status = cb710_read_port_16(slot, CB710_MMC_STATUS_PORT);
118 
119         if (status & CB710_MMC_S0_FIFO_UNDERFLOW) {
120                 /* it is just a guess, so log it */
121                 dev_dbg(cb710_slot_dev(slot),
122                         "CHECK : ignoring bit 6 in status %04X\n", status);
123                 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT,
124                         CB710_MMC_S0_FIFO_UNDERFLOW);
125                 status &= ~CB710_MMC_S0_FIFO_UNDERFLOW;
126         }
127 
128         if (status & CB710_MMC_STATUS_ERROR_EVENTS) {
129                 dev_dbg(cb710_slot_dev(slot),
130                         "CHECK : returning EIO on status %04X\n", status);
131                 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT, status & 0xFF);
132                 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT,
133                         CB710_MMC_S1_RESET);
134                 return -EIO;
135         }
136 
137         /* 'what' is a bit in MMC_STATUS1 */
138         if ((status >> 8) & what) {
139                 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT, what);
140                 return 1;
141         }
142 
143         return 0;
144 }
145 
146 static int cb710_wait_for_event(struct cb710_slot *slot, u8 what)
147 {
148         int err = 0;
149         unsigned limit = 2000000;       /* FIXME: real timeout */
150 
151 #ifdef CONFIG_CB710_DEBUG
152         u32 e, x;
153         e = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
154 #endif
155 
156         while (!(err = cb710_check_event(slot, what))) {
157                 if (!--limit) {
158                         cb710_dump_regs(cb710_slot_to_chip(slot),
159                                 CB710_DUMP_REGS_MMC);
160                         err = -ETIMEDOUT;
161                         break;
162                 }
163                 udelay(1);
164         }
165 
166 #ifdef CONFIG_CB710_DEBUG
167         x = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
168 
169         limit = 2000000 - limit;
170         if (limit > 100)
171                 dev_dbg(cb710_slot_dev(slot),
172                         "WAIT10: waited %d loops, what %d, entry val %08X, exit val %08X\n",
173                         limit, what, e, x);
174 #endif
175         return err < 0 ? err : 0;
176 }
177 
178 
179 static int cb710_wait_while_busy(struct cb710_slot *slot, uint8_t mask)
180 {
181         unsigned limit = 500000;        /* FIXME: real timeout */
182         int err = 0;
183 
184 #ifdef CONFIG_CB710_DEBUG
185         u32 e, x;
186         e = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
187 #endif
188 
189         while (cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT) & mask) {
190                 if (!--limit) {
191                         cb710_dump_regs(cb710_slot_to_chip(slot),
192                                 CB710_DUMP_REGS_MMC);
193                         err = -ETIMEDOUT;
194                         break;
195                 }
196                 udelay(1);
197         }
198 
199 #ifdef CONFIG_CB710_DEBUG
200         x = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
201 
202         limit = 500000 - limit;
203         if (limit > 100)
204                 dev_dbg(cb710_slot_dev(slot),
205                         "WAIT12: waited %d loops, mask %02X, entry val %08X, exit val %08X\n",
206                         limit, mask, e, x);
207 #endif
208         return err;
209 }
210 
211 static void cb710_mmc_set_transfer_size(struct cb710_slot *slot,
212         size_t count, size_t blocksize)
213 {
214         cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
215         cb710_write_port_32(slot, CB710_MMC_TRANSFER_SIZE_PORT,
216                 ((count - 1) << 16)|(blocksize - 1));
217 
218         dev_vdbg(cb710_slot_dev(slot), "set up for %zu block%s of %zu bytes\n",
219                 count, count == 1 ? "" : "s", blocksize);
220 }
221 
222 static void cb710_mmc_fifo_hack(struct cb710_slot *slot)
223 {
224         /* without this, received data is prepended with 8-bytes of zeroes */
225         u32 r1, r2;
226         int ok = 0;
227 
228         r1 = cb710_read_port_32(slot, CB710_MMC_DATA_PORT);
229         r2 = cb710_read_port_32(slot, CB710_MMC_DATA_PORT);
230         if (cb710_read_port_8(slot, CB710_MMC_STATUS0_PORT)
231             & CB710_MMC_S0_FIFO_UNDERFLOW) {
232                 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT,
233                         CB710_MMC_S0_FIFO_UNDERFLOW);
234                 ok = 1;
235         }
236 
237         dev_dbg(cb710_slot_dev(slot),
238                 "FIFO-read-hack: expected STATUS0 bit was %s\n",
239                 ok ? "set." : "NOT SET!");
240         dev_dbg(cb710_slot_dev(slot),
241                 "FIFO-read-hack: dwords ignored: %08X %08X - %s\n",
242                 r1, r2, (r1|r2) ? "BAD (NOT ZERO)!" : "ok");
243 }
244 
245 static int cb710_mmc_receive_pio(struct cb710_slot *slot,
246         struct sg_mapping_iter *miter, size_t dw_count)
247 {
248         if (!(cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT) & CB710_MMC_S2_FIFO_READY)) {
249                 int err = cb710_wait_for_event(slot,
250                         CB710_MMC_S1_PIO_TRANSFER_DONE);
251                 if (err)
252                         return err;
253         }
254 
255         cb710_sg_dwiter_write_from_io(miter,
256                 slot->iobase + CB710_MMC_DATA_PORT, dw_count);
257 
258         return 0;
259 }
260 
261 static bool cb710_is_transfer_size_supported(struct mmc_data *data)
262 {
263         return !(data->blksz & 15 && (data->blocks != 1 || data->blksz != 8));
264 }
265 
266 static int cb710_mmc_receive(struct cb710_slot *slot, struct mmc_data *data)
267 {
268         struct sg_mapping_iter miter;
269         size_t len, blocks = data->blocks;
270         int err = 0;
271 
272         /* TODO: I don't know how/if the hardware handles non-16B-boundary blocks
273          * except single 8B block */
274         if (unlikely(data->blksz & 15 && (data->blocks != 1 || data->blksz != 8)))
275                 return -EINVAL;
276 
277         sg_miter_start(&miter, data->sg, data->sg_len, SG_MITER_TO_SG);
278 
279         cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT,
280                 15, CB710_MMC_C2_READ_PIO_SIZE_MASK);
281 
282         cb710_mmc_fifo_hack(slot);
283 
284         while (blocks-- > 0) {
285                 len = data->blksz;
286 
287                 while (len >= 16) {
288                         err = cb710_mmc_receive_pio(slot, &miter, 4);
289                         if (err)
290                                 goto out;
291                         len -= 16;
292                 }
293 
294                 if (!len)
295                         continue;
296 
297                 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT,
298                         len - 1, CB710_MMC_C2_READ_PIO_SIZE_MASK);
299 
300                 len = (len >= 8) ? 4 : 2;
301                 err = cb710_mmc_receive_pio(slot, &miter, len);
302                 if (err)
303                         goto out;
304         }
305 out:
306         sg_miter_stop(&miter);
307         return err;
308 }
309 
310 static int cb710_mmc_send(struct cb710_slot *slot, struct mmc_data *data)
311 {
312         struct sg_mapping_iter miter;
313         size_t len, blocks = data->blocks;
314         int err = 0;
315 
316         /* TODO: I don't know how/if the hardware handles multiple
317          * non-16B-boundary blocks */
318         if (unlikely(data->blocks > 1 && data->blksz & 15))
319                 return -EINVAL;
320 
321         sg_miter_start(&miter, data->sg, data->sg_len, SG_MITER_FROM_SG);
322 
323         cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT,
324                 0, CB710_MMC_C2_READ_PIO_SIZE_MASK);
325 
326         while (blocks-- > 0) {
327                 len = (data->blksz + 15) >> 4;
328                 do {
329                         if (!(cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT)
330                             & CB710_MMC_S2_FIFO_EMPTY)) {
331                                 err = cb710_wait_for_event(slot,
332                                         CB710_MMC_S1_PIO_TRANSFER_DONE);
333                                 if (err)
334                                         goto out;
335                         }
336                         cb710_sg_dwiter_read_to_io(&miter,
337                                 slot->iobase + CB710_MMC_DATA_PORT, 4);
338                 } while (--len);
339         }
340 out:
341         sg_miter_stop(&miter);
342         return err;
343 }
344 
345 static u16 cb710_encode_cmd_flags(struct cb710_mmc_reader *reader,
346         struct mmc_command *cmd)
347 {
348         unsigned int flags = cmd->flags;
349         u16 cb_flags = 0;
350 
351         /* Windows driver returned 0 for commands for which no response
352          * is expected. It happened that there were only two such commands
353          * used: MMC_GO_IDLE_STATE and MMC_GO_INACTIVE_STATE so it might
354          * as well be a bug in that driver.
355          *
356          * Original driver set bit 14 for MMC/SD application
357          * commands. There's no difference 'on the wire' and
358          * it apparently works without it anyway.
359          */
360 
361         switch (flags & MMC_CMD_MASK) {
362         case MMC_CMD_AC:        cb_flags = CB710_MMC_CMD_AC;    break;
363         case MMC_CMD_ADTC:      cb_flags = CB710_MMC_CMD_ADTC;  break;
364         case MMC_CMD_BC:        cb_flags = CB710_MMC_CMD_BC;    break;
365         case MMC_CMD_BCR:       cb_flags = CB710_MMC_CMD_BCR;   break;
366         }
367 
368         if (flags & MMC_RSP_BUSY)
369                 cb_flags |= CB710_MMC_RSP_BUSY;
370 
371         cb_flags |= cmd->opcode << CB710_MMC_CMD_CODE_SHIFT;
372 
373         if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
374                 cb_flags |= CB710_MMC_DATA_READ;
375 
376         if (flags & MMC_RSP_PRESENT) {
377                 /* Windows driver set 01 at bits 4,3 except for
378                  * MMC_SET_BLOCKLEN where it set 10. Maybe the
379                  * hardware can do something special about this
380                  * command? The original driver looks buggy/incomplete
381                  * anyway so we ignore this for now.
382                  *
383                  * I assume that 00 here means no response is expected.
384                  */
385                 cb_flags |= CB710_MMC_RSP_PRESENT;
386 
387                 if (flags & MMC_RSP_136)
388                         cb_flags |= CB710_MMC_RSP_136;
389                 if (!(flags & MMC_RSP_CRC))
390                         cb_flags |= CB710_MMC_RSP_NO_CRC;
391         }
392 
393         return cb_flags;
394 }
395 
396 static void cb710_receive_response(struct cb710_slot *slot,
397         struct mmc_command *cmd)
398 {
399         unsigned rsp_opcode, wanted_opcode;
400 
401         /* Looks like final byte with CRC is always stripped (same as SDHCI) */
402         if (cmd->flags & MMC_RSP_136) {
403                 u32 resp[4];
404 
405                 resp[0] = cb710_read_port_32(slot, CB710_MMC_RESPONSE3_PORT);
406                 resp[1] = cb710_read_port_32(slot, CB710_MMC_RESPONSE2_PORT);
407                 resp[2] = cb710_read_port_32(slot, CB710_MMC_RESPONSE1_PORT);
408                 resp[3] = cb710_read_port_32(slot, CB710_MMC_RESPONSE0_PORT);
409                 rsp_opcode = resp[0] >> 24;
410 
411                 cmd->resp[0] = (resp[0] << 8)|(resp[1] >> 24);
412                 cmd->resp[1] = (resp[1] << 8)|(resp[2] >> 24);
413                 cmd->resp[2] = (resp[2] << 8)|(resp[3] >> 24);
414                 cmd->resp[3] = (resp[3] << 8);
415         } else {
416                 rsp_opcode = cb710_read_port_32(slot, CB710_MMC_RESPONSE1_PORT) & 0x3F;
417                 cmd->resp[0] = cb710_read_port_32(slot, CB710_MMC_RESPONSE0_PORT);
418         }
419 
420         wanted_opcode = (cmd->flags & MMC_RSP_OPCODE) ? cmd->opcode : 0x3F;
421         if (rsp_opcode != wanted_opcode)
422                 cmd->error = -EILSEQ;
423 }
424 
425 static int cb710_mmc_transfer_data(struct cb710_slot *slot,
426         struct mmc_data *data)
427 {
428         int error, to;
429 
430         if (data->flags & MMC_DATA_READ)
431                 error = cb710_mmc_receive(slot, data);
432         else
433                 error = cb710_mmc_send(slot, data);
434 
435         to = cb710_wait_for_event(slot, CB710_MMC_S1_DATA_TRANSFER_DONE);
436         if (!error)
437                 error = to;
438 
439         if (!error)
440                 data->bytes_xfered = data->blksz * data->blocks;
441         return error;
442 }
443 
444 static int cb710_mmc_command(struct mmc_host *mmc, struct mmc_command *cmd)
445 {
446         struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
447         struct cb710_mmc_reader *reader = mmc_priv(mmc);
448         struct mmc_data *data = cmd->data;
449 
450         u16 cb_cmd = cb710_encode_cmd_flags(reader, cmd);
451         dev_dbg(cb710_slot_dev(slot), "cmd request: 0x%04X\n", cb_cmd);
452 
453         if (data) {
454                 if (!cb710_is_transfer_size_supported(data)) {
455                         data->error = -EINVAL;
456                         return -1;
457                 }
458                 cb710_mmc_set_transfer_size(slot, data->blocks, data->blksz);
459         }
460 
461         cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20|CB710_MMC_S2_BUSY_10);
462         cb710_write_port_16(slot, CB710_MMC_CMD_TYPE_PORT, cb_cmd);
463         cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
464         cb710_write_port_32(slot, CB710_MMC_CMD_PARAM_PORT, cmd->arg);
465         cb710_mmc_reset_events(slot);
466         cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
467         cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x01, 0);
468 
469         cmd->error = cb710_wait_for_event(slot, CB710_MMC_S1_COMMAND_SENT);
470         if (cmd->error)
471                 return -1;
472 
473         if (cmd->flags & MMC_RSP_PRESENT) {
474                 cb710_receive_response(slot, cmd);
475                 if (cmd->error)
476                         return -1;
477         }
478 
479         if (data)
480                 data->error = cb710_mmc_transfer_data(slot, data);
481         return 0;
482 }
483 
484 static void cb710_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
485 {
486         struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
487         struct cb710_mmc_reader *reader = mmc_priv(mmc);
488 
489         WARN_ON(reader->mrq != NULL);
490 
491         reader->mrq = mrq;
492         cb710_mmc_enable_irq(slot, CB710_MMC_IE_TEST_MASK, 0);
493 
494         if (!cb710_mmc_command(mmc, mrq->cmd) && mrq->stop)
495                 cb710_mmc_command(mmc, mrq->stop);
496 
497         tasklet_schedule(&reader->finish_req_tasklet);
498 }
499 
500 static int cb710_mmc_powerup(struct cb710_slot *slot)
501 {
502 #ifdef CONFIG_CB710_DEBUG
503         struct cb710_chip *chip = cb710_slot_to_chip(slot);
504 #endif
505         int err;
506 
507         /* a lot of magic for now */
508         dev_dbg(cb710_slot_dev(slot), "bus powerup\n");
509         cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
510         err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
511         if (unlikely(err))
512                 return err;
513         cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x80, 0);
514         cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0x80, 0);
515         cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
516         mdelay(1);
517         dev_dbg(cb710_slot_dev(slot), "after delay 1\n");
518         cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
519         err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
520         if (unlikely(err))
521                 return err;
522         cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x09, 0);
523         cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
524         mdelay(1);
525         dev_dbg(cb710_slot_dev(slot), "after delay 2\n");
526         cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
527         err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
528         if (unlikely(err))
529                 return err;
530         cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0, 0x08);
531         cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
532         mdelay(2);
533         dev_dbg(cb710_slot_dev(slot), "after delay 3\n");
534         cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
535         cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x06, 0);
536         cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x70, 0);
537         cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT, 0x80, 0);
538         cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0x03, 0);
539         cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
540         err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
541         if (unlikely(err))
542                 return err;
543         /* This port behaves weird: quick byte reads of 0x08,0x09 return
544          * 0xFF,0x00 after writing 0xFFFF to 0x08; it works correctly when
545          * read/written from userspace...  What am I missing here?
546          * (it doesn't depend on write-to-read delay) */
547         cb710_write_port_16(slot, CB710_MMC_CONFIGB_PORT, 0xFFFF);
548         cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x06, 0);
549         cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
550         dev_dbg(cb710_slot_dev(slot), "bus powerup finished\n");
551 
552         return cb710_check_event(slot, 0);
553 }
554 
555 static void cb710_mmc_powerdown(struct cb710_slot *slot)
556 {
557         cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0, 0x81);
558         cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0, 0x80);
559 }
560 
561 static void cb710_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
562 {
563         struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
564         struct cb710_mmc_reader *reader = mmc_priv(mmc);
565         int err;
566 
567         cb710_mmc_select_clock_divider(mmc, ios->clock);
568 
569         if (ios->power_mode != reader->last_power_mode)
570         switch (ios->power_mode) {
571         case MMC_POWER_ON:
572                 err = cb710_mmc_powerup(slot);
573                 if (err) {
574                         dev_warn(cb710_slot_dev(slot),
575                                 "powerup failed (%d)- retrying\n", err);
576                         cb710_mmc_powerdown(slot);
577                         udelay(1);
578                         err = cb710_mmc_powerup(slot);
579                         if (err)
580                                 dev_warn(cb710_slot_dev(slot),
581                                         "powerup retry failed (%d) - expect errors\n",
582                                         err);
583                 }
584                 reader->last_power_mode = MMC_POWER_ON;
585                 break;
586         case MMC_POWER_OFF:
587                 cb710_mmc_powerdown(slot);
588                 reader->last_power_mode = MMC_POWER_OFF;
589                 break;
590         case MMC_POWER_UP:
591         default:
592                 /* ignore */;
593         }
594 
595         cb710_mmc_enable_4bit_data(slot, ios->bus_width != MMC_BUS_WIDTH_1);
596 
597         cb710_mmc_enable_irq(slot, CB710_MMC_IE_TEST_MASK, 0);
598 }
599 
600 static int cb710_mmc_get_ro(struct mmc_host *mmc)
601 {
602         struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
603 
604         return cb710_read_port_8(slot, CB710_MMC_STATUS3_PORT)
605                 & CB710_MMC_S3_WRITE_PROTECTED;
606 }
607 
608 static int cb710_mmc_get_cd(struct mmc_host *mmc)
609 {
610         struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
611 
612         return cb710_read_port_8(slot, CB710_MMC_STATUS3_PORT)
613                 & CB710_MMC_S3_CARD_DETECTED;
614 }
615 
616 static int cb710_mmc_irq_handler(struct cb710_slot *slot)
617 {
618         struct mmc_host *mmc = cb710_slot_to_mmc(slot);
619         struct cb710_mmc_reader *reader = mmc_priv(mmc);
620         u32 status, config1, config2, irqen;
621 
622         status = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
623         irqen = cb710_read_port_32(slot, CB710_MMC_IRQ_ENABLE_PORT);
624         config2 = cb710_read_port_32(slot, CB710_MMC_CONFIGB_PORT);
625         config1 = cb710_read_port_32(slot, CB710_MMC_CONFIG_PORT);
626 
627         dev_dbg(cb710_slot_dev(slot), "interrupt; status: %08X, "
628                 "ie: %08X, c2: %08X, c1: %08X\n",
629                 status, irqen, config2, config1);
630 
631         if (status & (CB710_MMC_S1_CARD_CHANGED << 8)) {
632                 /* ack the event */
633                 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT,
634                         CB710_MMC_S1_CARD_CHANGED);
635                 if ((irqen & CB710_MMC_IE_CISTATUS_MASK)
636                     == CB710_MMC_IE_CISTATUS_MASK)
637                         mmc_detect_change(mmc, HZ/5);
638         } else {
639                 dev_dbg(cb710_slot_dev(slot), "unknown interrupt (test)\n");
640                 spin_lock(&reader->irq_lock);
641                 __cb710_mmc_enable_irq(slot, 0, CB710_MMC_IE_TEST_MASK);
642                 spin_unlock(&reader->irq_lock);
643         }
644 
645         return 1;
646 }
647 
648 static void cb710_mmc_finish_request_tasklet(unsigned long data)
649 {
650         struct mmc_host *mmc = (void *)data;
651         struct cb710_mmc_reader *reader = mmc_priv(mmc);
652         struct mmc_request *mrq = reader->mrq;
653 
654         reader->mrq = NULL;
655         mmc_request_done(mmc, mrq);
656 }
657 
658 static const struct mmc_host_ops cb710_mmc_host = {
659         .request = cb710_mmc_request,
660         .set_ios = cb710_mmc_set_ios,
661         .get_ro = cb710_mmc_get_ro,
662         .get_cd = cb710_mmc_get_cd,
663 };
664 
665 #ifdef CONFIG_PM
666 
667 static int cb710_mmc_suspend(struct platform_device *pdev, pm_message_t state)
668 {
669         struct cb710_slot *slot = cb710_pdev_to_slot(pdev);
670 
671         cb710_mmc_enable_irq(slot, 0, ~0);
672         return 0;
673 }
674 
675 static int cb710_mmc_resume(struct platform_device *pdev)
676 {
677         struct cb710_slot *slot = cb710_pdev_to_slot(pdev);
678 
679         cb710_mmc_enable_irq(slot, 0, ~0);
680         return 0;
681 }
682 
683 #endif /* CONFIG_PM */
684 
685 static int cb710_mmc_init(struct platform_device *pdev)
686 {
687         struct cb710_slot *slot = cb710_pdev_to_slot(pdev);
688         struct cb710_chip *chip = cb710_slot_to_chip(slot);
689         struct mmc_host *mmc;
690         struct cb710_mmc_reader *reader;
691         int err;
692         u32 val;
693 
694         mmc = mmc_alloc_host(sizeof(*reader), cb710_slot_dev(slot));
695         if (!mmc)
696                 return -ENOMEM;
697 
698         platform_set_drvdata(pdev, mmc);
699 
700         /* harmless (maybe) magic */
701         pci_read_config_dword(chip->pdev, 0x48, &val);
702         val = cb710_src_freq_mhz[(val >> 16) & 0xF];
703         dev_dbg(cb710_slot_dev(slot), "source frequency: %dMHz\n", val);
704         val *= 1000000;
705 
706         mmc->ops = &cb710_mmc_host;
707         mmc->f_max = val;
708         mmc->f_min = val >> cb710_clock_divider_log2[CB710_MAX_DIVIDER_IDX];
709         mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34;
710         mmc->caps = MMC_CAP_4_BIT_DATA;
711 
712         reader = mmc_priv(mmc);
713 
714         tasklet_init(&reader->finish_req_tasklet,
715                 cb710_mmc_finish_request_tasklet, (unsigned long)mmc);
716         spin_lock_init(&reader->irq_lock);
717         cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
718 
719         cb710_mmc_enable_irq(slot, 0, ~0);
720         cb710_set_irq_handler(slot, cb710_mmc_irq_handler);
721 
722         err = mmc_add_host(mmc);
723         if (unlikely(err))
724                 goto err_free_mmc;
725 
726         dev_dbg(cb710_slot_dev(slot), "mmc_hostname is %s\n",
727                 mmc_hostname(mmc));
728 
729         cb710_mmc_enable_irq(slot, CB710_MMC_IE_CARD_INSERTION_STATUS, 0);
730 
731         return 0;
732 
733 err_free_mmc:
734         dev_dbg(cb710_slot_dev(slot), "mmc_add_host() failed: %d\n", err);
735 
736         cb710_set_irq_handler(slot, NULL);
737         mmc_free_host(mmc);
738         return err;
739 }
740 
741 static int cb710_mmc_exit(struct platform_device *pdev)
742 {
743         struct cb710_slot *slot = cb710_pdev_to_slot(pdev);
744         struct mmc_host *mmc = cb710_slot_to_mmc(slot);
745         struct cb710_mmc_reader *reader = mmc_priv(mmc);
746 
747         cb710_mmc_enable_irq(slot, 0, CB710_MMC_IE_CARD_INSERTION_STATUS);
748 
749         mmc_remove_host(mmc);
750 
751         /* IRQs should be disabled now, but let's stay on the safe side */
752         cb710_mmc_enable_irq(slot, 0, ~0);
753         cb710_set_irq_handler(slot, NULL);
754 
755         /* clear config ports - just in case */
756         cb710_write_port_32(slot, CB710_MMC_CONFIG_PORT, 0);
757         cb710_write_port_16(slot, CB710_MMC_CONFIGB_PORT, 0);
758 
759         tasklet_kill(&reader->finish_req_tasklet);
760 
761         mmc_free_host(mmc);
762         return 0;
763 }
764 
765 static struct platform_driver cb710_mmc_driver = {
766         .driver.name = "cb710-mmc",
767         .probe = cb710_mmc_init,
768         .remove = cb710_mmc_exit,
769 #ifdef CONFIG_PM
770         .suspend = cb710_mmc_suspend,
771         .resume = cb710_mmc_resume,
772 #endif
773 };
774 
775 module_platform_driver(cb710_mmc_driver);
776 
777 MODULE_AUTHOR("Michał Mirosław <mirq-linux@rere.qmqm.pl>");
778 MODULE_DESCRIPTION("ENE CB710 memory card reader driver - MMC/SD part");
779 MODULE_LICENSE("GPL");
780 MODULE_ALIAS("platform:cb710-mmc");
781 

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