Version:  2.0.40 2.2.26 2.4.37 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19

Linux/drivers/mfd/tc6393xb.c

  1 /*
  2  * Toshiba TC6393XB SoC support
  3  *
  4  * Copyright(c) 2005-2006 Chris Humbert
  5  * Copyright(c) 2005 Dirk Opfer
  6  * Copyright(c) 2005 Ian Molton <spyro@f2s.com>
  7  * Copyright(c) 2007 Dmitry Baryshkov
  8  *
  9  * Based on code written by Sharp/Lineo for 2.4 kernels
 10  * Based on locomo.c
 11  *
 12  * This program is free software; you can redistribute it and/or modify
 13  * it under the terms of the GNU General Public License version 2 as
 14  * published by the Free Software Foundation.
 15  */
 16 
 17 #include <linux/kernel.h>
 18 #include <linux/module.h>
 19 #include <linux/io.h>
 20 #include <linux/irq.h>
 21 #include <linux/platform_device.h>
 22 #include <linux/clk.h>
 23 #include <linux/err.h>
 24 #include <linux/mfd/core.h>
 25 #include <linux/mfd/tmio.h>
 26 #include <linux/mfd/tc6393xb.h>
 27 #include <linux/gpio.h>
 28 #include <linux/slab.h>
 29 
 30 #define SCR_REVID       0x08            /* b Revision ID        */
 31 #define SCR_ISR         0x50            /* b Interrupt Status   */
 32 #define SCR_IMR         0x52            /* b Interrupt Mask     */
 33 #define SCR_IRR         0x54            /* b Interrupt Routing  */
 34 #define SCR_GPER        0x60            /* w GP Enable          */
 35 #define SCR_GPI_SR(i)   (0x64 + (i))    /* b3 GPI Status        */
 36 #define SCR_GPI_IMR(i)  (0x68 + (i))    /* b3 GPI INT Mask      */
 37 #define SCR_GPI_EDER(i) (0x6c + (i))    /* b3 GPI Edge Detect Enable */
 38 #define SCR_GPI_LIR(i)  (0x70 + (i))    /* b3 GPI Level Invert  */
 39 #define SCR_GPO_DSR(i)  (0x78 + (i))    /* b3 GPO Data Set      */
 40 #define SCR_GPO_DOECR(i) (0x7c + (i))   /* b3 GPO Data OE Control */
 41 #define SCR_GP_IARCR(i) (0x80 + (i))    /* b3 GP Internal Active Register Control */
 42 #define SCR_GP_IARLCR(i) (0x84 + (i))   /* b3 GP INTERNAL Active Register Level Control */
 43 #define SCR_GPI_BCR(i)  (0x88 + (i))    /* b3 GPI Buffer Control */
 44 #define SCR_GPA_IARCR   0x8c            /* w GPa Internal Active Register Control */
 45 #define SCR_GPA_IARLCR  0x90            /* w GPa Internal Active Register Level Control */
 46 #define SCR_GPA_BCR     0x94            /* w GPa Buffer Control */
 47 #define SCR_CCR         0x98            /* w Clock Control      */
 48 #define SCR_PLL2CR      0x9a            /* w PLL2 Control       */
 49 #define SCR_PLL1CR      0x9c            /* l PLL1 Control       */
 50 #define SCR_DIARCR      0xa0            /* b Device Internal Active Register Control */
 51 #define SCR_DBOCR       0xa1            /* b Device Buffer Off Control */
 52 #define SCR_FER         0xe0            /* b Function Enable    */
 53 #define SCR_MCR         0xe4            /* w Mode Control       */
 54 #define SCR_CONFIG      0xfc            /* b Configuration Control */
 55 #define SCR_DEBUG       0xff            /* b Debug              */
 56 
 57 #define SCR_CCR_CK32K   BIT(0)
 58 #define SCR_CCR_USBCK   BIT(1)
 59 #define SCR_CCR_UNK1    BIT(4)
 60 #define SCR_CCR_MCLK_MASK       (7 << 8)
 61 #define SCR_CCR_MCLK_OFF        (0 << 8)
 62 #define SCR_CCR_MCLK_12 (1 << 8)
 63 #define SCR_CCR_MCLK_24 (2 << 8)
 64 #define SCR_CCR_MCLK_48 (3 << 8)
 65 #define SCR_CCR_HCLK_MASK       (3 << 12)
 66 #define SCR_CCR_HCLK_24 (0 << 12)
 67 #define SCR_CCR_HCLK_48 (1 << 12)
 68 
 69 #define SCR_FER_USBEN           BIT(0)  /* USB host enable */
 70 #define SCR_FER_LCDCVEN         BIT(1)  /* polysilicon TFT enable */
 71 #define SCR_FER_SLCDEN          BIT(2)  /* SLCD enable */
 72 
 73 #define SCR_MCR_RDY_MASK                (3 << 0)
 74 #define SCR_MCR_RDY_OPENDRAIN   (0 << 0)
 75 #define SCR_MCR_RDY_TRISTATE    (1 << 0)
 76 #define SCR_MCR_RDY_PUSHPULL    (2 << 0)
 77 #define SCR_MCR_RDY_UNK         BIT(2)
 78 #define SCR_MCR_RDY_EN          BIT(3)
 79 #define SCR_MCR_INT_MASK                (3 << 4)
 80 #define SCR_MCR_INT_OPENDRAIN   (0 << 4)
 81 #define SCR_MCR_INT_TRISTATE    (1 << 4)
 82 #define SCR_MCR_INT_PUSHPULL    (2 << 4)
 83 #define SCR_MCR_INT_UNK         BIT(6)
 84 #define SCR_MCR_INT_EN          BIT(7)
 85 /* bits 8 - 16 are unknown */
 86 
 87 #define TC_GPIO_BIT(i)          (1 << (i & 0x7))
 88 
 89 /*--------------------------------------------------------------------------*/
 90 
 91 struct tc6393xb {
 92         void __iomem            *scr;
 93 
 94         struct gpio_chip        gpio;
 95 
 96         struct clk              *clk; /* 3,6 Mhz */
 97 
 98         spinlock_t              lock; /* protects RMW cycles */
 99 
100         struct {
101                 u8              fer;
102                 u16             ccr;
103                 u8              gpi_bcr[3];
104                 u8              gpo_dsr[3];
105                 u8              gpo_doecr[3];
106         } suspend_state;
107 
108         struct resource         rscr;
109         struct resource         *iomem;
110         int                     irq;
111         int                     irq_base;
112 };
113 
114 enum {
115         TC6393XB_CELL_NAND,
116         TC6393XB_CELL_MMC,
117         TC6393XB_CELL_OHCI,
118         TC6393XB_CELL_FB,
119 };
120 
121 /*--------------------------------------------------------------------------*/
122 
123 static int tc6393xb_nand_enable(struct platform_device *nand)
124 {
125         struct platform_device *dev = to_platform_device(nand->dev.parent);
126         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
127         unsigned long flags;
128 
129         spin_lock_irqsave(&tc6393xb->lock, flags);
130 
131         /* SMD buffer on */
132         dev_dbg(&dev->dev, "SMD buffer on\n");
133         tmio_iowrite8(0xff, tc6393xb->scr + SCR_GPI_BCR(1));
134 
135         spin_unlock_irqrestore(&tc6393xb->lock, flags);
136 
137         return 0;
138 }
139 
140 static struct resource tc6393xb_nand_resources[] = {
141         {
142                 .start  = 0x1000,
143                 .end    = 0x1007,
144                 .flags  = IORESOURCE_MEM,
145         },
146         {
147                 .start  = 0x0100,
148                 .end    = 0x01ff,
149                 .flags  = IORESOURCE_MEM,
150         },
151         {
152                 .start  = IRQ_TC6393_NAND,
153                 .end    = IRQ_TC6393_NAND,
154                 .flags  = IORESOURCE_IRQ,
155         },
156 };
157 
158 static struct resource tc6393xb_mmc_resources[] = {
159         {
160                 .start  = 0x800,
161                 .end    = 0x9ff,
162                 .flags  = IORESOURCE_MEM,
163         },
164         {
165                 .start  = IRQ_TC6393_MMC,
166                 .end    = IRQ_TC6393_MMC,
167                 .flags  = IORESOURCE_IRQ,
168         },
169 };
170 
171 static const struct resource tc6393xb_ohci_resources[] = {
172         {
173                 .start  = 0x3000,
174                 .end    = 0x31ff,
175                 .flags  = IORESOURCE_MEM,
176         },
177         {
178                 .start  = 0x0300,
179                 .end    = 0x03ff,
180                 .flags  = IORESOURCE_MEM,
181         },
182         {
183                 .start  = 0x010000,
184                 .end    = 0x017fff,
185                 .flags  = IORESOURCE_MEM,
186         },
187         {
188                 .start  = 0x018000,
189                 .end    = 0x01ffff,
190                 .flags  = IORESOURCE_MEM,
191         },
192         {
193                 .start  = IRQ_TC6393_OHCI,
194                 .end    = IRQ_TC6393_OHCI,
195                 .flags  = IORESOURCE_IRQ,
196         },
197 };
198 
199 static struct resource tc6393xb_fb_resources[] = {
200         {
201                 .start  = 0x5000,
202                 .end    = 0x51ff,
203                 .flags  = IORESOURCE_MEM,
204         },
205         {
206                 .start  = 0x0500,
207                 .end    = 0x05ff,
208                 .flags  = IORESOURCE_MEM,
209         },
210         {
211                 .start  = 0x100000,
212                 .end    = 0x1fffff,
213                 .flags  = IORESOURCE_MEM,
214         },
215         {
216                 .start  = IRQ_TC6393_FB,
217                 .end    = IRQ_TC6393_FB,
218                 .flags  = IORESOURCE_IRQ,
219         },
220 };
221 
222 static int tc6393xb_ohci_enable(struct platform_device *dev)
223 {
224         struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent);
225         unsigned long flags;
226         u16 ccr;
227         u8 fer;
228 
229         spin_lock_irqsave(&tc6393xb->lock, flags);
230 
231         ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
232         ccr |= SCR_CCR_USBCK;
233         tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
234 
235         fer = tmio_ioread8(tc6393xb->scr + SCR_FER);
236         fer |= SCR_FER_USBEN;
237         tmio_iowrite8(fer, tc6393xb->scr + SCR_FER);
238 
239         spin_unlock_irqrestore(&tc6393xb->lock, flags);
240 
241         return 0;
242 }
243 
244 static int tc6393xb_ohci_disable(struct platform_device *dev)
245 {
246         struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent);
247         unsigned long flags;
248         u16 ccr;
249         u8 fer;
250 
251         spin_lock_irqsave(&tc6393xb->lock, flags);
252 
253         fer = tmio_ioread8(tc6393xb->scr + SCR_FER);
254         fer &= ~SCR_FER_USBEN;
255         tmio_iowrite8(fer, tc6393xb->scr + SCR_FER);
256 
257         ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
258         ccr &= ~SCR_CCR_USBCK;
259         tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
260 
261         spin_unlock_irqrestore(&tc6393xb->lock, flags);
262 
263         return 0;
264 }
265 
266 static int tc6393xb_ohci_suspend(struct platform_device *dev)
267 {
268         struct tc6393xb_platform_data *tcpd = dev_get_platdata(dev->dev.parent);
269 
270         /* We can't properly store/restore OHCI state, so fail here */
271         if (tcpd->resume_restore)
272                 return -EBUSY;
273 
274         return tc6393xb_ohci_disable(dev);
275 }
276 
277 static int tc6393xb_fb_enable(struct platform_device *dev)
278 {
279         struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent);
280         unsigned long flags;
281         u16 ccr;
282 
283         spin_lock_irqsave(&tc6393xb->lock, flags);
284 
285         ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
286         ccr &= ~SCR_CCR_MCLK_MASK;
287         ccr |= SCR_CCR_MCLK_48;
288         tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
289 
290         spin_unlock_irqrestore(&tc6393xb->lock, flags);
291 
292         return 0;
293 }
294 
295 static int tc6393xb_fb_disable(struct platform_device *dev)
296 {
297         struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent);
298         unsigned long flags;
299         u16 ccr;
300 
301         spin_lock_irqsave(&tc6393xb->lock, flags);
302 
303         ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
304         ccr &= ~SCR_CCR_MCLK_MASK;
305         ccr |= SCR_CCR_MCLK_OFF;
306         tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
307 
308         spin_unlock_irqrestore(&tc6393xb->lock, flags);
309 
310         return 0;
311 }
312 
313 int tc6393xb_lcd_set_power(struct platform_device *fb, bool on)
314 {
315         struct platform_device *dev = to_platform_device(fb->dev.parent);
316         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
317         u8 fer;
318         unsigned long flags;
319 
320         spin_lock_irqsave(&tc6393xb->lock, flags);
321 
322         fer = ioread8(tc6393xb->scr + SCR_FER);
323         if (on)
324                 fer |= SCR_FER_SLCDEN;
325         else
326                 fer &= ~SCR_FER_SLCDEN;
327         iowrite8(fer, tc6393xb->scr + SCR_FER);
328 
329         spin_unlock_irqrestore(&tc6393xb->lock, flags);
330 
331         return 0;
332 }
333 EXPORT_SYMBOL(tc6393xb_lcd_set_power);
334 
335 int tc6393xb_lcd_mode(struct platform_device *fb,
336                                         const struct fb_videomode *mode) {
337         struct platform_device *dev = to_platform_device(fb->dev.parent);
338         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
339         unsigned long flags;
340 
341         spin_lock_irqsave(&tc6393xb->lock, flags);
342 
343         iowrite16(mode->pixclock, tc6393xb->scr + SCR_PLL1CR + 0);
344         iowrite16(mode->pixclock >> 16, tc6393xb->scr + SCR_PLL1CR + 2);
345 
346         spin_unlock_irqrestore(&tc6393xb->lock, flags);
347 
348         return 0;
349 }
350 EXPORT_SYMBOL(tc6393xb_lcd_mode);
351 
352 static int tc6393xb_mmc_enable(struct platform_device *mmc)
353 {
354         struct platform_device *dev = to_platform_device(mmc->dev.parent);
355         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
356 
357         tmio_core_mmc_enable(tc6393xb->scr + 0x200, 0,
358                 tc6393xb_mmc_resources[0].start & 0xfffe);
359 
360         return 0;
361 }
362 
363 static int tc6393xb_mmc_resume(struct platform_device *mmc)
364 {
365         struct platform_device *dev = to_platform_device(mmc->dev.parent);
366         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
367 
368         tmio_core_mmc_resume(tc6393xb->scr + 0x200, 0,
369                 tc6393xb_mmc_resources[0].start & 0xfffe);
370 
371         return 0;
372 }
373 
374 static void tc6393xb_mmc_pwr(struct platform_device *mmc, int state)
375 {
376         struct platform_device *dev = to_platform_device(mmc->dev.parent);
377         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
378 
379         tmio_core_mmc_pwr(tc6393xb->scr + 0x200, 0, state);
380 }
381 
382 static void tc6393xb_mmc_clk_div(struct platform_device *mmc, int state)
383 {
384         struct platform_device *dev = to_platform_device(mmc->dev.parent);
385         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
386 
387         tmio_core_mmc_clk_div(tc6393xb->scr + 0x200, 0, state);
388 }
389 
390 static struct tmio_mmc_data tc6393xb_mmc_data = {
391         .hclk = 24000000,
392         .set_pwr = tc6393xb_mmc_pwr,
393         .set_clk_div = tc6393xb_mmc_clk_div,
394 };
395 
396 static struct mfd_cell tc6393xb_cells[] = {
397         [TC6393XB_CELL_NAND] = {
398                 .name = "tmio-nand",
399                 .enable = tc6393xb_nand_enable,
400                 .num_resources = ARRAY_SIZE(tc6393xb_nand_resources),
401                 .resources = tc6393xb_nand_resources,
402         },
403         [TC6393XB_CELL_MMC] = {
404                 .name = "tmio-mmc",
405                 .enable = tc6393xb_mmc_enable,
406                 .resume = tc6393xb_mmc_resume,
407                 .platform_data = &tc6393xb_mmc_data,
408                 .pdata_size    = sizeof(tc6393xb_mmc_data),
409                 .num_resources = ARRAY_SIZE(tc6393xb_mmc_resources),
410                 .resources = tc6393xb_mmc_resources,
411         },
412         [TC6393XB_CELL_OHCI] = {
413                 .name = "tmio-ohci",
414                 .num_resources = ARRAY_SIZE(tc6393xb_ohci_resources),
415                 .resources = tc6393xb_ohci_resources,
416                 .enable = tc6393xb_ohci_enable,
417                 .suspend = tc6393xb_ohci_suspend,
418                 .resume = tc6393xb_ohci_enable,
419                 .disable = tc6393xb_ohci_disable,
420         },
421         [TC6393XB_CELL_FB] = {
422                 .name = "tmio-fb",
423                 .num_resources = ARRAY_SIZE(tc6393xb_fb_resources),
424                 .resources = tc6393xb_fb_resources,
425                 .enable = tc6393xb_fb_enable,
426                 .suspend = tc6393xb_fb_disable,
427                 .resume = tc6393xb_fb_enable,
428                 .disable = tc6393xb_fb_disable,
429         },
430 };
431 
432 /*--------------------------------------------------------------------------*/
433 
434 static int tc6393xb_gpio_get(struct gpio_chip *chip,
435                 unsigned offset)
436 {
437         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
438 
439         /* XXX: does dsr also represent inputs? */
440         return tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8))
441                 & TC_GPIO_BIT(offset);
442 }
443 
444 static void __tc6393xb_gpio_set(struct gpio_chip *chip,
445                 unsigned offset, int value)
446 {
447         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
448         u8  dsr;
449 
450         dsr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8));
451         if (value)
452                 dsr |= TC_GPIO_BIT(offset);
453         else
454                 dsr &= ~TC_GPIO_BIT(offset);
455 
456         tmio_iowrite8(dsr, tc6393xb->scr + SCR_GPO_DSR(offset / 8));
457 }
458 
459 static void tc6393xb_gpio_set(struct gpio_chip *chip,
460                 unsigned offset, int value)
461 {
462         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
463         unsigned long flags;
464 
465         spin_lock_irqsave(&tc6393xb->lock, flags);
466 
467         __tc6393xb_gpio_set(chip, offset, value);
468 
469         spin_unlock_irqrestore(&tc6393xb->lock, flags);
470 }
471 
472 static int tc6393xb_gpio_direction_input(struct gpio_chip *chip,
473                         unsigned offset)
474 {
475         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
476         unsigned long flags;
477         u8 doecr;
478 
479         spin_lock_irqsave(&tc6393xb->lock, flags);
480 
481         doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
482         doecr &= ~TC_GPIO_BIT(offset);
483         tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
484 
485         spin_unlock_irqrestore(&tc6393xb->lock, flags);
486 
487         return 0;
488 }
489 
490 static int tc6393xb_gpio_direction_output(struct gpio_chip *chip,
491                         unsigned offset, int value)
492 {
493         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
494         unsigned long flags;
495         u8 doecr;
496 
497         spin_lock_irqsave(&tc6393xb->lock, flags);
498 
499         __tc6393xb_gpio_set(chip, offset, value);
500 
501         doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
502         doecr |= TC_GPIO_BIT(offset);
503         tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
504 
505         spin_unlock_irqrestore(&tc6393xb->lock, flags);
506 
507         return 0;
508 }
509 
510 static int tc6393xb_register_gpio(struct tc6393xb *tc6393xb, int gpio_base)
511 {
512         tc6393xb->gpio.label = "tc6393xb";
513         tc6393xb->gpio.base = gpio_base;
514         tc6393xb->gpio.ngpio = 16;
515         tc6393xb->gpio.set = tc6393xb_gpio_set;
516         tc6393xb->gpio.get = tc6393xb_gpio_get;
517         tc6393xb->gpio.direction_input = tc6393xb_gpio_direction_input;
518         tc6393xb->gpio.direction_output = tc6393xb_gpio_direction_output;
519 
520         return gpiochip_add(&tc6393xb->gpio);
521 }
522 
523 /*--------------------------------------------------------------------------*/
524 
525 static void
526 tc6393xb_irq(unsigned int irq, struct irq_desc *desc)
527 {
528         struct tc6393xb *tc6393xb = irq_get_handler_data(irq);
529         unsigned int isr;
530         unsigned int i, irq_base;
531 
532         irq_base = tc6393xb->irq_base;
533 
534         while ((isr = tmio_ioread8(tc6393xb->scr + SCR_ISR) &
535                                 ~tmio_ioread8(tc6393xb->scr + SCR_IMR)))
536                 for (i = 0; i < TC6393XB_NR_IRQS; i++) {
537                         if (isr & (1 << i))
538                                 generic_handle_irq(irq_base + i);
539                 }
540 }
541 
542 static void tc6393xb_irq_ack(struct irq_data *data)
543 {
544 }
545 
546 static void tc6393xb_irq_mask(struct irq_data *data)
547 {
548         struct tc6393xb *tc6393xb = irq_data_get_irq_chip_data(data);
549         unsigned long flags;
550         u8 imr;
551 
552         spin_lock_irqsave(&tc6393xb->lock, flags);
553         imr = tmio_ioread8(tc6393xb->scr + SCR_IMR);
554         imr |= 1 << (data->irq - tc6393xb->irq_base);
555         tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR);
556         spin_unlock_irqrestore(&tc6393xb->lock, flags);
557 }
558 
559 static void tc6393xb_irq_unmask(struct irq_data *data)
560 {
561         struct tc6393xb *tc6393xb = irq_data_get_irq_chip_data(data);
562         unsigned long flags;
563         u8 imr;
564 
565         spin_lock_irqsave(&tc6393xb->lock, flags);
566         imr = tmio_ioread8(tc6393xb->scr + SCR_IMR);
567         imr &= ~(1 << (data->irq - tc6393xb->irq_base));
568         tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR);
569         spin_unlock_irqrestore(&tc6393xb->lock, flags);
570 }
571 
572 static struct irq_chip tc6393xb_chip = {
573         .name           = "tc6393xb",
574         .irq_ack        = tc6393xb_irq_ack,
575         .irq_mask       = tc6393xb_irq_mask,
576         .irq_unmask     = tc6393xb_irq_unmask,
577 };
578 
579 static void tc6393xb_attach_irq(struct platform_device *dev)
580 {
581         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
582         unsigned int irq, irq_base;
583 
584         irq_base = tc6393xb->irq_base;
585 
586         for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) {
587                 irq_set_chip_and_handler(irq, &tc6393xb_chip, handle_edge_irq);
588                 irq_set_chip_data(irq, tc6393xb);
589                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
590         }
591 
592         irq_set_irq_type(tc6393xb->irq, IRQ_TYPE_EDGE_FALLING);
593         irq_set_handler_data(tc6393xb->irq, tc6393xb);
594         irq_set_chained_handler(tc6393xb->irq, tc6393xb_irq);
595 }
596 
597 static void tc6393xb_detach_irq(struct platform_device *dev)
598 {
599         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
600         unsigned int irq, irq_base;
601 
602         irq_set_chained_handler(tc6393xb->irq, NULL);
603         irq_set_handler_data(tc6393xb->irq, NULL);
604 
605         irq_base = tc6393xb->irq_base;
606 
607         for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) {
608                 set_irq_flags(irq, 0);
609                 irq_set_chip(irq, NULL);
610                 irq_set_chip_data(irq, NULL);
611         }
612 }
613 
614 /*--------------------------------------------------------------------------*/
615 
616 static int tc6393xb_probe(struct platform_device *dev)
617 {
618         struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev);
619         struct tc6393xb *tc6393xb;
620         struct resource *iomem, *rscr;
621         int ret;
622 
623         iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
624         if (!iomem)
625                 return -EINVAL;
626 
627         tc6393xb = kzalloc(sizeof *tc6393xb, GFP_KERNEL);
628         if (!tc6393xb) {
629                 ret = -ENOMEM;
630                 goto err_kzalloc;
631         }
632 
633         spin_lock_init(&tc6393xb->lock);
634 
635         platform_set_drvdata(dev, tc6393xb);
636 
637         ret = platform_get_irq(dev, 0);
638         if (ret >= 0)
639                 tc6393xb->irq = ret;
640         else
641                 goto err_noirq;
642 
643         tc6393xb->iomem = iomem;
644         tc6393xb->irq_base = tcpd->irq_base;
645 
646         tc6393xb->clk = clk_get(&dev->dev, "CLK_CK3P6MI");
647         if (IS_ERR(tc6393xb->clk)) {
648                 ret = PTR_ERR(tc6393xb->clk);
649                 goto err_clk_get;
650         }
651 
652         rscr = &tc6393xb->rscr;
653         rscr->name = "tc6393xb-core";
654         rscr->start = iomem->start;
655         rscr->end = iomem->start + 0xff;
656         rscr->flags = IORESOURCE_MEM;
657 
658         ret = request_resource(iomem, rscr);
659         if (ret)
660                 goto err_request_scr;
661 
662         tc6393xb->scr = ioremap(rscr->start, resource_size(rscr));
663         if (!tc6393xb->scr) {
664                 ret = -ENOMEM;
665                 goto err_ioremap;
666         }
667 
668         ret = clk_prepare_enable(tc6393xb->clk);
669         if (ret)
670                 goto err_clk_enable;
671 
672         ret = tcpd->enable(dev);
673         if (ret)
674                 goto err_enable;
675 
676         iowrite8(0,                             tc6393xb->scr + SCR_FER);
677         iowrite16(tcpd->scr_pll2cr,             tc6393xb->scr + SCR_PLL2CR);
678         iowrite16(SCR_CCR_UNK1 | SCR_CCR_HCLK_48,
679                                                 tc6393xb->scr + SCR_CCR);
680         iowrite16(SCR_MCR_RDY_OPENDRAIN | SCR_MCR_RDY_UNK | SCR_MCR_RDY_EN |
681                   SCR_MCR_INT_OPENDRAIN | SCR_MCR_INT_UNK | SCR_MCR_INT_EN |
682                   BIT(15),                      tc6393xb->scr + SCR_MCR);
683         iowrite16(tcpd->scr_gper,               tc6393xb->scr + SCR_GPER);
684         iowrite8(0,                             tc6393xb->scr + SCR_IRR);
685         iowrite8(0xbf,                          tc6393xb->scr + SCR_IMR);
686 
687         printk(KERN_INFO "Toshiba tc6393xb revision %d at 0x%08lx, irq %d\n",
688                         tmio_ioread8(tc6393xb->scr + SCR_REVID),
689                         (unsigned long) iomem->start, tc6393xb->irq);
690 
691         tc6393xb->gpio.base = -1;
692 
693         if (tcpd->gpio_base >= 0) {
694                 ret = tc6393xb_register_gpio(tc6393xb, tcpd->gpio_base);
695                 if (ret)
696                         goto err_gpio_add;
697         }
698 
699         tc6393xb_attach_irq(dev);
700 
701         if (tcpd->setup) {
702                 ret = tcpd->setup(dev);
703                 if (ret)
704                         goto err_setup;
705         }
706 
707         tc6393xb_cells[TC6393XB_CELL_NAND].platform_data = tcpd->nand_data;
708         tc6393xb_cells[TC6393XB_CELL_NAND].pdata_size =
709                                                 sizeof(*tcpd->nand_data);
710         tc6393xb_cells[TC6393XB_CELL_FB].platform_data = tcpd->fb_data;
711         tc6393xb_cells[TC6393XB_CELL_FB].pdata_size = sizeof(*tcpd->fb_data);
712 
713         ret = mfd_add_devices(&dev->dev, dev->id,
714                               tc6393xb_cells, ARRAY_SIZE(tc6393xb_cells),
715                               iomem, tcpd->irq_base, NULL);
716 
717         if (!ret)
718                 return 0;
719 
720         if (tcpd->teardown)
721                 tcpd->teardown(dev);
722 
723 err_setup:
724         tc6393xb_detach_irq(dev);
725 
726 err_gpio_add:
727         if (tc6393xb->gpio.base != -1)
728                 gpiochip_remove(&tc6393xb->gpio);
729         tcpd->disable(dev);
730 err_enable:
731         clk_disable_unprepare(tc6393xb->clk);
732 err_clk_enable:
733         iounmap(tc6393xb->scr);
734 err_ioremap:
735         release_resource(&tc6393xb->rscr);
736 err_request_scr:
737         clk_put(tc6393xb->clk);
738 err_noirq:
739 err_clk_get:
740         kfree(tc6393xb);
741 err_kzalloc:
742         return ret;
743 }
744 
745 static int tc6393xb_remove(struct platform_device *dev)
746 {
747         struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev);
748         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
749         int ret;
750 
751         mfd_remove_devices(&dev->dev);
752 
753         if (tcpd->teardown)
754                 tcpd->teardown(dev);
755 
756         tc6393xb_detach_irq(dev);
757 
758         if (tc6393xb->gpio.base != -1)
759                 gpiochip_remove(&tc6393xb->gpio);
760 
761         ret = tcpd->disable(dev);
762         clk_disable_unprepare(tc6393xb->clk);
763         iounmap(tc6393xb->scr);
764         release_resource(&tc6393xb->rscr);
765         clk_put(tc6393xb->clk);
766         kfree(tc6393xb);
767 
768         return ret;
769 }
770 
771 #ifdef CONFIG_PM
772 static int tc6393xb_suspend(struct platform_device *dev, pm_message_t state)
773 {
774         struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev);
775         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
776         int i, ret;
777 
778         tc6393xb->suspend_state.ccr = ioread16(tc6393xb->scr + SCR_CCR);
779         tc6393xb->suspend_state.fer = ioread8(tc6393xb->scr + SCR_FER);
780 
781         for (i = 0; i < 3; i++) {
782                 tc6393xb->suspend_state.gpo_dsr[i] =
783                         ioread8(tc6393xb->scr + SCR_GPO_DSR(i));
784                 tc6393xb->suspend_state.gpo_doecr[i] =
785                         ioread8(tc6393xb->scr + SCR_GPO_DOECR(i));
786                 tc6393xb->suspend_state.gpi_bcr[i] =
787                         ioread8(tc6393xb->scr + SCR_GPI_BCR(i));
788         }
789         ret = tcpd->suspend(dev);
790         clk_disable_unprepare(tc6393xb->clk);
791 
792         return ret;
793 }
794 
795 static int tc6393xb_resume(struct platform_device *dev)
796 {
797         struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev);
798         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
799         int ret;
800         int i;
801 
802         clk_prepare_enable(tc6393xb->clk);
803 
804         ret = tcpd->resume(dev);
805         if (ret)
806                 return ret;
807 
808         if (!tcpd->resume_restore)
809                 return 0;
810 
811         iowrite8(tc6393xb->suspend_state.fer,   tc6393xb->scr + SCR_FER);
812         iowrite16(tcpd->scr_pll2cr,             tc6393xb->scr + SCR_PLL2CR);
813         iowrite16(tc6393xb->suspend_state.ccr,  tc6393xb->scr + SCR_CCR);
814         iowrite16(SCR_MCR_RDY_OPENDRAIN | SCR_MCR_RDY_UNK | SCR_MCR_RDY_EN |
815                   SCR_MCR_INT_OPENDRAIN | SCR_MCR_INT_UNK | SCR_MCR_INT_EN |
816                   BIT(15),                      tc6393xb->scr + SCR_MCR);
817         iowrite16(tcpd->scr_gper,               tc6393xb->scr + SCR_GPER);
818         iowrite8(0,                             tc6393xb->scr + SCR_IRR);
819         iowrite8(0xbf,                          tc6393xb->scr + SCR_IMR);
820 
821         for (i = 0; i < 3; i++) {
822                 iowrite8(tc6393xb->suspend_state.gpo_dsr[i],
823                                         tc6393xb->scr + SCR_GPO_DSR(i));
824                 iowrite8(tc6393xb->suspend_state.gpo_doecr[i],
825                                         tc6393xb->scr + SCR_GPO_DOECR(i));
826                 iowrite8(tc6393xb->suspend_state.gpi_bcr[i],
827                                         tc6393xb->scr + SCR_GPI_BCR(i));
828         }
829 
830         return 0;
831 }
832 #else
833 #define tc6393xb_suspend NULL
834 #define tc6393xb_resume NULL
835 #endif
836 
837 static struct platform_driver tc6393xb_driver = {
838         .probe = tc6393xb_probe,
839         .remove = tc6393xb_remove,
840         .suspend = tc6393xb_suspend,
841         .resume = tc6393xb_resume,
842 
843         .driver = {
844                 .name = "tc6393xb",
845         },
846 };
847 
848 static int __init tc6393xb_init(void)
849 {
850         return platform_driver_register(&tc6393xb_driver);
851 }
852 
853 static void __exit tc6393xb_exit(void)
854 {
855         platform_driver_unregister(&tc6393xb_driver);
856 }
857 
858 subsys_initcall(tc6393xb_init);
859 module_exit(tc6393xb_exit);
860 
861 MODULE_LICENSE("GPL v2");
862 MODULE_AUTHOR("Ian Molton, Dmitry Baryshkov and Dirk Opfer");
863 MODULE_DESCRIPTION("tc6393xb Toshiba Mobile IO Controller");
864 MODULE_ALIAS("platform:tc6393xb");
865 
866 

This page was automatically generated by LXR 0.3.1 (source).  •  Linux is a registered trademark of Linus Torvalds  •  Contact us