Version:  2.0.40 2.2.26 2.4.37 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10

Linux/drivers/message/fusion/mptbase.c

  1 /*
  2  *  linux/drivers/message/fusion/mptbase.c
  3  *      This is the Fusion MPT base driver which supports multiple
  4  *      (SCSI + LAN) specialized protocol drivers.
  5  *      For use with LSI PCI chip/adapter(s)
  6  *      running LSI Fusion MPT (Message Passing Technology) firmware.
  7  *
  8  *  Copyright (c) 1999-2008 LSI Corporation
  9  *  (mailto:DL-MPTFusionLinux@lsi.com)
 10  *
 11  */
 12 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 13 /*
 14     This program is free software; you can redistribute it and/or modify
 15     it under the terms of the GNU General Public License as published by
 16     the Free Software Foundation; version 2 of the License.
 17 
 18     This program is distributed in the hope that it will be useful,
 19     but WITHOUT ANY WARRANTY; without even the implied warranty of
 20     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 21     GNU General Public License for more details.
 22 
 23     NO WARRANTY
 24     THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
 25     CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
 26     LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
 27     MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
 28     solely responsible for determining the appropriateness of using and
 29     distributing the Program and assumes all risks associated with its
 30     exercise of rights under this Agreement, including but not limited to
 31     the risks and costs of program errors, damage to or loss of data,
 32     programs or equipment, and unavailability or interruption of operations.
 33 
 34     DISCLAIMER OF LIABILITY
 35     NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
 36     DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 37     DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
 38     ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 39     TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 40     USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
 41     HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
 42 
 43     You should have received a copy of the GNU General Public License
 44     along with this program; if not, write to the Free Software
 45     Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 46 */
 47 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 48 
 49 #include <linux/kernel.h>
 50 #include <linux/module.h>
 51 #include <linux/errno.h>
 52 #include <linux/init.h>
 53 #include <linux/seq_file.h>
 54 #include <linux/slab.h>
 55 #include <linux/types.h>
 56 #include <linux/pci.h>
 57 #include <linux/kdev_t.h>
 58 #include <linux/blkdev.h>
 59 #include <linux/delay.h>
 60 #include <linux/interrupt.h>            /* needed for in_interrupt() proto */
 61 #include <linux/dma-mapping.h>
 62 #include <linux/kthread.h>
 63 #include <scsi/scsi_host.h>
 64 
 65 #include "mptbase.h"
 66 #include "lsi/mpi_log_fc.h"
 67 
 68 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 69 #define my_NAME         "Fusion MPT base driver"
 70 #define my_VERSION      MPT_LINUX_VERSION_COMMON
 71 #define MYNAM           "mptbase"
 72 
 73 MODULE_AUTHOR(MODULEAUTHOR);
 74 MODULE_DESCRIPTION(my_NAME);
 75 MODULE_LICENSE("GPL");
 76 MODULE_VERSION(my_VERSION);
 77 
 78 /*
 79  *  cmd line parameters
 80  */
 81 
 82 static int mpt_msi_enable_spi;
 83 module_param(mpt_msi_enable_spi, int, 0);
 84 MODULE_PARM_DESC(mpt_msi_enable_spi,
 85                  " Enable MSI Support for SPI controllers (default=0)");
 86 
 87 static int mpt_msi_enable_fc;
 88 module_param(mpt_msi_enable_fc, int, 0);
 89 MODULE_PARM_DESC(mpt_msi_enable_fc,
 90                  " Enable MSI Support for FC controllers (default=0)");
 91 
 92 static int mpt_msi_enable_sas;
 93 module_param(mpt_msi_enable_sas, int, 0);
 94 MODULE_PARM_DESC(mpt_msi_enable_sas,
 95                  " Enable MSI Support for SAS controllers (default=0)");
 96 
 97 static int mpt_channel_mapping;
 98 module_param(mpt_channel_mapping, int, 0);
 99 MODULE_PARM_DESC(mpt_channel_mapping, " Mapping id's to channels (default=0)");
100 
101 static int mpt_debug_level;
102 static int mpt_set_debug_level(const char *val, struct kernel_param *kp);
103 module_param_call(mpt_debug_level, mpt_set_debug_level, param_get_int,
104                   &mpt_debug_level, 0600);
105 MODULE_PARM_DESC(mpt_debug_level,
106                  " debug level - refer to mptdebug.h - (default=0)");
107 
108 int mpt_fwfault_debug;
109 EXPORT_SYMBOL(mpt_fwfault_debug);
110 module_param(mpt_fwfault_debug, int, 0600);
111 MODULE_PARM_DESC(mpt_fwfault_debug,
112                  "Enable detection of Firmware fault and halt Firmware on fault - (default=0)");
113 
114 static char     MptCallbacksName[MPT_MAX_PROTOCOL_DRIVERS]
115                                 [MPT_MAX_CALLBACKNAME_LEN+1];
116 
117 #ifdef MFCNT
118 static int mfcounter = 0;
119 #define PRINT_MF_COUNT 20000
120 #endif
121 
122 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
123 /*
124  *  Public data...
125  */
126 
127 #define WHOINIT_UNKNOWN         0xAA
128 
129 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
130 /*
131  *  Private data...
132  */
133                                         /* Adapter link list */
134 LIST_HEAD(ioc_list);
135                                         /* Callback lookup table */
136 static MPT_CALLBACK              MptCallbacks[MPT_MAX_PROTOCOL_DRIVERS];
137                                         /* Protocol driver class lookup table */
138 static int                       MptDriverClass[MPT_MAX_PROTOCOL_DRIVERS];
139                                         /* Event handler lookup table */
140 static MPT_EVHANDLER             MptEvHandlers[MPT_MAX_PROTOCOL_DRIVERS];
141                                         /* Reset handler lookup table */
142 static MPT_RESETHANDLER          MptResetHandlers[MPT_MAX_PROTOCOL_DRIVERS];
143 static struct mpt_pci_driver    *MptDeviceDriverHandlers[MPT_MAX_PROTOCOL_DRIVERS];
144 
145 #ifdef CONFIG_PROC_FS
146 static struct proc_dir_entry    *mpt_proc_root_dir;
147 #endif
148 
149 /*
150  *  Driver Callback Index's
151  */
152 static u8 mpt_base_index = MPT_MAX_PROTOCOL_DRIVERS;
153 static u8 last_drv_idx;
154 
155 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
156 /*
157  *  Forward protos...
158  */
159 static irqreturn_t mpt_interrupt(int irq, void *bus_id);
160 static int      mptbase_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req,
161                 MPT_FRAME_HDR *reply);
162 static int      mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes,
163                         u32 *req, int replyBytes, u16 *u16reply, int maxwait,
164                         int sleepFlag);
165 static int      mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag);
166 static void     mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev);
167 static void     mpt_adapter_disable(MPT_ADAPTER *ioc);
168 static void     mpt_adapter_dispose(MPT_ADAPTER *ioc);
169 
170 static void     MptDisplayIocCapabilities(MPT_ADAPTER *ioc);
171 static int      MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag);
172 static int      GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason);
173 static int      GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
174 static int      SendIocInit(MPT_ADAPTER *ioc, int sleepFlag);
175 static int      SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
176 static int      mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag);
177 static int      mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag);
178 static int      mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
179 static int      KickStart(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
180 static int      SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag);
181 static int      PrimeIocFifos(MPT_ADAPTER *ioc);
182 static int      WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
183 static int      WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
184 static int      WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
185 static int      GetLanConfigPages(MPT_ADAPTER *ioc);
186 static int      GetIoUnitPage2(MPT_ADAPTER *ioc);
187 int             mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
188 static int      mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum);
189 static int      mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum);
190 static void     mpt_read_ioc_pg_1(MPT_ADAPTER *ioc);
191 static void     mpt_read_ioc_pg_4(MPT_ADAPTER *ioc);
192 static void     mpt_get_manufacturing_pg_0(MPT_ADAPTER *ioc);
193 static int      SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch,
194         int sleepFlag);
195 static int      SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp);
196 static int      mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag);
197 static int      mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init);
198 
199 #ifdef CONFIG_PROC_FS
200 static const struct file_operations mpt_summary_proc_fops;
201 static const struct file_operations mpt_version_proc_fops;
202 static const struct file_operations mpt_iocinfo_proc_fops;
203 #endif
204 static void     mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc);
205 
206 static int      ProcessEventNotification(MPT_ADAPTER *ioc,
207                 EventNotificationReply_t *evReply, int *evHandlers);
208 static void     mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf);
209 static void     mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info);
210 static void     mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info);
211 static void     mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info , u8 cb_idx);
212 static int      mpt_read_ioc_pg_3(MPT_ADAPTER *ioc);
213 static void     mpt_inactive_raid_list_free(MPT_ADAPTER *ioc);
214 
215 /* module entry point */
216 static int  __init    fusion_init  (void);
217 static void __exit    fusion_exit  (void);
218 
219 #define CHIPREG_READ32(addr)            readl_relaxed(addr)
220 #define CHIPREG_READ32_dmasync(addr)    readl(addr)
221 #define CHIPREG_WRITE32(addr,val)       writel(val, addr)
222 #define CHIPREG_PIO_WRITE32(addr,val)   outl(val, (unsigned long)addr)
223 #define CHIPREG_PIO_READ32(addr)        inl((unsigned long)addr)
224 
225 static void
226 pci_disable_io_access(struct pci_dev *pdev)
227 {
228         u16 command_reg;
229 
230         pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
231         command_reg &= ~1;
232         pci_write_config_word(pdev, PCI_COMMAND, command_reg);
233 }
234 
235 static void
236 pci_enable_io_access(struct pci_dev *pdev)
237 {
238         u16 command_reg;
239 
240         pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
241         command_reg |= 1;
242         pci_write_config_word(pdev, PCI_COMMAND, command_reg);
243 }
244 
245 static int mpt_set_debug_level(const char *val, struct kernel_param *kp)
246 {
247         int ret = param_set_int(val, kp);
248         MPT_ADAPTER *ioc;
249 
250         if (ret)
251                 return ret;
252 
253         list_for_each_entry(ioc, &ioc_list, list)
254                 ioc->debug_level = mpt_debug_level;
255         return 0;
256 }
257 
258 /**
259  *      mpt_get_cb_idx - obtain cb_idx for registered driver
260  *      @dclass: class driver enum
261  *
262  *      Returns cb_idx, or zero means it wasn't found
263  **/
264 static u8
265 mpt_get_cb_idx(MPT_DRIVER_CLASS dclass)
266 {
267         u8 cb_idx;
268 
269         for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--)
270                 if (MptDriverClass[cb_idx] == dclass)
271                         return cb_idx;
272         return 0;
273 }
274 
275 /**
276  * mpt_is_discovery_complete - determine if discovery has completed
277  * @ioc: per adatper instance
278  *
279  * Returns 1 when discovery completed, else zero.
280  */
281 static int
282 mpt_is_discovery_complete(MPT_ADAPTER *ioc)
283 {
284         ConfigExtendedPageHeader_t hdr;
285         CONFIGPARMS cfg;
286         SasIOUnitPage0_t *buffer;
287         dma_addr_t dma_handle;
288         int rc = 0;
289 
290         memset(&hdr, 0, sizeof(ConfigExtendedPageHeader_t));
291         memset(&cfg, 0, sizeof(CONFIGPARMS));
292         hdr.PageVersion = MPI_SASIOUNITPAGE0_PAGEVERSION;
293         hdr.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
294         hdr.ExtPageType = MPI_CONFIG_EXTPAGETYPE_SAS_IO_UNIT;
295         cfg.cfghdr.ehdr = &hdr;
296         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
297 
298         if ((mpt_config(ioc, &cfg)))
299                 goto out;
300         if (!hdr.ExtPageLength)
301                 goto out;
302 
303         buffer = pci_alloc_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
304             &dma_handle);
305         if (!buffer)
306                 goto out;
307 
308         cfg.physAddr = dma_handle;
309         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
310 
311         if ((mpt_config(ioc, &cfg)))
312                 goto out_free_consistent;
313 
314         if (!(buffer->PhyData[0].PortFlags &
315             MPI_SAS_IOUNIT0_PORT_FLAGS_DISCOVERY_IN_PROGRESS))
316                 rc = 1;
317 
318  out_free_consistent:
319         pci_free_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
320             buffer, dma_handle);
321  out:
322         return rc;
323 }
324 
325 
326 /**
327  *  mpt_remove_dead_ioc_func - kthread context to remove dead ioc
328  * @arg: input argument, used to derive ioc
329  *
330  * Return 0 if controller is removed from pci subsystem.
331  * Return -1 for other case.
332  */
333 static int mpt_remove_dead_ioc_func(void *arg)
334 {
335         MPT_ADAPTER *ioc = (MPT_ADAPTER *)arg;
336         struct pci_dev *pdev;
337 
338         if ((ioc == NULL))
339                 return -1;
340 
341         pdev = ioc->pcidev;
342         if ((pdev == NULL))
343                 return -1;
344 
345         pci_stop_and_remove_bus_device_locked(pdev);
346         return 0;
347 }
348 
349 
350 
351 /**
352  *      mpt_fault_reset_work - work performed on workq after ioc fault
353  *      @work: input argument, used to derive ioc
354  *
355 **/
356 static void
357 mpt_fault_reset_work(struct work_struct *work)
358 {
359         MPT_ADAPTER     *ioc =
360             container_of(work, MPT_ADAPTER, fault_reset_work.work);
361         u32              ioc_raw_state;
362         int              rc;
363         unsigned long    flags;
364         MPT_SCSI_HOST   *hd;
365         struct task_struct *p;
366 
367         if (ioc->ioc_reset_in_progress || !ioc->active)
368                 goto out;
369 
370 
371         ioc_raw_state = mpt_GetIocState(ioc, 0);
372         if ((ioc_raw_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_MASK) {
373                 printk(MYIOC_s_INFO_FMT "%s: IOC is non-operational !!!!\n",
374                     ioc->name, __func__);
375 
376                 /*
377                  * Call mptscsih_flush_pending_cmds callback so that we
378                  * flush all pending commands back to OS.
379                  * This call is required to aovid deadlock at block layer.
380                  * Dead IOC will fail to do diag reset,and this call is safe
381                  * since dead ioc will never return any command back from HW.
382                  */
383                 hd = shost_priv(ioc->sh);
384                 ioc->schedule_dead_ioc_flush_running_cmds(hd);
385 
386                 /*Remove the Dead Host */
387                 p = kthread_run(mpt_remove_dead_ioc_func, ioc,
388                                 "mpt_dead_ioc_%d", ioc->id);
389                 if (IS_ERR(p))  {
390                         printk(MYIOC_s_ERR_FMT
391                                 "%s: Running mpt_dead_ioc thread failed !\n",
392                                 ioc->name, __func__);
393                 } else {
394                         printk(MYIOC_s_WARN_FMT
395                                 "%s: Running mpt_dead_ioc thread success !\n",
396                                 ioc->name, __func__);
397                 }
398                 return; /* don't rearm timer */
399         }
400 
401         if ((ioc_raw_state & MPI_IOC_STATE_MASK)
402                         == MPI_IOC_STATE_FAULT) {
403                 printk(MYIOC_s_WARN_FMT "IOC is in FAULT state (%04xh)!!!\n",
404                        ioc->name, ioc_raw_state & MPI_DOORBELL_DATA_MASK);
405                 printk(MYIOC_s_WARN_FMT "Issuing HardReset from %s!!\n",
406                        ioc->name, __func__);
407                 rc = mpt_HardResetHandler(ioc, CAN_SLEEP);
408                 printk(MYIOC_s_WARN_FMT "%s: HardReset: %s\n", ioc->name,
409                        __func__, (rc == 0) ? "success" : "failed");
410                 ioc_raw_state = mpt_GetIocState(ioc, 0);
411                 if ((ioc_raw_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT)
412                         printk(MYIOC_s_WARN_FMT "IOC is in FAULT state after "
413                             "reset (%04xh)\n", ioc->name, ioc_raw_state &
414                             MPI_DOORBELL_DATA_MASK);
415         } else if (ioc->bus_type == SAS && ioc->sas_discovery_quiesce_io) {
416                 if ((mpt_is_discovery_complete(ioc))) {
417                         devtprintk(ioc, printk(MYIOC_s_DEBUG_FMT "clearing "
418                             "discovery_quiesce_io flag\n", ioc->name));
419                         ioc->sas_discovery_quiesce_io = 0;
420                 }
421         }
422 
423  out:
424         /*
425          * Take turns polling alternate controller
426          */
427         if (ioc->alt_ioc)
428                 ioc = ioc->alt_ioc;
429 
430         /* rearm the timer */
431         spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
432         if (ioc->reset_work_q)
433                 queue_delayed_work(ioc->reset_work_q, &ioc->fault_reset_work,
434                         msecs_to_jiffies(MPT_POLLING_INTERVAL));
435         spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
436 }
437 
438 
439 /*
440  *  Process turbo (context) reply...
441  */
442 static void
443 mpt_turbo_reply(MPT_ADAPTER *ioc, u32 pa)
444 {
445         MPT_FRAME_HDR *mf = NULL;
446         MPT_FRAME_HDR *mr = NULL;
447         u16 req_idx = 0;
448         u8 cb_idx;
449 
450         dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got TURBO reply req_idx=%08x\n",
451                                 ioc->name, pa));
452 
453         switch (pa >> MPI_CONTEXT_REPLY_TYPE_SHIFT) {
454         case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT:
455                 req_idx = pa & 0x0000FFFF;
456                 cb_idx = (pa & 0x00FF0000) >> 16;
457                 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
458                 break;
459         case MPI_CONTEXT_REPLY_TYPE_LAN:
460                 cb_idx = mpt_get_cb_idx(MPTLAN_DRIVER);
461                 /*
462                  *  Blind set of mf to NULL here was fatal
463                  *  after lan_reply says "freeme"
464                  *  Fix sort of combined with an optimization here;
465                  *  added explicit check for case where lan_reply
466                  *  was just returning 1 and doing nothing else.
467                  *  For this case skip the callback, but set up
468                  *  proper mf value first here:-)
469                  */
470                 if ((pa & 0x58000000) == 0x58000000) {
471                         req_idx = pa & 0x0000FFFF;
472                         mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
473                         mpt_free_msg_frame(ioc, mf);
474                         mb();
475                         return;
476                         break;
477                 }
478                 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
479                 break;
480         case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET:
481                 cb_idx = mpt_get_cb_idx(MPTSTM_DRIVER);
482                 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
483                 break;
484         default:
485                 cb_idx = 0;
486                 BUG();
487         }
488 
489         /*  Check for (valid) IO callback!  */
490         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
491                 MptCallbacks[cb_idx] == NULL) {
492                 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
493                                 __func__, ioc->name, cb_idx);
494                 goto out;
495         }
496 
497         if (MptCallbacks[cb_idx](ioc, mf, mr))
498                 mpt_free_msg_frame(ioc, mf);
499  out:
500         mb();
501 }
502 
503 static void
504 mpt_reply(MPT_ADAPTER *ioc, u32 pa)
505 {
506         MPT_FRAME_HDR   *mf;
507         MPT_FRAME_HDR   *mr;
508         u16              req_idx;
509         u8               cb_idx;
510         int              freeme;
511 
512         u32 reply_dma_low;
513         u16 ioc_stat;
514 
515         /* non-TURBO reply!  Hmmm, something may be up...
516          *  Newest turbo reply mechanism; get address
517          *  via left shift 1 (get rid of MPI_ADDRESS_REPLY_A_BIT)!
518          */
519 
520         /* Map DMA address of reply header to cpu address.
521          * pa is 32 bits - but the dma address may be 32 or 64 bits
522          * get offset based only only the low addresses
523          */
524 
525         reply_dma_low = (pa <<= 1);
526         mr = (MPT_FRAME_HDR *)((u8 *)ioc->reply_frames +
527                          (reply_dma_low - ioc->reply_frames_low_dma));
528 
529         req_idx = le16_to_cpu(mr->u.frame.hwhdr.msgctxu.fld.req_idx);
530         cb_idx = mr->u.frame.hwhdr.msgctxu.fld.cb_idx;
531         mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
532 
533         dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n",
534                         ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function));
535         DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mr);
536 
537          /*  Check/log IOC log info
538          */
539         ioc_stat = le16_to_cpu(mr->u.reply.IOCStatus);
540         if (ioc_stat & MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
541                 u32      log_info = le32_to_cpu(mr->u.reply.IOCLogInfo);
542                 if (ioc->bus_type == FC)
543                         mpt_fc_log_info(ioc, log_info);
544                 else if (ioc->bus_type == SPI)
545                         mpt_spi_log_info(ioc, log_info);
546                 else if (ioc->bus_type == SAS)
547                         mpt_sas_log_info(ioc, log_info, cb_idx);
548         }
549 
550         if (ioc_stat & MPI_IOCSTATUS_MASK)
551                 mpt_iocstatus_info(ioc, (u32)ioc_stat, mf);
552 
553         /*  Check for (valid) IO callback!  */
554         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
555                 MptCallbacks[cb_idx] == NULL) {
556                 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
557                                 __func__, ioc->name, cb_idx);
558                 freeme = 0;
559                 goto out;
560         }
561 
562         freeme = MptCallbacks[cb_idx](ioc, mf, mr);
563 
564  out:
565         /*  Flush (non-TURBO) reply with a WRITE!  */
566         CHIPREG_WRITE32(&ioc->chip->ReplyFifo, pa);
567 
568         if (freeme)
569                 mpt_free_msg_frame(ioc, mf);
570         mb();
571 }
572 
573 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
574 /**
575  *      mpt_interrupt - MPT adapter (IOC) specific interrupt handler.
576  *      @irq: irq number (not used)
577  *      @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
578  *
579  *      This routine is registered via the request_irq() kernel API call,
580  *      and handles all interrupts generated from a specific MPT adapter
581  *      (also referred to as a IO Controller or IOC).
582  *      This routine must clear the interrupt from the adapter and does
583  *      so by reading the reply FIFO.  Multiple replies may be processed
584  *      per single call to this routine.
585  *
586  *      This routine handles register-level access of the adapter but
587  *      dispatches (calls) a protocol-specific callback routine to handle
588  *      the protocol-specific details of the MPT request completion.
589  */
590 static irqreturn_t
591 mpt_interrupt(int irq, void *bus_id)
592 {
593         MPT_ADAPTER *ioc = bus_id;
594         u32 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
595 
596         if (pa == 0xFFFFFFFF)
597                 return IRQ_NONE;
598 
599         /*
600          *  Drain the reply FIFO!
601          */
602         do {
603                 if (pa & MPI_ADDRESS_REPLY_A_BIT)
604                         mpt_reply(ioc, pa);
605                 else
606                         mpt_turbo_reply(ioc, pa);
607                 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
608         } while (pa != 0xFFFFFFFF);
609 
610         return IRQ_HANDLED;
611 }
612 
613 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
614 /**
615  *      mptbase_reply - MPT base driver's callback routine
616  *      @ioc: Pointer to MPT_ADAPTER structure
617  *      @req: Pointer to original MPT request frame
618  *      @reply: Pointer to MPT reply frame (NULL if TurboReply)
619  *
620  *      MPT base driver's callback routine; all base driver
621  *      "internal" request/reply processing is routed here.
622  *      Currently used for EventNotification and EventAck handling.
623  *
624  *      Returns 1 indicating original alloc'd request frame ptr
625  *      should be freed, or 0 if it shouldn't.
626  */
627 static int
628 mptbase_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply)
629 {
630         EventNotificationReply_t *pEventReply;
631         u8 event;
632         int evHandlers;
633         int freereq = 1;
634 
635         switch (reply->u.hdr.Function) {
636         case MPI_FUNCTION_EVENT_NOTIFICATION:
637                 pEventReply = (EventNotificationReply_t *)reply;
638                 evHandlers = 0;
639                 ProcessEventNotification(ioc, pEventReply, &evHandlers);
640                 event = le32_to_cpu(pEventReply->Event) & 0xFF;
641                 if (pEventReply->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY)
642                         freereq = 0;
643                 if (event != MPI_EVENT_EVENT_CHANGE)
644                         break;
645         case MPI_FUNCTION_CONFIG:
646         case MPI_FUNCTION_SAS_IO_UNIT_CONTROL:
647                 ioc->mptbase_cmds.status |= MPT_MGMT_STATUS_COMMAND_GOOD;
648                 ioc->mptbase_cmds.status |= MPT_MGMT_STATUS_RF_VALID;
649                 memcpy(ioc->mptbase_cmds.reply, reply,
650                     min(MPT_DEFAULT_FRAME_SIZE,
651                         4 * reply->u.reply.MsgLength));
652                 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_PENDING) {
653                         ioc->mptbase_cmds.status &= ~MPT_MGMT_STATUS_PENDING;
654                         complete(&ioc->mptbase_cmds.done);
655                 } else
656                         freereq = 0;
657                 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_FREE_MF)
658                         freereq = 1;
659                 break;
660         case MPI_FUNCTION_EVENT_ACK:
661                 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
662                     "EventAck reply received\n", ioc->name));
663                 break;
664         default:
665                 printk(MYIOC_s_ERR_FMT
666                     "Unexpected msg function (=%02Xh) reply received!\n",
667                     ioc->name, reply->u.hdr.Function);
668                 break;
669         }
670 
671         /*
672          *      Conditionally tell caller to free the original
673          *      EventNotification/EventAck/unexpected request frame!
674          */
675         return freereq;
676 }
677 
678 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
679 /**
680  *      mpt_register - Register protocol-specific main callback handler.
681  *      @cbfunc: callback function pointer
682  *      @dclass: Protocol driver's class (%MPT_DRIVER_CLASS enum value)
683  *      @func_name: call function's name
684  *
685  *      This routine is called by a protocol-specific driver (SCSI host,
686  *      LAN, SCSI target) to register its reply callback routine.  Each
687  *      protocol-specific driver must do this before it will be able to
688  *      use any IOC resources, such as obtaining request frames.
689  *
690  *      NOTES: The SCSI protocol driver currently calls this routine thrice
691  *      in order to register separate callbacks; one for "normal" SCSI IO;
692  *      one for MptScsiTaskMgmt requests; one for Scan/DV requests.
693  *
694  *      Returns u8 valued "handle" in the range (and S.O.D. order)
695  *      {N,...,7,6,5,...,1} if successful.
696  *      A return value of MPT_MAX_PROTOCOL_DRIVERS (including zero!) should be
697  *      considered an error by the caller.
698  */
699 u8
700 mpt_register(MPT_CALLBACK cbfunc, MPT_DRIVER_CLASS dclass, char *func_name)
701 {
702         u8 cb_idx;
703         last_drv_idx = MPT_MAX_PROTOCOL_DRIVERS;
704 
705         /*
706          *  Search for empty callback slot in this order: {N,...,7,6,5,...,1}
707          *  (slot/handle 0 is reserved!)
708          */
709         for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
710                 if (MptCallbacks[cb_idx] == NULL) {
711                         MptCallbacks[cb_idx] = cbfunc;
712                         MptDriverClass[cb_idx] = dclass;
713                         MptEvHandlers[cb_idx] = NULL;
714                         last_drv_idx = cb_idx;
715                         strlcpy(MptCallbacksName[cb_idx], func_name,
716                                 MPT_MAX_CALLBACKNAME_LEN+1);
717                         break;
718                 }
719         }
720 
721         return last_drv_idx;
722 }
723 
724 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
725 /**
726  *      mpt_deregister - Deregister a protocol drivers resources.
727  *      @cb_idx: previously registered callback handle
728  *
729  *      Each protocol-specific driver should call this routine when its
730  *      module is unloaded.
731  */
732 void
733 mpt_deregister(u8 cb_idx)
734 {
735         if (cb_idx && (cb_idx < MPT_MAX_PROTOCOL_DRIVERS)) {
736                 MptCallbacks[cb_idx] = NULL;
737                 MptDriverClass[cb_idx] = MPTUNKNOWN_DRIVER;
738                 MptEvHandlers[cb_idx] = NULL;
739 
740                 last_drv_idx++;
741         }
742 }
743 
744 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
745 /**
746  *      mpt_event_register - Register protocol-specific event callback handler.
747  *      @cb_idx: previously registered (via mpt_register) callback handle
748  *      @ev_cbfunc: callback function
749  *
750  *      This routine can be called by one or more protocol-specific drivers
751  *      if/when they choose to be notified of MPT events.
752  *
753  *      Returns 0 for success.
754  */
755 int
756 mpt_event_register(u8 cb_idx, MPT_EVHANDLER ev_cbfunc)
757 {
758         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
759                 return -1;
760 
761         MptEvHandlers[cb_idx] = ev_cbfunc;
762         return 0;
763 }
764 
765 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
766 /**
767  *      mpt_event_deregister - Deregister protocol-specific event callback handler
768  *      @cb_idx: previously registered callback handle
769  *
770  *      Each protocol-specific driver should call this routine
771  *      when it does not (or can no longer) handle events,
772  *      or when its module is unloaded.
773  */
774 void
775 mpt_event_deregister(u8 cb_idx)
776 {
777         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
778                 return;
779 
780         MptEvHandlers[cb_idx] = NULL;
781 }
782 
783 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
784 /**
785  *      mpt_reset_register - Register protocol-specific IOC reset handler.
786  *      @cb_idx: previously registered (via mpt_register) callback handle
787  *      @reset_func: reset function
788  *
789  *      This routine can be called by one or more protocol-specific drivers
790  *      if/when they choose to be notified of IOC resets.
791  *
792  *      Returns 0 for success.
793  */
794 int
795 mpt_reset_register(u8 cb_idx, MPT_RESETHANDLER reset_func)
796 {
797         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
798                 return -1;
799 
800         MptResetHandlers[cb_idx] = reset_func;
801         return 0;
802 }
803 
804 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
805 /**
806  *      mpt_reset_deregister - Deregister protocol-specific IOC reset handler.
807  *      @cb_idx: previously registered callback handle
808  *
809  *      Each protocol-specific driver should call this routine
810  *      when it does not (or can no longer) handle IOC reset handling,
811  *      or when its module is unloaded.
812  */
813 void
814 mpt_reset_deregister(u8 cb_idx)
815 {
816         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
817                 return;
818 
819         MptResetHandlers[cb_idx] = NULL;
820 }
821 
822 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
823 /**
824  *      mpt_device_driver_register - Register device driver hooks
825  *      @dd_cbfunc: driver callbacks struct
826  *      @cb_idx: MPT protocol driver index
827  */
828 int
829 mpt_device_driver_register(struct mpt_pci_driver * dd_cbfunc, u8 cb_idx)
830 {
831         MPT_ADAPTER     *ioc;
832         const struct pci_device_id *id;
833 
834         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
835                 return -EINVAL;
836 
837         MptDeviceDriverHandlers[cb_idx] = dd_cbfunc;
838 
839         /* call per pci device probe entry point */
840         list_for_each_entry(ioc, &ioc_list, list) {
841                 id = ioc->pcidev->driver ?
842                     ioc->pcidev->driver->id_table : NULL;
843                 if (dd_cbfunc->probe)
844                         dd_cbfunc->probe(ioc->pcidev, id);
845          }
846 
847         return 0;
848 }
849 
850 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
851 /**
852  *      mpt_device_driver_deregister - DeRegister device driver hooks
853  *      @cb_idx: MPT protocol driver index
854  */
855 void
856 mpt_device_driver_deregister(u8 cb_idx)
857 {
858         struct mpt_pci_driver *dd_cbfunc;
859         MPT_ADAPTER     *ioc;
860 
861         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
862                 return;
863 
864         dd_cbfunc = MptDeviceDriverHandlers[cb_idx];
865 
866         list_for_each_entry(ioc, &ioc_list, list) {
867                 if (dd_cbfunc->remove)
868                         dd_cbfunc->remove(ioc->pcidev);
869         }
870 
871         MptDeviceDriverHandlers[cb_idx] = NULL;
872 }
873 
874 
875 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
876 /**
877  *      mpt_get_msg_frame - Obtain an MPT request frame from the pool
878  *      @cb_idx: Handle of registered MPT protocol driver
879  *      @ioc: Pointer to MPT adapter structure
880  *
881  *      Obtain an MPT request frame from the pool (of 1024) that are
882  *      allocated per MPT adapter.
883  *
884  *      Returns pointer to a MPT request frame or %NULL if none are available
885  *      or IOC is not active.
886  */
887 MPT_FRAME_HDR*
888 mpt_get_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc)
889 {
890         MPT_FRAME_HDR *mf;
891         unsigned long flags;
892         u16      req_idx;       /* Request index */
893 
894         /* validate handle and ioc identifier */
895 
896 #ifdef MFCNT
897         if (!ioc->active)
898                 printk(MYIOC_s_WARN_FMT "IOC Not Active! mpt_get_msg_frame "
899                     "returning NULL!\n", ioc->name);
900 #endif
901 
902         /* If interrupts are not attached, do not return a request frame */
903         if (!ioc->active)
904                 return NULL;
905 
906         spin_lock_irqsave(&ioc->FreeQlock, flags);
907         if (!list_empty(&ioc->FreeQ)) {
908                 int req_offset;
909 
910                 mf = list_entry(ioc->FreeQ.next, MPT_FRAME_HDR,
911                                 u.frame.linkage.list);
912                 list_del(&mf->u.frame.linkage.list);
913                 mf->u.frame.linkage.arg1 = 0;
914                 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;  /* byte */
915                 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
916                                                                 /* u16! */
917                 req_idx = req_offset / ioc->req_sz;
918                 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
919                 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
920                 /* Default, will be changed if necessary in SG generation */
921                 ioc->RequestNB[req_idx] = ioc->NB_for_64_byte_frame;
922 #ifdef MFCNT
923                 ioc->mfcnt++;
924 #endif
925         }
926         else
927                 mf = NULL;
928         spin_unlock_irqrestore(&ioc->FreeQlock, flags);
929 
930 #ifdef MFCNT
931         if (mf == NULL)
932                 printk(MYIOC_s_WARN_FMT "IOC Active. No free Msg Frames! "
933                     "Count 0x%x Max 0x%x\n", ioc->name, ioc->mfcnt,
934                     ioc->req_depth);
935         mfcounter++;
936         if (mfcounter == PRINT_MF_COUNT)
937                 printk(MYIOC_s_INFO_FMT "MF Count 0x%x Max 0x%x \n", ioc->name,
938                     ioc->mfcnt, ioc->req_depth);
939 #endif
940 
941         dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_get_msg_frame(%d,%d), got mf=%p\n",
942             ioc->name, cb_idx, ioc->id, mf));
943         return mf;
944 }
945 
946 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
947 /**
948  *      mpt_put_msg_frame - Send a protocol-specific MPT request frame to an IOC
949  *      @cb_idx: Handle of registered MPT protocol driver
950  *      @ioc: Pointer to MPT adapter structure
951  *      @mf: Pointer to MPT request frame
952  *
953  *      This routine posts an MPT request frame to the request post FIFO of a
954  *      specific MPT adapter.
955  */
956 void
957 mpt_put_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
958 {
959         u32 mf_dma_addr;
960         int req_offset;
961         u16      req_idx;       /* Request index */
962 
963         /* ensure values are reset properly! */
964         mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;          /* byte */
965         req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
966                                                                 /* u16! */
967         req_idx = req_offset / ioc->req_sz;
968         mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
969         mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
970 
971         DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
972 
973         mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx];
974         dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d "
975             "RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx,
976             ioc->RequestNB[req_idx]));
977         CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr);
978 }
979 
980 /**
981  *      mpt_put_msg_frame_hi_pri - Send a hi-pri protocol-specific MPT request frame
982  *      @cb_idx: Handle of registered MPT protocol driver
983  *      @ioc: Pointer to MPT adapter structure
984  *      @mf: Pointer to MPT request frame
985  *
986  *      Send a protocol-specific MPT request frame to an IOC using
987  *      hi-priority request queue.
988  *
989  *      This routine posts an MPT request frame to the request post FIFO of a
990  *      specific MPT adapter.
991  **/
992 void
993 mpt_put_msg_frame_hi_pri(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
994 {
995         u32 mf_dma_addr;
996         int req_offset;
997         u16      req_idx;       /* Request index */
998 
999         /* ensure values are reset properly! */
1000         mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;
1001         req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
1002         req_idx = req_offset / ioc->req_sz;
1003         mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
1004         mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
1005 
1006         DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
1007 
1008         mf_dma_addr = (ioc->req_frames_low_dma + req_offset);
1009         dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d\n",
1010                 ioc->name, mf_dma_addr, req_idx));
1011         CHIPREG_WRITE32(&ioc->chip->RequestHiPriFifo, mf_dma_addr);
1012 }
1013 
1014 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1015 /**
1016  *      mpt_free_msg_frame - Place MPT request frame back on FreeQ.
1017  *      @ioc: Pointer to MPT adapter structure
1018  *      @mf: Pointer to MPT request frame
1019  *
1020  *      This routine places a MPT request frame back on the MPT adapter's
1021  *      FreeQ.
1022  */
1023 void
1024 mpt_free_msg_frame(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
1025 {
1026         unsigned long flags;
1027 
1028         /*  Put Request back on FreeQ!  */
1029         spin_lock_irqsave(&ioc->FreeQlock, flags);
1030         if (cpu_to_le32(mf->u.frame.linkage.arg1) == 0xdeadbeaf)
1031                 goto out;
1032         /* signature to know if this mf is freed */
1033         mf->u.frame.linkage.arg1 = cpu_to_le32(0xdeadbeaf);
1034         list_add(&mf->u.frame.linkage.list, &ioc->FreeQ);
1035 #ifdef MFCNT
1036         ioc->mfcnt--;
1037 #endif
1038  out:
1039         spin_unlock_irqrestore(&ioc->FreeQlock, flags);
1040 }
1041 
1042 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1043 /**
1044  *      mpt_add_sge - Place a simple 32 bit SGE at address pAddr.
1045  *      @pAddr: virtual address for SGE
1046  *      @flagslength: SGE flags and data transfer length
1047  *      @dma_addr: Physical address
1048  *
1049  *      This routine places a MPT request frame back on the MPT adapter's
1050  *      FreeQ.
1051  */
1052 static void
1053 mpt_add_sge(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
1054 {
1055         SGESimple32_t *pSge = (SGESimple32_t *) pAddr;
1056         pSge->FlagsLength = cpu_to_le32(flagslength);
1057         pSge->Address = cpu_to_le32(dma_addr);
1058 }
1059 
1060 /**
1061  *      mpt_add_sge_64bit - Place a simple 64 bit SGE at address pAddr.
1062  *      @pAddr: virtual address for SGE
1063  *      @flagslength: SGE flags and data transfer length
1064  *      @dma_addr: Physical address
1065  *
1066  *      This routine places a MPT request frame back on the MPT adapter's
1067  *      FreeQ.
1068  **/
1069 static void
1070 mpt_add_sge_64bit(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
1071 {
1072         SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
1073         pSge->Address.Low = cpu_to_le32
1074                         (lower_32_bits(dma_addr));
1075         pSge->Address.High = cpu_to_le32
1076                         (upper_32_bits(dma_addr));
1077         pSge->FlagsLength = cpu_to_le32
1078                         ((flagslength | MPT_SGE_FLAGS_64_BIT_ADDRESSING));
1079 }
1080 
1081 /**
1082  *      mpt_add_sge_64bit_1078 - Place a simple 64 bit SGE at address pAddr (1078 workaround).
1083  *      @pAddr: virtual address for SGE
1084  *      @flagslength: SGE flags and data transfer length
1085  *      @dma_addr: Physical address
1086  *
1087  *      This routine places a MPT request frame back on the MPT adapter's
1088  *      FreeQ.
1089  **/
1090 static void
1091 mpt_add_sge_64bit_1078(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
1092 {
1093         SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
1094         u32 tmp;
1095 
1096         pSge->Address.Low = cpu_to_le32
1097                         (lower_32_bits(dma_addr));
1098         tmp = (u32)(upper_32_bits(dma_addr));
1099 
1100         /*
1101          * 1078 errata workaround for the 36GB limitation
1102          */
1103         if ((((u64)dma_addr + MPI_SGE_LENGTH(flagslength)) >> 32)  == 9) {
1104                 flagslength |=
1105                     MPI_SGE_SET_FLAGS(MPI_SGE_FLAGS_LOCAL_ADDRESS);
1106                 tmp |= (1<<31);
1107                 if (mpt_debug_level & MPT_DEBUG_36GB_MEM)
1108                         printk(KERN_DEBUG "1078 P0M2 addressing for "
1109                             "addr = 0x%llx len = %d\n",
1110                             (unsigned long long)dma_addr,
1111                             MPI_SGE_LENGTH(flagslength));
1112         }
1113 
1114         pSge->Address.High = cpu_to_le32(tmp);
1115         pSge->FlagsLength = cpu_to_le32(
1116                 (flagslength | MPT_SGE_FLAGS_64_BIT_ADDRESSING));
1117 }
1118 
1119 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1120 /**
1121  *      mpt_add_chain - Place a 32 bit chain SGE at address pAddr.
1122  *      @pAddr: virtual address for SGE
1123  *      @next: nextChainOffset value (u32's)
1124  *      @length: length of next SGL segment
1125  *      @dma_addr: Physical address
1126  *
1127  */
1128 static void
1129 mpt_add_chain(void *pAddr, u8 next, u16 length, dma_addr_t dma_addr)
1130 {
1131                 SGEChain32_t *pChain = (SGEChain32_t *) pAddr;
1132                 pChain->Length = cpu_to_le16(length);
1133                 pChain->Flags = MPI_SGE_FLAGS_CHAIN_ELEMENT;
1134                 pChain->NextChainOffset = next;
1135                 pChain->Address = cpu_to_le32(dma_addr);
1136 }
1137 
1138 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1139 /**
1140  *      mpt_add_chain_64bit - Place a 64 bit chain SGE at address pAddr.
1141  *      @pAddr: virtual address for SGE
1142  *      @next: nextChainOffset value (u32's)
1143  *      @length: length of next SGL segment
1144  *      @dma_addr: Physical address
1145  *
1146  */
1147 static void
1148 mpt_add_chain_64bit(void *pAddr, u8 next, u16 length, dma_addr_t dma_addr)
1149 {
1150                 SGEChain64_t *pChain = (SGEChain64_t *) pAddr;
1151                 u32 tmp = dma_addr & 0xFFFFFFFF;
1152 
1153                 pChain->Length = cpu_to_le16(length);
1154                 pChain->Flags = (MPI_SGE_FLAGS_CHAIN_ELEMENT |
1155                                  MPI_SGE_FLAGS_64_BIT_ADDRESSING);
1156 
1157                 pChain->NextChainOffset = next;
1158 
1159                 pChain->Address.Low = cpu_to_le32(tmp);
1160                 tmp = (u32)(upper_32_bits(dma_addr));
1161                 pChain->Address.High = cpu_to_le32(tmp);
1162 }
1163 
1164 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1165 /**
1166  *      mpt_send_handshake_request - Send MPT request via doorbell handshake method.
1167  *      @cb_idx: Handle of registered MPT protocol driver
1168  *      @ioc: Pointer to MPT adapter structure
1169  *      @reqBytes: Size of the request in bytes
1170  *      @req: Pointer to MPT request frame
1171  *      @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
1172  *
1173  *      This routine is used exclusively to send MptScsiTaskMgmt
1174  *      requests since they are required to be sent via doorbell handshake.
1175  *
1176  *      NOTE: It is the callers responsibility to byte-swap fields in the
1177  *      request which are greater than 1 byte in size.
1178  *
1179  *      Returns 0 for success, non-zero for failure.
1180  */
1181 int
1182 mpt_send_handshake_request(u8 cb_idx, MPT_ADAPTER *ioc, int reqBytes, u32 *req, int sleepFlag)
1183 {
1184         int     r = 0;
1185         u8      *req_as_bytes;
1186         int      ii;
1187 
1188         /* State is known to be good upon entering
1189          * this function so issue the bus reset
1190          * request.
1191          */
1192 
1193         /*
1194          * Emulate what mpt_put_msg_frame() does /wrt to sanity
1195          * setting cb_idx/req_idx.  But ONLY if this request
1196          * is in proper (pre-alloc'd) request buffer range...
1197          */
1198         ii = MFPTR_2_MPT_INDEX(ioc,(MPT_FRAME_HDR*)req);
1199         if (reqBytes >= 12 && ii >= 0 && ii < ioc->req_depth) {
1200                 MPT_FRAME_HDR *mf = (MPT_FRAME_HDR*)req;
1201                 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(ii);
1202                 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;
1203         }
1204 
1205         /* Make sure there are no doorbells */
1206         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1207 
1208         CHIPREG_WRITE32(&ioc->chip->Doorbell,
1209                         ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
1210                          ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
1211 
1212         /* Wait for IOC doorbell int */
1213         if ((ii = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0) {
1214                 return ii;
1215         }
1216 
1217         /* Read doorbell and check for active bit */
1218         if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
1219                 return -5;
1220 
1221         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_send_handshake_request start, WaitCnt=%d\n",
1222                 ioc->name, ii));
1223 
1224         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1225 
1226         if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1227                 return -2;
1228         }
1229 
1230         /* Send request via doorbell handshake */
1231         req_as_bytes = (u8 *) req;
1232         for (ii = 0; ii < reqBytes/4; ii++) {
1233                 u32 word;
1234 
1235                 word = ((req_as_bytes[(ii*4) + 0] <<  0) |
1236                         (req_as_bytes[(ii*4) + 1] <<  8) |
1237                         (req_as_bytes[(ii*4) + 2] << 16) |
1238                         (req_as_bytes[(ii*4) + 3] << 24));
1239                 CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
1240                 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1241                         r = -3;
1242                         break;
1243                 }
1244         }
1245 
1246         if (r >= 0 && WaitForDoorbellInt(ioc, 10, sleepFlag) >= 0)
1247                 r = 0;
1248         else
1249                 r = -4;
1250 
1251         /* Make sure there are no doorbells */
1252         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1253 
1254         return r;
1255 }
1256 
1257 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1258 /**
1259  * mpt_host_page_access_control - control the IOC's Host Page Buffer access
1260  * @ioc: Pointer to MPT adapter structure
1261  * @access_control_value: define bits below
1262  * @sleepFlag: Specifies whether the process can sleep
1263  *
1264  * Provides mechanism for the host driver to control the IOC's
1265  * Host Page Buffer access.
1266  *
1267  * Access Control Value - bits[15:12]
1268  * 0h Reserved
1269  * 1h Enable Access { MPI_DB_HPBAC_ENABLE_ACCESS }
1270  * 2h Disable Access { MPI_DB_HPBAC_DISABLE_ACCESS }
1271  * 3h Free Buffer { MPI_DB_HPBAC_FREE_BUFFER }
1272  *
1273  * Returns 0 for success, non-zero for failure.
1274  */
1275 
1276 static int
1277 mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag)
1278 {
1279         int      r = 0;
1280 
1281         /* return if in use */
1282         if (CHIPREG_READ32(&ioc->chip->Doorbell)
1283             & MPI_DOORBELL_ACTIVE)
1284             return -1;
1285 
1286         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1287 
1288         CHIPREG_WRITE32(&ioc->chip->Doorbell,
1289                 ((MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL
1290                  <<MPI_DOORBELL_FUNCTION_SHIFT) |
1291                  (access_control_value<<12)));
1292 
1293         /* Wait for IOC to clear Doorbell Status bit */
1294         if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1295                 return -2;
1296         }else
1297                 return 0;
1298 }
1299 
1300 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1301 /**
1302  *      mpt_host_page_alloc - allocate system memory for the fw
1303  *      @ioc: Pointer to pointer to IOC adapter
1304  *      @ioc_init: Pointer to ioc init config page
1305  *
1306  *      If we already allocated memory in past, then resend the same pointer.
1307  *      Returns 0 for success, non-zero for failure.
1308  */
1309 static int
1310 mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init)
1311 {
1312         char    *psge;
1313         int     flags_length;
1314         u32     host_page_buffer_sz=0;
1315 
1316         if(!ioc->HostPageBuffer) {
1317 
1318                 host_page_buffer_sz =
1319                     le32_to_cpu(ioc->facts.HostPageBufferSGE.FlagsLength) & 0xFFFFFF;
1320 
1321                 if(!host_page_buffer_sz)
1322                         return 0; /* fw doesn't need any host buffers */
1323 
1324                 /* spin till we get enough memory */
1325                 while(host_page_buffer_sz > 0) {
1326 
1327                         if((ioc->HostPageBuffer = pci_alloc_consistent(
1328                             ioc->pcidev,
1329                             host_page_buffer_sz,
1330                             &ioc->HostPageBuffer_dma)) != NULL) {
1331 
1332                                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
1333                                     "host_page_buffer @ %p, dma @ %x, sz=%d bytes\n",
1334                                     ioc->name, ioc->HostPageBuffer,
1335                                     (u32)ioc->HostPageBuffer_dma,
1336                                     host_page_buffer_sz));
1337                                 ioc->alloc_total += host_page_buffer_sz;
1338                                 ioc->HostPageBuffer_sz = host_page_buffer_sz;
1339                                 break;
1340                         }
1341 
1342                         host_page_buffer_sz -= (4*1024);
1343                 }
1344         }
1345 
1346         if(!ioc->HostPageBuffer) {
1347                 printk(MYIOC_s_ERR_FMT
1348                     "Failed to alloc memory for host_page_buffer!\n",
1349                     ioc->name);
1350                 return -999;
1351         }
1352 
1353         psge = (char *)&ioc_init->HostPageBufferSGE;
1354         flags_length = MPI_SGE_FLAGS_SIMPLE_ELEMENT |
1355             MPI_SGE_FLAGS_SYSTEM_ADDRESS |
1356             MPI_SGE_FLAGS_HOST_TO_IOC |
1357             MPI_SGE_FLAGS_END_OF_BUFFER;
1358         flags_length = flags_length << MPI_SGE_FLAGS_SHIFT;
1359         flags_length |= ioc->HostPageBuffer_sz;
1360         ioc->add_sge(psge, flags_length, ioc->HostPageBuffer_dma);
1361         ioc->facts.HostPageBufferSGE = ioc_init->HostPageBufferSGE;
1362 
1363 return 0;
1364 }
1365 
1366 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1367 /**
1368  *      mpt_verify_adapter - Given IOC identifier, set pointer to its adapter structure.
1369  *      @iocid: IOC unique identifier (integer)
1370  *      @iocpp: Pointer to pointer to IOC adapter
1371  *
1372  *      Given a unique IOC identifier, set pointer to the associated MPT
1373  *      adapter structure.
1374  *
1375  *      Returns iocid and sets iocpp if iocid is found.
1376  *      Returns -1 if iocid is not found.
1377  */
1378 int
1379 mpt_verify_adapter(int iocid, MPT_ADAPTER **iocpp)
1380 {
1381         MPT_ADAPTER *ioc;
1382 
1383         list_for_each_entry(ioc,&ioc_list,list) {
1384                 if (ioc->id == iocid) {
1385                         *iocpp =ioc;
1386                         return iocid;
1387                 }
1388         }
1389 
1390         *iocpp = NULL;
1391         return -1;
1392 }
1393 
1394 /**
1395  *      mpt_get_product_name - returns product string
1396  *      @vendor: pci vendor id
1397  *      @device: pci device id
1398  *      @revision: pci revision id
1399  *
1400  *      Returns product string displayed when driver loads,
1401  *      in /proc/mpt/summary and /sysfs/class/scsi_host/host<X>/version_product
1402  *
1403  **/
1404 static const char*
1405 mpt_get_product_name(u16 vendor, u16 device, u8 revision)
1406 {
1407         char *product_str = NULL;
1408 
1409         if (vendor == PCI_VENDOR_ID_BROCADE) {
1410                 switch (device)
1411                 {
1412                 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1413                         switch (revision)
1414                         {
1415                         case 0x00:
1416                                 product_str = "BRE040 A0";
1417                                 break;
1418                         case 0x01:
1419                                 product_str = "BRE040 A1";
1420                                 break;
1421                         default:
1422                                 product_str = "BRE040";
1423                                 break;
1424                         }
1425                         break;
1426                 }
1427                 goto out;
1428         }
1429 
1430         switch (device)
1431         {
1432         case MPI_MANUFACTPAGE_DEVICEID_FC909:
1433                 product_str = "LSIFC909 B1";
1434                 break;
1435         case MPI_MANUFACTPAGE_DEVICEID_FC919:
1436                 product_str = "LSIFC919 B0";
1437                 break;
1438         case MPI_MANUFACTPAGE_DEVICEID_FC929:
1439                 product_str = "LSIFC929 B0";
1440                 break;
1441         case MPI_MANUFACTPAGE_DEVICEID_FC919X:
1442                 if (revision < 0x80)
1443                         product_str = "LSIFC919X A0";
1444                 else
1445                         product_str = "LSIFC919XL A1";
1446                 break;
1447         case MPI_MANUFACTPAGE_DEVICEID_FC929X:
1448                 if (revision < 0x80)
1449                         product_str = "LSIFC929X A0";
1450                 else
1451                         product_str = "LSIFC929XL A1";
1452                 break;
1453         case MPI_MANUFACTPAGE_DEVICEID_FC939X:
1454                 product_str = "LSIFC939X A1";
1455                 break;
1456         case MPI_MANUFACTPAGE_DEVICEID_FC949X:
1457                 product_str = "LSIFC949X A1";
1458                 break;
1459         case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1460                 switch (revision)
1461                 {
1462                 case 0x00:
1463                         product_str = "LSIFC949E A0";
1464                         break;
1465                 case 0x01:
1466                         product_str = "LSIFC949E A1";
1467                         break;
1468                 default:
1469                         product_str = "LSIFC949E";
1470                         break;
1471                 }
1472                 break;
1473         case MPI_MANUFACTPAGE_DEVID_53C1030:
1474                 switch (revision)
1475                 {
1476                 case 0x00:
1477                         product_str = "LSI53C1030 A0";
1478                         break;
1479                 case 0x01:
1480                         product_str = "LSI53C1030 B0";
1481                         break;
1482                 case 0x03:
1483                         product_str = "LSI53C1030 B1";
1484                         break;
1485                 case 0x07:
1486                         product_str = "LSI53C1030 B2";
1487                         break;
1488                 case 0x08:
1489                         product_str = "LSI53C1030 C0";
1490                         break;
1491                 case 0x80:
1492                         product_str = "LSI53C1030T A0";
1493                         break;
1494                 case 0x83:
1495                         product_str = "LSI53C1030T A2";
1496                         break;
1497                 case 0x87:
1498                         product_str = "LSI53C1030T A3";
1499                         break;
1500                 case 0xc1:
1501                         product_str = "LSI53C1020A A1";
1502                         break;
1503                 default:
1504                         product_str = "LSI53C1030";
1505                         break;
1506                 }
1507                 break;
1508         case MPI_MANUFACTPAGE_DEVID_1030_53C1035:
1509                 switch (revision)
1510                 {
1511                 case 0x03:
1512                         product_str = "LSI53C1035 A2";
1513                         break;
1514                 case 0x04:
1515                         product_str = "LSI53C1035 B0";
1516                         break;
1517                 default:
1518                         product_str = "LSI53C1035";
1519                         break;
1520                 }
1521                 break;
1522         case MPI_MANUFACTPAGE_DEVID_SAS1064:
1523                 switch (revision)
1524                 {
1525                 case 0x00:
1526                         product_str = "LSISAS1064 A1";
1527                         break;
1528                 case 0x01:
1529                         product_str = "LSISAS1064 A2";
1530                         break;
1531                 case 0x02:
1532                         product_str = "LSISAS1064 A3";
1533                         break;
1534                 case 0x03:
1535                         product_str = "LSISAS1064 A4";
1536                         break;
1537                 default:
1538                         product_str = "LSISAS1064";
1539                         break;
1540                 }
1541                 break;
1542         case MPI_MANUFACTPAGE_DEVID_SAS1064E:
1543                 switch (revision)
1544                 {
1545                 case 0x00:
1546                         product_str = "LSISAS1064E A0";
1547                         break;
1548                 case 0x01:
1549                         product_str = "LSISAS1064E B0";
1550                         break;
1551                 case 0x02:
1552                         product_str = "LSISAS1064E B1";
1553                         break;
1554                 case 0x04:
1555                         product_str = "LSISAS1064E B2";
1556                         break;
1557                 case 0x08:
1558                         product_str = "LSISAS1064E B3";
1559                         break;
1560                 default:
1561                         product_str = "LSISAS1064E";
1562                         break;
1563                 }
1564                 break;
1565         case MPI_MANUFACTPAGE_DEVID_SAS1068:
1566                 switch (revision)
1567                 {
1568                 case 0x00:
1569                         product_str = "LSISAS1068 A0";
1570                         break;
1571                 case 0x01:
1572                         product_str = "LSISAS1068 B0";
1573                         break;
1574                 case 0x02:
1575                         product_str = "LSISAS1068 B1";
1576                         break;
1577                 default:
1578                         product_str = "LSISAS1068";
1579                         break;
1580                 }
1581                 break;
1582         case MPI_MANUFACTPAGE_DEVID_SAS1068E:
1583                 switch (revision)
1584                 {
1585                 case 0x00:
1586                         product_str = "LSISAS1068E A0";
1587                         break;
1588                 case 0x01:
1589                         product_str = "LSISAS1068E B0";
1590                         break;
1591                 case 0x02:
1592                         product_str = "LSISAS1068E B1";
1593                         break;
1594                 case 0x04:
1595                         product_str = "LSISAS1068E B2";
1596                         break;
1597                 case 0x08:
1598                         product_str = "LSISAS1068E B3";
1599                         break;
1600                 default:
1601                         product_str = "LSISAS1068E";
1602                         break;
1603                 }
1604                 break;
1605         case MPI_MANUFACTPAGE_DEVID_SAS1078:
1606                 switch (revision)
1607                 {
1608                 case 0x00:
1609                         product_str = "LSISAS1078 A0";
1610                         break;
1611                 case 0x01:
1612                         product_str = "LSISAS1078 B0";
1613                         break;
1614                 case 0x02:
1615                         product_str = "LSISAS1078 C0";
1616                         break;
1617                 case 0x03:
1618                         product_str = "LSISAS1078 C1";
1619                         break;
1620                 case 0x04:
1621                         product_str = "LSISAS1078 C2";
1622                         break;
1623                 default:
1624                         product_str = "LSISAS1078";
1625                         break;
1626                 }
1627                 break;
1628         }
1629 
1630  out:
1631         return product_str;
1632 }
1633 
1634 /**
1635  *      mpt_mapresources - map in memory mapped io
1636  *      @ioc: Pointer to pointer to IOC adapter
1637  *
1638  **/
1639 static int
1640 mpt_mapresources(MPT_ADAPTER *ioc)
1641 {
1642         u8              __iomem *mem;
1643         int              ii;
1644         resource_size_t  mem_phys;
1645         unsigned long    port;
1646         u32              msize;
1647         u32              psize;
1648         int              r = -ENODEV;
1649         struct pci_dev *pdev;
1650 
1651         pdev = ioc->pcidev;
1652         ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1653         if (pci_enable_device_mem(pdev)) {
1654                 printk(MYIOC_s_ERR_FMT "pci_enable_device_mem() "
1655                     "failed\n", ioc->name);
1656                 return r;
1657         }
1658         if (pci_request_selected_regions(pdev, ioc->bars, "mpt")) {
1659                 printk(MYIOC_s_ERR_FMT "pci_request_selected_regions() with "
1660                     "MEM failed\n", ioc->name);
1661                 goto out_pci_disable_device;
1662         }
1663 
1664         if (sizeof(dma_addr_t) > 4) {
1665                 const uint64_t required_mask = dma_get_required_mask
1666                     (&pdev->dev);
1667                 if (required_mask > DMA_BIT_MASK(32)
1668                         && !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
1669                         && !pci_set_consistent_dma_mask(pdev,
1670                                                  DMA_BIT_MASK(64))) {
1671                         ioc->dma_mask = DMA_BIT_MASK(64);
1672                         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1673                                 ": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
1674                                 ioc->name));
1675                 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1676                         && !pci_set_consistent_dma_mask(pdev,
1677                                                 DMA_BIT_MASK(32))) {
1678                         ioc->dma_mask = DMA_BIT_MASK(32);
1679                         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1680                                 ": 32 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
1681                                 ioc->name));
1682                 } else {
1683                         printk(MYIOC_s_WARN_FMT "no suitable DMA mask for %s\n",
1684                             ioc->name, pci_name(pdev));
1685                         goto out_pci_release_region;
1686                 }
1687         } else {
1688                 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1689                         && !pci_set_consistent_dma_mask(pdev,
1690                                                 DMA_BIT_MASK(32))) {
1691                         ioc->dma_mask = DMA_BIT_MASK(32);
1692                         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1693                                 ": 32 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
1694                                 ioc->name));
1695                 } else {
1696                         printk(MYIOC_s_WARN_FMT "no suitable DMA mask for %s\n",
1697                             ioc->name, pci_name(pdev));
1698                         goto out_pci_release_region;
1699                 }
1700         }
1701 
1702         mem_phys = msize = 0;
1703         port = psize = 0;
1704         for (ii = 0; ii < DEVICE_COUNT_RESOURCE; ii++) {
1705                 if (pci_resource_flags(pdev, ii) & PCI_BASE_ADDRESS_SPACE_IO) {
1706                         if (psize)
1707                                 continue;
1708                         /* Get I/O space! */
1709                         port = pci_resource_start(pdev, ii);
1710                         psize = pci_resource_len(pdev, ii);
1711                 } else {
1712                         if (msize)
1713                                 continue;
1714                         /* Get memmap */
1715                         mem_phys = pci_resource_start(pdev, ii);
1716                         msize = pci_resource_len(pdev, ii);
1717                 }
1718         }
1719         ioc->mem_size = msize;
1720 
1721         mem = NULL;
1722         /* Get logical ptr for PciMem0 space */
1723         /*mem = ioremap(mem_phys, msize);*/
1724         mem = ioremap(mem_phys, msize);
1725         if (mem == NULL) {
1726                 printk(MYIOC_s_ERR_FMT ": ERROR - Unable to map adapter"
1727                         " memory!\n", ioc->name);
1728                 r = -EINVAL;
1729                 goto out_pci_release_region;
1730         }
1731         ioc->memmap = mem;
1732         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "mem = %p, mem_phys = %llx\n",
1733             ioc->name, mem, (unsigned long long)mem_phys));
1734 
1735         ioc->mem_phys = mem_phys;
1736         ioc->chip = (SYSIF_REGS __iomem *)mem;
1737 
1738         /* Save Port IO values in case we need to do downloadboot */
1739         ioc->pio_mem_phys = port;
1740         ioc->pio_chip = (SYSIF_REGS __iomem *)port;
1741 
1742         return 0;
1743 
1744 out_pci_release_region:
1745         pci_release_selected_regions(pdev, ioc->bars);
1746 out_pci_disable_device:
1747         pci_disable_device(pdev);
1748         return r;
1749 }
1750 
1751 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1752 /**
1753  *      mpt_attach - Install a PCI intelligent MPT adapter.
1754  *      @pdev: Pointer to pci_dev structure
1755  *      @id: PCI device ID information
1756  *
1757  *      This routine performs all the steps necessary to bring the IOC of
1758  *      a MPT adapter to a OPERATIONAL state.  This includes registering
1759  *      memory regions, registering the interrupt, and allocating request
1760  *      and reply memory pools.
1761  *
1762  *      This routine also pre-fetches the LAN MAC address of a Fibre Channel
1763  *      MPT adapter.
1764  *
1765  *      Returns 0 for success, non-zero for failure.
1766  *
1767  *      TODO: Add support for polled controllers
1768  */
1769 int
1770 mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)
1771 {
1772         MPT_ADAPTER     *ioc;
1773         u8               cb_idx;
1774         int              r = -ENODEV;
1775         u8               pcixcmd;
1776         static int       mpt_ids = 0;
1777 #ifdef CONFIG_PROC_FS
1778         struct proc_dir_entry *dent;
1779 #endif
1780 
1781         ioc = kzalloc(sizeof(MPT_ADAPTER), GFP_ATOMIC);
1782         if (ioc == NULL) {
1783                 printk(KERN_ERR MYNAM ": ERROR - Insufficient memory to add adapter!\n");
1784                 return -ENOMEM;
1785         }
1786 
1787         ioc->id = mpt_ids++;
1788         sprintf(ioc->name, "ioc%d", ioc->id);
1789         dinitprintk(ioc, printk(KERN_WARNING MYNAM ": mpt_adapter_install\n"));
1790 
1791         /*
1792          * set initial debug level
1793          * (refer to mptdebug.h)
1794          *
1795          */
1796         ioc->debug_level = mpt_debug_level;
1797         if (mpt_debug_level)
1798                 printk(KERN_INFO "mpt_debug_level=%xh\n", mpt_debug_level);
1799 
1800         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": mpt_adapter_install\n", ioc->name));
1801 
1802         ioc->pcidev = pdev;
1803         if (mpt_mapresources(ioc)) {
1804                 goto out_free_ioc;
1805         }
1806 
1807         /*
1808          * Setting up proper handlers for scatter gather handling
1809          */
1810         if (ioc->dma_mask == DMA_BIT_MASK(64)) {
1811                 if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1078)
1812                         ioc->add_sge = &mpt_add_sge_64bit_1078;
1813                 else
1814                         ioc->add_sge = &mpt_add_sge_64bit;
1815                 ioc->add_chain = &mpt_add_chain_64bit;
1816                 ioc->sg_addr_size = 8;
1817         } else {
1818                 ioc->add_sge = &mpt_add_sge;
1819                 ioc->add_chain = &mpt_add_chain;
1820                 ioc->sg_addr_size = 4;
1821         }
1822         ioc->SGE_size = sizeof(u32) + ioc->sg_addr_size;
1823 
1824         ioc->alloc_total = sizeof(MPT_ADAPTER);
1825         ioc->req_sz = MPT_DEFAULT_FRAME_SIZE;           /* avoid div by zero! */
1826         ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
1827 
1828 
1829         spin_lock_init(&ioc->taskmgmt_lock);
1830         mutex_init(&ioc->internal_cmds.mutex);
1831         init_completion(&ioc->internal_cmds.done);
1832         mutex_init(&ioc->mptbase_cmds.mutex);
1833         init_completion(&ioc->mptbase_cmds.done);
1834         mutex_init(&ioc->taskmgmt_cmds.mutex);
1835         init_completion(&ioc->taskmgmt_cmds.done);
1836 
1837         /* Initialize the event logging.
1838          */
1839         ioc->eventTypes = 0;    /* None */
1840         ioc->eventContext = 0;
1841         ioc->eventLogSize = 0;
1842         ioc->events = NULL;
1843 
1844 #ifdef MFCNT
1845         ioc->mfcnt = 0;
1846 #endif
1847 
1848         ioc->sh = NULL;
1849         ioc->cached_fw = NULL;
1850 
1851         /* Initialize SCSI Config Data structure
1852          */
1853         memset(&ioc->spi_data, 0, sizeof(SpiCfgData));
1854 
1855         /* Initialize the fc rport list head.
1856          */
1857         INIT_LIST_HEAD(&ioc->fc_rports);
1858 
1859         /* Find lookup slot. */
1860         INIT_LIST_HEAD(&ioc->list);
1861 
1862 
1863         /* Initialize workqueue */
1864         INIT_DELAYED_WORK(&ioc->fault_reset_work, mpt_fault_reset_work);
1865 
1866         snprintf(ioc->reset_work_q_name, MPT_KOBJ_NAME_LEN,
1867                  "mpt_poll_%d", ioc->id);
1868         ioc->reset_work_q = alloc_workqueue(ioc->reset_work_q_name,
1869                                             WQ_MEM_RECLAIM, 0);
1870         if (!ioc->reset_work_q) {
1871                 printk(MYIOC_s_ERR_FMT "Insufficient memory to add adapter!\n",
1872                     ioc->name);
1873                 r = -ENOMEM;
1874                 goto out_unmap_resources;
1875         }
1876 
1877         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "facts @ %p, pfacts[0] @ %p\n",
1878             ioc->name, &ioc->facts, &ioc->pfacts[0]));
1879 
1880         ioc->prod_name = mpt_get_product_name(pdev->vendor, pdev->device,
1881                                               pdev->revision);
1882 
1883         switch (pdev->device)
1884         {
1885         case MPI_MANUFACTPAGE_DEVICEID_FC939X:
1886         case MPI_MANUFACTPAGE_DEVICEID_FC949X:
1887                 ioc->errata_flag_1064 = 1;
1888         case MPI_MANUFACTPAGE_DEVICEID_FC909:
1889         case MPI_MANUFACTPAGE_DEVICEID_FC929:
1890         case MPI_MANUFACTPAGE_DEVICEID_FC919:
1891         case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1892                 ioc->bus_type = FC;
1893                 break;
1894 
1895         case MPI_MANUFACTPAGE_DEVICEID_FC929X:
1896                 if (pdev->revision < XL_929) {
1897                         /* 929X Chip Fix. Set Split transactions level
1898                         * for PCIX. Set MOST bits to zero.
1899                         */
1900                         pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1901                         pcixcmd &= 0x8F;
1902                         pci_write_config_byte(pdev, 0x6a, pcixcmd);
1903                 } else {
1904                         /* 929XL Chip Fix. Set MMRBC to 0x08.
1905                         */
1906                         pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1907                         pcixcmd |= 0x08;
1908                         pci_write_config_byte(pdev, 0x6a, pcixcmd);
1909                 }
1910                 ioc->bus_type = FC;
1911                 break;
1912 
1913         case MPI_MANUFACTPAGE_DEVICEID_FC919X:
1914                 /* 919X Chip Fix. Set Split transactions level
1915                  * for PCIX. Set MOST bits to zero.
1916                  */
1917                 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1918                 pcixcmd &= 0x8F;
1919                 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1920                 ioc->bus_type = FC;
1921                 break;
1922 
1923         case MPI_MANUFACTPAGE_DEVID_53C1030:
1924                 /* 1030 Chip Fix. Disable Split transactions
1925                  * for PCIX. Set MOST bits to zero if Rev < C0( = 8).
1926                  */
1927                 if (pdev->revision < C0_1030) {
1928                         pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1929                         pcixcmd &= 0x8F;
1930                         pci_write_config_byte(pdev, 0x6a, pcixcmd);
1931                 }
1932 
1933         case MPI_MANUFACTPAGE_DEVID_1030_53C1035:
1934                 ioc->bus_type = SPI;
1935                 break;
1936 
1937         case MPI_MANUFACTPAGE_DEVID_SAS1064:
1938         case MPI_MANUFACTPAGE_DEVID_SAS1068:
1939                 ioc->errata_flag_1064 = 1;
1940                 ioc->bus_type = SAS;
1941                 break;
1942 
1943         case MPI_MANUFACTPAGE_DEVID_SAS1064E:
1944         case MPI_MANUFACTPAGE_DEVID_SAS1068E:
1945         case MPI_MANUFACTPAGE_DEVID_SAS1078:
1946                 ioc->bus_type = SAS;
1947                 break;
1948         }
1949 
1950 
1951         switch (ioc->bus_type) {
1952 
1953         case SAS:
1954                 ioc->msi_enable = mpt_msi_enable_sas;
1955                 break;
1956 
1957         case SPI:
1958                 ioc->msi_enable = mpt_msi_enable_spi;
1959                 break;
1960 
1961         case FC:
1962                 ioc->msi_enable = mpt_msi_enable_fc;
1963                 break;
1964 
1965         default:
1966                 ioc->msi_enable = 0;
1967                 break;
1968         }
1969 
1970         ioc->fw_events_off = 1;
1971 
1972         if (ioc->errata_flag_1064)
1973                 pci_disable_io_access(pdev);
1974 
1975         spin_lock_init(&ioc->FreeQlock);
1976 
1977         /* Disable all! */
1978         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1979         ioc->active = 0;
1980         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1981 
1982         /* Set IOC ptr in the pcidev's driver data. */
1983         pci_set_drvdata(ioc->pcidev, ioc);
1984 
1985         /* Set lookup ptr. */
1986         list_add_tail(&ioc->list, &ioc_list);
1987 
1988         /* Check for "bound ports" (929, 929X, 1030, 1035) to reduce redundant resets.
1989          */
1990         mpt_detect_bound_ports(ioc, pdev);
1991 
1992         INIT_LIST_HEAD(&ioc->fw_event_list);
1993         spin_lock_init(&ioc->fw_event_lock);
1994         snprintf(ioc->fw_event_q_name, MPT_KOBJ_NAME_LEN, "mpt/%d", ioc->id);
1995         ioc->fw_event_q = alloc_workqueue(ioc->fw_event_q_name,
1996                                           WQ_MEM_RECLAIM, 0);
1997         if (!ioc->fw_event_q) {
1998                 printk(MYIOC_s_ERR_FMT "Insufficient memory to add adapter!\n",
1999                     ioc->name);
2000                 r = -ENOMEM;
2001                 goto out_remove_ioc;
2002         }
2003 
2004         if ((r = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
2005             CAN_SLEEP)) != 0){
2006                 printk(MYIOC_s_ERR_FMT "didn't initialize properly! (%d)\n",
2007                     ioc->name, r);
2008 
2009                 destroy_workqueue(ioc->fw_event_q);
2010                 ioc->fw_event_q = NULL;
2011 
2012                 list_del(&ioc->list);
2013                 if (ioc->alt_ioc)
2014                         ioc->alt_ioc->alt_ioc = NULL;
2015                 iounmap(ioc->memmap);
2016                 if (pci_is_enabled(pdev))
2017                         pci_disable_device(pdev);
2018                 if (r != -5)
2019                         pci_release_selected_regions(pdev, ioc->bars);
2020 
2021                 destroy_workqueue(ioc->reset_work_q);
2022                 ioc->reset_work_q = NULL;
2023 
2024                 kfree(ioc);
2025                 return r;
2026         }
2027 
2028         /* call per device driver probe entry point */
2029         for(cb_idx = 0; cb_idx < MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
2030                 if(MptDeviceDriverHandlers[cb_idx] &&
2031                   MptDeviceDriverHandlers[cb_idx]->probe) {
2032                         MptDeviceDriverHandlers[cb_idx]->probe(pdev,id);
2033                 }
2034         }
2035 
2036 #ifdef CONFIG_PROC_FS
2037         /*
2038          *  Create "/proc/mpt/iocN" subdirectory entry for each MPT adapter.
2039          */
2040         dent = proc_mkdir(ioc->name, mpt_proc_root_dir);
2041         if (dent) {
2042                 proc_create_data("info", S_IRUGO, dent, &mpt_iocinfo_proc_fops, ioc);
2043                 proc_create_data("summary", S_IRUGO, dent, &mpt_summary_proc_fops, ioc);
2044         }
2045 #endif
2046 
2047         if (!ioc->alt_ioc)
2048                 queue_delayed_work(ioc->reset_work_q, &ioc->fault_reset_work,
2049                         msecs_to_jiffies(MPT_POLLING_INTERVAL));
2050 
2051         return 0;
2052 
2053 out_remove_ioc:
2054         list_del(&ioc->list);
2055         if (ioc->alt_ioc)
2056                 ioc->alt_ioc->alt_ioc = NULL;
2057 
2058         destroy_workqueue(ioc->reset_work_q);
2059         ioc->reset_work_q = NULL;
2060 
2061 out_unmap_resources:
2062         iounmap(ioc->memmap);
2063         pci_disable_device(pdev);
2064         pci_release_selected_regions(pdev, ioc->bars);
2065 
2066 out_free_ioc:
2067         kfree(ioc);
2068 
2069         return r;
2070 }
2071 
2072 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2073 /**
2074  *      mpt_detach - Remove a PCI intelligent MPT adapter.
2075  *      @pdev: Pointer to pci_dev structure
2076  */
2077 
2078 void
2079 mpt_detach(struct pci_dev *pdev)
2080 {
2081         MPT_ADAPTER     *ioc = pci_get_drvdata(pdev);
2082         char pname[32];
2083         u8 cb_idx;
2084         unsigned long flags;
2085         struct workqueue_struct *wq;
2086 
2087         /*
2088          * Stop polling ioc for fault condition
2089          */
2090         spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
2091         wq = ioc->reset_work_q;
2092         ioc->reset_work_q = NULL;
2093         spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
2094         cancel_delayed_work(&ioc->fault_reset_work);
2095         destroy_workqueue(wq);
2096 
2097         spin_lock_irqsave(&ioc->fw_event_lock, flags);
2098         wq = ioc->fw_event_q;
2099         ioc->fw_event_q = NULL;
2100         spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
2101         destroy_workqueue(wq);
2102 
2103         sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/summary", ioc->name);
2104         remove_proc_entry(pname, NULL);
2105         sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/info", ioc->name);
2106         remove_proc_entry(pname, NULL);
2107         sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s", ioc->name);
2108         remove_proc_entry(pname, NULL);
2109 
2110         /* call per device driver remove entry point */
2111         for(cb_idx = 0; cb_idx < MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
2112                 if(MptDeviceDriverHandlers[cb_idx] &&
2113                   MptDeviceDriverHandlers[cb_idx]->remove) {
2114                         MptDeviceDriverHandlers[cb_idx]->remove(pdev);
2115                 }
2116         }
2117 
2118         /* Disable interrupts! */
2119         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2120 
2121         ioc->active = 0;
2122         synchronize_irq(pdev->irq);
2123 
2124         /* Clear any lingering interrupt */
2125         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2126 
2127         CHIPREG_READ32(&ioc->chip->IntStatus);
2128 
2129         mpt_adapter_dispose(ioc);
2130 
2131 }
2132 
2133 /**************************************************************************
2134  * Power Management
2135  */
2136 #ifdef CONFIG_PM
2137 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2138 /**
2139  *      mpt_suspend - Fusion MPT base driver suspend routine.
2140  *      @pdev: Pointer to pci_dev structure
2141  *      @state: new state to enter
2142  */
2143 int
2144 mpt_suspend(struct pci_dev *pdev, pm_message_t state)
2145 {
2146         u32 device_state;
2147         MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
2148 
2149         device_state = pci_choose_state(pdev, state);
2150         printk(MYIOC_s_INFO_FMT "pci-suspend: pdev=0x%p, slot=%s, Entering "
2151             "operating state [D%d]\n", ioc->name, pdev, pci_name(pdev),
2152             device_state);
2153 
2154         /* put ioc into READY_STATE */
2155         if(SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, CAN_SLEEP)) {
2156                 printk(MYIOC_s_ERR_FMT
2157                 "pci-suspend:  IOC msg unit reset failed!\n", ioc->name);
2158         }
2159 
2160         /* disable interrupts */
2161         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2162         ioc->active = 0;
2163 
2164         /* Clear any lingering interrupt */
2165         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2166 
2167         free_irq(ioc->pci_irq, ioc);
2168         if (ioc->msi_enable)
2169                 pci_disable_msi(ioc->pcidev);
2170         ioc->pci_irq = -1;
2171         pci_save_state(pdev);
2172         pci_disable_device(pdev);
2173         pci_release_selected_regions(pdev, ioc->bars);
2174         pci_set_power_state(pdev, device_state);
2175         return 0;
2176 }
2177 
2178 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2179 /**
2180  *      mpt_resume - Fusion MPT base driver resume routine.
2181  *      @pdev: Pointer to pci_dev structure
2182  */
2183 int
2184 mpt_resume(struct pci_dev *pdev)
2185 {
2186         MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
2187         u32 device_state = pdev->current_state;
2188         int recovery_state;
2189         int err;
2190 
2191         printk(MYIOC_s_INFO_FMT "pci-resume: pdev=0x%p, slot=%s, Previous "
2192             "operating state [D%d]\n", ioc->name, pdev, pci_name(pdev),
2193             device_state);
2194 
2195         pci_set_power_state(pdev, PCI_D0);
2196         pci_enable_wake(pdev, PCI_D0, 0);
2197         pci_restore_state(pdev);
2198         ioc->pcidev = pdev;
2199         err = mpt_mapresources(ioc);
2200         if (err)
2201                 return err;
2202 
2203         if (ioc->dma_mask == DMA_BIT_MASK(64)) {
2204                 if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1078)
2205                         ioc->add_sge = &mpt_add_sge_64bit_1078;
2206                 else
2207                         ioc->add_sge = &mpt_add_sge_64bit;
2208                 ioc->add_chain = &mpt_add_chain_64bit;
2209                 ioc->sg_addr_size = 8;
2210         } else {
2211 
2212                 ioc->add_sge = &mpt_add_sge;
2213                 ioc->add_chain = &mpt_add_chain;
2214                 ioc->sg_addr_size = 4;
2215         }
2216         ioc->SGE_size = sizeof(u32) + ioc->sg_addr_size;
2217 
2218         printk(MYIOC_s_INFO_FMT "pci-resume: ioc-state=0x%x,doorbell=0x%x\n",
2219             ioc->name, (mpt_GetIocState(ioc, 1) >> MPI_IOC_STATE_SHIFT),
2220             CHIPREG_READ32(&ioc->chip->Doorbell));
2221 
2222         /*
2223          * Errata workaround for SAS pci express:
2224          * Upon returning to the D0 state, the contents of the doorbell will be
2225          * stale data, and this will incorrectly signal to the host driver that
2226          * the firmware is ready to process mpt commands.   The workaround is
2227          * to issue a diagnostic reset.
2228          */
2229         if (ioc->bus_type == SAS && (pdev->device ==
2230             MPI_MANUFACTPAGE_DEVID_SAS1068E || pdev->device ==
2231             MPI_MANUFACTPAGE_DEVID_SAS1064E)) {
2232                 if (KickStart(ioc, 1, CAN_SLEEP) < 0) {
2233                         printk(MYIOC_s_WARN_FMT "pci-resume: Cannot recover\n",
2234                             ioc->name);
2235                         goto out;
2236                 }
2237         }
2238 
2239         /* bring ioc to operational state */
2240         printk(MYIOC_s_INFO_FMT "Sending mpt_do_ioc_recovery\n", ioc->name);
2241         recovery_state = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
2242                                                  CAN_SLEEP);
2243         if (recovery_state != 0)
2244                 printk(MYIOC_s_WARN_FMT "pci-resume: Cannot recover, "
2245                     "error:[%x]\n", ioc->name, recovery_state);
2246         else
2247                 printk(MYIOC_s_INFO_FMT
2248                     "pci-resume: success\n", ioc->name);
2249  out:
2250         return 0;
2251 
2252 }
2253 #endif
2254 
2255 static int
2256 mpt_signal_reset(u8 index, MPT_ADAPTER *ioc, int reset_phase)
2257 {
2258         if ((MptDriverClass[index] == MPTSPI_DRIVER &&
2259              ioc->bus_type != SPI) ||
2260             (MptDriverClass[index] == MPTFC_DRIVER &&
2261              ioc->bus_type != FC) ||
2262             (MptDriverClass[index] == MPTSAS_DRIVER &&
2263              ioc->bus_type != SAS))
2264                 /* make sure we only call the relevant reset handler
2265                  * for the bus */
2266                 return 0;
2267         return (MptResetHandlers[index])(ioc, reset_phase);
2268 }
2269 
2270 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2271 /**
2272  *      mpt_do_ioc_recovery - Initialize or recover MPT adapter.
2273  *      @ioc: Pointer to MPT adapter structure
2274  *      @reason: Event word / reason
2275  *      @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
2276  *
2277  *      This routine performs all the steps necessary to bring the IOC
2278  *      to a OPERATIONAL state.
2279  *
2280  *      This routine also pre-fetches the LAN MAC address of a Fibre Channel
2281  *      MPT adapter.
2282  *
2283  *      Returns:
2284  *               0 for success
2285  *              -1 if failed to get board READY
2286  *              -2 if READY but IOCFacts Failed
2287  *              -3 if READY but PrimeIOCFifos Failed
2288  *              -4 if READY but IOCInit Failed
2289  *              -5 if failed to enable_device and/or request_selected_regions
2290  *              -6 if failed to upload firmware
2291  */
2292 static int
2293 mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag)
2294 {
2295         int      hard_reset_done = 0;
2296         int      alt_ioc_ready = 0;
2297         int      hard;
2298         int      rc=0;
2299         int      ii;
2300         int      ret = 0;
2301         int      reset_alt_ioc_active = 0;
2302         int      irq_allocated = 0;
2303         u8      *a;
2304 
2305         printk(MYIOC_s_INFO_FMT "Initiating %s\n", ioc->name,
2306             reason == MPT_HOSTEVENT_IOC_BRINGUP ? "bringup" : "recovery");
2307 
2308         /* Disable reply interrupts (also blocks FreeQ) */
2309         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2310         ioc->active = 0;
2311 
2312         if (ioc->alt_ioc) {
2313                 if (ioc->alt_ioc->active ||
2314                     reason == MPT_HOSTEVENT_IOC_RECOVER) {
2315                         reset_alt_ioc_active = 1;
2316                         /* Disable alt-IOC's reply interrupts
2317                          *  (and FreeQ) for a bit
2318                          **/
2319                         CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask,
2320                                 0xFFFFFFFF);
2321                         ioc->alt_ioc->active = 0;
2322                 }
2323         }
2324 
2325         hard = 1;
2326         if (reason == MPT_HOSTEVENT_IOC_BRINGUP)
2327                 hard = 0;
2328 
2329         if ((hard_reset_done = MakeIocReady(ioc, hard, sleepFlag)) < 0) {
2330                 if (hard_reset_done == -4) {
2331                         printk(MYIOC_s_WARN_FMT "Owned by PEER..skipping!\n",
2332                             ioc->name);
2333 
2334                         if (reset_alt_ioc_active && ioc->alt_ioc) {
2335                                 /* (re)Enable alt-IOC! (reply interrupt, FreeQ) */
2336                                 dprintk(ioc, printk(MYIOC_s_INFO_FMT
2337                                     "alt_ioc reply irq re-enabled\n", ioc->alt_ioc->name));
2338                                 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
2339                                 ioc->alt_ioc->active = 1;
2340                         }
2341 
2342                 } else {
2343                         printk(MYIOC_s_WARN_FMT
2344                             "NOT READY WARNING!\n", ioc->name);
2345                 }
2346                 ret = -1;
2347                 goto out;
2348         }
2349 
2350         /* hard_reset_done = 0 if a soft reset was performed
2351          * and 1 if a hard reset was performed.
2352          */
2353         if (hard_reset_done && reset_alt_ioc_active && ioc->alt_ioc) {
2354                 if ((rc = MakeIocReady(ioc->alt_ioc, 0, sleepFlag)) == 0)
2355                         alt_ioc_ready = 1;
2356                 else
2357                         printk(MYIOC_s_WARN_FMT
2358                             ": alt-ioc Not ready WARNING!\n",
2359                             ioc->alt_ioc->name);
2360         }
2361 
2362         for (ii=0; ii<5; ii++) {
2363                 /* Get IOC facts! Allow 5 retries */
2364                 if ((rc = GetIocFacts(ioc, sleepFlag, reason)) == 0)
2365                         break;
2366         }
2367 
2368 
2369         if (ii == 5) {
2370                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2371                     "Retry IocFacts failed rc=%x\n", ioc->name, rc));
2372                 ret = -2;
2373         } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2374                 MptDisplayIocCapabilities(ioc);
2375         }
2376 
2377         if (alt_ioc_ready) {
2378                 if ((rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason)) != 0) {
2379                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2380                             "Initial Alt IocFacts failed rc=%x\n",
2381                             ioc->name, rc));
2382                         /* Retry - alt IOC was initialized once
2383                          */
2384                         rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason);
2385                 }
2386                 if (rc) {
2387                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2388                             "Retry Alt IocFacts failed rc=%x\n", ioc->name, rc));
2389                         alt_ioc_ready = 0;
2390                         reset_alt_ioc_active = 0;
2391                 } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2392                         MptDisplayIocCapabilities(ioc->alt_ioc);
2393                 }
2394         }
2395 
2396         if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP) &&
2397             (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)) {
2398                 pci_release_selected_regions(ioc->pcidev, ioc->bars);
2399                 ioc->bars = pci_select_bars(ioc->pcidev, IORESOURCE_MEM |
2400                     IORESOURCE_IO);
2401                 if (pci_enable_device(ioc->pcidev))
2402                         return -5;
2403                 if (pci_request_selected_regions(ioc->pcidev, ioc->bars,
2404                         "mpt"))
2405                         return -5;
2406         }
2407 
2408         /*
2409          * Device is reset now. It must have de-asserted the interrupt line
2410          * (if it was asserted) and it should be safe to register for the
2411          * interrupt now.
2412          */
2413         if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
2414                 ioc->pci_irq = -1;
2415                 if (ioc->pcidev->irq) {
2416                         if (ioc->msi_enable && !pci_enable_msi(ioc->pcidev))
2417                                 printk(MYIOC_s_INFO_FMT "PCI-MSI enabled\n",
2418                                     ioc->name);
2419                         else
2420                                 ioc->msi_enable = 0;
2421                         rc = request_irq(ioc->pcidev->irq, mpt_interrupt,
2422                             IRQF_SHARED, ioc->name, ioc);
2423                         if (rc < 0) {
2424                                 printk(MYIOC_s_ERR_FMT "Unable to allocate "
2425                                     "interrupt %d!\n",
2426                                     ioc->name, ioc->pcidev->irq);
2427                                 if (ioc->msi_enable)
2428                                         pci_disable_msi(ioc->pcidev);
2429                                 ret = -EBUSY;
2430                                 goto out;
2431                         }
2432                         irq_allocated = 1;
2433                         ioc->pci_irq = ioc->pcidev->irq;
2434                         pci_set_master(ioc->pcidev);            /* ?? */
2435                         pci_set_drvdata(ioc->pcidev, ioc);
2436                         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2437                             "installed at interrupt %d\n", ioc->name,
2438                             ioc->pcidev->irq));
2439                 }
2440         }
2441 
2442         /* Prime reply & request queues!
2443          * (mucho alloc's) Must be done prior to
2444          * init as upper addresses are needed for init.
2445          * If fails, continue with alt-ioc processing
2446          */
2447         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "PrimeIocFifos\n",
2448             ioc->name));
2449         if ((ret == 0) && ((rc = PrimeIocFifos(ioc)) != 0))
2450                 ret = -3;
2451 
2452         /* May need to check/upload firmware & data here!
2453          * If fails, continue with alt-ioc processing
2454          */
2455         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "SendIocInit\n",
2456             ioc->name));
2457         if ((ret == 0) && ((rc = SendIocInit(ioc, sleepFlag)) != 0))
2458                 ret = -4;
2459 // NEW!
2460         if (alt_ioc_ready && ((rc = PrimeIocFifos(ioc->alt_ioc)) != 0)) {
2461                 printk(MYIOC_s_WARN_FMT
2462                     ": alt-ioc (%d) FIFO mgmt alloc WARNING!\n",
2463                     ioc->alt_ioc->name, rc);
2464                 alt_ioc_ready = 0;
2465                 reset_alt_ioc_active = 0;
2466         }
2467 
2468         if (alt_ioc_ready) {
2469                 if ((rc = SendIocInit(ioc->alt_ioc, sleepFlag)) != 0) {
2470                         alt_ioc_ready = 0;
2471                         reset_alt_ioc_active = 0;
2472                         printk(MYIOC_s_WARN_FMT
2473                                 ": alt-ioc: (%d) init failure WARNING!\n",
2474                                         ioc->alt_ioc->name, rc);
2475                 }
2476         }
2477 
2478         if (reason == MPT_HOSTEVENT_IOC_BRINGUP){
2479                 if (ioc->upload_fw) {
2480                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2481                             "firmware upload required!\n", ioc->name));
2482 
2483                         /* Controller is not operational, cannot do upload
2484                          */
2485                         if (ret == 0) {
2486                                 rc = mpt_do_upload(ioc, sleepFlag);
2487                                 if (rc == 0) {
2488                                         if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
2489                                                 /*
2490                                                  * Maintain only one pointer to FW memory
2491                                                  * so there will not be two attempt to
2492                                                  * downloadboot onboard dual function
2493                                                  * chips (mpt_adapter_disable,
2494                                                  * mpt_diag_reset)
2495                                                  */
2496                                                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2497                                                     "mpt_upload:  alt_%s has cached_fw=%p \n",
2498                                                     ioc->name, ioc->alt_ioc->name, ioc->alt_ioc->cached_fw));
2499                                                 ioc->cached_fw = NULL;
2500                                         }
2501                                 } else {
2502                                         printk(MYIOC_s_WARN_FMT
2503                                             "firmware upload failure!\n", ioc->name);
2504                                         ret = -6;
2505                                 }
2506                         }
2507                 }
2508         }
2509 
2510         /*  Enable MPT base driver management of EventNotification
2511          *  and EventAck handling.
2512          */
2513         if ((ret == 0) && (!ioc->facts.EventState)) {
2514                 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2515                         "SendEventNotification\n",
2516                     ioc->name));
2517                 ret = SendEventNotification(ioc, 1, sleepFlag); /* 1=Enable */
2518         }
2519 
2520         if (ioc->alt_ioc && alt_ioc_ready && !ioc->alt_ioc->facts.EventState)
2521                 rc = SendEventNotification(ioc->alt_ioc, 1, sleepFlag);
2522 
2523         if (ret == 0) {
2524                 /* Enable! (reply interrupt) */
2525                 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
2526                 ioc->active = 1;
2527         }
2528         if (rc == 0) {  /* alt ioc */
2529                 if (reset_alt_ioc_active && ioc->alt_ioc) {
2530                         /* (re)Enable alt-IOC! (reply interrupt) */
2531                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "alt-ioc"
2532                                 "reply irq re-enabled\n",
2533                                 ioc->alt_ioc->name));
2534                         CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask,
2535                                 MPI_HIM_DIM);
2536                         ioc->alt_ioc->active = 1;
2537                 }
2538         }
2539 
2540 
2541         /*      Add additional "reason" check before call to GetLanConfigPages
2542          *      (combined with GetIoUnitPage2 call).  This prevents a somewhat
2543          *      recursive scenario; GetLanConfigPages times out, timer expired
2544          *      routine calls HardResetHandler, which calls into here again,
2545          *      and we try GetLanConfigPages again...
2546          */
2547         if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
2548 
2549                 /*
2550                  * Initialize link list for inactive raid volumes.
2551                  */
2552                 mutex_init(&ioc->raid_data.inactive_list_mutex);
2553                 INIT_LIST_HEAD(&ioc->raid_data.inactive_list);
2554 
2555                 switch (ioc->bus_type) {
2556 
2557                 case SAS:
2558                         /* clear persistency table */
2559                         if(ioc->facts.IOCExceptions &
2560                             MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL) {
2561                                 ret = mptbase_sas_persist_operation(ioc,
2562                                     MPI_SAS_OP_CLEAR_NOT_PRESENT);
2563                                 if(ret != 0)
2564                                         goto out;
2565                         }
2566 
2567                         /* Find IM volumes
2568                          */
2569                         mpt_findImVolumes(ioc);
2570 
2571                         /* Check, and possibly reset, the coalescing value
2572                          */
2573                         mpt_read_ioc_pg_1(ioc);
2574 
2575                         break;
2576 
2577                 case FC:
2578                         if ((ioc->pfacts[0].ProtocolFlags &
2579                                 MPI_PORTFACTS_PROTOCOL_LAN) &&
2580                             (ioc->lan_cnfg_page0.Header.PageLength == 0)) {
2581                                 /*
2582                                  *  Pre-fetch the ports LAN MAC address!
2583                                  *  (LANPage1_t stuff)
2584                                  */
2585                                 (void) GetLanConfigPages(ioc);
2586                                 a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
2587                                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2588                                         "LanAddr = %pMR\n", ioc->name, a));
2589                         }
2590                         break;
2591 
2592                 case SPI:
2593                         /* Get NVRAM and adapter maximums from SPP 0 and 2
2594                          */
2595                         mpt_GetScsiPortSettings(ioc, 0);
2596 
2597                         /* Get version and length of SDP 1
2598                          */
2599                         mpt_readScsiDevicePageHeaders(ioc, 0);
2600 
2601                         /* Find IM volumes
2602                          */
2603                         if (ioc->facts.MsgVersion >= MPI_VERSION_01_02)
2604                                 mpt_findImVolumes(ioc);
2605 
2606                         /* Check, and possibly reset, the coalescing value
2607                          */
2608                         mpt_read_ioc_pg_1(ioc);
2609 
2610                         mpt_read_ioc_pg_4(ioc);
2611 
2612                         break;
2613                 }
2614 
2615                 GetIoUnitPage2(ioc);
2616                 mpt_get_manufacturing_pg_0(ioc);
2617         }
2618 
2619  out:
2620         if ((ret != 0) && irq_allocated) {
2621                 free_irq(ioc->pci_irq, ioc);
2622                 if (ioc->msi_enable)
2623                         pci_disable_msi(ioc->pcidev);
2624         }
2625         return ret;
2626 }
2627 
2628 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2629 /**
2630  *      mpt_detect_bound_ports - Search for matching PCI bus/dev_function
2631  *      @ioc: Pointer to MPT adapter structure
2632  *      @pdev: Pointer to (struct pci_dev) structure
2633  *
2634  *      Search for PCI bus/dev_function which matches
2635  *      PCI bus/dev_function (+/-1) for newly discovered 929,
2636  *      929X, 1030 or 1035.
2637  *
2638  *      If match on PCI dev_function +/-1 is found, bind the two MPT adapters
2639  *      using alt_ioc pointer fields in their %MPT_ADAPTER structures.
2640  */
2641 static void
2642 mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev)
2643 {
2644         struct pci_dev *peer=NULL;
2645         unsigned int slot = PCI_SLOT(pdev->devfn);
2646         unsigned int func = PCI_FUNC(pdev->devfn);
2647         MPT_ADAPTER *ioc_srch;
2648 
2649         dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "PCI device %s devfn=%x/%x,"
2650             " searching for devfn match on %x or %x\n",
2651             ioc->name, pci_name(pdev), pdev->bus->number,
2652             pdev->devfn, func-1, func+1));
2653 
2654         peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func-1));
2655         if (!peer) {
2656                 peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func+1));
2657                 if (!peer)
2658                         return;
2659         }
2660 
2661         list_for_each_entry(ioc_srch, &ioc_list, list) {
2662                 struct pci_dev *_pcidev = ioc_srch->pcidev;
2663                 if (_pcidev == peer) {
2664                         /* Paranoia checks */
2665                         if (ioc->alt_ioc != NULL) {
2666                                 printk(MYIOC_s_WARN_FMT
2667                                     "Oops, already bound (%s <==> %s)!\n",
2668                                     ioc->name, ioc->name, ioc->alt_ioc->name);
2669                                 break;
2670                         } else if (ioc_srch->alt_ioc != NULL) {
2671                                 printk(MYIOC_s_WARN_FMT
2672                                     "Oops, already bound (%s <==> %s)!\n",
2673                                     ioc_srch->name, ioc_srch->name,
2674                                     ioc_srch->alt_ioc->name);
2675                                 break;
2676                         }
2677                         dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2678                                 "FOUND! binding %s <==> %s\n",
2679                                 ioc->name, ioc->name, ioc_srch->name));
2680                         ioc_srch->alt_ioc = ioc;
2681                         ioc->alt_ioc = ioc_srch;
2682                 }
2683         }
2684         pci_dev_put(peer);
2685 }
2686 
2687 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2688 /**
2689  *      mpt_adapter_disable - Disable misbehaving MPT adapter.
2690  *      @ioc: Pointer to MPT adapter structure
2691  */
2692 static void
2693 mpt_adapter_disable(MPT_ADAPTER *ioc)
2694 {
2695         int sz;
2696         int ret;
2697 
2698         if (ioc->cached_fw != NULL) {
2699                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2700                         "%s: Pushing FW onto adapter\n", __func__, ioc->name));
2701                 if ((ret = mpt_downloadboot(ioc, (MpiFwHeader_t *)
2702                     ioc->cached_fw, CAN_SLEEP)) < 0) {
2703                         printk(MYIOC_s_WARN_FMT
2704                             ": firmware downloadboot failure (%d)!\n",
2705                             ioc->name, ret);
2706                 }
2707         }
2708 
2709         /*
2710          * Put the controller into ready state (if its not already)
2711          */
2712         if (mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_READY) {
2713                 if (!SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET,
2714                     CAN_SLEEP)) {
2715                         if (mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_READY)
2716                                 printk(MYIOC_s_ERR_FMT "%s:  IOC msg unit "
2717                                     "reset failed to put ioc in ready state!\n",
2718                                     ioc->name, __func__);
2719                 } else
2720                         printk(MYIOC_s_ERR_FMT "%s:  IOC msg unit reset "
2721                             "failed!\n", ioc->name, __func__);
2722         }
2723 
2724 
2725         /* Disable adapter interrupts! */
2726         synchronize_irq(ioc->pcidev->irq);
2727         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2728         ioc->active = 0;
2729 
2730         /* Clear any lingering interrupt */
2731         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2732         CHIPREG_READ32(&ioc->chip->IntStatus);
2733 
2734         if (ioc->alloc != NULL) {
2735                 sz = ioc->alloc_sz;
2736                 dexitprintk(ioc, printk(MYIOC_s_INFO_FMT "free  @ %p, sz=%d bytes\n",
2737                     ioc->name, ioc->alloc, ioc->alloc_sz));
2738                 pci_free_consistent(ioc->pcidev, sz,
2739                                 ioc->alloc, ioc->alloc_dma);
2740                 ioc->reply_frames = NULL;
2741                 ioc->req_frames = NULL;
2742                 ioc->alloc = NULL;
2743                 ioc->alloc_total -= sz;
2744         }
2745 
2746         if (ioc->sense_buf_pool != NULL) {
2747                 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
2748                 pci_free_consistent(ioc->pcidev, sz,
2749                                 ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
2750                 ioc->sense_buf_pool = NULL;
2751                 ioc->alloc_total -= sz;
2752         }
2753 
2754         if (ioc->events != NULL){
2755                 sz = MPTCTL_EVENT_LOG_SIZE * sizeof(MPT_IOCTL_EVENTS);
2756                 kfree(ioc->events);
2757                 ioc->events = NULL;
2758                 ioc->alloc_total -= sz;
2759         }
2760 
2761         mpt_free_fw_memory(ioc);
2762 
2763         kfree(ioc->spi_data.nvram);
2764         mpt_inactive_raid_list_free(ioc);
2765         kfree(ioc->raid_data.pIocPg2);
2766         kfree(ioc->raid_data.pIocPg3);
2767         ioc->spi_data.nvram = NULL;
2768         ioc->raid_data.pIocPg3 = NULL;
2769 
2770         if (ioc->spi_data.pIocPg4 != NULL) {
2771                 sz = ioc->spi_data.IocPg4Sz;
2772                 pci_free_consistent(ioc->pcidev, sz,
2773                         ioc->spi_data.pIocPg4,
2774                         ioc->spi_data.IocPg4_dma);
2775                 ioc->spi_data.pIocPg4 = NULL;
2776                 ioc->alloc_total -= sz;
2777         }
2778 
2779         if (ioc->ReqToChain != NULL) {
2780                 kfree(ioc->ReqToChain);
2781                 kfree(ioc->RequestNB);
2782                 ioc->ReqToChain = NULL;
2783         }
2784 
2785         kfree(ioc->ChainToChain);
2786         ioc->ChainToChain = NULL;
2787 
2788         if (ioc->HostPageBuffer != NULL) {
2789                 if((ret = mpt_host_page_access_control(ioc,
2790                     MPI_DB_HPBAC_FREE_BUFFER, NO_SLEEP)) != 0) {
2791                         printk(MYIOC_s_ERR_FMT
2792                            ": %s: host page buffers free failed (%d)!\n",
2793                             ioc->name, __func__, ret);
2794                 }
2795                 dexitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2796                         "HostPageBuffer free  @ %p, sz=%d bytes\n",
2797                         ioc->name, ioc->HostPageBuffer,
2798                         ioc->HostPageBuffer_sz));
2799                 pci_free_consistent(ioc->pcidev, ioc->HostPageBuffer_sz,
2800                     ioc->HostPageBuffer, ioc->HostPageBuffer_dma);
2801                 ioc->HostPageBuffer = NULL;
2802                 ioc->HostPageBuffer_sz = 0;
2803                 ioc->alloc_total -= ioc->HostPageBuffer_sz;
2804         }
2805 
2806         pci_set_drvdata(ioc->pcidev, NULL);
2807 }
2808 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2809 /**
2810  *      mpt_adapter_dispose - Free all resources associated with an MPT adapter
2811  *      @ioc: Pointer to MPT adapter structure
2812  *
2813  *      This routine unregisters h/w resources and frees all alloc'd memory
2814  *      associated with a MPT adapter structure.
2815  */
2816 static void
2817 mpt_adapter_dispose(MPT_ADAPTER *ioc)
2818 {
2819         int sz_first, sz_last;
2820 
2821         if (ioc == NULL)
2822                 return;
2823 
2824         sz_first = ioc->alloc_total;
2825 
2826         mpt_adapter_disable(ioc);
2827 
2828         if (ioc->pci_irq != -1) {
2829                 free_irq(ioc->pci_irq, ioc);
2830                 if (ioc->msi_enable)
2831                         pci_disable_msi(ioc->pcidev);
2832                 ioc->pci_irq = -1;
2833         }
2834 
2835         if (ioc->memmap != NULL) {
2836                 iounmap(ioc->memmap);
2837                 ioc->memmap = NULL;
2838         }
2839 
2840         pci_disable_device(ioc->pcidev);
2841         pci_release_selected_regions(ioc->pcidev, ioc->bars);
2842 
2843         /*  Zap the adapter lookup ptr!  */
2844         list_del(&ioc->list);
2845 
2846         sz_last = ioc->alloc_total;
2847         dprintk(ioc, printk(MYIOC_s_INFO_FMT "free'd %d of %d bytes\n",
2848             ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first));
2849 
2850         if (ioc->alt_ioc)
2851                 ioc->alt_ioc->alt_ioc = NULL;
2852 
2853         kfree(ioc);
2854 }
2855 
2856 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2857 /**
2858  *      MptDisplayIocCapabilities - Disply IOC's capabilities.
2859  *      @ioc: Pointer to MPT adapter structure
2860  */
2861 static void
2862 MptDisplayIocCapabilities(MPT_ADAPTER *ioc)
2863 {
2864         int i = 0;
2865 
2866         printk(KERN_INFO "%s: ", ioc->name);
2867         if (ioc->prod_name)
2868                 pr_cont("%s: ", ioc->prod_name);
2869         pr_cont("Capabilities={");
2870 
2871         if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) {
2872                 pr_cont("Initiator");
2873                 i++;
2874         }
2875 
2876         if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2877                 pr_cont("%sTarget", i ? "," : "");
2878                 i++;
2879         }
2880 
2881         if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
2882                 pr_cont("%sLAN", i ? "," : "");
2883                 i++;
2884         }
2885 
2886 #if 0
2887         /*
2888          *  This would probably evoke more questions than it's worth
2889          */
2890         if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2891                 pr_cont("%sLogBusAddr", i ? "," : "");
2892                 i++;
2893         }
2894 #endif
2895 
2896         pr_cont("}\n");
2897 }
2898 
2899 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2900 /**
2901  *      MakeIocReady - Get IOC to a READY state, using KickStart if needed.
2902  *      @ioc: Pointer to MPT_ADAPTER structure
2903  *      @force: Force hard KickStart of IOC
2904  *      @sleepFlag: Specifies whether the process can sleep
2905  *
2906  *      Returns:
2907  *               1 - DIAG reset and READY
2908  *               0 - READY initially OR soft reset and READY
2909  *              -1 - Any failure on KickStart
2910  *              -2 - Msg Unit Reset Failed
2911  *              -3 - IO Unit Reset Failed
2912  *              -4 - IOC owned by a PEER
2913  */
2914 static int
2915 MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag)
2916 {
2917         u32      ioc_state;
2918         int      statefault = 0;
2919         int      cntdn;
2920         int      hard_reset_done = 0;
2921         int      r;
2922         int      ii;
2923         int      whoinit;
2924 
2925         /* Get current [raw] IOC state  */
2926         ioc_state = mpt_GetIocState(ioc, 0);
2927         dhsprintk(ioc, printk(MYIOC_s_INFO_FMT "MakeIocReady [raw] state=%08x\n", ioc->name, ioc_state));
2928 
2929         /*
2930          *      Check to see if IOC got left/stuck in doorbell handshake
2931          *      grip of death.  If so, hard reset the IOC.
2932          */
2933         if (ioc_state & MPI_DOORBELL_ACTIVE) {
2934                 statefault = 1;
2935                 printk(MYIOC_s_WARN_FMT "Unexpected doorbell active!\n",
2936                                 ioc->name);
2937         }
2938 
2939         /* Is it already READY? */
2940         if (!statefault &&
2941             ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_READY)) {
2942                 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2943                     "IOC is in READY state\n", ioc->name));
2944                 return 0;
2945         }
2946 
2947         /*
2948          *      Check to see if IOC is in FAULT state.
2949          */
2950         if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
2951                 statefault = 2;
2952                 printk(MYIOC_s_WARN_FMT "IOC is in FAULT state!!!\n",
2953                     ioc->name);
2954                 printk(MYIOC_s_WARN_FMT "           FAULT code = %04xh\n",
2955                     ioc->name, ioc_state & MPI_DOORBELL_DATA_MASK);
2956         }
2957 
2958         /*
2959          *      Hmmm...  Did it get left operational?
2960          */
2961         if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_OPERATIONAL) {
2962                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOC operational unexpected\n",
2963                                 ioc->name));
2964 
2965                 /* Check WhoInit.
2966                  * If PCI Peer, exit.
2967                  * Else, if no fault conditions are present, issue a MessageUnitReset
2968                  * Else, fall through to KickStart case
2969                  */
2970                 whoinit = (ioc_state & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT;
2971                 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2972                         "whoinit 0x%x statefault %d force %d\n",
2973                         ioc->name, whoinit, statefault, force));
2974                 if (whoinit == MPI_WHOINIT_PCI_PEER)
2975                         return -4;
2976                 else {
2977                         if ((statefault == 0 ) && (force == 0)) {
2978                                 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) == 0)
2979                                         return 0;
2980                         }
2981                         statefault = 3;
2982                 }
2983         }
2984 
2985         hard_reset_done = KickStart(ioc, statefault||force, sleepFlag);
2986         if (hard_reset_done < 0)
2987                 return -1;
2988 
2989         /*
2990          *  Loop here waiting for IOC to come READY.
2991          */
2992         ii = 0;
2993         cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 5;     /* 5 seconds */
2994 
2995         while ((ioc_state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
2996                 if (ioc_state == MPI_IOC_STATE_OPERATIONAL) {
2997                         /*
2998                          *  BIOS or previous driver load left IOC in OP state.
2999                          *  Reset messaging FIFOs.
3000                          */
3001                         if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) != 0) {
3002                                 printk(MYIOC_s_ERR_FMT "IOC msg unit reset failed!\n", ioc->name);
3003                                 return -2;
3004                         }
3005                 } else if (ioc_state == MPI_IOC_STATE_RESET) {
3006                         /*
3007                          *  Something is wrong.  Try to get IOC back
3008                          *  to a known state.
3009                          */
3010                         if ((r = SendIocReset(ioc, MPI_FUNCTION_IO_UNIT_RESET, sleepFlag)) != 0) {
3011                                 printk(MYIOC_s_ERR_FMT "IO unit reset failed!\n", ioc->name);
3012                                 return -3;
3013                         }
3014                 }
3015 
3016                 ii++; cntdn--;
3017                 if (!cntdn) {
3018                         printk(MYIOC_s_ERR_FMT
3019                                 "Wait IOC_READY state (0x%x) timeout(%d)!\n",
3020                                 ioc->name, ioc_state, (int)((ii+5)/HZ));
3021                         return -ETIME;
3022                 }
3023 
3024                 if (sleepFlag == CAN_SLEEP) {
3025                         msleep(1);
3026                 } else {
3027                         mdelay (1);     /* 1 msec delay */
3028                 }
3029 
3030         }
3031 
3032         if (statefault < 3) {
3033                 printk(MYIOC_s_INFO_FMT "Recovered from %s\n", ioc->name,
3034                         statefault == 1 ? "stuck handshake" : "IOC FAULT");
3035         }
3036 
3037         return hard_reset_done;
3038 }
3039 
3040 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3041 /**
3042  *      mpt_GetIocState - Get the current state of a MPT adapter.
3043  *      @ioc: Pointer to MPT_ADAPTER structure
3044  *      @cooked: Request raw or cooked IOC state
3045  *
3046  *      Returns all IOC Doorbell register bits if cooked==0, else just the
3047  *      Doorbell bits in MPI_IOC_STATE_MASK.
3048  */
3049 u32
3050 mpt_GetIocState(MPT_ADAPTER *ioc, int cooked)
3051 {
3052         u32 s, sc;
3053 
3054         /*  Get!  */
3055         s = CHIPREG_READ32(&ioc->chip->Doorbell);
3056         sc = s & MPI_IOC_STATE_MASK;
3057 
3058         /*  Save!  */
3059         ioc->last_state = sc;
3060 
3061         return cooked ? sc : s;
3062 }
3063 
3064 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3065 /**
3066  *      GetIocFacts - Send IOCFacts request to MPT adapter.
3067  *      @ioc: Pointer to MPT_ADAPTER structure
3068  *      @sleepFlag: Specifies whether the process can sleep
3069  *      @reason: If recovery, only update facts.
3070  *
3071  *      Returns 0 for success, non-zero for failure.
3072  */
3073 static int
3074 GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason)
3075 {
3076         IOCFacts_t               get_facts;
3077         IOCFactsReply_t         *facts;
3078         int                      r;
3079         int                      req_sz;
3080         int                      reply_sz;
3081         int                      sz;
3082         u32                      status, vv;
3083         u8                       shiftFactor=1;
3084 
3085         /* IOC *must* NOT be in RESET state! */
3086         if (ioc->last_state == MPI_IOC_STATE_RESET) {
3087                 printk(KERN_ERR MYNAM
3088                     ": ERROR - Can't get IOCFacts, %s NOT READY! (%08x)\n",
3089                     ioc->name, ioc->last_state);
3090                 return -44;
3091         }
3092 
3093         facts = &ioc->facts;
3094 
3095         /* Destination (reply area)... */
3096         reply_sz = sizeof(*facts);
3097         memset(facts, 0, reply_sz);
3098 
3099         /* Request area (get_facts on the stack right now!) */
3100         req_sz = sizeof(get_facts);
3101         memset(&get_facts, 0, req_sz);
3102 
3103         get_facts.Function = MPI_FUNCTION_IOC_FACTS;
3104         /* Assert: All other get_facts fields are zero! */
3105 
3106         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3107             "Sending get IocFacts request req_sz=%d reply_sz=%d\n",
3108             ioc->name, req_sz, reply_sz));
3109 
3110         /* No non-zero fields in the get_facts request are greater than
3111          * 1 byte in size, so we can just fire it off as is.
3112          */
3113         r = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_facts,
3114                         reply_sz, (u16*)facts, 5 /*seconds*/, sleepFlag);
3115         if (r != 0)
3116                 return r;
3117 
3118         /*
3119          * Now byte swap (GRRR) the necessary fields before any further
3120          * inspection of reply contents.
3121          *
3122          * But need to do some sanity checks on MsgLength (byte) field
3123          * to make sure we don't zero IOC's req_sz!
3124          */
3125         /* Did we get a valid reply? */
3126         if (facts->MsgLength > offsetof(IOCFactsReply_t, RequestFrameSize)/sizeof(u32)) {
3127                 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
3128                         /*
3129                          * If not been here, done that, save off first WhoInit value
3130                          */
3131                         if (ioc->FirstWhoInit == WHOINIT_UNKNOWN)
3132                                 ioc->FirstWhoInit = facts->WhoInit;
3133                 }
3134 
3135                 facts->MsgVersion = le16_to_cpu(facts->MsgVersion);
3136                 facts->MsgContext = le32_to_cpu(facts->MsgContext);
3137                 facts->IOCExceptions = le16_to_cpu(facts->IOCExceptions);
3138                 facts->IOCStatus = le16_to_cpu(facts->IOCStatus);
3139                 facts->IOCLogInfo = le32_to_cpu(facts->IOCLogInfo);
3140                 status = le16_to_cpu(facts->IOCStatus) & MPI_IOCSTATUS_MASK;
3141                 /* CHECKME! IOCStatus, IOCLogInfo */
3142 
3143                 facts->ReplyQueueDepth = le16_to_cpu(facts->ReplyQueueDepth);
3144                 facts->RequestFrameSize = le16_to_cpu(facts->RequestFrameSize);
3145 
3146                 /*
3147                  * FC f/w version changed between 1.1 and 1.2
3148                  *      Old: u16{Major(4),Minor(4),SubMinor(8)}
3149                  *      New: u32{Major(8),Minor(8),Unit(8),Dev(8)}
3150                  */
3151                 if (facts->MsgVersion < MPI_VERSION_01_02) {
3152                         /*
3153                          *      Handle old FC f/w style, convert to new...
3154                          */
3155                         u16      oldv = le16_to_cpu(facts->Reserved_0101_FWVersion);
3156                         facts->FWVersion.Word =
3157                                         ((oldv<<12) & 0xFF000000) |
3158                                         ((oldv<<8)  & 0x000FFF00);
3159                 } else
3160                         facts->FWVersion.Word = le32_to_cpu(facts->FWVersion.Word);
3161 
3162                 facts->ProductID = le16_to_cpu(facts->ProductID);
3163 
3164                 if ((ioc->facts.ProductID & MPI_FW_HEADER_PID_PROD_MASK)
3165                     > MPI_FW_HEADER_PID_PROD_TARGET_SCSI)
3166                         ioc->ir_firmware = 1;
3167 
3168                 facts->CurrentHostMfaHighAddr =
3169                                 le32_to_cpu(facts->CurrentHostMfaHighAddr);
3170                 facts->GlobalCredits = le16_to_cpu(facts->GlobalCredits);
3171                 facts->CurrentSenseBufferHighAddr =
3172                                 le32_to_cpu(facts->CurrentSenseBufferHighAddr);
3173                 facts->CurReplyFrameSize =
3174                                 le16_to_cpu(facts->CurReplyFrameSize);
3175                 facts->IOCCapabilities = le32_to_cpu(facts->IOCCapabilities);
3176 
3177                 /*
3178                  * Handle NEW (!) IOCFactsReply fields in MPI-1.01.xx
3179                  * Older MPI-1.00.xx struct had 13 dwords, and enlarged
3180                  * to 14 in MPI-1.01.0x.
3181                  */
3182                 if (facts->MsgLength >= (offsetof(IOCFactsReply_t,FWImageSize) + 7)/4 &&
3183                     facts->MsgVersion > MPI_VERSION_01_00) {
3184                         facts->FWImageSize = le32_to_cpu(facts->FWImageSize);
3185                 }
3186 
3187                 facts->FWImageSize = ALIGN(facts->FWImageSize, 4);
3188 
3189                 if (!facts->RequestFrameSize) {
3190                         /*  Something is wrong!  */
3191                         printk(MYIOC_s_ERR_FMT "IOC reported invalid 0 request size!\n",
3192                                         ioc->name);
3193                         return -55;
3194                 }
3195 
3196                 r = sz = facts->BlockSize;
3197                 vv = ((63 / (sz * 4)) + 1) & 0x03;
3198                 ioc->NB_for_64_byte_frame = vv;
3199                 while ( sz )
3200                 {
3201                         shiftFactor++;
3202                         sz = sz >> 1;
3203                 }
3204                 ioc->NBShiftFactor  = shiftFactor;
3205                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3206                     "NB_for_64_byte_frame=%x NBShiftFactor=%x BlockSize=%x\n",
3207                     ioc->name, vv, shiftFactor, r));
3208 
3209                 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
3210                         /*
3211                          * Set values for this IOC's request & reply frame sizes,
3212                          * and request & reply queue depths...
3213                          */
3214                         ioc->req_sz = min(MPT_DEFAULT_FRAME_SIZE, facts->RequestFrameSize * 4);
3215                         ioc->req_depth = min_t(int, MPT_MAX_REQ_DEPTH, facts->GlobalCredits);
3216                         ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
3217                         ioc->reply_depth = min_t(int, MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth);
3218 
3219                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "reply_sz=%3d, reply_depth=%4d\n",
3220                                 ioc->name, ioc->reply_sz, ioc->reply_depth));
3221                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "req_sz  =%3d, req_depth  =%4d\n",
3222                                 ioc->name, ioc->req_sz, ioc->req_depth));
3223 
3224                         /* Get port facts! */
3225                         if ( (r = GetPortFacts(ioc, 0, sleepFlag)) != 0 )
3226                                 return r;
3227                 }
3228         } else {
3229                 printk(MYIOC_s_ERR_FMT
3230                      "Invalid IOC facts reply, msgLength=%d offsetof=%zd!\n",
3231                      ioc->name, facts->MsgLength, (offsetof(IOCFactsReply_t,
3232                      RequestFrameSize)/sizeof(u32)));
3233                 return -66;
3234         }
3235 
3236         return 0;
3237 }
3238 
3239 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3240 /**
3241  *      GetPortFacts - Send PortFacts request to MPT adapter.
3242  *      @ioc: Pointer to MPT_ADAPTER structure
3243  *      @portnum: Port number
3244  *      @sleepFlag: Specifies whether the process can sleep
3245  *
3246  *      Returns 0 for success, non-zero for failure.
3247  */
3248 static int
3249 GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
3250 {
3251         PortFacts_t              get_pfacts;
3252         PortFactsReply_t        *pfacts;
3253         int                      ii;
3254         int                      req_sz;
3255         int                      reply_sz;
3256         int                      max_id;
3257 
3258         /* IOC *must* NOT be in RESET state! */
3259         if (ioc->last_state == MPI_IOC_STATE_RESET) {
3260                 printk(MYIOC_s_ERR_FMT "Can't get PortFacts NOT READY! (%08x)\n",
3261                     ioc->name, ioc->last_state );
3262                 return -4;
3263         }
3264 
3265         pfacts = &ioc->pfacts[portnum];
3266 
3267         /* Destination (reply area)...  */
3268         reply_sz = sizeof(*pfacts);
3269         memset(pfacts, 0, reply_sz);
3270 
3271         /* Request area (get_pfacts on the stack right now!) */
3272         req_sz = sizeof(get_pfacts);
3273         memset(&get_pfacts, 0, req_sz);
3274 
3275         get_pfacts.Function = MPI_FUNCTION_PORT_FACTS;
3276         get_pfacts.PortNumber = portnum;
3277         /* Assert: All other get_pfacts fields are zero! */
3278 
3279         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending get PortFacts(%d) request\n",
3280                         ioc->name, portnum));
3281 
3282         /* No non-zero fields in the get_pfacts request are greater than
3283          * 1 byte in size, so we can just fire it off as is.
3284          */
3285         ii = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_pfacts,
3286                                 reply_sz, (u16*)pfacts, 5 /*seconds*/, sleepFlag);
3287         if (ii != 0)
3288                 return ii;
3289 
3290         /* Did we get a valid reply? */
3291 
3292         /* Now byte swap the necessary fields in the response. */
3293         pfacts->MsgContext = le32_to_cpu(pfacts->MsgContext);
3294         pfacts->IOCStatus = le16_to_cpu(pfacts->IOCStatus);
3295         pfacts->IOCLogInfo = le32_to_cpu(pfacts->IOCLogInfo);
3296         pfacts->MaxDevices = le16_to_cpu(pfacts->MaxDevices);
3297         pfacts->PortSCSIID = le16_to_cpu(pfacts->PortSCSIID);
3298         pfacts->ProtocolFlags = le16_to_cpu(pfacts->ProtocolFlags);
3299         pfacts->MaxPostedCmdBuffers = le16_to_cpu(pfacts->MaxPostedCmdBuffers);
3300         pfacts->MaxPersistentIDs = le16_to_cpu(pfacts->MaxPersistentIDs);
3301         pfacts->MaxLanBuckets = le16_to_cpu(pfacts->MaxLanBuckets);
3302 
3303         max_id = (ioc->bus_type == SAS) ? pfacts->PortSCSIID :
3304             pfacts->MaxDevices;
3305         ioc->devices_per_bus = (max_id > 255) ? 256 : max_id;
3306         ioc->number_of_buses = (ioc->devices_per_bus < 256) ? 1 : max_id/256;
3307 
3308         /*
3309          * Place all the devices on channels
3310          *
3311          * (for debuging)
3312          */
3313         if (mpt_channel_mapping) {
3314                 ioc->devices_per_bus = 1;
3315                 ioc->number_of_buses = (max_id > 255) ? 255 : max_id;
3316         }
3317 
3318         return 0;
3319 }
3320 
3321 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3322 /**
3323  *      SendIocInit - Send IOCInit request to MPT adapter.
3324  *      @ioc: Pointer to MPT_ADAPTER structure
3325  *      @sleepFlag: Specifies whether the process can sleep
3326  *
3327  *      Send IOCInit followed by PortEnable to bring IOC to OPERATIONAL state.
3328  *
3329  *      Returns 0 for success, non-zero for failure.
3330  */
3331 static int
3332 SendIocInit(MPT_ADAPTER *ioc, int sleepFlag)
3333 {
3334         IOCInit_t                ioc_init;
3335         MPIDefaultReply_t        init_reply;
3336         u32                      state;
3337         int                      r;
3338         int                      count;
3339         int                      cntdn;
3340 
3341         memset(&ioc_init, 0, sizeof(ioc_init));
3342         memset(&init_reply, 0, sizeof(init_reply));
3343 
3344         ioc_init.WhoInit = MPI_WHOINIT_HOST_DRIVER;
3345         ioc_init.Function = MPI_FUNCTION_IOC_INIT;
3346 
3347         /* If we are in a recovery mode and we uploaded the FW image,
3348          * then this pointer is not NULL. Skip the upload a second time.
3349          * Set this flag if cached_fw set for either IOC.
3350          */
3351         if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
3352                 ioc->upload_fw = 1;
3353         else
3354                 ioc->upload_fw = 0;
3355         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "upload_fw %d facts.Flags=%x\n",
3356                    ioc->name, ioc->upload_fw, ioc->facts.Flags));
3357 
3358         ioc_init.MaxDevices = (U8)ioc->devices_per_bus;
3359         ioc_init.MaxBuses = (U8)ioc->number_of_buses;
3360 
3361         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "facts.MsgVersion=%x\n",
3362                    ioc->name, ioc->facts.MsgVersion));
3363         if (ioc->facts.MsgVersion >= MPI_VERSION_01_05) {
3364                 // set MsgVersion and HeaderVersion host driver was built with
3365                 ioc_init.MsgVersion = cpu_to_le16(MPI_VERSION);
3366                 ioc_init.HeaderVersion = cpu_to_le16(MPI_HEADER_VERSION);
3367 
3368                 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT) {
3369                         ioc_init.HostPageBufferSGE = ioc->facts.HostPageBufferSGE;
3370                 } else if(mpt_host_page_alloc(ioc, &ioc_init))
3371                         return -99;
3372         }
3373         ioc_init.ReplyFrameSize = cpu_to_le16(ioc->reply_sz);   /* in BYTES */
3374 
3375         if (ioc->sg_addr_size == sizeof(u64)) {
3376                 /* Save the upper 32-bits of the request
3377                  * (reply) and sense buffers.
3378                  */
3379                 ioc_init.HostMfaHighAddr = cpu_to_le32((u32)((u64)ioc->alloc_dma >> 32));
3380                 ioc_init.SenseBufferHighAddr = cpu_to_le32((u32)((u64)ioc->sense_buf_pool_dma >> 32));
3381         } else {
3382                 /* Force 32-bit addressing */
3383                 ioc_init.HostMfaHighAddr = cpu_to_le32(0);
3384                 ioc_init.SenseBufferHighAddr = cpu_to_le32(0);
3385         }
3386 
3387         ioc->facts.CurrentHostMfaHighAddr = ioc_init.HostMfaHighAddr;
3388         ioc->facts.CurrentSenseBufferHighAddr = ioc_init.SenseBufferHighAddr;
3389         ioc->facts.MaxDevices = ioc_init.MaxDevices;
3390         ioc->facts.MaxBuses = ioc_init.MaxBuses;
3391 
3392         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOCInit (req @ %p)\n",
3393                         ioc->name, &ioc_init));
3394 
3395         r = mpt_handshake_req_reply_wait(ioc, sizeof(IOCInit_t), (u32*)&ioc_init,
3396                                 sizeof(MPIDefaultReply_t), (u16*)&init_reply, 10 /*seconds*/, sleepFlag);
3397         if (r != 0) {
3398                 printk(MYIOC_s_ERR_FMT "Sending IOCInit failed(%d)!\n",ioc->name, r);
3399                 return r;
3400         }
3401 
3402         /* No need to byte swap the multibyte fields in the reply
3403          * since we don't even look at its contents.
3404          */
3405 
3406         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending PortEnable (req @ %p)\n",
3407                         ioc->name, &ioc_init));
3408 
3409         if ((r = SendPortEnable(ioc, 0, sleepFlag)) != 0) {
3410                 printk(MYIOC_s_ERR_FMT "Sending PortEnable failed(%d)!\n",ioc->name, r);
3411                 return r;
3412         }
3413 
3414         /* YIKES!  SUPER IMPORTANT!!!
3415          *  Poll IocState until _OPERATIONAL while IOC is doing
3416          *  LoopInit and TargetDiscovery!
3417          */
3418         count = 0;
3419         cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 60;    /* 60 seconds */
3420         state = mpt_GetIocState(ioc, 1);
3421         while (state != MPI_IOC_STATE_OPERATIONAL && --cntdn) {
3422                 if (sleepFlag == CAN_SLEEP) {
3423                         msleep(1);
3424                 } else {
3425                         mdelay(1);
3426                 }
3427 
3428                 if (!cntdn) {
3429                         printk(MYIOC_s_ERR_FMT "Wait IOC_OP state timeout(%d)!\n",
3430                                         ioc->name, (int)((count+5)/HZ));
3431                         return -9;
3432                 }
3433 
3434                 state = mpt_GetIocState(ioc, 1);
3435                 count++;
3436         }
3437         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Wait IOC_OPERATIONAL state (cnt=%d)\n",
3438                         ioc->name, count));
3439 
3440         ioc->aen_event_read_flag=0;
3441         return r;
3442 }
3443 
3444 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3445 /**
3446  *      SendPortEnable - Send PortEnable request to MPT adapter port.
3447  *      @ioc: Pointer to MPT_ADAPTER structure
3448  *      @portnum: Port number to enable
3449  *      @sleepFlag: Specifies whether the process can sleep
3450  *
3451  *      Send PortEnable to bring IOC to OPERATIONAL state.
3452  *
3453  *      Returns 0 for success, non-zero for failure.
3454  */
3455 static int
3456 SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
3457 {
3458         PortEnable_t             port_enable;
3459         MPIDefaultReply_t        reply_buf;
3460         int      rc;
3461         int      req_sz;
3462         int      reply_sz;
3463 
3464         /*  Destination...  */
3465         reply_sz = sizeof(MPIDefaultReply_t);
3466         memset(&reply_buf, 0, reply_sz);
3467 
3468         req_sz = sizeof(PortEnable_t);
3469         memset(&port_enable, 0, req_sz);
3470 
3471         port_enable.Function = MPI_FUNCTION_PORT_ENABLE;
3472         port_enable.PortNumber = portnum;
3473 /*      port_enable.ChainOffset = 0;            */
3474 /*      port_enable.MsgFlags = 0;               */
3475 /*      port_enable.MsgContext = 0;             */
3476 
3477         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending Port(%d)Enable (req @ %p)\n",
3478                         ioc->name, portnum, &port_enable));
3479 
3480         /* RAID FW may take a long time to enable
3481          */
3482         if (ioc->ir_firmware || ioc->bus_type == SAS) {
3483                 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3484                 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
3485                 300 /*seconds*/, sleepFlag);
3486         } else {
3487                 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3488                 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
3489                 30 /*seconds*/, sleepFlag);
3490         }
3491         return rc;
3492 }
3493 
3494 /**
3495  *      mpt_alloc_fw_memory - allocate firmware memory
3496  *      @ioc: Pointer to MPT_ADAPTER structure
3497  *      @size: total FW bytes
3498  *
3499  *      If memory has already been allocated, the same (cached) value
3500  *      is returned.
3501  *
3502  *      Return 0 if successful, or non-zero for failure
3503  **/
3504 int
3505 mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size)
3506 {
3507         int rc;
3508 
3509         if (ioc->cached_fw) {
3510                 rc = 0;  /* use already allocated memory */
3511                 goto out;
3512         }
3513         else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
3514                 ioc->cached_fw = ioc->alt_ioc->cached_fw;  /* use alt_ioc's memory */
3515                 ioc->cached_fw_dma = ioc->alt_ioc->cached_fw_dma;
3516                 rc = 0;
3517                 goto out;
3518         }
3519         ioc->cached_fw = pci_alloc_consistent(ioc->pcidev, size, &ioc->cached_fw_dma);
3520         if (!ioc->cached_fw) {
3521                 printk(MYIOC_s_ERR_FMT "Unable to allocate memory for the cached firmware image!\n",
3522                     ioc->name);
3523                 rc = -1;
3524         } else {
3525                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "FW Image  @ %p[%p], sz=%d[%x] bytes\n",
3526                     ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, size, size));
3527                 ioc->alloc_total += size;
3528                 rc = 0;
3529         }
3530  out:
3531         return rc;
3532 }
3533 
3534 /**
3535  *      mpt_free_fw_memory - free firmware memory
3536  *      @ioc: Pointer to MPT_ADAPTER structure
3537  *
3538  *      If alt_img is NULL, delete from ioc structure.
3539  *      Else, delete a secondary image in same format.
3540  **/
3541 void
3542 mpt_free_fw_memory(MPT_ADAPTER *ioc)
3543 {
3544         int sz;
3545 
3546         if (!ioc->cached_fw)
3547                 return;
3548 
3549         sz = ioc->facts.FWImageSize;
3550         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "free_fw_memory: FW Image  @ %p[%p], sz=%d[%x] bytes\n",
3551                  ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3552         pci_free_consistent(ioc->pcidev, sz, ioc->cached_fw, ioc->cached_fw_dma);
3553         ioc->alloc_total -= sz;
3554         ioc->cached_fw = NULL;
3555 }
3556 
3557 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3558 /**
3559  *      mpt_do_upload - Construct and Send FWUpload request to MPT adapter port.
3560  *      @ioc: Pointer to MPT_ADAPTER structure
3561  *      @sleepFlag: Specifies whether the process can sleep
3562  *
3563  *      Returns 0 for success, >0 for handshake failure
3564  *              <0 for fw upload failure.
3565  *
3566  *      Remark: If bound IOC and a successful FWUpload was performed
3567  *      on the bound IOC, the second image is discarded
3568  *      and memory is free'd. Both channels must upload to prevent
3569  *      IOC from running in degraded mode.
3570  */
3571 static int
3572 mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag)
3573 {
3574         u8                       reply[sizeof(FWUploadReply_t)];
3575         FWUpload_t              *prequest;
3576         FWUploadReply_t         *preply;
3577         FWUploadTCSGE_t         *ptcsge;
3578         u32                      flagsLength;
3579         int                      ii, sz, reply_sz;
3580         int                      cmdStatus;
3581         int                     request_size;
3582         /* If the image size is 0, we are done.
3583          */
3584         if ((sz = ioc->facts.FWImageSize) == 0)
3585                 return 0;
3586 
3587         if (mpt_alloc_fw_memory(ioc, ioc->facts.FWImageSize) != 0)
3588                 return -ENOMEM;
3589 
3590         dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": FW Image  @ %p[%p], sz=%d[%x] bytes\n",
3591             ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3592 
3593         prequest = (sleepFlag == NO_SLEEP) ? kzalloc(ioc->req_sz, GFP_ATOMIC) :
3594             kzalloc(ioc->req_sz, GFP_KERNEL);
3595         if (!prequest) {
3596                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "fw upload failed "
3597                     "while allocating memory \n", ioc->name));
3598                 mpt_free_fw_memory(ioc);
3599                 return -ENOMEM;
3600         }
3601 
3602         preply = (FWUploadReply_t *)&reply;
3603 
3604         reply_sz = sizeof(reply);
3605         memset(preply, 0, reply_sz);
3606 
3607         prequest->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM;
3608         prequest->Function = MPI_FUNCTION_FW_UPLOAD;
3609 
3610         ptcsge = (FWUploadTCSGE_t *) &prequest->SGL;
3611         ptcsge->DetailsLength = 12;
3612         ptcsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT;
3613         ptcsge->ImageSize = cpu_to_le32(sz);
3614         ptcsge++;
3615 
3616         flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ | sz;
3617         ioc->add_sge((char *)ptcsge, flagsLength, ioc->cached_fw_dma);
3618         request_size = offsetof(FWUpload_t, SGL) + sizeof(FWUploadTCSGE_t) +
3619             ioc->SGE_size;
3620         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending FW Upload "
3621             " (req @ %p) fw_size=%d mf_request_size=%d\n", ioc->name, prequest,
3622             ioc->facts.FWImageSize, request_size));
3623         DBG_DUMP_FW_REQUEST_FRAME(ioc, (u32 *)prequest);
3624 
3625         ii = mpt_handshake_req_reply_wait(ioc, request_size, (u32 *)prequest,
3626             reply_sz, (u16 *)preply, 65 /*seconds*/, sleepFlag);
3627 
3628         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "FW Upload completed "
3629             "rc=%x \n", ioc->name, ii));
3630 
3631         cmdStatus = -EFAULT;
3632         if (ii == 0) {
3633                 /* Handshake transfer was complete and successful.
3634                  * Check the Reply Frame.
3635                  */
3636                 int status;
3637                 status = le16_to_cpu(preply->IOCStatus) &
3638                                 MPI_IOCSTATUS_MASK;
3639                 if (status == MPI_IOCSTATUS_SUCCESS &&
3640                     ioc->facts.FWImageSize ==
3641                     le32_to_cpu(preply->ActualImageSize))
3642                                 cmdStatus = 0;
3643         }
3644         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT ": do_upload cmdStatus=%d \n",
3645                         ioc->name, cmdStatus));
3646 
3647 
3648         if (cmdStatus) {
3649                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "fw upload failed, "
3650                     "freeing image \n", ioc->name));
3651                 mpt_free_fw_memory(ioc);
3652         }
3653         kfree(prequest);
3654 
3655         return cmdStatus;
3656 }
3657 
3658 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3659 /**
3660  *      mpt_downloadboot - DownloadBoot code
3661  *      @ioc: Pointer to MPT_ADAPTER structure
3662  *      @pFwHeader: Pointer to firmware header info
3663  *      @sleepFlag: Specifies whether the process can sleep
3664  *
3665  *      FwDownloadBoot requires Programmed IO access.
3666  *
3667  *      Returns 0 for success
3668  *              -1 FW Image size is 0
3669  *              -2 No valid cached_fw Pointer
3670  *              <0 for fw upload failure.
3671  */
3672 static int
3673 mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag)
3674 {
3675         MpiExtImageHeader_t     *pExtImage;
3676         u32                      fwSize;
3677         u32                      diag0val;
3678         int                      count;
3679         u32                     *ptrFw;
3680         u32                      diagRwData;
3681         u32                      nextImage;
3682         u32                      load_addr;
3683         u32                      ioc_state=0;
3684 
3685         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot: fw size 0x%x (%d), FW Ptr %p\n",
3686                                 ioc->name, pFwHeader->ImageSize, pFwHeader->ImageSize, pFwHeader));
3687 
3688         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3689         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3690         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3691         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3692         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3693         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3694 
3695         CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM));
3696 
3697         /* wait 1 msec */
3698         if (sleepFlag == CAN_SLEEP) {
3699                 msleep(1);
3700         } else {
3701                 mdelay (1);
3702         }
3703 
3704         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3705         CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
3706 
3707         for (count = 0; count < 30; count ++) {
3708                 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3709                 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
3710                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RESET_ADAPTER cleared, count=%d\n",
3711                                 ioc->name, count));
3712                         break;
3713                 }
3714                 /* wait .1 sec */
3715                 if (sleepFlag == CAN_SLEEP) {
3716                         msleep (100);
3717                 } else {
3718                         mdelay (100);
3719                 }
3720         }
3721 
3722         if ( count == 30 ) {
3723                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot failed! "
3724                 "Unable to get MPI_DIAG_DRWE mode, diag0val=%x\n",
3725                 ioc->name, diag0val));
3726                 return -3;
3727         }
3728 
3729         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3730         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3731         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3732         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3733         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3734         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3735 
3736         /* Set the DiagRwEn and Disable ARM bits */
3737         CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_RW_ENABLE | MPI_DIAG_DISABLE_ARM));
3738 
3739         fwSize = (pFwHeader->ImageSize + 3)/4;
3740         ptrFw = (u32 *) pFwHeader;
3741 
3742         /* Write the LoadStartAddress to the DiagRw Address Register
3743          * using Programmed IO
3744          */
3745         if (ioc->errata_flag_1064)
3746                 pci_enable_io_access(ioc->pcidev);
3747 
3748         CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->LoadStartAddress);
3749         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "LoadStart addr written 0x%x \n",
3750                 ioc->name, pFwHeader->LoadStartAddress));
3751 
3752         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write FW Image: 0x%x bytes @ %p\n",
3753                                 ioc->name, fwSize*4, ptrFw));
3754         while (fwSize--) {
3755                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3756         }
3757 
3758         nextImage = pFwHeader->NextImageHeaderOffset;
3759         while (nextImage) {
3760                 pExtImage = (MpiExtImageHeader_t *) ((char *)pFwHeader + nextImage);
3761 
3762                 load_addr = pExtImage->LoadStartAddress;
3763 
3764                 fwSize = (pExtImage->ImageSize + 3) >> 2;
3765                 ptrFw = (u32 *)pExtImage;
3766 
3767                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write Ext Image: 0x%x (%d) bytes @ %p load_addr=%x\n",
3768                                                 ioc->name, fwSize*4, fwSize*4, ptrFw, load_addr));
3769                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, load_addr);
3770 
3771                 while (fwSize--) {
3772                         CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3773                 }
3774                 nextImage = pExtImage->NextImageHeaderOffset;
3775         }
3776 
3777         /* Write the IopResetVectorRegAddr */
3778         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Addr=%x! \n", ioc->name,  pFwHeader->IopResetRegAddr));
3779         CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->IopResetRegAddr);
3780 
3781         /* Write the IopResetVectorValue */
3782         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Value=%x! \n", ioc->name, pFwHeader->IopResetVectorValue));
3783         CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, pFwHeader->IopResetVectorValue);
3784 
3785         /* Clear the internal flash bad bit - autoincrementing register,
3786          * so must do two writes.
3787          */
3788         if (ioc->bus_type == SPI) {
3789                 /*
3790                  * 1030 and 1035 H/W errata, workaround to access
3791                  * the ClearFlashBadSignatureBit
3792                  */
3793                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3794                 diagRwData = CHIPREG_PIO_READ32(&ioc->pio_chip->DiagRwData);
3795                 diagRwData |= 0x40000000;
3796                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3797                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, diagRwData);
3798 
3799         } else /* if((ioc->bus_type == SAS) || (ioc->bus_type == FC)) */ {
3800                 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3801                 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val |
3802                     MPI_DIAG_CLEAR_FLASH_BAD_SIG);
3803 
3804                 /* wait 1 msec */
3805                 if (sleepFlag == CAN_SLEEP) {
3806                         msleep (1);
3807                 } else {
3808                         mdelay (1);
3809                 }
3810         }
3811 
3812         if (ioc->errata_flag_1064)
3813                 pci_disable_io_access(ioc->pcidev);
3814 
3815         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3816         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot diag0val=%x, "
3817                 "turning off PREVENT_IOC_BOOT, DISABLE_ARM, RW_ENABLE\n",
3818                 ioc->name, diag0val));
3819         diag0val &= ~(MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM | MPI_DIAG_RW_ENABLE);
3820         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot now diag0val=%x\n",
3821                 ioc->name, diag0val));
3822         CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
3823 
3824         /* Write 0xFF to reset the sequencer */
3825         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3826 
3827         if (ioc->bus_type == SAS) {
3828                 ioc_state = mpt_GetIocState(ioc, 0);
3829                 if ( (GetIocFacts(ioc, sleepFlag,
3830                                 MPT_HOSTEVENT_IOC_BRINGUP)) != 0 ) {
3831                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "GetIocFacts failed: IocState=%x\n",
3832                                         ioc->name, ioc_state));
3833                         return -EFAULT;
3834                 }
3835         }
3836 
3837         for (count=0; count<HZ*20; count++) {
3838                 if ((ioc_state = mpt_GetIocState(ioc, 0)) & MPI_IOC_STATE_READY) {
3839                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3840                                 "downloadboot successful! (count=%d) IocState=%x\n",
3841                                 ioc->name, count, ioc_state));
3842                         if (ioc->bus_type == SAS) {
3843                                 return 0;
3844                         }
3845                         if ((SendIocInit(ioc, sleepFlag)) != 0) {
3846                                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3847                                         "downloadboot: SendIocInit failed\n",
3848                                         ioc->name));
3849                                 return -EFAULT;
3850                         }
3851                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3852                                         "downloadboot: SendIocInit successful\n",
3853                                         ioc->name));
3854                         return 0;
3855                 }
3856                 if (sleepFlag == CAN_SLEEP) {
3857                         msleep (10);
3858                 } else {
3859                         mdelay (10);
3860                 }
3861         }
3862         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3863                 "downloadboot failed! IocState=%x\n",ioc->name, ioc_state));
3864         return -EFAULT;
3865 }
3866 
3867 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3868 /**
3869  *      KickStart - Perform hard reset of MPT adapter.
3870  *      @ioc: Pointer to MPT_ADAPTER structure
3871  *      @force: Force hard reset
3872  *      @sleepFlag: Specifies whether the process can sleep
3873  *
3874  *      This routine places MPT adapter in diagnostic mode via the
3875  *      WriteSequence register, and then performs a hard reset of adapter
3876  *      via the Diagnostic register.
3877  *
3878  *      Inputs:   sleepflag - CAN_SLEEP (non-interrupt thread)
3879  *                      or NO_SLEEP (interrupt thread, use mdelay)
3880  *                force - 1 if doorbell active, board fault state
3881  *                              board operational, IOC_RECOVERY or
3882  *                              IOC_BRINGUP and there is an alt_ioc.
3883  *                        0 else
3884  *
3885  *      Returns:
3886  *               1 - hard reset, READY
3887  *               0 - no reset due to History bit, READY
3888  *              -1 - no reset due to History bit but not READY
3889  *                   OR reset but failed to come READY
3890  *              -2 - no reset, could not enter DIAG mode
3891  *              -3 - reset but bad FW bit
3892  */
3893 static int
3894 KickStart(MPT_ADAPTER *ioc, int force, int sleepFlag)
3895 {
3896         int hard_reset_done = 0;
3897         u32 ioc_state=0;
3898         int cnt,cntdn;
3899 
3900         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStarting!\n", ioc->name));
3901         if (ioc->bus_type == SPI) {
3902                 /* Always issue a Msg Unit Reset first. This will clear some
3903                  * SCSI bus hang conditions.
3904                  */
3905                 SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
3906 
3907                 if (sleepFlag == CAN_SLEEP) {
3908                         msleep (1000);
3909                 } else {
3910                         mdelay (1000);
3911                 }
3912         }
3913 
3914         hard_reset_done = mpt_diag_reset(ioc, force, sleepFlag);
3915         if (hard_reset_done < 0)
3916                 return hard_reset_done;
3917 
3918         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset successful!\n",
3919                 ioc->name));
3920 
3921         cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 2;     /* 2 seconds */
3922         for (cnt=0; cnt<cntdn; cnt++) {
3923                 ioc_state = mpt_GetIocState(ioc, 1);
3924                 if ((ioc_state == MPI_IOC_STATE_READY) || (ioc_state == MPI_IOC_STATE_OPERATIONAL)) {
3925                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStart successful! (cnt=%d)\n",
3926                                         ioc->name, cnt));
3927                         return hard_reset_done;
3928                 }
3929                 if (sleepFlag == CAN_SLEEP) {
3930                         msleep (10);
3931                 } else {
3932                         mdelay (10);
3933                 }
3934         }
3935 
3936         dinitprintk(ioc, printk(MYIOC_s_ERR_FMT "Failed to come READY after reset! IocState=%x\n",
3937                 ioc->name, mpt_GetIocState(ioc, 0)));
3938         return -1;
3939 }
3940 
3941 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3942 /**
3943  *      mpt_diag_reset - Perform hard reset of the adapter.
3944  *      @ioc: Pointer to MPT_ADAPTER structure
3945  *      @ignore: Set if to honor and clear to ignore
3946  *              the reset history bit
3947  *      @sleepFlag: CAN_SLEEP if called in a non-interrupt thread,
3948  *              else set to NO_SLEEP (use mdelay instead)
3949  *
3950  *      This routine places the adapter in diagnostic mode via the
3951  *      WriteSequence register and then performs a hard reset of adapter
3952  *      via the Diagnostic register. Adapter should be in ready state
3953  *      upon successful completion.
3954  *
3955  *      Returns:  1  hard reset successful
3956  *                0  no reset performed because reset history bit set
3957  *               -2  enabling diagnostic mode failed
3958  *               -3  diagnostic reset failed
3959  */
3960 static int
3961 mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag)
3962 {
3963         u32 diag0val;
3964         u32 doorbell;
3965         int hard_reset_done = 0;
3966         int count = 0;
3967         u32 diag1val = 0;
3968         MpiFwHeader_t *cached_fw;       /* Pointer to FW */
3969         u8       cb_idx;
3970 
3971         /* Clear any existing interrupts */
3972         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
3973 
3974         if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078) {
3975 
3976                 if (!ignore)
3977                         return 0;
3978 
3979                 drsprintk(ioc, printk(MYIOC_s_WARN_FMT "%s: Doorbell=%p; 1078 reset "
3980                         "address=%p\n",  ioc->name, __func__,
3981                         &ioc->chip->Doorbell, &ioc->chip->Reset_1078));
3982                 CHIPREG_WRITE32(&ioc->chip->Reset_1078, 0x07);
3983                 if (sleepFlag == CAN_SLEEP)
3984                         msleep(1);
3985                 else
3986                         mdelay(1);
3987 
3988                 /*
3989                  * Call each currently registered protocol IOC reset handler
3990                  * with pre-reset indication.
3991                  * NOTE: If we're doing _IOC_BRINGUP, there can be no
3992                  * MptResetHandlers[] registered yet.
3993                  */
3994                 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
3995                         if (MptResetHandlers[cb_idx])
3996                                 (*(MptResetHandlers[cb_idx]))(ioc,
3997                                                 MPT_IOC_PRE_RESET);
3998                 }
3999 
4000                 for (count = 0; count < 60; count ++) {
4001                         doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
4002                         doorbell &= MPI_IOC_STATE_MASK;
4003 
4004                         drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4005                                 "looking for READY STATE: doorbell=%x"
4006                                 " count=%d\n",
4007                                 ioc->name, doorbell, count));
4008 
4009                         if (doorbell == MPI_IOC_STATE_READY) {
4010                                 return 1;
4011                         }
4012 
4013                         /* wait 1 sec */
4014                         if (sleepFlag == CAN_SLEEP)
4015                                 msleep(1000);
4016                         else
4017                                 mdelay(1000);
4018                 }
4019                 return -1;
4020         }
4021 
4022         /* Use "Diagnostic reset" method! (only thing available!) */
4023         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4024 
4025         if (ioc->debug_level & MPT_DEBUG) {
4026                 if (ioc->alt_ioc)
4027                         diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4028                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG1: diag0=%08x, diag1=%08x\n",
4029                         ioc->name, diag0val, diag1val));
4030         }
4031 
4032         /* Do the reset if we are told to ignore the reset history
4033          * or if the reset history is 0
4034          */
4035         if (ignore || !(diag0val & MPI_DIAG_RESET_HISTORY)) {
4036                 while ((diag0val & MPI_DIAG_DRWE) == 0) {
4037                         /* Write magic sequence to WriteSequence register
4038                          * Loop until in diagnostic mode
4039                          */
4040                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
4041                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
4042                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
4043                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
4044                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
4045                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
4046 
4047                         /* wait 100 msec */
4048                         if (sleepFlag == CAN_SLEEP) {
4049                                 msleep (100);
4050                         } else {
4051                                 mdelay (100);
4052                         }
4053 
4054                         count++;
4055                         if (count > 20) {
4056                                 printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
4057                                                 ioc->name, diag0val);
4058                                 return -2;
4059 
4060                         }
4061 
4062                         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4063 
4064                         dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Wrote magic DiagWriteEn sequence (%x)\n",
4065                                         ioc->name, diag0val));
4066                 }
4067 
4068                 if (ioc->debug_level & MPT_DEBUG) {
4069                         if (ioc->alt_ioc)
4070                                 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4071                         dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG2: diag0=%08x, diag1=%08x\n",
4072                                 ioc->name, diag0val, diag1val));
4073                 }
4074                 /*
4075                  * Disable the ARM (Bug fix)
4076                  *
4077                  */
4078                 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_DISABLE_ARM);
4079                 mdelay(1);
4080 
4081                 /*
4082                  * Now hit the reset bit in the Diagnostic register
4083                  * (THE BIG HAMMER!) (Clears DRWE bit).
4084                  */
4085                 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
4086                 hard_reset_done = 1;
4087                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset performed\n",
4088                                 ioc->name));
4089 
4090                 /*
4091                  * Call each currently registered protocol IOC reset handler
4092                  * with pre-reset indication.
4093                  * NOTE: If we're doing _IOC_BRINGUP, there can be no
4094                  * MptResetHandlers[] registered yet.
4095                  */
4096                 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
4097                         if (MptResetHandlers[cb_idx]) {
4098                                 mpt_signal_reset(cb_idx,
4099                                         ioc, MPT_IOC_PRE_RESET);
4100                                 if (ioc->alt_ioc) {
4101                                         mpt_signal_reset(cb_idx,
4102                                         ioc->alt_ioc, MPT_IOC_PRE_RESET);
4103                                 }
4104                         }
4105                 }
4106 
4107                 if (ioc->cached_fw)
4108                         cached_fw = (MpiFwHeader_t *)ioc->cached_fw;
4109                 else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw)
4110                         cached_fw = (MpiFwHeader_t *)ioc->alt_ioc->cached_fw;
4111                 else
4112                         cached_fw = NULL;
4113                 if (cached_fw) {
4114                         /* If the DownloadBoot operation fails, the
4115                          * IOC will be left unusable. This is a fatal error
4116                          * case.  _diag_reset will return < 0
4117                          */
4118                         for (count = 0; count < 30; count ++) {
4119                                 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4120                                 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
4121                                         break;
4122                                 }
4123 
4124                                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "cached_fw: diag0val=%x count=%d\n",
4125                                         ioc->name, diag0val, count));
4126                                 /* wait 1 sec */
4127                                 if (sleepFlag == CAN_SLEEP) {
4128                                         msleep (1000);
4129                                 } else {
4130                                         mdelay (1000);
4131                                 }
4132                         }
4133                         if ((count = mpt_downloadboot(ioc, cached_fw, sleepFlag)) < 0) {
4134                                 printk(MYIOC_s_WARN_FMT
4135                                         "firmware downloadboot failure (%d)!\n", ioc->name, count);
4136                         }
4137 
4138                 } else {
4139                         /* Wait for FW to reload and for board
4140                          * to go to the READY state.
4141                          * Maximum wait is 60 seconds.
4142                          * If fail, no error will check again
4143                          * with calling program.
4144                          */
4145                         for (count = 0; count < 60; count ++) {
4146                                 doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
4147                                 doorbell &= MPI_IOC_STATE_MASK;
4148 
4149                                 drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4150                                     "looking for READY STATE: doorbell=%x"
4151                                     " count=%d\n", ioc->name, doorbell, count));
4152 
4153                                 if (doorbell == MPI_IOC_STATE_READY) {
4154                                         break;
4155                                 }
4156 
4157                                 /* wait 1 sec */
4158                                 if (sleepFlag == CAN_SLEEP) {
4159                                         msleep (1000);
4160                                 } else {
4161                                         mdelay (1000);
4162                                 }
4163                         }
4164 
4165                         if (doorbell != MPI_IOC_STATE_READY)
4166                                 printk(MYIOC_s_ERR_FMT "Failed to come READY "
4167                                     "after reset! IocState=%x", ioc->name,
4168                                     doorbell);
4169                 }
4170         }
4171 
4172         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4173         if (ioc->debug_level & MPT_DEBUG) {
4174                 if (ioc->alt_ioc)
4175                         diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4176                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG3: diag0=%08x, diag1=%08x\n",
4177                         ioc->name, diag0val, diag1val));
4178         }
4179 
4180         /* Clear RESET_HISTORY bit!  Place board in the
4181          * diagnostic mode to update the diag register.
4182          */
4183         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4184         count = 0;
4185         while ((diag0val & MPI_DIAG_DRWE) == 0) {
4186                 /* Write magic sequence to WriteSequence register
4187                  * Loop until in diagnostic mode
4188                  */
4189                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
4190                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
4191                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
4192                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
4193                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
4194                 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
4195 
4196                 /* wait 100 msec */
4197                 if (sleepFlag == CAN_SLEEP) {
4198                         msleep (100);
4199                 } else {
4200                         mdelay (100);
4201                 }
4202 
4203                 count++;
4204                 if (count > 20) {
4205                         printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
4206                                         ioc->name, diag0val);
4207                         break;
4208                 }
4209                 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4210         }
4211         diag0val &= ~MPI_DIAG_RESET_HISTORY;
4212         CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
4213         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4214         if (diag0val & MPI_DIAG_RESET_HISTORY) {
4215                 printk(MYIOC_s_WARN_FMT "ResetHistory bit failed to clear!\n",
4216                                 ioc->name);
4217         }
4218 
4219         /* Disable Diagnostic Mode
4220          */
4221         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFFFFFFFF);
4222 
4223         /* Check FW reload status flags.
4224          */
4225         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4226         if (diag0val & (MPI_DIAG_FLASH_BAD_SIG | MPI_DIAG_RESET_ADAPTER | MPI_DIAG_DISABLE_ARM)) {
4227                 printk(MYIOC_s_ERR_FMT "Diagnostic reset FAILED! (%02xh)\n",
4228                                 ioc->name, diag0val);
4229                 return -3;
4230         }
4231 
4232         if (ioc->debug_level & MPT_DEBUG) {
4233                 if (ioc->alt_ioc)
4234                         diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4235                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG4: diag0=%08x, diag1=%08x\n",
4236                         ioc->name, diag0val, diag1val));
4237         }
4238 
4239         /*
4240          * Reset flag that says we've enabled event notification
4241          */
4242         ioc->facts.EventState = 0;
4243 
4244         if (ioc->alt_ioc)
4245                 ioc->alt_ioc->facts.EventState = 0;
4246 
4247         return hard_reset_done;
4248 }
4249 
4250 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4251 /**
4252  *      SendIocReset - Send IOCReset request to MPT adapter.
4253  *      @ioc: Pointer to MPT_ADAPTER structure
4254  *      @reset_type: reset type, expected values are
4255  *      %MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET or %MPI_FUNCTION_IO_UNIT_RESET
4256  *      @sleepFlag: Specifies whether the process can sleep
4257  *
4258  *      Send IOCReset request to the MPT adapter.
4259  *
4260  *      Returns 0 for success, non-zero for failure.
4261  */
4262 static int
4263 SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag)
4264 {
4265         int r;
4266         u32 state;
4267         int cntdn, count;
4268 
4269         drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOC reset(0x%02x)!\n",
4270                         ioc->name, reset_type));
4271         CHIPREG_WRITE32(&ioc->chip->Doorbell, reset_type<<MPI_DOORBELL_FUNCTION_SHIFT);
4272         if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4273                 return r;
4274 
4275         /* FW ACK'd request, wait for READY state
4276          */
4277         count = 0;
4278         cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 15;    /* 15 seconds */
4279 
4280         while ((state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
4281                 cntdn--;
4282                 count++;
4283                 if (!cntdn) {
4284                         if (sleepFlag != CAN_SLEEP)
4285                                 count *= 10;
4286 
4287                         printk(MYIOC_s_ERR_FMT
4288                             "Wait IOC_READY state (0x%x) timeout(%d)!\n",
4289                             ioc->name, state, (int)((count+5)/HZ));
4290                         return -ETIME;
4291                 }
4292 
4293                 if (sleepFlag == CAN_SLEEP) {
4294                         msleep(1);
4295                 } else {
4296                         mdelay (1);     /* 1 msec delay */
4297                 }
4298         }
4299 
4300         /* TODO!
4301          *  Cleanup all event stuff for this IOC; re-issue EventNotification
4302          *  request if needed.
4303          */
4304         if (ioc->facts.Function)
4305                 ioc->facts.EventState = 0;
4306 
4307         return 0;
4308 }
4309 
4310 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4311 /**
4312  *      initChainBuffers - Allocate memory for and initialize chain buffers
4313  *      @ioc: Pointer to MPT_ADAPTER structure
4314  *
4315  *      Allocates memory for and initializes chain buffers,
4316  *      chain buffer control arrays and spinlock.
4317  */
4318 static int
4319 initChainBuffers(MPT_ADAPTER *ioc)
4320 {
4321         u8              *mem;
4322         int             sz, ii, num_chain;
4323         int             scale, num_sge, numSGE;
4324 
4325         /* ReqToChain size must equal the req_depth
4326          * index = req_idx
4327          */
4328         if (ioc->ReqToChain == NULL) {
4329                 sz = ioc->req_depth * sizeof(int);
4330                 mem = kmalloc(sz, GFP_ATOMIC);
4331                 if (mem == NULL)
4332                         return -1;
4333 
4334                 ioc->ReqToChain = (int *) mem;
4335                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReqToChain alloc  @ %p, sz=%d bytes\n",
4336                                 ioc->name, mem, sz));
4337                 mem = kmalloc(sz, GFP_ATOMIC);
4338                 if (mem == NULL)
4339                         return -1;
4340 
4341                 ioc->RequestNB = (int *) mem;
4342                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestNB alloc  @ %p, sz=%d bytes\n",
4343                                 ioc->name, mem, sz));
4344         }
4345         for (ii = 0; ii < ioc->req_depth; ii++) {
4346                 ioc->ReqToChain[ii] = MPT_HOST_NO_CHAIN;
4347         }
4348 
4349         /* ChainToChain size must equal the total number
4350          * of chain buffers to be allocated.
4351          * index = chain_idx
4352          *
4353          * Calculate the number of chain buffers needed(plus 1) per I/O
4354          * then multiply the maximum number of simultaneous cmds
4355          *
4356          * num_sge = num sge in request frame + last chain buffer
4357          * scale = num sge per chain buffer if no chain element
4358          */
4359         scale = ioc->req_sz / ioc->SGE_size;
4360         if (ioc->sg_addr_size == sizeof(u64))
4361                 num_sge =  scale + (ioc->req_sz - 60) / ioc->SGE_size;
4362         else
4363                 num_sge =  1 + scale + (ioc->req_sz - 64) / ioc->SGE_size;
4364 
4365         if (ioc->sg_addr_size == sizeof(u64)) {
4366                 numSGE = (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
4367                         (ioc->req_sz - 60) / ioc->SGE_size;
4368         } else {
4369                 numSGE = 1 + (scale - 1) * (ioc->facts.MaxChainDepth-1) +
4370                     scale + (ioc->req_sz - 64) / ioc->SGE_size;
4371         }
4372         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "num_sge=%d numSGE=%d\n",
4373                 ioc->name, num_sge, numSGE));
4374 
4375         if (ioc->bus_type == FC) {
4376                 if (numSGE > MPT_SCSI_FC_SG_DEPTH)
4377                         numSGE = MPT_SCSI_FC_SG_DEPTH;
4378         } else {
4379                 if (numSGE > MPT_SCSI_SG_DEPTH)
4380                         numSGE = MPT_SCSI_SG_DEPTH;
4381         }
4382 
4383         num_chain = 1;
4384         while (numSGE - num_sge > 0) {
4385                 num_chain++;
4386                 num_sge += (scale - 1);
4387         }
4388         num_chain++;
4389 
4390         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Now numSGE=%d num_sge=%d num_chain=%d\n",
4391                 ioc->name, numSGE, num_sge, num_chain));
4392 
4393         if (ioc->bus_type == SPI)
4394                 num_chain *= MPT_SCSI_CAN_QUEUE;
4395         else if (ioc->bus_type == SAS)
4396                 num_chain *= MPT_SAS_CAN_QUEUE;
4397         else
4398                 num_chain *= MPT_FC_CAN_QUEUE;
4399 
4400         ioc->num_chain = num_chain;
4401 
4402         sz = num_chain * sizeof(int);
4403         if (ioc->ChainToChain == NULL) {
4404                 mem = kmalloc(sz, GFP_ATOMIC);
4405                 if (mem == NULL)
4406                         return -1;
4407 
4408                 ioc->ChainToChain = (int *) mem;
4409                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainToChain alloc @ %p, sz=%d bytes\n",
4410                                 ioc->name, mem, sz));
4411         } else {
4412                 mem = (u8 *) ioc->ChainToChain;
4413         }
4414         memset(mem, 0xFF, sz);
4415         return num_chain;
4416 }
4417 
4418 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4419 /**
4420  *      PrimeIocFifos - Initialize IOC request and reply FIFOs.
4421  *      @ioc: Pointer to MPT_ADAPTER structure
4422  *
4423  *      This routine allocates memory for the MPT reply and request frame
4424  *      pools (if necessary), and primes the IOC reply FIFO with
4425  *      reply frames.
4426  *
4427  *      Returns 0 for success, non-zero for failure.
4428  */
4429 static int
4430 PrimeIocFifos(MPT_ADAPTER *ioc)
4431 {
4432         MPT_FRAME_HDR *mf;
4433         unsigned long flags;
4434         dma_addr_t alloc_dma;
4435         u8 *mem;
4436         int i, reply_sz, sz, total_size, num_chain;
4437         u64     dma_mask;
4438 
4439         dma_mask = 0;
4440 
4441         /*  Prime reply FIFO...  */
4442 
4443         if (ioc->reply_frames == NULL) {
4444                 if ( (num_chain = initChainBuffers(ioc)) < 0)
4445                         return -1;
4446                 /*
4447                  * 1078 errata workaround for the 36GB limitation
4448                  */
4449                 if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078 &&
4450                     ioc->dma_mask > DMA_BIT_MASK(35)) {
4451                         if (!pci_set_dma_mask(ioc->pcidev, DMA_BIT_MASK(32))
4452                             && !pci_set_consistent_dma_mask(ioc->pcidev,
4453                             DMA_BIT_MASK(32))) {
4454                                 dma_mask = DMA_BIT_MASK(35);
4455                                 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4456                                     "setting 35 bit addressing for "
4457                                     "Request/Reply/Chain and Sense Buffers\n",
4458                                     ioc->name));
4459                         } else {
4460                                 /*Reseting DMA mask to 64 bit*/
4461                                 pci_set_dma_mask(ioc->pcidev,
4462                                         DMA_BIT_MASK(64));
4463                                 pci_set_consistent_dma_mask(ioc->pcidev,
4464                                         DMA_BIT_MASK(64));
4465 
4466                                 printk(MYIOC_s_ERR_FMT
4467                                     "failed setting 35 bit addressing for "
4468                                     "Request/Reply/Chain and Sense Buffers\n",
4469                                     ioc->name);
4470                                 return -1;
4471                         }
4472                 }
4473 
4474                 total_size = reply_sz = (ioc->reply_sz * ioc->reply_depth);
4475                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d bytes, ReplyDepth=%d\n",
4476                                 ioc->name, ioc->reply_sz, ioc->reply_depth));
4477                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d[%x] bytes\n",
4478                                 ioc->name, reply_sz, reply_sz));
4479 
4480                 sz = (ioc->req_sz * ioc->req_depth);
4481                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d bytes, RequestDepth=%d\n",
4482                                 ioc->name, ioc->req_sz, ioc->req_depth));
4483                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d[%x] bytes\n",
4484                                 ioc->name, sz, sz));
4485                 total_size += sz;
4486 
4487                 sz = num_chain * ioc->req_sz; /* chain buffer pool size */
4488                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d bytes, ChainDepth=%d\n",
4489                                 ioc->name, ioc->req_sz, num_chain));
4490                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d[%x] bytes num_chain=%d\n",
4491                                 ioc->name, sz, sz, num_chain));
4492 
4493                 total_size += sz;
4494                 mem = pci_alloc_consistent(ioc->pcidev, total_size, &alloc_dma);
4495                 if (mem == NULL) {
4496                         printk(MYIOC_s_ERR_FMT "Unable to allocate Reply, Request, Chain Buffers!\n",
4497                                 ioc->name);
4498                         goto out_fail;
4499                 }
4500 
4501                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Total alloc @ %p[%p], sz=%d[%x] bytes\n",
4502                                 ioc->name, mem, (void *)(ulong)alloc_dma, total_size, total_size));
4503 
4504                 memset(mem, 0, total_size);
4505                 ioc->alloc_total += total_size;
4506                 ioc->alloc = mem;
4507                 ioc->alloc_dma = alloc_dma;
4508                 ioc->alloc_sz = total_size;
4509                 ioc->reply_frames = (MPT_FRAME_HDR *) mem;
4510                 ioc->reply_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
4511 
4512                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n",
4513                         ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
4514 
4515                 alloc_dma += reply_sz;
4516                 mem += reply_sz;
4517 
4518                 /*  Request FIFO - WE manage this!  */
4519 
4520                 ioc->req_frames = (MPT_FRAME_HDR *) mem;
4521                 ioc->req_frames_dma = alloc_dma;
4522 
4523                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffers @ %p[%p]\n",
4524                                 ioc->name, mem, (void *)(ulong)alloc_dma));
4525 
4526                 ioc->req_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
4527 
4528                 for (i = 0; i < ioc->req_depth; i++) {
4529                         alloc_dma += ioc->req_sz;
4530                         mem += ioc->req_sz;
4531                 }
4532 
4533                 ioc->ChainBuffer = mem;
4534                 ioc->ChainBufferDMA = alloc_dma;
4535 
4536                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffers @ %p(%p)\n",
4537                         ioc->name, ioc->ChainBuffer, (void *)(ulong)ioc->ChainBufferDMA));
4538 
4539                 /* Initialize the free chain Q.
4540                 */
4541 
4542                 INIT_LIST_HEAD(&ioc->FreeChainQ);
4543 
4544                 /* Post the chain buffers to the FreeChainQ.
4545                 */
4546                 mem = (u8 *)ioc->ChainBuffer;
4547                 for (i=0; i < num_chain; i++) {
4548                         mf = (MPT_FRAME_HDR *) mem;
4549                         list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeChainQ);
4550                         mem += ioc->req_sz;
4551                 }
4552 
4553                 /* Initialize Request frames linked list
4554                  */
4555                 alloc_dma = ioc->req_frames_dma;
4556                 mem = (u8 *) ioc->req_frames;
4557 
4558                 spin_lock_irqsave(&ioc->FreeQlock, flags);
4559                 INIT_LIST_HEAD(&ioc->FreeQ);
4560                 for (i = 0; i < ioc->req_depth; i++) {
4561                         mf = (MPT_FRAME_HDR *) mem;
4562 
4563                         /*  Queue REQUESTs *internally*!  */
4564                         list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
4565 
4566                         mem += ioc->req_sz;
4567                 }
4568                 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
4569 
4570                 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
4571                 ioc->sense_buf_pool =
4572                         pci_alloc_consistent(ioc->pcidev, sz, &ioc->sense_buf_pool_dma);
4573                 if (ioc->sense_buf_pool == NULL) {
4574                         printk(MYIOC_s_ERR_FMT "Unable to allocate Sense Buffers!\n",
4575                                 ioc->name);
4576                         goto out_fail;
4577                 }
4578 
4579                 ioc->sense_buf_low_dma = (u32) (ioc->sense_buf_pool_dma & 0xFFFFFFFF);
4580                 ioc->alloc_total += sz;
4581                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SenseBuffers @ %p[%p]\n",
4582                         ioc->name, ioc->sense_buf_pool, (void *)(ulong)ioc->sense_buf_pool_dma));
4583 
4584         }
4585 
4586         /* Post Reply frames to FIFO
4587          */
4588         alloc_dma = ioc->alloc_dma;
4589         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n",
4590                 ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
4591 
4592         for (i = 0; i < ioc->reply_depth; i++) {
4593                 /*  Write each address to the IOC!  */
4594                 CHIPREG_WRITE32(&ioc->chip->ReplyFifo, alloc_dma);
4595                 alloc_dma += ioc->reply_sz;
4596         }
4597 
4598         if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
4599             ioc->dma_mask) && !pci_set_consistent_dma_mask(ioc->pcidev,
4600             ioc->dma_mask))
4601                 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4602                     "restoring 64 bit addressing\n", ioc->name));
4603 
4604         return 0;
4605 
4606 out_fail:
4607 
4608         if (ioc->alloc != NULL) {
4609                 sz = ioc->alloc_sz;
4610                 pci_free_consistent(ioc->pcidev,
4611                                 sz,
4612                                 ioc->alloc, ioc->alloc_dma);
4613                 ioc->reply_frames = NULL;
4614                 ioc->req_frames = NULL;
4615                 ioc->alloc_total -= sz;
4616         }
4617         if (ioc->sense_buf_pool != NULL) {
4618                 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
4619                 pci_free_consistent(ioc->pcidev,
4620                                 sz,
4621                                 ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
4622                 ioc->sense_buf_pool = NULL;
4623         }
4624 
4625         if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
4626             DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(ioc->pcidev,
4627             DMA_BIT_MASK(64)))
4628                 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4629                     "restoring 64 bit addressing\n", ioc->name));
4630 
4631         return -1;
4632 }
4633 
4634 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4635 /**
4636  *      mpt_handshake_req_reply_wait - Send MPT request to and receive reply
4637  *      from IOC via doorbell handshake method.
4638  *      @ioc: Pointer to MPT_ADAPTER structure
4639  *      @reqBytes: Size of the request in bytes
4640  *      @req: Pointer to MPT request frame
4641  *      @replyBytes: Expected size of the reply in bytes
4642  *      @u16reply: Pointer to area where reply should be written
4643  *      @maxwait: Max wait time for a reply (in seconds)
4644  *      @sleepFlag: Specifies whether the process can sleep
4645  *
4646  *      NOTES: It is the callers responsibility to byte-swap fields in the
4647  *      request which are greater than 1 byte in size.  It is also the
4648  *      callers responsibility to byte-swap response fields which are
4649  *      greater than 1 byte in size.
4650  *
4651  *      Returns 0 for success, non-zero for failure.
4652  */
4653 static int
4654 mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes, u32 *req,
4655                 int replyBytes, u16 *u16reply, int maxwait, int sleepFlag)
4656 {
4657         MPIDefaultReply_t *mptReply;
4658         int failcnt = 0;
4659         int t;
4660 
4661         /*
4662          * Get ready to cache a handshake reply
4663          */
4664         ioc->hs_reply_idx = 0;
4665         mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
4666         mptReply->MsgLength = 0;
4667 
4668         /*
4669          * Make sure there are no doorbells (WRITE 0 to IntStatus reg),
4670          * then tell IOC that we want to handshake a request of N words.
4671          * (WRITE u32val to Doorbell reg).
4672          */
4673         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4674         CHIPREG_WRITE32(&ioc->chip->Doorbell,
4675                         ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
4676                          ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
4677 
4678         /*
4679          * Wait for IOC's doorbell handshake int
4680          */
4681         if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4682                 failcnt++;
4683 
4684         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request start reqBytes=%d, WaitCnt=%d%s\n",
4685                         ioc->name, reqBytes, t, failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
4686 
4687         /* Read doorbell and check for active bit */
4688         if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
4689                         return -1;
4690 
4691         /*
4692          * Clear doorbell int (WRITE 0 to IntStatus reg),
4693          * then wait for IOC to ACKnowledge that it's ready for
4694          * our handshake request.
4695          */
4696         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4697         if (!failcnt && (t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4698                 failcnt++;
4699 
4700         if (!failcnt) {
4701                 int      ii;
4702                 u8      *req_as_bytes = (u8 *) req;
4703 
4704                 /*
4705                  * Stuff request words via doorbell handshake,
4706                  * with ACK from IOC for each.
4707                  */
4708                 for (ii = 0; !failcnt && ii < reqBytes/4; ii++) {
4709                         u32 word = ((req_as_bytes[(ii*4) + 0] <<  0) |
4710                                     (req_as_bytes[(ii*4) + 1] <<  8) |
4711                                     (req_as_bytes[(ii*4) + 2] << 16) |
4712                                     (req_as_bytes[(ii*4) + 3] << 24));
4713 
4714                         CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
4715                         if ((t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4716                                 failcnt++;
4717                 }
4718 
4719                 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Handshake request frame (@%p) header\n", ioc->name, req));
4720                 DBG_DUMP_REQUEST_FRAME_HDR(ioc, (u32 *)req);
4721 
4722                 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request post done, WaitCnt=%d%s\n",
4723                                 ioc->name, t, failcnt ? " - MISSING DOORBELL ACK!" : ""));
4724 
4725                 /*
4726                  * Wait for completion of doorbell handshake reply from the IOC
4727                  */
4728                 if (!failcnt && (t = WaitForDoorbellReply(ioc, maxwait, sleepFlag)) < 0)
4729                         failcnt++;
4730 
4731                 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake reply count=%d%s\n",
4732                                 ioc->name, t, failcnt ? " - MISSING DOORBELL REPLY!" : ""));
4733 
4734                 /*
4735                  * Copy out the cached reply...
4736                  */
4737                 for (ii=0; ii < min(replyBytes/2,mptReply->MsgLength*2); ii++)
4738                         u16reply[ii] = ioc->hs_reply[ii];
4739         } else {
4740                 return -99;
4741         }
4742 
4743         return -failcnt;
4744 }
4745 
4746 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4747 /**
4748  *      WaitForDoorbellAck - Wait for IOC doorbell handshake acknowledge
4749  *      @ioc: Pointer to MPT_ADAPTER structure
4750  *      @howlong: How long to wait (in seconds)
4751  *      @sleepFlag: Specifies whether the process can sleep
4752  *
4753  *      This routine waits (up to ~2 seconds max) for IOC doorbell
4754  *      handshake ACKnowledge, indicated by the IOP_DOORBELL_STATUS
4755  *      bit in its IntStatus register being clear.
4756  *
4757  *      Returns a negative value on failure, else wait loop count.
4758  */
4759 static int
4760 WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4761 {
4762         int cntdn;
4763         int count = 0;
4764         u32 intstat=0;
4765 
4766         cntdn = 1000 * howlong;
4767 
4768         if (sleepFlag == CAN_SLEEP) {
4769                 while (--cntdn) {
4770                         msleep (1);
4771                         intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4772                         if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
4773                                 break;
4774                         count++;
4775                 }
4776         } else {
4777                 while (--cntdn) {
4778                         udelay (1000);
4779                         intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4780                         if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
4781                                 break;
4782                         count++;
4783                 }
4784         }
4785 
4786         if (cntdn) {
4787                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell ACK (count=%d)\n",
4788                                 ioc->name, count));
4789                 return count;
4790         }
4791 
4792         printk(MYIOC_s_ERR_FMT "Doorbell ACK timeout (count=%d), IntStatus=%x!\n",
4793                         ioc->name, count, intstat);
4794         return -1;
4795 }
4796 
4797 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4798 /**
4799  *      WaitForDoorbellInt - Wait for IOC to set its doorbell interrupt bit
4800  *      @ioc: Pointer to MPT_ADAPTER structure
4801  *      @howlong: How long to wait (in seconds)
4802  *      @sleepFlag: Specifies whether the process can sleep
4803  *
4804  *      This routine waits (up to ~2 seconds max) for IOC doorbell interrupt
4805  *      (MPI_HIS_DOORBELL_INTERRUPT) to be set in the IntStatus register.
4806  *
4807  *      Returns a negative value on failure, else wait loop count.
4808  */
4809 static int
4810 WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4811 {
4812         int cntdn;
4813         int count = 0;
4814         u32 intstat=0;
4815 
4816         cntdn = 1000 * howlong;
4817         if (sleepFlag == CAN_SLEEP) {
4818                 while (--cntdn) {
4819                         intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4820                         if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
4821                                 break;
4822                         msleep(1);
4823                         count++;
4824                 }
4825         } else {
4826                 while (--cntdn) {
4827                         intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4828                         if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
4829                                 break;
4830                         udelay (1000);
4831                         count++;
4832                 }
4833         }
4834 
4835         if (cntdn) {
4836                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell INT (cnt=%d) howlong=%d\n",
4837                                 ioc->name, count, howlong));
4838                 return count;
4839         }
4840 
4841         printk(MYIOC_s_ERR_FMT "Doorbell INT timeout (count=%d), IntStatus=%x!\n",
4842                         ioc->name, count, intstat);
4843         return -1;
4844 }
4845 
4846 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4847 /**
4848  *      WaitForDoorbellReply - Wait for and capture an IOC handshake reply.
4849  *      @ioc: Pointer to MPT_ADAPTER structure
4850  *      @howlong: How long to wait (in seconds)
4851  *      @sleepFlag: Specifies whether the process can sleep
4852  *
4853  *      This routine polls the IOC for a handshake reply, 16 bits at a time.
4854  *      Reply is cached to IOC private area large enough to hold a maximum
4855  *      of 128 bytes of reply data.
4856  *
4857  *      Returns a negative value on failure, else size of reply in WORDS.
4858  */
4859 static int
4860 WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4861 {
4862         int u16cnt = 0;
4863         int failcnt = 0;
4864         int t;
4865         u16 *hs_reply = ioc->hs_reply;
4866         volatile MPIDefaultReply_t *mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
4867         u16 hword;
4868 
4869         hs_reply[0] = hs_reply[1] = hs_reply[7] = 0;
4870 
4871         /*
4872          * Get first two u16's so we can look at IOC's intended reply MsgLength
4873          */
4874         u16cnt=0;
4875         if ((t = WaitForDoorbellInt(ioc, howlong, sleepFlag)) < 0) {
4876                 failcnt++;
4877         } else {
4878                 hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4879                 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4880                 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4881                         failcnt++;
4882                 else {
4883                         hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4884                         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4885                 }
4886         }
4887 
4888         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitCnt=%d First handshake reply word=%08x%s\n",
4889                         ioc->name, t, le32_to_cpu(*(u32 *)hs_reply),
4890                         failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
4891 
4892         /*
4893          * If no error (and IOC said MsgLength is > 0), piece together
4894          * reply 16 bits at a time.
4895          */
4896         for (u16cnt=2; !failcnt && u16cnt < (2 * mptReply->MsgLength); u16cnt++) {
4897                 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4898                         failcnt++;
4899                 hword = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4900                 /* don't overflow our IOC hs_reply[] buffer! */
4901                 if (u16cnt < ARRAY_SIZE(ioc->hs_reply))
4902                         hs_reply[u16cnt] = hword;
4903                 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4904         }
4905 
4906         if (!failcnt && (t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4907                 failcnt++;
4908         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4909 
4910         if (failcnt) {
4911                 printk(MYIOC_s_ERR_FMT "Handshake reply failure!\n",
4912                                 ioc->name);
4913                 return -failcnt;
4914         }
4915 #if 0
4916         else if (u16cnt != (2 * mptReply->MsgLength)) {
4917                 return -101;
4918         }
4919         else if ((mptReply->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
4920                 return -102;
4921         }
4922 #endif
4923 
4924         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got Handshake reply:\n", ioc->name));
4925         DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mptReply);
4926 
4927         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell REPLY WaitCnt=%d (sz=%d)\n",
4928                         ioc->name, t, u16cnt/2));
4929         return u16cnt/2;
4930 }
4931 
4932 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4933 /**
4934  *      GetLanConfigPages - Fetch LANConfig pages.
4935  *      @ioc: Pointer to MPT_ADAPTER structure
4936  *
4937  *      Return: 0 for success
4938  *      -ENOMEM if no memory available
4939  *              -EPERM if not allowed due to ISR context
4940  *              -EAGAIN if no msg frames currently available
4941  *              -EFAULT for non-successful reply or no reply (timeout)
4942  */
4943 static int
4944 GetLanConfigPages(MPT_ADAPTER *ioc)
4945 {
4946         ConfigPageHeader_t       hdr;
4947         CONFIGPARMS              cfg;
4948         LANPage0_t              *ppage0_alloc;
4949         dma_addr_t               page0_dma;
4950         LANPage1_t              *ppage1_alloc;
4951         dma_addr_t               page1_dma;
4952         int                      rc = 0;
4953         int                      data_sz;
4954         int                      copy_sz;
4955 
4956         /* Get LAN Page 0 header */
4957         hdr.PageVersion = 0;
4958         hdr.PageLength = 0;
4959         hdr.PageNumber = 0;
4960         hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
4961         cfg.cfghdr.hdr = &hdr;
4962         cfg.physAddr = -1;
4963         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4964         cfg.dir = 0;
4965         cfg.pageAddr = 0;
4966         cfg.timeout = 0;
4967 
4968         if ((rc = mpt_config(ioc, &cfg)) != 0)
4969                 return rc;
4970 
4971         if (hdr.PageLength > 0) {
4972                 data_sz = hdr.PageLength * 4;
4973                 ppage0_alloc = (LANPage0_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page0_dma);
4974                 rc = -ENOMEM;
4975                 if (ppage0_alloc) {
4976                         memset((u8 *)ppage0_alloc, 0, data_sz);
4977                         cfg.physAddr = page0_dma;
4978                         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4979 
4980                         if ((rc = mpt_config(ioc, &cfg)) == 0) {
4981                                 /* save the data */
4982                                 copy_sz = min_t(int, sizeof(LANPage0_t), data_sz);
4983                                 memcpy(&ioc->lan_cnfg_page0, ppage0_alloc, copy_sz);
4984 
4985                         }
4986 
4987                         pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage0_alloc, page0_dma);
4988 
4989                         /* FIXME!
4990                          *      Normalize endianness of structure data,
4991                          *      by byte-swapping all > 1 byte fields!
4992                          */
4993 
4994                 }
4995 
4996                 if (rc)
4997                         return rc;
4998         }
4999 
5000         /* Get LAN Page 1 header */
5001         hdr.PageVersion = 0;
5002         hdr.PageLength = 0;
5003         hdr.PageNumber = 1;
5004         hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
5005         cfg.cfghdr.hdr = &hdr;
5006         cfg.physAddr = -1;
5007         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5008         cfg.dir = 0;
5009         cfg.pageAddr = 0;
5010 
5011         if ((rc = mpt_config(ioc, &cfg)) != 0)
5012                 return rc;
5013 
5014         if (hdr.PageLength == 0)
5015                 return 0;
5016 
5017         data_sz = hdr.PageLength * 4;
5018         rc = -ENOMEM;
5019         ppage1_alloc = (LANPage1_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page1_dma);
5020         if (ppage1_alloc) {
5021                 memset((u8 *)ppage1_alloc, 0, data_sz);
5022                 cfg.physAddr = page1_dma;
5023                 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5024 
5025                 if ((rc = mpt_config(ioc, &cfg)) == 0) {
5026                         /* save the data */
5027                         copy_sz = min_t(int, sizeof(LANPage1_t), data_sz);
5028                         memcpy(&ioc->lan_cnfg_page1, ppage1_alloc, copy_sz);
5029                 }
5030 
5031                 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage1_alloc, page1_dma);
5032 
5033                 /* FIXME!
5034                  *      Normalize endianness of structure data,
5035                  *      by byte-swapping all > 1 byte fields!
5036                  */
5037 
5038         }
5039 
5040         return rc;
5041 }
5042 
5043 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5044 /**
5045  *      mptbase_sas_persist_operation - Perform operation on SAS Persistent Table
5046  *      @ioc: Pointer to MPT_ADAPTER structure
5047  *      @persist_opcode: see below
5048  *
5049  *      MPI_SAS_OP_CLEAR_NOT_PRESENT - Free all persist TargetID mappings for
5050  *              devices not currently present.
5051  *      MPI_SAS_OP_CLEAR_ALL_PERSISTENT - Clear al persist TargetID mappings
5052  *
5053  *      NOTE: Don't use not this function during interrupt time.
5054  *
5055  *      Returns 0 for success, non-zero error
5056  */
5057 
5058 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5059 int
5060 mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode)
5061 {
5062         SasIoUnitControlRequest_t       *sasIoUnitCntrReq;
5063         SasIoUnitControlReply_t         *sasIoUnitCntrReply;
5064         MPT_FRAME_HDR                   *mf = NULL;
5065         MPIHeader_t                     *mpi_hdr;
5066         int                             ret = 0;
5067         unsigned long                   timeleft;
5068 
5069         mutex_lock(&ioc->mptbase_cmds.mutex);
5070 
5071         /* init the internal cmd struct */
5072         memset(ioc->mptbase_cmds.reply, 0 , MPT_DEFAULT_FRAME_SIZE);
5073         INITIALIZE_MGMT_STATUS(ioc->mptbase_cmds.status)
5074 
5075         /* insure garbage is not sent to fw */
5076         switch(persist_opcode) {
5077 
5078         case MPI_SAS_OP_CLEAR_NOT_PRESENT:
5079         case MPI_SAS_OP_CLEAR_ALL_PERSISTENT:
5080                 break;
5081 
5082         default:
5083                 ret = -1;
5084                 goto out;
5085         }
5086 
5087         printk(KERN_DEBUG  "%s: persist_opcode=%x\n",
5088                 __func__, persist_opcode);
5089 
5090         /* Get a MF for this command.
5091          */
5092         if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
5093                 printk(KERN_DEBUG "%s: no msg frames!\n", __func__);
5094                 ret = -1;
5095                 goto out;
5096         }
5097 
5098         mpi_hdr = (MPIHeader_t *) mf;
5099         sasIoUnitCntrReq = (SasIoUnitControlRequest_t *)mf;
5100         memset(sasIoUnitCntrReq,0,sizeof(SasIoUnitControlRequest_t));
5101         sasIoUnitCntrReq->Function = MPI_FUNCTION_SAS_IO_UNIT_CONTROL;
5102         sasIoUnitCntrReq->MsgContext = mpi_hdr->MsgContext;
5103         sasIoUnitCntrReq->Operation = persist_opcode;
5104 
5105         mpt_put_msg_frame(mpt_base_index, ioc, mf);
5106         timeleft = wait_for_completion_timeout(&ioc->mptbase_cmds.done, 10*HZ);
5107         if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_COMMAND_GOOD)) {
5108                 ret = -ETIME;
5109                 printk(KERN_DEBUG "%s: failed\n", __func__);
5110                 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_DID_IOCRESET)
5111                         goto out;
5112                 if (!timeleft) {
5113                         printk(MYIOC_s_WARN_FMT
5114                                "Issuing Reset from %s!!, doorbell=0x%08x\n",
5115                                ioc->name, __func__, mpt_GetIocState(ioc, 0));
5116                         mpt_Soft_Hard_ResetHandler(ioc, CAN_SLEEP);
5117                         mpt_free_msg_frame(ioc, mf);
5118                 }
5119                 goto out;
5120         }
5121 
5122         if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_RF_VALID)) {
5123                 ret = -1;
5124                 goto out;
5125         }
5126 
5127         sasIoUnitCntrReply =
5128             (SasIoUnitControlReply_t *)ioc->mptbase_cmds.reply;
5129         if (le16_to_cpu(sasIoUnitCntrReply->IOCStatus) != MPI_IOCSTATUS_SUCCESS) {
5130                 printk(KERN_DEBUG "%s: IOCStatus=0x%X IOCLogInfo=0x%X\n",
5131                     __func__, sasIoUnitCntrReply->IOCStatus,
5132                     sasIoUnitCntrReply->IOCLogInfo);
5133                 printk(KERN_DEBUG "%s: failed\n", __func__);
5134                 ret = -1;
5135         } else
5136                 printk(KERN_DEBUG "%s: success\n", __func__);
5137  out:
5138 
5139         CLEAR_MGMT_STATUS(ioc->mptbase_cmds.status)
5140         mutex_unlock(&ioc->mptbase_cmds.mutex);
5141         return ret;
5142 }
5143 
5144 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5145 
5146 static void
5147 mptbase_raid_process_event_data(MPT_ADAPTER *ioc,
5148     MpiEventDataRaid_t * pRaidEventData)
5149 {
5150         int     volume;
5151         int     reason;
5152         int     disk;
5153         int     status;
5154         int     flags;
5155         int     state;
5156 
5157         volume  = pRaidEventData->VolumeID;
5158         reason  = pRaidEventData->ReasonCode;
5159         disk    = pRaidEventData->PhysDiskNum;
5160         status  = le32_to_cpu(pRaidEventData->SettingsStatus);
5161         flags   = (status >> 0) & 0xff;
5162         state   = (status >> 8) & 0xff;
5163 
5164         if (reason == MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED) {
5165                 return;
5166         }
5167 
5168         if ((reason >= MPI_EVENT_RAID_RC_PHYSDISK_CREATED &&
5169              reason <= MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED) ||
5170             (reason == MPI_EVENT_RAID_RC_SMART_DATA)) {
5171                 printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for PhysDisk %d id=%d\n",
5172                         ioc->name, disk, volume);
5173         } else {
5174                 printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for VolumeID %d\n",
5175                         ioc->name, volume);
5176         }
5177 
5178         switch(reason) {
5179         case MPI_EVENT_RAID_RC_VOLUME_CREATED:
5180                 printk(MYIOC_s_INFO_FMT "  volume has been created\n",
5181                         ioc->name);
5182                 break;
5183 
5184         case MPI_EVENT_RAID_RC_VOLUME_DELETED:
5185 
5186                 printk(MYIOC_s_INFO_FMT "  volume has been deleted\n",
5187                         ioc->name);
5188                 break;
5189 
5190         case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED:
5191                 printk(MYIOC_s_INFO_FMT "  volume settings have been changed\n",
5192                         ioc->name);
5193                 break;
5194 
5195         case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED:
5196                 printk(MYIOC_s_INFO_FMT "  volume is now %s%s%s%s\n",
5197                         ioc->name,
5198                         state == MPI_RAIDVOL0_STATUS_STATE_OPTIMAL
5199                          ? "optimal"
5200                          : state == MPI_RAIDVOL0_STATUS_STATE_DEGRADED
5201                           ? "degraded"
5202                           : state == MPI_RAIDVOL0_STATUS_STATE_FAILED
5203                            ? "failed"
5204                            : "state unknown",
5205                         flags & MPI_RAIDVOL0_STATUS_FLAG_ENABLED
5206                          ? ", enabled" : "",
5207                         flags & MPI_RAIDVOL0_STATUS_FLAG_QUIESCED
5208                          ? ", quiesced" : "",
5209                         flags & MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS
5210                          ? ", resync in progress" : "" );
5211                 break;
5212 
5213         case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED:
5214                 printk(MYIOC_s_INFO_FMT "  volume membership of PhysDisk %d has changed\n",
5215                         ioc->name, disk);
5216                 break;
5217 
5218         case MPI_EVENT_RAID_RC_PHYSDISK_CREATED:
5219                 printk(MYIOC_s_INFO_FMT "  PhysDisk has been created\n",
5220                         ioc->name);
5221                 break;
5222 
5223         case MPI_EVENT_RAID_RC_PHYSDISK_DELETED:
5224                 printk(MYIOC_s_INFO_FMT "  PhysDisk has been deleted\n",
5225                         ioc->name);
5226                 break;
5227 
5228         case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED:
5229                 printk(MYIOC_s_INFO_FMT "  PhysDisk settings have been changed\n",
5230                         ioc->name);
5231                 break;
5232 
5233         case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED:
5234                 printk(MYIOC_s_INFO_FMT "  PhysDisk is now %s%s%s\n",
5235                         ioc->name,
5236                         state == MPI_PHYSDISK0_STATUS_ONLINE
5237                          ? "online"
5238                          : state == MPI_PHYSDISK0_STATUS_MISSING
5239                           ? "missing"
5240                           : state == MPI_PHYSDISK0_STATUS_NOT_COMPATIBLE
5241                            ? "not compatible"
5242                            : state == MPI_PHYSDISK0_STATUS_FAILED
5243                             ? "failed"
5244                             : state == MPI_PHYSDISK0_STATUS_INITIALIZING
5245                              ? "initializing"
5246                              : state == MPI_PHYSDISK0_STATUS_OFFLINE_REQUESTED
5247                               ? "offline requested"
5248                               : state == MPI_PHYSDISK0_STATUS_FAILED_REQUESTED
5249                                ? "failed requested"
5250                                : state == MPI_PHYSDISK0_STATUS_OTHER_OFFLINE
5251                                 ? "offline"
5252                                 : "state unknown",
5253                         flags & MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC
5254                          ? ", out of sync" : "",
5255                         flags & MPI_PHYSDISK0_STATUS_FLAG_QUIESCED
5256                          ? ", quiesced" : "" );
5257                 break;
5258 
5259         case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED:
5260                 printk(MYIOC_s_INFO_FMT "  Domain Validation needed for PhysDisk %d\n",
5261                         ioc->name, disk);
5262                 break;
5263 
5264         case MPI_EVENT_RAID_RC_SMART_DATA:
5265                 printk(MYIOC_s_INFO_FMT "  SMART data received, ASC/ASCQ = %02xh/%02xh\n",
5266                         ioc->name, pRaidEventData->ASC, pRaidEventData->ASCQ);
5267                 break;
5268 
5269         case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED:
5270                 printk(MYIOC_s_INFO_FMT "  replacement of PhysDisk %d has started\n",
5271                         ioc->name, disk);
5272                 break;
5273         }
5274 }
5275 
5276 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5277 /**
5278  *      GetIoUnitPage2 - Retrieve BIOS version and boot order information.
5279  *      @ioc: Pointer to MPT_ADAPTER structure
5280  *
5281  *      Returns: 0 for success
5282  *      -ENOMEM if no memory available
5283  *              -EPERM if not allowed due to ISR context
5284  *              -EAGAIN if no msg frames currently available
5285  *              -EFAULT for non-successful reply or no reply (timeout)
5286  */
5287 static int
5288 GetIoUnitPage2(MPT_ADAPTER *ioc)
5289 {
5290         ConfigPageHeader_t       hdr;
5291         CONFIGPARMS              cfg;
5292         IOUnitPage2_t           *ppage_alloc;
5293         dma_addr_t               page_dma;
5294         int                      data_sz;
5295         int                      rc;
5296 
5297         /* Get the page header */
5298         hdr.PageVersion = 0;
5299         hdr.PageLength = 0;
5300         hdr.PageNumber = 2;
5301         hdr.PageType = MPI_CONFIG_PAGETYPE_IO_UNIT;
5302         cfg.cfghdr.hdr = &hdr;
5303         cfg.physAddr = -1;
5304         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5305         cfg.dir = 0;
5306         cfg.pageAddr = 0;
5307         cfg.timeout = 0;
5308 
5309         if ((rc = mpt_config(ioc, &cfg)) != 0)
5310                 return rc;
5311 
5312         if (hdr.PageLength == 0)
5313                 return 0;
5314 
5315         /* Read the config page */
5316         data_sz = hdr.PageLength * 4;
5317         rc = -ENOMEM;
5318         ppage_alloc = (IOUnitPage2_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page_dma);
5319         if (ppage_alloc) {
5320                 memset((u8 *)ppage_alloc, 0, data_sz);
5321                 cfg.physAddr = page_dma;
5322                 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5323 
5324                 /* If Good, save data */
5325                 if ((rc = mpt_config(ioc, &cfg)) == 0)
5326                         ioc->biosVersion = le32_to_cpu(ppage_alloc->BiosVersion);
5327 
5328                 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage_alloc, page_dma);
5329         }
5330 
5331         return rc;
5332 }
5333 
5334 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5335 /**
5336  *      mpt_GetScsiPortSettings - read SCSI Port Page 0 and 2
5337  *      @ioc: Pointer to a Adapter Strucutre
5338  *      @portnum: IOC port number
5339  *
5340  *      Return: -EFAULT if read of config page header fails
5341  *                      or if no nvram
5342  *      If read of SCSI Port Page 0 fails,
5343  *              NVRAM = MPT_HOST_NVRAM_INVALID  (0xFFFFFFFF)
5344  *              Adapter settings: async, narrow
5345  *              Return 1
5346  *      If read of SCSI Port Page 2 fails,
5347  *              Adapter settings valid
5348  *              NVRAM = MPT_HOST_NVRAM_INVALID  (0xFFFFFFFF)
5349  *              Return 1
5350  *      Else
5351  *              Both valid
5352  *              Return 0
5353  *      CHECK - what type of locking mechanisms should be used????
5354  */
5355 static int
5356 mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum)
5357 {
5358         u8                      *pbuf;
5359         dma_addr_t               buf_dma;
5360         CONFIGPARMS              cfg;
5361         ConfigPageHeader_t       header;
5362         int                      ii;
5363         int                      data, rc = 0;
5364 
5365         /* Allocate memory
5366          */
5367         if (!ioc->spi_data.nvram) {
5368                 int      sz;
5369                 u8      *mem;
5370                 sz = MPT_MAX_SCSI_DEVICES * sizeof(int);
5371                 mem = kmalloc(sz, GFP_ATOMIC);
5372                 if (mem == NULL)
5373                         return -EFAULT;
5374 
5375                 ioc->spi_data.nvram = (int *) mem;
5376 
5377                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SCSI device NVRAM settings @ %p, sz=%d\n",
5378                         ioc->name, ioc->spi_data.nvram, sz));
5379         }
5380 
5381         /* Invalidate NVRAM information
5382          */
5383         for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
5384                 ioc->spi_data.nvram[ii] = MPT_HOST_NVRAM_INVALID;
5385         }
5386 
5387         /* Read SPP0 header, allocate memory, then read page.
5388          */
5389         header.PageVersion = 0;
5390         header.PageLength = 0;
5391         header.PageNumber = 0;
5392         header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
5393         cfg.cfghdr.hdr = &header;
5394         cfg.physAddr = -1;
5395         cfg.pageAddr = portnum;
5396         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5397         cfg.dir = 0;
5398         cfg.timeout = 0;        /* use default */
5399         if (mpt_config(ioc, &cfg) != 0)
5400                  return -EFAULT;
5401 
5402         if (header.PageLength > 0) {
5403                 pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
5404                 if (pbuf) {
5405                         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5406                         cfg.physAddr = buf_dma;
5407                         if (mpt_config(ioc, &cfg) != 0) {
5408                                 ioc->spi_data.maxBusWidth = MPT_NARROW;
5409                                 ioc->spi_data.maxSyncOffset = 0;
5410                                 ioc->spi_data.minSyncFactor = MPT_ASYNC;
5411                                 ioc->spi_data.busType = MPT_HOST_BUS_UNKNOWN;
5412                                 rc = 1;
5413                                 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5414                                         "Unable to read PortPage0 minSyncFactor=%x\n",
5415                                         ioc->name, ioc->spi_data.minSyncFactor));
5416                         } else {
5417                                 /* Save the Port Page 0 data
5418                                  */
5419                                 SCSIPortPage0_t  *pPP0 = (SCSIPortPage0_t  *) pbuf;
5420                                 pPP0->Capabilities = le32_to_cpu(pPP0->Capabilities);
5421                                 pPP0->PhysicalInterface = le32_to_cpu(pPP0->PhysicalInterface);
5422 
5423                                 if ( (pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_QAS) == 0 ) {
5424                                         ioc->spi_data.noQas |= MPT_TARGET_NO_NEGO_QAS;
5425                                         ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5426                                                 "noQas due to Capabilities=%x\n",
5427                                                 ioc->name, pPP0->Capabilities));
5428                                 }
5429                                 ioc->spi_data.maxBusWidth = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_WIDE ? 1 : 0;
5430                                 data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK;
5431                                 if (data) {
5432                                         ioc->spi_data.maxSyncOffset = (u8) (data >> 16);
5433                                         data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK;
5434                                         ioc->spi_data.minSyncFactor = (u8) (data >> 8);
5435                                         ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5436                                                 "PortPage0 minSyncFactor=%x\n",
5437                                                 ioc->name, ioc->spi_data.minSyncFactor));
5438                                 } else {
5439                                         ioc->spi_data.maxSyncOffset = 0;
5440                                         ioc->spi_data.minSyncFactor = MPT_ASYNC;
5441                                 }
5442 
5443                                 ioc->spi_data.busType = pPP0->PhysicalInterface & MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK;
5444 
5445                                 /* Update the minSyncFactor based on bus type.
5446                                  */
5447                                 if ((ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD) ||
5448                                         (ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE))  {
5449 
5450                                         if (ioc->spi_data.minSyncFactor < MPT_ULTRA) {
5451                                                 ioc->spi_data.minSyncFactor = MPT_ULTRA;
5452                                                 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5453                                                         "HVD or SE detected, minSyncFactor=%x\n",
5454                                                         ioc->name, ioc->spi_data.minSyncFactor));
5455                                         }
5456                                 }
5457                         }
5458                         if (pbuf) {
5459                                 pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
5460                         }
5461                 }
5462         }
5463 
5464         /* SCSI Port Page 2 - Read the header then the page.
5465          */
5466         header.PageVersion = 0;
5467         header.PageLength = 0;
5468         header.PageNumber = 2;
5469         header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
5470         cfg.cfghdr.hdr = &header;
5471         cfg.physAddr = -1;
5472         cfg.pageAddr = portnum;
5473         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5474         cfg.dir = 0;
5475         if (mpt_config(ioc, &cfg) != 0)
5476                 return -EFAULT;
5477 
5478         if (header.PageLength > 0) {
5479                 /* Allocate memory and read SCSI Port Page 2
5480                  */
5481                 pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
5482                 if (pbuf) {
5483                         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_NVRAM;
5484                         cfg.physAddr = buf_dma;
5485                         if (mpt_config(ioc, &cfg) != 0) {
5486                                 /* Nvram data is left with INVALID mark
5487                                  */
5488                                 rc = 1;
5489                         } else if (ioc->pcidev->vendor == PCI_VENDOR_ID_ATTO) {
5490 
5491                                 /* This is an ATTO adapter, read Page2 accordingly
5492                                 */
5493                                 ATTO_SCSIPortPage2_t *pPP2 = (ATTO_SCSIPortPage2_t  *) pbuf;
5494                                 ATTODeviceInfo_t *pdevice = NULL;
5495                                 u16 ATTOFlags;
5496 
5497                                 /* Save the Port Page 2 data
5498                                  * (reformat into a 32bit quantity)
5499                                  */
5500                                 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
5501                                   pdevice = &pPP2->DeviceSettings[ii];
5502                                   ATTOFlags = le16_to_cpu(pdevice->ATTOFlags);
5503                                   data = 0;
5504 
5505                                   /* Translate ATTO device flags to LSI format
5506                                    */
5507                                   if (ATTOFlags & ATTOFLAG_DISC)
5508                                     data |= (MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE);
5509                                   if (ATTOFlags & ATTOFLAG_ID_ENB)
5510                                     data |= (MPI_SCSIPORTPAGE2_DEVICE_ID_SCAN_ENABLE);
5511                                   if (ATTOFlags & ATTOFLAG_LUN_ENB)
5512                                     data |= (MPI_SCSIPORTPAGE2_DEVICE_LUN_SCAN_ENABLE);
5513                                   if (ATTOFlags & ATTOFLAG_TAGGED)
5514                                     data |= (MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE);
5515                                   if (!(ATTOFlags & ATTOFLAG_WIDE_ENB))
5516                                     data |= (MPI_SCSIPORTPAGE2_DEVICE_WIDE_DISABLE);
5517 
5518                                   data = (data << 16) | (pdevice->Period << 8) | 10;
5519                                   ioc->spi_data.nvram[ii] = data;
5520                                 }
5521                         } else {
5522                                 SCSIPortPage2_t *pPP2 = (SCSIPortPage2_t  *) pbuf;
5523                                 MpiDeviceInfo_t *pdevice = NULL;
5524 
5525                                 /*
5526                                  * Save "Set to Avoid SCSI Bus Resets" flag
5527                                  */
5528                                 ioc->spi_data.bus_reset =
5529                                     (le32_to_cpu(pPP2->PortFlags) &
5530                                 MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET) ?
5531                                     0 : 1 ;
5532 
5533                                 /* Save the Port Page 2 data
5534                                  * (reformat into a 32bit quantity)
5535                                  */
5536                                 data = le32_to_cpu(pPP2->PortFlags) & MPI_SCSIPORTPAGE2_PORT_FLAGS_DV_MASK;
5537                                 ioc->spi_data.PortFlags = data;
5538                                 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
5539                                         pdevice = &pPP2->DeviceSettings[ii];
5540                                         data = (le16_to_cpu(pdevice->DeviceFlags) << 16) |
5541                                                 (pdevice->SyncFactor << 8) | pdevice->Timeout;
5542                                         ioc->spi_data.nvram[ii] = data;
5543                                 }
5544                         }
5545 
5546                         pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
5547                 }
5548         }
5549 
5550         /* Update Adapter limits with those from NVRAM
5551          * Comment: Don't need to do this. Target performance
5552          * parameters will never exceed the adapters limits.
5553          */
5554 
5555         return rc;
5556 }
5557 
5558 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5559 /**
5560  *      mpt_readScsiDevicePageHeaders - save version and length of SDP1
5561  *      @ioc: Pointer to a Adapter Strucutre
5562  *      @portnum: IOC port number
5563  *
5564  *      Return: -EFAULT if read of config page header fails
5565  *              or 0 if success.
5566  */
5567 static int
5568 mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum)
5569 {
5570         CONFIGPARMS              cfg;
5571         ConfigPageHeader_t       header;
5572 
5573         /* Read the SCSI Device Page 1 header
5574          */
5575         header.PageVersion = 0;
5576         header.PageLength = 0;
5577         header.PageNumber = 1;
5578         header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
5579         cfg.cfghdr.hdr = &header;
5580         cfg.physAddr = -1;
5581         cfg.pageAddr = portnum;
5582         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5583         cfg.dir = 0;
5584         cfg.timeout = 0;
5585         if (mpt_config(ioc, &cfg) != 0)
5586                  return -EFAULT;
5587 
5588         ioc->spi_data.sdp1version = cfg.cfghdr.hdr->PageVersion;
5589         ioc->spi_data.sdp1length = cfg.cfghdr.hdr->PageLength;
5590 
5591         header.PageVersion = 0;
5592         header.PageLength = 0;
5593         header.PageNumber = 0;
5594         header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
5595         if (mpt_config(ioc, &cfg) != 0)
5596                  return -EFAULT;
5597 
5598         ioc->spi_data.sdp0version = cfg.cfghdr.hdr->PageVersion;
5599         ioc->spi_data.sdp0length = cfg.cfghdr.hdr->PageLength;
5600 
5601         dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 0: version %d length %d\n",
5602                         ioc->name, ioc->spi_data.sdp0version, ioc->spi_data.sdp0length));
5603 
5604         dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 1: version %d length %d\n",
5605                         ioc->name, ioc->spi_data.sdp1version, ioc->spi_data.sdp1length));
5606         return 0;
5607 }
5608 
5609 /**
5610  * mpt_inactive_raid_list_free - This clears this link list.
5611  * @ioc : pointer to per adapter structure
5612  **/
5613 static void
5614 mpt_inactive_raid_list_free(MPT_ADAPTER *ioc)
5615 {
5616         struct inactive_raid_component_info *component_info, *pNext;
5617 
5618         if (list_empty(&ioc->raid_data.inactive_list))
5619                 return;
5620 
5621         mutex_lock(&ioc->raid_data.inactive_list_mutex);
5622         list_for_each_entry_safe(component_info, pNext,
5623             &ioc->raid_data.inactive_list, list) {
5624                 list_del(&component_info->list);
5625                 kfree(component_info);
5626         }
5627         mutex_unlock(&ioc->raid_data.inactive_list_mutex);
5628 }
5629 
5630 /**
5631  * mpt_inactive_raid_volumes - sets up link list of phy_disk_nums for devices belonging in an inactive volume
5632  *
5633  * @ioc : pointer to per adapter structure
5634  * @channel : volume channel
5635  * @id : volume target id
5636  **/
5637 static void
5638 mpt_inactive_raid_volumes(MPT_ADAPTER *ioc, u8 channel, u8 id)
5639 {
5640         CONFIGPARMS                     cfg;
5641         ConfigPageHeader_t              hdr;
5642         dma_addr_t                      dma_handle;
5643         pRaidVolumePage0_t              buffer = NULL;
5644         int                             i;
5645         RaidPhysDiskPage0_t             phys_disk;
5646         struct inactive_raid_component_info *component_info;
5647         int                             handle_inactive_volumes;
5648 
5649         memset(&cfg, 0 , sizeof(CONFIGPARMS));
5650         memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5651         hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_VOLUME;
5652         cfg.pageAddr = (channel << 8) + id;
5653         cfg.cfghdr.hdr = &hdr;
5654         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5655 
5656         if (mpt_config(ioc, &cfg) != 0)
5657                 goto out;
5658 
5659         if (!hdr.PageLength)
5660                 goto out;
5661 
5662         buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5663             &dma_handle);
5664 
5665         if (!buffer)
5666                 goto out;
5667 
5668         cfg.physAddr = dma_handle;
5669         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5670 
5671         if (mpt_config(ioc, &cfg) != 0)
5672                 goto out;
5673 
5674         if (!buffer->NumPhysDisks)
5675                 goto out;
5676 
5677         handle_inactive_volumes =
5678            (buffer->VolumeStatus.Flags & MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE ||
5679            (buffer->VolumeStatus.Flags & MPI_RAIDVOL0_STATUS_FLAG_ENABLED) == 0 ||
5680             buffer->VolumeStatus.State == MPI_RAIDVOL0_STATUS_STATE_FAILED ||
5681             buffer->VolumeStatus.State == MPI_RAIDVOL0_STATUS_STATE_MISSING) ? 1 : 0;
5682 
5683         if (!handle_inactive_volumes)
5684                 goto out;
5685 
5686         mutex_lock(&ioc->raid_data.inactive_list_mutex);
5687         for (i = 0; i < buffer->NumPhysDisks; i++) {
5688                 if(mpt_raid_phys_disk_pg0(ioc,
5689                     buffer->PhysDisk[i].PhysDiskNum, &phys_disk) != 0)
5690                         continue;
5691 
5692                 if ((component_info = kmalloc(sizeof (*component_info),
5693                  GFP_KERNEL)) == NULL)
5694                         continue;
5695 
5696                 component_info->volumeID = id;
5697                 component_info->volumeBus = channel;
5698                 component_info->d.PhysDiskNum = phys_disk.PhysDiskNum;
5699                 component_info->d.PhysDiskBus = phys_disk.PhysDiskBus;
5700                 component_info->d.PhysDiskID = phys_disk.PhysDiskID;
5701                 component_info->d.PhysDiskIOC = phys_disk.PhysDiskIOC;
5702 
5703                 list_add_tail(&component_info->list,
5704                     &ioc->raid_data.inactive_list);
5705         }
5706         mutex_unlock(&ioc->raid_data.inactive_list_mutex);
5707 
5708  out:
5709         if (buffer)
5710                 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5711                     dma_handle);
5712 }
5713 
5714 /**
5715  *      mpt_raid_phys_disk_pg0 - returns phys disk page zero
5716  *      @ioc: Pointer to a Adapter Structure
5717  *      @phys_disk_num: io unit unique phys disk num generated by the ioc
5718  *      @phys_disk: requested payload data returned
5719  *
5720  *      Return:
5721  *      0 on success
5722  *      -EFAULT if read of config page header fails or data pointer not NULL
5723  *      -ENOMEM if pci_alloc failed
5724  **/
5725 int
5726 mpt_raid_phys_disk_pg0(MPT_ADAPTER *ioc, u8 phys_disk_num,
5727                         RaidPhysDiskPage0_t *phys_disk)
5728 {
5729         CONFIGPARMS                     cfg;
5730         ConfigPageHeader_t              hdr;
5731         dma_addr_t                      dma_handle;
5732         pRaidPhysDiskPage0_t            buffer = NULL;
5733         int                             rc;
5734 
5735         memset(&cfg, 0 , sizeof(CONFIGPARMS));
5736         memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5737         memset(phys_disk, 0, sizeof(RaidPhysDiskPage0_t));
5738 
5739         hdr.PageVersion = MPI_RAIDPHYSDISKPAGE0_PAGEVERSION;
5740         hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_PHYSDISK;
5741         cfg.cfghdr.hdr = &hdr;
5742         cfg.physAddr = -1;
5743         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5744 
5745         if (mpt_config(ioc, &cfg) != 0) {
5746                 rc = -EFAULT;
5747                 goto out;
5748         }
5749 
5750         if (!hdr.PageLength) {
5751                 rc = -EFAULT;
5752                 goto out;
5753         }
5754 
5755         buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5756             &dma_handle);
5757 
5758         if (!buffer) {
5759                 rc = -ENOMEM;
5760                 goto out;
5761         }
5762 
5763         cfg.physAddr = dma_handle;
5764         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5765         cfg.pageAddr = phys_disk_num;
5766 
5767         if (mpt_config(ioc, &cfg) != 0) {
5768                 rc = -EFAULT;
5769                 goto out;
5770         }
5771 
5772         rc = 0;
5773         memcpy(phys_disk, buffer, sizeof(*buffer));
5774         phys_disk->MaxLBA = le32_to_cpu(buffer->MaxLBA);
5775 
5776  out:
5777 
5778         if (buffer)
5779                 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5780                     dma_handle);
5781 
5782         return rc;
5783 }
5784 
5785 /**
5786  *      mpt_raid_phys_disk_get_num_paths - returns number paths associated to this phys_num
5787  *      @ioc: Pointer to a Adapter Structure
5788  *      @phys_disk_num: io unit unique phys disk num generated by the ioc
5789  *
5790  *      Return:
5791  *      returns number paths
5792  **/
5793 int
5794 mpt_raid_phys_disk_get_num_paths(MPT_ADAPTER *ioc, u8 phys_disk_num)
5795 {
5796         CONFIGPARMS                     cfg;
5797         ConfigPageHeader_t              hdr;
5798         dma_addr_t                      dma_handle;
5799         pRaidPhysDiskPage1_t            buffer = NULL;
5800         int                             rc;
5801 
5802         memset(&cfg, 0 , sizeof(CONFIGPARMS));
5803         memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5804 
5805         hdr.PageVersion = MPI_RAIDPHYSDISKPAGE1_PAGEVERSION;
5806         hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_PHYSDISK;
5807         hdr.PageNumber = 1;
5808         cfg.cfghdr.hdr = &hdr;
5809         cfg.physAddr = -1;
5810         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5811 
5812         if (mpt_config(ioc, &cfg) != 0) {
5813                 rc = 0;
5814                 goto out;
5815         }
5816 
5817         if (!hdr.PageLength) {
5818                 rc = 0;
5819                 goto out;
5820         }
5821 
5822         buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5823             &dma_handle);
5824 
5825         if (!buffer) {
5826                 rc = 0;
5827                 goto out;
5828         }
5829 
5830         cfg.physAddr = dma_handle;
5831         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5832         cfg.pageAddr = phys_disk_num;
5833 
5834         if (mpt_config(ioc, &cfg) != 0) {
5835                 rc = 0;
5836                 goto out;
5837         }
5838 
5839         rc = buffer->NumPhysDiskPaths;
5840  out:
5841 
5842         if (buffer)
5843                 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5844                     dma_handle);
5845 
5846         return rc;
5847 }
5848 EXPORT_SYMBOL(mpt_raid_phys_disk_get_num_paths);
5849 
5850 /**
5851  *      mpt_raid_phys_disk_pg1 - returns phys disk page 1
5852  *      @ioc: Pointer to a Adapter Structure
5853  *      @phys_disk_num: io unit unique phys disk num generated by the ioc
5854  *      @phys_disk: requested payload data returned
5855  *
5856  *      Return:
5857  *      0 on success
5858  *      -EFAULT if read of config page header fails or data pointer not NULL
5859  *      -ENOMEM if pci_alloc failed
5860  **/
5861 int
5862 mpt_raid_phys_disk_pg1(MPT_ADAPTER *ioc, u8 phys_disk_num,
5863                 RaidPhysDiskPage1_t *phys_disk)
5864 {
5865         CONFIGPARMS                     cfg;
5866         ConfigPageHeader_t              hdr;
5867         dma_addr_t                      dma_handle;
5868         pRaidPhysDiskPage1_t            buffer = NULL;
5869         int                             rc;
5870         int                             i;
5871         __le64                          sas_address;
5872 
5873         memset(&cfg, 0 , sizeof(CONFIGPARMS));
5874         memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5875         rc = 0;
5876 
5877         hdr.PageVersion = MPI_RAIDPHYSDISKPAGE1_PAGEVERSION;
5878         hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_PHYSDISK;
5879         hdr.PageNumber = 1;
5880         cfg.cfghdr.hdr = &hdr;
5881         cfg.physAddr = -1;
5882         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5883 
5884         if (mpt_config(ioc, &cfg) != 0) {
5885                 rc = -EFAULT;
5886                 goto out;
5887         }
5888 
5889         if (!hdr.PageLength) {
5890                 rc = -EFAULT;
5891                 goto out;
5892         }
5893 
5894         buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5895             &dma_handle);
5896 
5897         if (!buffer) {
5898                 rc = -ENOMEM;
5899                 goto out;
5900         }
5901 
5902         cfg.physAddr = dma_handle;
5903         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5904         cfg.pageAddr = phys_disk_num;
5905 
5906         if (mpt_config(ioc, &cfg) != 0) {
5907                 rc = -EFAULT;
5908                 goto out;
5909         }
5910 
5911         phys_disk->NumPhysDiskPaths = buffer->NumPhysDiskPaths;
5912         phys_disk->PhysDiskNum = phys_disk_num;
5913         for (i = 0; i < phys_disk->NumPhysDiskPaths; i++) {
5914                 phys_disk->Path[i].PhysDiskID = buffer->Path[i].PhysDiskID;
5915                 phys_disk->Path[i].PhysDiskBus = buffer->Path[i].PhysDiskBus;
5916                 phys_disk->Path[i].OwnerIdentifier =
5917                                 buffer->Path[i].OwnerIdentifier;
5918                 phys_disk->Path[i].Flags = le16_to_cpu(buffer->Path[i].Flags);
5919                 memcpy(&sas_address, &buffer->Path[i].WWID, sizeof(__le64));
5920                 sas_address = le64_to_cpu(sas_address);
5921                 memcpy(&phys_disk->Path[i].WWID, &sas_address, sizeof(__le64));
5922                 memcpy(&sas_address,
5923                                 &buffer->Path[i].OwnerWWID, sizeof(__le64));
5924                 sas_address = le64_to_cpu(sas_address);
5925                 memcpy(&phys_disk->Path[i].OwnerWWID,
5926                                 &sas_address, sizeof(__le64));
5927         }
5928 
5929  out:
5930 
5931         if (buffer)
5932                 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5933                     dma_handle);
5934 
5935         return rc;
5936 }
5937 EXPORT_SYMBOL(mpt_raid_phys_disk_pg1);
5938 
5939 
5940 /**
5941  *      mpt_findImVolumes - Identify IDs of hidden disks and RAID Volumes
5942  *      @ioc: Pointer to a Adapter Strucutre
5943  *
5944  *      Return:
5945  *      0 on success
5946  *      -EFAULT if read of config page header fails or data pointer not NULL
5947  *      -ENOMEM if pci_alloc failed
5948  **/
5949 int
5950 mpt_findImVolumes(MPT_ADAPTER *ioc)
5951 {
5952         IOCPage2_t              *pIoc2;
5953         u8                      *mem;
5954         dma_addr_t               ioc2_dma;
5955         CONFIGPARMS              cfg;
5956         ConfigPageHeader_t       header;
5957         int                      rc = 0;
5958         int                      iocpage2sz;
5959         int                      i;
5960 
5961         if (!ioc->ir_firmware)
5962                 return 0;
5963 
5964         /* Free the old page
5965          */
5966         kfree(ioc->raid_data.pIocPg2);
5967         ioc->raid_data.pIocPg2 = NULL;
5968         mpt_inactive_raid_list_free(ioc);
5969 
5970         /* Read IOCP2 header then the page.
5971          */
5972         header.PageVersion = 0;
5973         header.PageLength = 0;
5974         header.PageNumber = 2;
5975         header.PageType = MPI_CONFIG_PAGETYPE_IOC;
5976         cfg.cfghdr.hdr = &header;
5977         cfg.physAddr = -1;
5978         cfg.pageAddr = 0;
5979         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5980         cfg.dir = 0;
5981         cfg.timeout = 0;
5982         if (mpt_config(ioc, &cfg) != 0)
5983                  return -EFAULT;
5984 
5985         if (header.PageLength == 0)
5986                 return -EFAULT;
5987 
5988         iocpage2sz = header.PageLength * 4;
5989         pIoc2 = pci_alloc_consistent(ioc->pcidev, iocpage2sz, &ioc2_dma);
5990         if (!pIoc2)
5991                 return -ENOMEM;
5992 
5993         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5994         cfg.physAddr = ioc2_dma;
5995         if (mpt_config(ioc, &cfg) != 0)
5996                 goto out;
5997 
5998         mem = kmalloc(iocpage2sz, GFP_KERNEL);
5999         if (!mem) {
6000                 rc = -ENOMEM;
6001                 goto out;
6002         }
6003 
6004         memcpy(mem, (u8 *)pIoc2, iocpage2sz);
6005         ioc->raid_data.pIocPg2 = (IOCPage2_t *) mem;
6006 
6007         mpt_read_ioc_pg_3(ioc);
6008 
6009         for (i = 0; i < pIoc2->NumActiveVolumes ; i++)
6010                 mpt_inactive_raid_volumes(ioc,
6011                     pIoc2->RaidVolume[i].VolumeBus,
6012                     pIoc2->RaidVolume[i].VolumeID);
6013 
6014  out:
6015         pci_free_consistent(ioc->pcidev, iocpage2sz, pIoc2, ioc2_dma);
6016 
6017         return rc;
6018 }
6019 
6020 static int
6021 mpt_read_ioc_pg_3(MPT_ADAPTER *ioc)
6022 {
6023         IOCPage3_t              *pIoc3;
6024         u8                      *mem;
6025         CONFIGPARMS              cfg;
6026         ConfigPageHeader_t       header;
6027         dma_addr_t               ioc3_dma;
6028         int                      iocpage3sz = 0;
6029 
6030         /* Free the old page
6031          */
6032         kfree(ioc->raid_data.pIocPg3);
6033         ioc->raid_data.pIocPg3 = NULL;
6034 
6035         /* There is at least one physical disk.
6036          * Read and save IOC Page 3
6037          */
6038         header.PageVersion = 0;
6039         header.PageLength = 0;
6040         header.PageNumber = 3;
6041         header.PageType = MPI_CONFIG_PAGETYPE_IOC;
6042         cfg.cfghdr.hdr = &header;
6043         cfg.physAddr = -1;
6044         cfg.pageAddr = 0;
6045         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
6046         cfg.dir = 0;
6047         cfg.timeout = 0;
6048         if (mpt_config(ioc, &cfg) != 0)
6049                 return 0;
6050 
6051         if (header.PageLength == 0)
6052                 return 0;
6053 
6054         /* Read Header good, alloc memory
6055          */
6056         iocpage3sz = header.PageLength * 4;
6057         pIoc3 = pci_alloc_consistent(ioc->pcidev, iocpage3sz, &ioc3_dma);
6058         if (!pIoc3)
6059                 return 0;
6060 
6061         /* Read the Page and save the data
6062          * into malloc'd memory.
6063          */
6064         cfg.physAddr = ioc3_dma;
6065         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6066         if (mpt_config(ioc, &cfg) == 0) {
6067                 mem = kmalloc(iocpage3sz, GFP_KERNEL);
6068                 if (mem) {
6069                         memcpy(mem, (u8 *)pIoc3, iocpage3sz);
6070                         ioc->raid_data.pIocPg3 = (IOCPage3_t *) mem;
6071                 }
6072         }
6073 
6074         pci_free_consistent(ioc->pcidev, iocpage3sz, pIoc3, ioc3_dma);
6075 
6076         return 0;
6077 }
6078 
6079 static void
6080 mpt_read_ioc_pg_4(MPT_ADAPTER *ioc)
6081 {
6082         IOCPage4_t              *pIoc4;
6083         CONFIGPARMS              cfg;
6084         ConfigPageHeader_t       header;
6085         dma_addr_t               ioc4_dma;
6086         int                      iocpage4sz;
6087 
6088         /* Read and save IOC Page 4
6089          */
6090         header.PageVersion = 0;
6091         header.PageLength = 0;
6092         header.PageNumber = 4;
6093         header.PageType = MPI_CONFIG_PAGETYPE_IOC;
6094         cfg.cfghdr.hdr = &header;
6095         cfg.physAddr = -1;
6096         cfg.pageAddr = 0;
6097         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
6098         cfg.dir = 0;
6099         cfg.timeout = 0;
6100         if (mpt_config(ioc, &cfg) != 0)
6101                 return;
6102 
6103         if (header.PageLength == 0)
6104                 return;
6105 
6106         if ( (pIoc4 = ioc->spi_data.pIocPg4) == NULL ) {
6107                 iocpage4sz = (header.PageLength + 4) * 4; /* Allow 4 additional SEP's */
6108                 pIoc4 = pci_alloc_consistent(ioc->pcidev, iocpage4sz, &ioc4_dma);
6109                 if (!pIoc4)
6110                         return;
6111                 ioc->alloc_total += iocpage4sz;
6112         } else {
6113                 ioc4_dma = ioc->spi_data.IocPg4_dma;
6114                 iocpage4sz = ioc->spi_data.IocPg4Sz;
6115         }
6116 
6117         /* Read the Page into dma memory.
6118          */
6119         cfg.physAddr = ioc4_dma;
6120         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6121         if (mpt_config(ioc, &cfg) == 0) {
6122                 ioc->spi_data.pIocPg4 = (IOCPage4_t *) pIoc4;
6123                 ioc->spi_data.IocPg4_dma = ioc4_dma;
6124                 ioc->spi_data.IocPg4Sz = iocpage4sz;
6125         } else {
6126                 pci_free_consistent(ioc->pcidev, iocpage4sz, pIoc4, ioc4_dma);
6127                 ioc->spi_data.pIocPg4 = NULL;
6128                 ioc->alloc_total -= iocpage4sz;
6129         }
6130 }
6131 
6132 static void
6133 mpt_read_ioc_pg_1(MPT_ADAPTER *ioc)
6134 {
6135         IOCPage1_t              *pIoc1;
6136         CONFIGPARMS              cfg;
6137         ConfigPageHeader_t       header;
6138         dma_addr_t               ioc1_dma;
6139         int                      iocpage1sz = 0;
6140         u32                      tmp;
6141 
6142         /* Check the Coalescing Timeout in IOC Page 1
6143          */
6144         header.PageVersion = 0;
6145         header.PageLength = 0;
6146         header.PageNumber = 1;
6147         header.PageType = MPI_CONFIG_PAGETYPE_IOC;
6148         cfg.cfghdr.hdr = &header;
6149         cfg.physAddr = -1;
6150         cfg.pageAddr = 0;
6151         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
6152         cfg.dir = 0;
6153         cfg.timeout = 0;
6154         if (mpt_config(ioc, &cfg) != 0)
6155                 return;
6156 
6157         if (header.PageLength == 0)
6158                 return;
6159 
6160         /* Read Header good, alloc memory
6161          */
6162         iocpage1sz = header.PageLength * 4;
6163         pIoc1 = pci_alloc_consistent(ioc->pcidev, iocpage1sz, &ioc1_dma);
6164         if (!pIoc1)
6165                 return;
6166 
6167         /* Read the Page and check coalescing timeout
6168          */
6169         cfg.physAddr = ioc1_dma;
6170         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6171         if (mpt_config(ioc, &cfg) == 0) {
6172 
6173                 tmp = le32_to_cpu(pIoc1->Flags) & MPI_IOCPAGE1_REPLY_COALESCING;
6174                 if (tmp == MPI_IOCPAGE1_REPLY_COALESCING) {
6175                         tmp = le32_to_cpu(pIoc1->CoalescingTimeout);
6176 
6177                         dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Coalescing Enabled Timeout = %d\n",
6178                                         ioc->name, tmp));
6179 
6180                         if (tmp > MPT_COALESCING_TIMEOUT) {
6181                                 pIoc1->CoalescingTimeout = cpu_to_le32(MPT_COALESCING_TIMEOUT);
6182 
6183                                 /* Write NVRAM and current
6184                                  */
6185                                 cfg.dir = 1;
6186                                 cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT;
6187                                 if (mpt_config(ioc, &cfg) == 0) {
6188                                         dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Reset Current Coalescing Timeout to = %d\n",
6189                                                         ioc->name, MPT_COALESCING_TIMEOUT));
6190 
6191                                         cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM;
6192                                         if (mpt_config(ioc, &cfg) == 0) {
6193                                                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6194                                                                 "Reset NVRAM Coalescing Timeout to = %d\n",
6195                                                                 ioc->name, MPT_COALESCING_TIMEOUT));
6196                                         } else {
6197                                                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6198                                                                 "Reset NVRAM Coalescing Timeout Failed\n",
6199                                                                 ioc->name));
6200                                         }
6201 
6202                                 } else {
6203                                         dprintk(ioc, printk(MYIOC_s_WARN_FMT
6204                                                 "Reset of Current Coalescing Timeout Failed!\n",
6205                                                 ioc->name));
6206                                 }
6207                         }
6208 
6209                 } else {
6210                         dprintk(ioc, printk(MYIOC_s_WARN_FMT "Coalescing Disabled\n", ioc->name));
6211                 }
6212         }
6213 
6214         pci_free_consistent(ioc->pcidev, iocpage1sz, pIoc1, ioc1_dma);
6215 
6216         return;
6217 }
6218 
6219 static void
6220 mpt_get_manufacturing_pg_0(MPT_ADAPTER *ioc)
6221 {
6222         CONFIGPARMS             cfg;
6223         ConfigPageHeader_t      hdr;
6224         dma_addr_t              buf_dma;
6225         ManufacturingPage0_t    *pbuf = NULL;
6226 
6227         memset(&cfg, 0 , sizeof(CONFIGPARMS));
6228         memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
6229 
6230         hdr.PageType = MPI_CONFIG_PAGETYPE_MANUFACTURING;
6231         cfg.cfghdr.hdr = &hdr;
6232         cfg.physAddr = -1;
6233         cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
6234         cfg.timeout = 10;
6235 
6236         if (mpt_config(ioc, &cfg) != 0)
6237                 goto out;
6238 
6239         if (!cfg.cfghdr.hdr->PageLength)
6240                 goto out;
6241 
6242         cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6243         pbuf = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4, &buf_dma);
6244         if (!pbuf)
6245                 goto out;
6246 
6247         cfg.physAddr = buf_dma;
6248 
6249         if (mpt_config(ioc, &cfg) != 0)
6250                 goto out;
6251 
6252         memcpy(ioc->board_name, pbuf->BoardName, sizeof(ioc->board_name));
6253         memcpy(ioc->board_assembly, pbuf->BoardAssembly, sizeof(ioc->board_assembly));
6254         memcpy(ioc->board_tracer, pbuf->BoardTracerNumber, sizeof(ioc->board_tracer));
6255 
6256 out:
6257 
6258         if (pbuf)
6259                 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, pbuf, buf_dma);
6260 }
6261 
6262 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6263 /**
6264  *      SendEventNotification - Send EventNotification (on or off) request to adapter
6265  *      @ioc: Pointer to MPT_ADAPTER structure
6266  *      @EvSwitch: Event switch flags
6267  *      @sleepFlag: Specifies whether the process can sleep
6268  */
6269 static int
6270 SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch, int sleepFlag)
6271 {
6272         EventNotification_t     evn;
6273         MPIDefaultReply_t       reply_buf;
6274 
6275         memset(&evn, 0, sizeof(EventNotification_t));
6276         memset(&reply_buf, 0, sizeof(MPIDefaultReply_t));
6277 
6278         evn.Function = MPI_FUNCTION_EVENT_NOTIFICATION;
6279         evn.Switch = EvSwitch;
6280         evn.MsgContext = cpu_to_le32(mpt_base_index << 16);
6281 
6282         devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6283             "Sending EventNotification (%d) request %p\n",
6284             ioc->name, EvSwitch, &evn));
6285 
6286         return mpt_handshake_req_reply_wait(ioc, sizeof(EventNotification_t),
6287             (u32 *)&evn, sizeof(MPIDefaultReply_t), (u16 *)&reply_buf, 30,
6288             sleepFlag);
6289 }
6290 
6291 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6292 /**
6293  *      SendEventAck - Send EventAck request to MPT adapter.
6294  *      @ioc: Pointer to MPT_ADAPTER structure
6295  *      @evnp: Pointer to original EventNotification request
6296  */
6297 static int
6298 SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp)
6299 {
6300         EventAck_t      *pAck;
6301 
6302         if ((pAck = (EventAck_t *) mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
6303                 dfailprintk(ioc, printk(MYIOC_s_WARN_FMT "%s, no msg frames!!\n",
6304                     ioc->name, __func__));
6305                 return -1;
6306         }
6307 
6308         devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending EventAck\n", ioc->name));
6309 
6310         pAck->Function     = MPI_FUNCTION_EVENT_ACK;
6311         pAck->ChainOffset  = 0;
6312         pAck->Reserved[0]  = pAck->Reserved[1] = 0;
6313         pAck->MsgFlags     = 0;
6314         pAck->Reserved1[0] = pAck->Reserved1[1] = pAck->Reserved1[2] = 0;
6315         pAck->Event        = evnp->Event;
6316         pAck->EventContext = evnp->EventContext;
6317 
6318         mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)pAck);
6319 
6320         return 0;
6321 }
6322 
6323 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6324 /**
6325  *      mpt_config - Generic function to issue config message
6326  *      @ioc:   Pointer to an adapter structure
6327  *      @pCfg:  Pointer to a configuration structure. Struct contains
6328  *              action, page address, direction, physical address
6329  *              and pointer to a configuration page header
6330  *              Page header is updated.
6331  *
6332  *      Returns 0 for success
6333  *      -EPERM if not allowed due to ISR context
6334  *      -EAGAIN if no msg frames currently available
6335  *      -EFAULT for non-successful reply or no reply (timeout)
6336  */
6337 int
6338 mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg)
6339 {
6340         Config_t        *pReq;
6341         ConfigReply_t   *pReply;
6342         ConfigExtendedPageHeader_t  *pExtHdr = NULL;
6343         MPT_FRAME_HDR   *mf;
6344         int              ii;
6345         int              flagsLength;
6346         long             timeout;
6347         int              ret;
6348         u8               page_type = 0, extend_page;
6349         unsigned long    timeleft;
6350         unsigned long    flags;
6351     int          in_isr;
6352         u8               issue_hard_reset = 0;
6353         u8               retry_count = 0;
6354 
6355         /*      Prevent calling wait_event() (below), if caller happens
6356          *      to be in ISR context, because that is fatal!
6357          */
6358         in_isr = in_interrupt();
6359         if (in_isr) {
6360                 dcprintk(ioc, printk(MYIOC_s_WARN_FMT "Config request not allowed in ISR context!\n",
6361                                 ioc->name));
6362                 return -EPERM;
6363     }
6364 
6365         /* don't send a config page during diag reset */
6366         spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6367         if (ioc->ioc_reset_in_progress) {
6368                 dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6369                     "%s: busy with host reset\n", ioc->name, __func__));
6370                 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6371                 return -EBUSY;
6372         }
6373         spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6374 
6375         /* don't send if no chance of success */
6376         if (!ioc->active ||
6377             mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_OPERATIONAL) {
6378                 dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6379                     "%s: ioc not operational, %d, %xh\n",
6380                     ioc->name, __func__, ioc->active,
6381                     mpt_GetIocState(ioc, 0)));
6382                 return -EFAULT;
6383         }
6384 
6385  retry_config:
6386         mutex_lock(&ioc->mptbase_cmds.mutex);
6387         /* init the internal cmd struct */
6388         memset(ioc->mptbase_cmds.reply, 0 , MPT_DEFAULT_FRAME_SIZE);
6389         INITIALIZE_MGMT_STATUS(ioc->mptbase_cmds.status)
6390 
6391         /* Get and Populate a free Frame
6392          */
6393         if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
6394                 dcprintk(ioc, printk(MYIOC_s_WARN_FMT
6395                 "mpt_config: no msg frames!\n", ioc->name));
6396                 ret = -EAGAIN;
6397                 goto out;
6398         }
6399 
6400         pReq = (Config_t *)mf;
6401         pReq->Action = pCfg->action;
6402         pReq->Reserved = 0;
6403         pReq->ChainOffset = 0;
6404         pReq->Function = MPI_FUNCTION_CONFIG;
6405 
6406         /* Assume page type is not extended and clear "reserved" fields. */
6407         pReq->ExtPageLength = 0;
6408         pReq->ExtPageType = 0;
6409         pReq->MsgFlags = 0;
6410 
6411         for (ii=0; ii < 8; ii++)
6412                 pReq->Reserved2[ii] = 0;
6413 
6414         pReq->Header.PageVersion = pCfg->cfghdr.hdr->PageVersion;
6415         pReq->Header.PageLength = pCfg->cfghdr.hdr->PageLength;
6416         pReq->Header.PageNumber = pCfg->cfghdr.hdr->PageNumber;
6417         pReq->Header.PageType = (pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK);
6418 
6419         if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) {
6420                 pExtHdr = (ConfigExtendedPageHeader_t *)pCfg->cfghdr.ehdr;
6421                 pReq->ExtPageLength = cpu_to_le16(pExtHdr->ExtPageLength);
6422                 pReq->ExtPageType = pExtHdr->ExtPageType;
6423                 pReq->Header.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
6424 
6425                 /* Page Length must be treated as a reserved field for the
6426                  * extended header.
6427                  */
6428                 pReq->Header.PageLength = 0;
6429         }
6430 
6431         pReq->PageAddress = cpu_to_le32(pCfg->pageAddr);
6432 
6433         /* Add a SGE to the config request.
6434          */
6435         if (pCfg->dir)
6436                 flagsLength = MPT_SGE_FLAGS_SSIMPLE_WRITE;
6437         else
6438                 flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ;
6439 
6440         if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) ==
6441             MPI_CONFIG_PAGETYPE_EXTENDED) {
6442                 flagsLength |= pExtHdr->ExtPageLength * 4;
6443                 page_type = pReq->ExtPageType;
6444                 extend_page = 1;
6445         } else {
6446                 flagsLength |= pCfg->cfghdr.hdr->PageLength * 4;
6447                 page_type = pReq->Header.PageType;
6448                 extend_page = 0;
6449         }
6450 
6451         dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6452             "Sending Config request type 0x%x, page 0x%x and action %d\n",
6453             ioc->name, page_type, pReq->Header.PageNumber, pReq->Action));
6454 
6455         ioc->add_sge((char *)&pReq->PageBufferSGE, flagsLength, pCfg->physAddr);
6456         timeout = (pCfg->timeout < 15) ? HZ*15 : HZ*pCfg->timeout;
6457         mpt_put_msg_frame(mpt_base_index, ioc, mf);
6458         timeleft = wait_for_completion_timeout(&ioc->mptbase_cmds.done,
6459                 timeout);
6460         if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_COMMAND_GOOD)) {
6461                 ret = -ETIME;
6462                 dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6463                     "Failed Sending Config request type 0x%x, page 0x%x,"
6464                     " action %d, status %xh, time left %ld\n\n",
6465                         ioc->name, page_type, pReq->Header.PageNumber,
6466                         pReq->Action, ioc->mptbase_cmds.status, timeleft));
6467                 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_DID_IOCRESET)
6468                         goto out;
6469                 if (!timeleft) {
6470                         spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6471                         if (ioc->ioc_reset_in_progress) {
6472                                 spin_unlock_irqrestore(&ioc->taskmgmt_lock,
6473                                         flags);
6474                                 printk(MYIOC_s_INFO_FMT "%s: host reset in"
6475                                         " progress mpt_config timed out.!!\n",
6476                                         __func__, ioc->name);
6477                                 mutex_unlock(&ioc->mptbase_cmds.mutex);
6478                                 return -EFAULT;
6479                         }
6480                         spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6481                         issue_hard_reset = 1;
6482                 }
6483                 goto out;
6484         }
6485 
6486         if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_RF_VALID)) {
6487                 ret = -1;
6488                 goto out;
6489         }
6490         pReply = (ConfigReply_t *)ioc->mptbase_cmds.reply;
6491         ret = le16_to_cpu(pReply->IOCStatus) & MPI_IOCSTATUS_MASK;
6492         if (ret == MPI_IOCSTATUS_SUCCESS) {
6493                 if (extend_page) {
6494                         pCfg->cfghdr.ehdr->ExtPageLength =
6495                             le16_to_cpu(pReply->ExtPageLength);
6496                         pCfg->cfghdr.ehdr->ExtPageType =
6497                             pReply->ExtPageType;
6498                 }
6499                 pCfg->cfghdr.hdr->PageVersion = pReply->Header.PageVersion;
6500                 pCfg->cfghdr.hdr->PageLength = pReply->Header.PageLength;
6501                 pCfg->cfghdr.hdr->PageNumber = pReply->Header.PageNumber;
6502                 pCfg->cfghdr.hdr->PageType = pReply->Header.PageType;
6503 
6504         }
6505 
6506         if (retry_count)
6507                 printk(MYIOC_s_INFO_FMT "Retry completed "
6508                     "ret=0x%x timeleft=%ld\n",
6509                     ioc->name, ret, timeleft);
6510 
6511         dcprintk(ioc, printk(KERN_DEBUG "IOCStatus=%04xh, IOCLogInfo=%08xh\n",
6512              ret, le32_to_cpu(pReply->IOCLogInfo)));
6513 
6514 out:
6515 
6516         CLEAR_MGMT_STATUS(ioc->mptbase_cmds.status)
6517         mutex_unlock(&ioc->mptbase_cmds.mutex);
6518         if (issue_hard_reset) {
6519                 issue_hard_reset = 0;
6520                 printk(MYIOC_s_WARN_FMT
6521                        "Issuing Reset from %s!!, doorbell=0x%08x\n",
6522                        ioc->name, __func__, mpt_GetIocState(ioc, 0));
6523                 if (retry_count == 0) {
6524                         if (mpt_Soft_Hard_ResetHandler(ioc, CAN_SLEEP) != 0)
6525                                 retry_count++;
6526                 } else
6527                         mpt_HardResetHandler(ioc, CAN_SLEEP);
6528 
6529                 mpt_free_msg_frame(ioc, mf);
6530                 /* attempt one retry for a timed out command */
6531                 if (retry_count < 2) {
6532                         printk(MYIOC_s_INFO_FMT
6533                             "Attempting Retry Config request"
6534                             " type 0x%x, page 0x%x,"
6535                             " action %d\n", ioc->name, page_type,
6536                             pCfg->cfghdr.hdr->PageNumber, pCfg->action);
6537                         retry_count++;
6538                         goto retry_config;
6539                 }
6540         }
6541         return ret;
6542 
6543 }
6544 
6545 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6546 /**
6547  *      mpt_ioc_reset - Base cleanup for hard reset
6548  *      @ioc: Pointer to the adapter structure
6549  *      @reset_phase: Indicates pre- or post-reset functionality
6550  *
6551  *      Remark: Frees resources with internally generated commands.
6552  */
6553 static int
6554 mpt_ioc_reset(MPT_ADAPTER *ioc, int reset_phase)
6555 {
6556         switch (reset_phase) {
6557         case MPT_IOC_SETUP_RESET:
6558                 ioc->taskmgmt_quiesce_io = 1;
6559                 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6560                     "%s: MPT_IOC_SETUP_RESET\n", ioc->name, __func__));
6561                 break;
6562         case MPT_IOC_PRE_RESET:
6563                 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6564                     "%s: MPT_IOC_PRE_RESET\n", ioc->name, __func__));
6565                 break;
6566         case MPT_IOC_POST_RESET:
6567                 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6568                     "%s: MPT_IOC_POST_RESET\n",  ioc->name, __func__));
6569 /* wake up mptbase_cmds */
6570                 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_PENDING) {
6571                         ioc->mptbase_cmds.status |=
6572                             MPT_MGMT_STATUS_DID_IOCRESET;
6573                         complete(&ioc->mptbase_cmds.done);
6574                 }
6575 /* wake up taskmgmt_cmds */
6576                 if (ioc->taskmgmt_cmds.status & MPT_MGMT_STATUS_PENDING) {
6577                         ioc->taskmgmt_cmds.status |=
6578                                 MPT_MGMT_STATUS_DID_IOCRESET;
6579                         complete(&ioc->taskmgmt_cmds.done);
6580                 }
6581                 break;
6582         default:
6583                 break;
6584         }
6585 
6586         return 1;               /* currently means nothing really */
6587 }
6588 
6589 
6590 #ifdef CONFIG_PROC_FS           /* { */
6591 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6592 /*
6593  *      procfs (%MPT_PROCFS_MPTBASEDIR/...) support stuff...
6594  */
6595 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6596 /**
6597  *      procmpt_create - Create %MPT_PROCFS_MPTBASEDIR entries.
6598  *
6599  *      Returns 0 for success, non-zero for failure.
6600  */
6601 static int
6602 procmpt_create(void)
6603 {
6604         mpt_proc_root_dir = proc_mkdir(MPT_PROCFS_MPTBASEDIR, NULL);
6605         if (mpt_proc_root_dir == NULL)
6606                 return -ENOTDIR;
6607 
6608         proc_create("summary", S_IRUGO, mpt_proc_root_dir, &mpt_summary_proc_fops);
6609         proc_create("version", S_IRUGO, mpt_proc_root_dir, &mpt_version_proc_fops);
6610         return 0;
6611 }
6612 
6613 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6614 /**
6615  *      procmpt_destroy - Tear down %MPT_PROCFS_MPTBASEDIR entries.
6616  *
6617  *      Returns 0 for success, non-zero for failure.
6618  */
6619 static void
6620 procmpt_destroy(void)
6621 {
6622         remove_proc_entry("version", mpt_proc_root_dir);
6623         remove_proc_entry("summary", mpt_proc_root_dir);
6624         remove_proc_entry(MPT_PROCFS_MPTBASEDIR, NULL);
6625 }
6626 
6627 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6628 /*
6629  *      Handles read request from /proc/mpt/summary or /proc/mpt/iocN/summary.
6630  */
6631 static void seq_mpt_print_ioc_summary(MPT_ADAPTER *ioc, struct seq_file *m, int showlan);
6632 
6633 static int mpt_summary_proc_show(struct seq_file *m, void *v)
6634 {
6635         MPT_ADAPTER *ioc = m->private;
6636 
6637         if (ioc) {
6638                 seq_mpt_print_ioc_summary(ioc, m, 1);
6639         } else {
6640                 list_for_each_entry(ioc, &ioc_list, list) {
6641                         seq_mpt_print_ioc_summary(ioc, m, 1);
6642                 }
6643         }
6644 
6645         return 0;
6646 }
6647 
6648 static int mpt_summary_proc_open(struct inode *inode, struct file *file)
6649 {
6650         return single_open(file, mpt_summary_proc_show, PDE_DATA(inode));
6651 }
6652 
6653 static const struct file_operations mpt_summary_proc_fops = {
6654         .owner          = THIS_MODULE,
6655         .open           = mpt_summary_proc_open,
6656         .read           = seq_read,
6657         .llseek         = seq_lseek,
6658         .release        = single_release,
6659 };
6660 
6661 static int mpt_version_proc_show(struct seq_file *m, void *v)
6662 {
6663         u8       cb_idx;
6664         int      scsi, fc, sas, lan, ctl, targ, dmp;
6665         char    *drvname;
6666 
6667         seq_printf(m, "%s-%s\n", "mptlinux", MPT_LINUX_VERSION_COMMON);
6668         seq_printf(m, "  Fusion MPT base driver\n");
6669 
6670         scsi = fc = sas = lan = ctl = targ = dmp = 0;
6671         for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
6672                 drvname = NULL;
6673                 if (MptCallbacks[cb_idx]) {
6674                         switch (MptDriverClass[cb_idx]) {
6675                         case MPTSPI_DRIVER:
6676                                 if (!scsi++) drvname = "SPI host";
6677                                 break;
6678                         case MPTFC_DRIVER:
6679                                 if (!fc++) drvname = "FC host";
6680                                 break;
6681                         case MPTSAS_DRIVER:
6682                                 if (!sas++) drvname = "SAS host";
6683                                 break;
6684                         case MPTLAN_DRIVER:
6685                                 if (!lan++) drvname = "LAN";
6686                                 break;
6687                         case MPTSTM_DRIVER:
6688                                 if (!targ++) drvname = "SCSI target";
6689                                 break;
6690                         case MPTCTL_DRIVER:
6691                                 if (!ctl++) drvname = "ioctl";
6692                                 break;
6693                         }
6694 
6695                         if (drvname)
6696                                 seq_printf(m, "  Fusion MPT %s driver\n", drvname);
6697                 }
6698         }
6699 
6700         return 0;
6701 }
6702 
6703 static int mpt_version_proc_open(struct inode *inode, struct file *file)
6704 {
6705         return single_open(file, mpt_version_proc_show, NULL);
6706 }
6707 
6708 static const struct file_operations mpt_version_proc_fops = {
6709         .owner          = THIS_MODULE,
6710         .open           = mpt_version_proc_open,
6711         .read           = seq_read,
6712         .llseek         = seq_lseek,
6713         .release        = single_release,
6714 };
6715 
6716 static int mpt_iocinfo_proc_show(struct seq_file *m, void *v)
6717 {
6718         MPT_ADAPTER     *ioc = m->private;
6719         char             expVer[32];
6720         int              sz;
6721         int              p;
6722 
6723         mpt_get_fw_exp_ver(expVer, ioc);
6724 
6725         seq_printf(m, "%s:", ioc->name);
6726         if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
6727                 seq_printf(m, "  (f/w download boot flag set)");
6728 //      if (ioc->facts.IOCExceptions & MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL)
6729 //              seq_printf(m, "  CONFIG_CHECKSUM_FAIL!");
6730 
6731         seq_printf(m, "\n  ProductID = 0x%04x (%s)\n",
6732                         ioc->facts.ProductID,
6733                         ioc->prod_name);
6734         seq_printf(m, "  FWVersion = 0x%08x%s", ioc->facts.FWVersion.Word, expVer);
6735         if (ioc->facts.FWImageSize)
6736                 seq_printf(m, " (fw_size=%d)", ioc->facts.FWImageSize);
6737         seq_printf(m, "\n  MsgVersion = 0x%04x\n", ioc->facts.MsgVersion);
6738         seq_printf(m, "  FirstWhoInit = 0x%02x\n", ioc->FirstWhoInit);
6739         seq_printf(m, "  EventState = 0x%02x\n", ioc->facts.EventState);
6740 
6741         seq_printf(m, "  CurrentHostMfaHighAddr = 0x%08x\n",
6742                         ioc->facts.CurrentHostMfaHighAddr);
6743         seq_printf(m, "  CurrentSenseBufferHighAddr = 0x%08x\n",
6744                         ioc->facts.CurrentSenseBufferHighAddr);
6745 
6746         seq_printf(m, "  MaxChainDepth = 0x%02x frames\n", ioc->facts.MaxChainDepth);
6747         seq_printf(m, "  MinBlockSize = 0x%02x bytes\n", 4*ioc->facts.BlockSize);
6748 
6749         seq_printf(m, "  RequestFrames @ 0x%p (Dma @ 0x%p)\n",
6750                                         (void *)ioc->req_frames, (void *)(ulong)ioc->req_frames_dma);
6751         /*
6752          *  Rounding UP to nearest 4-kB boundary here...
6753          */
6754         sz = (ioc->req_sz * ioc->req_depth) + 128;
6755         sz = ((sz + 0x1000UL - 1UL) / 0x1000) * 0x1000;
6756         seq_printf(m, "    {CurReqSz=%d} x {CurReqDepth=%d} = %d bytes ^= 0x%x\n",
6757                                         ioc->req_sz, ioc->req_depth, ioc->req_sz*ioc->req_depth, sz);
6758         seq_printf(m, "    {MaxReqSz=%d}   {MaxReqDepth=%d}\n",
6759                                         4*ioc->facts.RequestFrameSize,
6760                                         ioc->facts.GlobalCredits);
6761 
6762         seq_printf(m, "  Frames   @ 0x%p (Dma @ 0x%p)\n",
6763                                         (void *)ioc->alloc, (void *)(ulong)ioc->alloc_dma);
6764         sz = (ioc->reply_sz * ioc->reply_depth) + 128;
6765         seq_printf(m, "    {CurRepSz=%d} x {CurRepDepth=%d} = %d bytes ^= 0x%x\n",
6766                                         ioc->reply_sz, ioc->reply_depth, ioc->reply_sz*ioc->reply_depth, sz);
6767         seq_printf(m, "    {MaxRepSz=%d}   {MaxRepDepth=%d}\n",
6768                                         ioc->facts.CurReplyFrameSize,
6769                                         ioc->facts.ReplyQueueDepth);
6770 
6771         seq_printf(m, "  MaxDevices = %d\n",
6772                         (ioc->facts.MaxDevices==0) ? 255 : ioc->facts.MaxDevices);
6773         seq_printf(m, "  MaxBuses = %d\n", ioc->facts.MaxBuses);
6774 
6775         /* per-port info */
6776         for (p=0; p < ioc->facts.NumberOfPorts; p++) {
6777                 seq_printf(m, "  PortNumber = %d (of %d)\n",
6778                                 p+1,
6779                                 ioc->facts.NumberOfPorts);
6780                 if (ioc->bus_type == FC) {
6781                         if (ioc->pfacts[p].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
6782                                 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6783                                 seq_printf(m, "    LanAddr = %pMR\n", a);
6784                         }
6785                         seq_printf(m, "    WWN = %08X%08X:%08X%08X\n",
6786                                         ioc->fc_port_page0[p].WWNN.High,
6787                                         ioc->fc_port_page0[p].WWNN.Low,
6788                                         ioc->fc_port_page0[p].WWPN.High,
6789                                         ioc->fc_port_page0[p].WWPN.Low);
6790                 }
6791         }
6792 
6793         return 0;
6794 }
6795 
6796 static int mpt_iocinfo_proc_open(struct inode *inode, struct file *file)
6797 {
6798         return single_open(file, mpt_iocinfo_proc_show, PDE_DATA(inode));
6799 }
6800 
6801 static const struct file_operations mpt_iocinfo_proc_fops = {
6802         .owner          = THIS_MODULE,
6803         .open           = mpt_iocinfo_proc_open,
6804         .read           = seq_read,
6805         .llseek         = seq_lseek,
6806         .release        = single_release,
6807 };
6808 #endif          /* CONFIG_PROC_FS } */
6809 
6810 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6811 static void
6812 mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc)
6813 {
6814         buf[0] ='\0';
6815         if ((ioc->facts.FWVersion.Word >> 24) == 0x0E) {
6816                 sprintf(buf, " (Exp %02d%02d)",
6817                         (ioc->facts.FWVersion.Word >> 16) & 0x00FF,     /* Month */
6818                         (ioc->facts.FWVersion.Word >> 8) & 0x1F);       /* Day */
6819 
6820                 /* insider hack! */
6821                 if ((ioc->facts.FWVersion.Word >> 8) & 0x80)
6822                         strcat(buf, " [MDBG]");
6823         }
6824 }
6825 
6826 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6827 /**
6828  *      mpt_print_ioc_summary - Write ASCII summary of IOC to a buffer.
6829  *      @ioc: Pointer to MPT_ADAPTER structure
6830  *      @buffer: Pointer to buffer where IOC summary info should be written
6831  *      @size: Pointer to number of bytes we wrote (set by this routine)
6832  *      @len: Offset at which to start writing in buffer
6833  *      @showlan: Display LAN stuff?
6834  *
6835  *      This routine writes (english readable) ASCII text, which represents
6836  *      a summary of IOC information, to a buffer.
6837  */
6838 void
6839 mpt_print_ioc_summary(MPT_ADAPTER *ioc, char *buffer, int *size, int len, int showlan)
6840 {
6841         char expVer[32];
6842         int y;
6843 
6844         mpt_get_fw_exp_ver(expVer, ioc);
6845 
6846         /*
6847          *  Shorter summary of attached ioc's...
6848          */
6849         y = sprintf(buffer+len, "%s: %s, %s%08xh%s, Ports=%d, MaxQ=%d",
6850                         ioc->name,
6851                         ioc->prod_name,
6852                         MPT_FW_REV_MAGIC_ID_STRING,     /* "FwRev=" or somesuch */
6853                         ioc->facts.FWVersion.Word,
6854                         expVer,
6855                         ioc->facts.NumberOfPorts,
6856                         ioc->req_depth);
6857 
6858         if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
6859                 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6860                 y += sprintf(buffer+len+y, ", LanAddr=%pMR", a);
6861         }
6862 
6863         y += sprintf(buffer+len+y, ", IRQ=%d", ioc->pci_irq);
6864 
6865         if (!ioc->active)
6866                 y += sprintf(buffer+len+y, " (disabled)");
6867 
6868         y += sprintf(buffer+len+y, "\n");
6869 
6870         *size = y;
6871 }
6872 
6873 #ifdef CONFIG_PROC_FS
6874 static void seq_mpt_print_ioc_summary(MPT_ADAPTER *ioc, struct seq_file *m, int showlan)
6875 {
6876         char expVer[32];
6877 
6878         mpt_get_fw_exp_ver(expVer, ioc);
6879 
6880         /*
6881          *  Shorter summary of attached ioc's...
6882          */
6883         seq_printf(m, "%s: %s, %s%08xh%s, Ports=%d, MaxQ=%d",
6884                         ioc->name,
6885                         ioc->prod_name,
6886                         MPT_FW_REV_MAGIC_ID_STRING,     /* "FwRev=" or somesuch */
6887                         ioc->facts.FWVersion.Word,
6888                         expVer,
6889                         ioc->facts.NumberOfPorts,
6890                         ioc->req_depth);
6891 
6892         if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
6893                 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6894                 seq_printf(m, ", LanAddr=%pMR", a);
6895         }
6896 
6897         seq_printf(m, ", IRQ=%d", ioc->pci_irq);
6898 
6899         if (!ioc->active)
6900                 seq_printf(m, " (disabled)");
6901 
6902         seq_putc(m, '\n');
6903 }
6904 #endif
6905 
6906 /**
6907  *      mpt_set_taskmgmt_in_progress_flag - set flags associated with task management