Version:  2.0.40 2.2.26 2.4.37 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18

Linux/drivers/media/rc/ene_ir.c

  1 /*
  2  * driver for ENE KB3926 B/C/D/E/F CIR (pnp id: ENE0XXX)
  3  *
  4  * Copyright (C) 2010 Maxim Levitsky <maximlevitsky@gmail.com>
  5  *
  6  * This program is free software; you can redistribute it and/or
  7  * modify it under the terms of the GNU General Public License as
  8  * published by the Free Software Foundation; either version 2 of the
  9  * License, or (at your option) any later version.
 10  *
 11  * This program is distributed in the hope that it will be useful, but
 12  * WITHOUT ANY WARRANTY; without even the implied warranty of
 13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 14  * General Public License for more details.
 15  *
 16  * You should have received a copy of the GNU General Public License
 17  * along with this program; if not, write to the Free Software
 18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
 19  * USA
 20  *
 21  * Special thanks to:
 22  *   Sami R. <maesesami@gmail.com> for lot of help in debugging and therefore
 23  *    bringing to life support for transmission & learning mode.
 24  *
 25  *   Charlie Andrews <charliethepilot@googlemail.com> for lots of help in
 26  *   bringing up the support of new firmware buffer that is popular
 27  *   on latest notebooks
 28  *
 29  *   ENE for partial device documentation
 30  *
 31  */
 32 
 33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 34 
 35 #include <linux/kernel.h>
 36 #include <linux/module.h>
 37 #include <linux/pnp.h>
 38 #include <linux/io.h>
 39 #include <linux/interrupt.h>
 40 #include <linux/sched.h>
 41 #include <linux/slab.h>
 42 #include <media/rc-core.h>
 43 #include "ene_ir.h"
 44 
 45 static int sample_period;
 46 static bool learning_mode_force;
 47 static int debug;
 48 static bool txsim;
 49 
 50 static void ene_set_reg_addr(struct ene_device *dev, u16 reg)
 51 {
 52         outb(reg >> 8, dev->hw_io + ENE_ADDR_HI);
 53         outb(reg & 0xFF, dev->hw_io + ENE_ADDR_LO);
 54 }
 55 
 56 /* read a hardware register */
 57 static u8 ene_read_reg(struct ene_device *dev, u16 reg)
 58 {
 59         u8 retval;
 60         ene_set_reg_addr(dev, reg);
 61         retval = inb(dev->hw_io + ENE_IO);
 62         dbg_regs("reg %04x == %02x", reg, retval);
 63         return retval;
 64 }
 65 
 66 /* write a hardware register */
 67 static void ene_write_reg(struct ene_device *dev, u16 reg, u8 value)
 68 {
 69         dbg_regs("reg %04x <- %02x", reg, value);
 70         ene_set_reg_addr(dev, reg);
 71         outb(value, dev->hw_io + ENE_IO);
 72 }
 73 
 74 /* Set bits in hardware register */
 75 static void ene_set_reg_mask(struct ene_device *dev, u16 reg, u8 mask)
 76 {
 77         dbg_regs("reg %04x |= %02x", reg, mask);
 78         ene_set_reg_addr(dev, reg);
 79         outb(inb(dev->hw_io + ENE_IO) | mask, dev->hw_io + ENE_IO);
 80 }
 81 
 82 /* Clear bits in hardware register */
 83 static void ene_clear_reg_mask(struct ene_device *dev, u16 reg, u8 mask)
 84 {
 85         dbg_regs("reg %04x &= ~%02x ", reg, mask);
 86         ene_set_reg_addr(dev, reg);
 87         outb(inb(dev->hw_io + ENE_IO) & ~mask, dev->hw_io + ENE_IO);
 88 }
 89 
 90 /* A helper to set/clear a bit in register according to boolean variable */
 91 static void ene_set_clear_reg_mask(struct ene_device *dev, u16 reg, u8 mask,
 92                                                                 bool set)
 93 {
 94         if (set)
 95                 ene_set_reg_mask(dev, reg, mask);
 96         else
 97                 ene_clear_reg_mask(dev, reg, mask);
 98 }
 99 
100 /* detect hardware features */
101 static int ene_hw_detect(struct ene_device *dev)
102 {
103         u8 chip_major, chip_minor;
104         u8 hw_revision, old_ver;
105         u8 fw_reg2, fw_reg1;
106 
107         ene_clear_reg_mask(dev, ENE_ECSTS, ENE_ECSTS_RSRVD);
108         chip_major = ene_read_reg(dev, ENE_ECVER_MAJOR);
109         chip_minor = ene_read_reg(dev, ENE_ECVER_MINOR);
110         ene_set_reg_mask(dev, ENE_ECSTS, ENE_ECSTS_RSRVD);
111 
112         hw_revision = ene_read_reg(dev, ENE_ECHV);
113         old_ver = ene_read_reg(dev, ENE_HW_VER_OLD);
114 
115         dev->pll_freq = (ene_read_reg(dev, ENE_PLLFRH) << 4) +
116                 (ene_read_reg(dev, ENE_PLLFRL) >> 4);
117 
118         if (sample_period != ENE_DEFAULT_SAMPLE_PERIOD)
119                 dev->rx_period_adjust =
120                         dev->pll_freq == ENE_DEFAULT_PLL_FREQ ? 2 : 4;
121 
122         if (hw_revision == 0xFF) {
123                 pr_warn("device seems to be disabled\n");
124                 pr_warn("send a mail to lirc-list@lists.sourceforge.net\n");
125                 pr_warn("please attach output of acpidump and dmidecode\n");
126                 return -ENODEV;
127         }
128 
129         pr_notice("chip is 0x%02x%02x - kbver = 0x%02x, rev = 0x%02x\n",
130                   chip_major, chip_minor, old_ver, hw_revision);
131 
132         pr_notice("PLL freq = %d\n", dev->pll_freq);
133 
134         if (chip_major == 0x33) {
135                 pr_warn("chips 0x33xx aren't supported\n");
136                 return -ENODEV;
137         }
138 
139         if (chip_major == 0x39 && chip_minor == 0x26 && hw_revision == 0xC0) {
140                 dev->hw_revision = ENE_HW_C;
141                 pr_notice("KB3926C detected\n");
142         } else if (old_ver == 0x24 && hw_revision == 0xC0) {
143                 dev->hw_revision = ENE_HW_B;
144                 pr_notice("KB3926B detected\n");
145         } else {
146                 dev->hw_revision = ENE_HW_D;
147                 pr_notice("KB3926D or higher detected\n");
148         }
149 
150         /* detect features hardware supports */
151         if (dev->hw_revision < ENE_HW_C)
152                 return 0;
153 
154         fw_reg1 = ene_read_reg(dev, ENE_FW1);
155         fw_reg2 = ene_read_reg(dev, ENE_FW2);
156 
157         pr_notice("Firmware regs: %02x %02x\n", fw_reg1, fw_reg2);
158 
159         dev->hw_use_gpio_0a = !!(fw_reg2 & ENE_FW2_GP0A);
160         dev->hw_learning_and_tx_capable = !!(fw_reg2 & ENE_FW2_LEARNING);
161         dev->hw_extra_buffer = !!(fw_reg1 & ENE_FW1_HAS_EXTRA_BUF);
162 
163         if (dev->hw_learning_and_tx_capable)
164                 dev->hw_fan_input = !!(fw_reg2 & ENE_FW2_FAN_INPUT);
165 
166         pr_notice("Hardware features:\n");
167 
168         if (dev->hw_learning_and_tx_capable) {
169                 pr_notice("* Supports transmitting & learning mode\n");
170                 pr_notice("   This feature is rare and therefore,\n");
171                 pr_notice("   you are welcome to test it,\n");
172                 pr_notice("   and/or contact the author via:\n");
173                 pr_notice("   lirc-list@lists.sourceforge.net\n");
174                 pr_notice("   or maximlevitsky@gmail.com\n");
175 
176                 pr_notice("* Uses GPIO %s for IR raw input\n",
177                           dev->hw_use_gpio_0a ? "40" : "0A");
178 
179                 if (dev->hw_fan_input)
180                         pr_notice("* Uses unused fan feedback input as source of demodulated IR data\n");
181         }
182 
183         if (!dev->hw_fan_input)
184                 pr_notice("* Uses GPIO %s for IR demodulated input\n",
185                           dev->hw_use_gpio_0a ? "0A" : "40");
186 
187         if (dev->hw_extra_buffer)
188                 pr_notice("* Uses new style input buffer\n");
189         return 0;
190 }
191 
192 /* Read properities of hw sample buffer */
193 static void ene_rx_setup_hw_buffer(struct ene_device *dev)
194 {
195         u16 tmp;
196 
197         ene_rx_read_hw_pointer(dev);
198         dev->r_pointer = dev->w_pointer;
199 
200         if (!dev->hw_extra_buffer) {
201                 dev->buffer_len = ENE_FW_PACKET_SIZE * 2;
202                 return;
203         }
204 
205         tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER);
206         tmp |= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER+1) << 8;
207         dev->extra_buf1_address = tmp;
208 
209         dev->extra_buf1_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 2);
210 
211         tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 3);
212         tmp |= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 4) << 8;
213         dev->extra_buf2_address = tmp;
214 
215         dev->extra_buf2_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 5);
216 
217         dev->buffer_len = dev->extra_buf1_len + dev->extra_buf2_len + 8;
218 
219         pr_notice("Hardware uses 2 extended buffers:\n");
220         pr_notice("  0x%04x - len : %d\n",
221                   dev->extra_buf1_address, dev->extra_buf1_len);
222         pr_notice("  0x%04x - len : %d\n",
223                   dev->extra_buf2_address, dev->extra_buf2_len);
224 
225         pr_notice("Total buffer len = %d\n", dev->buffer_len);
226 
227         if (dev->buffer_len > 64 || dev->buffer_len < 16)
228                 goto error;
229 
230         if (dev->extra_buf1_address > 0xFBFC ||
231                                         dev->extra_buf1_address < 0xEC00)
232                 goto error;
233 
234         if (dev->extra_buf2_address > 0xFBFC ||
235                                         dev->extra_buf2_address < 0xEC00)
236                 goto error;
237 
238         if (dev->r_pointer > dev->buffer_len)
239                 goto error;
240 
241         ene_set_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
242         return;
243 error:
244         pr_warn("Error validating extra buffers, device probably won't work\n");
245         dev->hw_extra_buffer = false;
246         ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
247 }
248 
249 
250 /* Restore the pointers to extra buffers - to make module reload work*/
251 static void ene_rx_restore_hw_buffer(struct ene_device *dev)
252 {
253         if (!dev->hw_extra_buffer)
254                 return;
255 
256         ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 0,
257                                 dev->extra_buf1_address & 0xFF);
258         ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 1,
259                                 dev->extra_buf1_address >> 8);
260         ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 2, dev->extra_buf1_len);
261 
262         ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 3,
263                                 dev->extra_buf2_address & 0xFF);
264         ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 4,
265                                 dev->extra_buf2_address >> 8);
266         ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 5,
267                                 dev->extra_buf2_len);
268         ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
269 }
270 
271 /* Read hardware write pointer */
272 static void ene_rx_read_hw_pointer(struct ene_device *dev)
273 {
274         if (dev->hw_extra_buffer)
275                 dev->w_pointer = ene_read_reg(dev, ENE_FW_RX_POINTER);
276         else
277                 dev->w_pointer = ene_read_reg(dev, ENE_FW2)
278                         & ENE_FW2_BUF_WPTR ? 0 : ENE_FW_PACKET_SIZE;
279 
280         dbg_verbose("RB: HW write pointer: %02x, driver read pointer: %02x",
281                 dev->w_pointer, dev->r_pointer);
282 }
283 
284 /* Gets address of next sample from HW ring buffer */
285 static int ene_rx_get_sample_reg(struct ene_device *dev)
286 {
287         int r_pointer;
288 
289         if (dev->r_pointer == dev->w_pointer) {
290                 dbg_verbose("RB: hit end, try update w_pointer");
291                 ene_rx_read_hw_pointer(dev);
292         }
293 
294         if (dev->r_pointer == dev->w_pointer) {
295                 dbg_verbose("RB: end of data at %d", dev->r_pointer);
296                 return 0;
297         }
298 
299         dbg_verbose("RB: reading at offset %d", dev->r_pointer);
300         r_pointer = dev->r_pointer;
301 
302         dev->r_pointer++;
303         if (dev->r_pointer == dev->buffer_len)
304                 dev->r_pointer = 0;
305 
306         dbg_verbose("RB: next read will be from offset %d", dev->r_pointer);
307 
308         if (r_pointer < 8) {
309                 dbg_verbose("RB: read at main buffer at %d", r_pointer);
310                 return ENE_FW_SAMPLE_BUFFER + r_pointer;
311         }
312 
313         r_pointer -= 8;
314 
315         if (r_pointer < dev->extra_buf1_len) {
316                 dbg_verbose("RB: read at 1st extra buffer at %d", r_pointer);
317                 return dev->extra_buf1_address + r_pointer;
318         }
319 
320         r_pointer -= dev->extra_buf1_len;
321 
322         if (r_pointer < dev->extra_buf2_len) {
323                 dbg_verbose("RB: read at 2nd extra buffer at %d", r_pointer);
324                 return dev->extra_buf2_address + r_pointer;
325         }
326 
327         dbg("attempt to read beyond ring buffer end");
328         return 0;
329 }
330 
331 /* Sense current received carrier */
332 static void ene_rx_sense_carrier(struct ene_device *dev)
333 {
334         DEFINE_IR_RAW_EVENT(ev);
335 
336         int carrier, duty_cycle;
337         int period = ene_read_reg(dev, ENE_CIRCAR_PRD);
338         int hperiod = ene_read_reg(dev, ENE_CIRCAR_HPRD);
339 
340         if (!(period & ENE_CIRCAR_PRD_VALID))
341                 return;
342 
343         period &= ~ENE_CIRCAR_PRD_VALID;
344 
345         if (!period)
346                 return;
347 
348         dbg("RX: hardware carrier period = %02x", period);
349         dbg("RX: hardware carrier pulse period = %02x", hperiod);
350 
351         carrier = 2000000 / period;
352         duty_cycle = (hperiod * 100) / period;
353         dbg("RX: sensed carrier = %d Hz, duty cycle %d%%",
354                                                 carrier, duty_cycle);
355         if (dev->carrier_detect_enabled) {
356                 ev.carrier_report = true;
357                 ev.carrier = carrier;
358                 ev.duty_cycle = duty_cycle;
359                 ir_raw_event_store(dev->rdev, &ev);
360         }
361 }
362 
363 /* this enables/disables the CIR RX engine */
364 static void ene_rx_enable_cir_engine(struct ene_device *dev, bool enable)
365 {
366         ene_set_clear_reg_mask(dev, ENE_CIRCFG,
367                         ENE_CIRCFG_RX_EN | ENE_CIRCFG_RX_IRQ, enable);
368 }
369 
370 /* this selects input for CIR engine. Ether GPIO 0A or GPIO40*/
371 static void ene_rx_select_input(struct ene_device *dev, bool gpio_0a)
372 {
373         ene_set_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_GPIO0A, gpio_0a);
374 }
375 
376 /*
377  * this enables alternative input via fan tachometer sensor and bypasses
378  * the hw CIR engine
379  */
380 static void ene_rx_enable_fan_input(struct ene_device *dev, bool enable)
381 {
382         if (!dev->hw_fan_input)
383                 return;
384 
385         if (!enable)
386                 ene_write_reg(dev, ENE_FAN_AS_IN1, 0);
387         else {
388                 ene_write_reg(dev, ENE_FAN_AS_IN1, ENE_FAN_AS_IN1_EN);
389                 ene_write_reg(dev, ENE_FAN_AS_IN2, ENE_FAN_AS_IN2_EN);
390         }
391 }
392 
393 /* setup the receiver for RX*/
394 static void ene_rx_setup(struct ene_device *dev)
395 {
396         bool learning_mode = dev->learning_mode_enabled ||
397                                         dev->carrier_detect_enabled;
398         int sample_period_adjust = 0;
399 
400         dbg("RX: setup receiver, learning mode = %d", learning_mode);
401 
402 
403         /* This selects RLC input and clears CFG2 settings */
404         ene_write_reg(dev, ENE_CIRCFG2, 0x00);
405 
406         /* set sample period*/
407         if (sample_period == ENE_DEFAULT_SAMPLE_PERIOD)
408                 sample_period_adjust =
409                         dev->pll_freq == ENE_DEFAULT_PLL_FREQ ? 1 : 2;
410 
411         ene_write_reg(dev, ENE_CIRRLC_CFG,
412                         (sample_period + sample_period_adjust) |
413                                                 ENE_CIRRLC_CFG_OVERFLOW);
414         /* revB doesn't support inputs */
415         if (dev->hw_revision < ENE_HW_C)
416                 goto select_timeout;
417 
418         if (learning_mode) {
419 
420                 WARN_ON(!dev->hw_learning_and_tx_capable);
421 
422                 /* Enable the opposite of the normal input
423                 That means that if GPIO40 is normally used, use GPIO0A
424                 and vice versa.
425                 This input will carry non demodulated
426                 signal, and we will tell the hw to demodulate it itself */
427                 ene_rx_select_input(dev, !dev->hw_use_gpio_0a);
428                 dev->rx_fan_input_inuse = false;
429 
430                 /* Enable carrier demodulation */
431                 ene_set_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_CARR_DEMOD);
432 
433                 /* Enable carrier detection */
434                 ene_write_reg(dev, ENE_CIRCAR_PULS, 0x63);
435                 ene_set_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_CARR_DETECT,
436                         dev->carrier_detect_enabled || debug);
437         } else {
438                 if (dev->hw_fan_input)
439                         dev->rx_fan_input_inuse = true;
440                 else
441                         ene_rx_select_input(dev, dev->hw_use_gpio_0a);
442 
443                 /* Disable carrier detection & demodulation */
444                 ene_clear_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_CARR_DEMOD);
445                 ene_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_CARR_DETECT);
446         }
447 
448 select_timeout:
449         if (dev->rx_fan_input_inuse) {
450                 dev->rdev->rx_resolution = US_TO_NS(ENE_FW_SAMPLE_PERIOD_FAN);
451 
452                 /* Fan input doesn't support timeouts, it just ends the
453                         input with a maximum sample */
454                 dev->rdev->min_timeout = dev->rdev->max_timeout =
455                         US_TO_NS(ENE_FW_SMPL_BUF_FAN_MSK *
456                                 ENE_FW_SAMPLE_PERIOD_FAN);
457         } else {
458                 dev->rdev->rx_resolution = US_TO_NS(sample_period);
459 
460                 /* Theoreticly timeout is unlimited, but we cap it
461                  * because it was seen that on one device, it
462                  * would stop sending spaces after around 250 msec.
463                  * Besides, this is close to 2^32 anyway and timeout is u32.
464                  */
465                 dev->rdev->min_timeout = US_TO_NS(127 * sample_period);
466                 dev->rdev->max_timeout = US_TO_NS(200000);
467         }
468 
469         if (dev->hw_learning_and_tx_capable)
470                 dev->rdev->tx_resolution = US_TO_NS(sample_period);
471 
472         if (dev->rdev->timeout > dev->rdev->max_timeout)
473                 dev->rdev->timeout = dev->rdev->max_timeout;
474         if (dev->rdev->timeout < dev->rdev->min_timeout)
475                 dev->rdev->timeout = dev->rdev->min_timeout;
476 }
477 
478 /* Enable the device for receive */
479 static void ene_rx_enable_hw(struct ene_device *dev)
480 {
481         u8 reg_value;
482 
483         /* Enable system interrupt */
484         if (dev->hw_revision < ENE_HW_C) {
485                 ene_write_reg(dev, ENEB_IRQ, dev->irq << 1);
486                 ene_write_reg(dev, ENEB_IRQ_UNK1, 0x01);
487         } else {
488                 reg_value = ene_read_reg(dev, ENE_IRQ) & 0xF0;
489                 reg_value |= ENE_IRQ_UNK_EN;
490                 reg_value &= ~ENE_IRQ_STATUS;
491                 reg_value |= (dev->irq & ENE_IRQ_MASK);
492                 ene_write_reg(dev, ENE_IRQ, reg_value);
493         }
494 
495         /* Enable inputs */
496         ene_rx_enable_fan_input(dev, dev->rx_fan_input_inuse);
497         ene_rx_enable_cir_engine(dev, !dev->rx_fan_input_inuse);
498 
499         /* ack any pending irqs - just in case */
500         ene_irq_status(dev);
501 
502         /* enable firmware bits */
503         ene_set_reg_mask(dev, ENE_FW1, ENE_FW1_ENABLE | ENE_FW1_IRQ);
504 
505         /* enter idle mode */
506         ir_raw_event_set_idle(dev->rdev, true);
507 }
508 
509 /* Enable the device for receive - wrapper to track the state*/
510 static void ene_rx_enable(struct ene_device *dev)
511 {
512         ene_rx_enable_hw(dev);
513         dev->rx_enabled = true;
514 }
515 
516 /* Disable the device receiver */
517 static void ene_rx_disable_hw(struct ene_device *dev)
518 {
519         /* disable inputs */
520         ene_rx_enable_cir_engine(dev, false);
521         ene_rx_enable_fan_input(dev, false);
522 
523         /* disable hardware IRQ and firmware flag */
524         ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_ENABLE | ENE_FW1_IRQ);
525         ir_raw_event_set_idle(dev->rdev, true);
526 }
527 
528 /* Disable the device receiver - wrapper to track the state */
529 static void ene_rx_disable(struct ene_device *dev)
530 {
531         ene_rx_disable_hw(dev);
532         dev->rx_enabled = false;
533 }
534 
535 /* This resets the receiver. Useful to stop stream of spaces at end of
536  * transmission
537  */
538 static void ene_rx_reset(struct ene_device *dev)
539 {
540         ene_clear_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_RX_EN);
541         ene_set_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_RX_EN);
542 }
543 
544 /* Set up the TX carrier frequency and duty cycle */
545 static void ene_tx_set_carrier(struct ene_device *dev)
546 {
547         u8 tx_puls_width;
548         unsigned long flags;
549 
550         spin_lock_irqsave(&dev->hw_lock, flags);
551 
552         ene_set_clear_reg_mask(dev, ENE_CIRCFG,
553                 ENE_CIRCFG_TX_CARR, dev->tx_period > 0);
554 
555         if (!dev->tx_period)
556                 goto unlock;
557 
558         BUG_ON(dev->tx_duty_cycle >= 100 || dev->tx_duty_cycle <= 0);
559 
560         tx_puls_width = dev->tx_period / (100 / dev->tx_duty_cycle);
561 
562         if (!tx_puls_width)
563                 tx_puls_width = 1;
564 
565         dbg("TX: pulse distance = %d * 500 ns", dev->tx_period);
566         dbg("TX: pulse width = %d * 500 ns", tx_puls_width);
567 
568         ene_write_reg(dev, ENE_CIRMOD_PRD, dev->tx_period | ENE_CIRMOD_PRD_POL);
569         ene_write_reg(dev, ENE_CIRMOD_HPRD, tx_puls_width);
570 unlock:
571         spin_unlock_irqrestore(&dev->hw_lock, flags);
572 }
573 
574 /* Enable/disable transmitters */
575 static void ene_tx_set_transmitters(struct ene_device *dev)
576 {
577         unsigned long flags;
578 
579         spin_lock_irqsave(&dev->hw_lock, flags);
580         ene_set_clear_reg_mask(dev, ENE_GPIOFS8, ENE_GPIOFS8_GPIO41,
581                                         !!(dev->transmitter_mask & 0x01));
582         ene_set_clear_reg_mask(dev, ENE_GPIOFS1, ENE_GPIOFS1_GPIO0D,
583                                         !!(dev->transmitter_mask & 0x02));
584         spin_unlock_irqrestore(&dev->hw_lock, flags);
585 }
586 
587 /* prepare transmission */
588 static void ene_tx_enable(struct ene_device *dev)
589 {
590         u8 conf1 = ene_read_reg(dev, ENE_CIRCFG);
591         u8 fwreg2 = ene_read_reg(dev, ENE_FW2);
592 
593         dev->saved_conf1 = conf1;
594 
595         /* Show information about currently connected transmitter jacks */
596         if (fwreg2 & ENE_FW2_EMMITER1_CONN)
597                 dbg("TX: Transmitter #1 is connected");
598 
599         if (fwreg2 & ENE_FW2_EMMITER2_CONN)
600                 dbg("TX: Transmitter #2 is connected");
601 
602         if (!(fwreg2 & (ENE_FW2_EMMITER1_CONN | ENE_FW2_EMMITER2_CONN)))
603                 pr_warn("TX: transmitter cable isn't connected!\n");
604 
605         /* disable receive on revc */
606         if (dev->hw_revision == ENE_HW_C)
607                 conf1 &= ~ENE_CIRCFG_RX_EN;
608 
609         /* Enable TX engine */
610         conf1 |= ENE_CIRCFG_TX_EN | ENE_CIRCFG_TX_IRQ;
611         ene_write_reg(dev, ENE_CIRCFG, conf1);
612 }
613 
614 /* end transmission */
615 static void ene_tx_disable(struct ene_device *dev)
616 {
617         ene_write_reg(dev, ENE_CIRCFG, dev->saved_conf1);
618         dev->tx_buffer = NULL;
619 }
620 
621 
622 /* TX one sample - must be called with dev->hw_lock*/
623 static void ene_tx_sample(struct ene_device *dev)
624 {
625         u8 raw_tx;
626         u32 sample;
627         bool pulse = dev->tx_sample_pulse;
628 
629         if (!dev->tx_buffer) {
630                 pr_warn("TX: BUG: attempt to transmit NULL buffer\n");
631                 return;
632         }
633 
634         /* Grab next TX sample */
635         if (!dev->tx_sample) {
636 
637                 if (dev->tx_pos == dev->tx_len) {
638                         if (!dev->tx_done) {
639                                 dbg("TX: no more data to send");
640                                 dev->tx_done = true;
641                                 goto exit;
642                         } else {
643                                 dbg("TX: last sample sent by hardware");
644                                 ene_tx_disable(dev);
645                                 complete(&dev->tx_complete);
646                                 return;
647                         }
648                 }
649 
650                 sample = dev->tx_buffer[dev->tx_pos++];
651                 dev->tx_sample_pulse = !dev->tx_sample_pulse;
652 
653                 dev->tx_sample = DIV_ROUND_CLOSEST(sample, sample_period);
654 
655                 if (!dev->tx_sample)
656                         dev->tx_sample = 1;
657         }
658 
659         raw_tx = min(dev->tx_sample , (unsigned int)ENE_CIRRLC_OUT_MASK);
660         dev->tx_sample -= raw_tx;
661 
662         dbg("TX: sample %8d (%s)", raw_tx * sample_period,
663                                                 pulse ? "pulse" : "space");
664         if (pulse)
665                 raw_tx |= ENE_CIRRLC_OUT_PULSE;
666 
667         ene_write_reg(dev,
668                 dev->tx_reg ? ENE_CIRRLC_OUT1 : ENE_CIRRLC_OUT0, raw_tx);
669 
670         dev->tx_reg = !dev->tx_reg;
671 exit:
672         /* simulate TX done interrupt */
673         if (txsim)
674                 mod_timer(&dev->tx_sim_timer, jiffies + HZ / 500);
675 }
676 
677 /* timer to simulate tx done interrupt */
678 static void ene_tx_irqsim(unsigned long data)
679 {
680         struct ene_device *dev = (struct ene_device *)data;
681         unsigned long flags;
682 
683         spin_lock_irqsave(&dev->hw_lock, flags);
684         ene_tx_sample(dev);
685         spin_unlock_irqrestore(&dev->hw_lock, flags);
686 }
687 
688 
689 /* read irq status and ack it */
690 static int ene_irq_status(struct ene_device *dev)
691 {
692         u8 irq_status;
693         u8 fw_flags1, fw_flags2;
694         int retval = 0;
695 
696         fw_flags2 = ene_read_reg(dev, ENE_FW2);
697 
698         if (dev->hw_revision < ENE_HW_C) {
699                 irq_status = ene_read_reg(dev, ENEB_IRQ_STATUS);
700 
701                 if (!(irq_status & ENEB_IRQ_STATUS_IR))
702                         return 0;
703 
704                 ene_clear_reg_mask(dev, ENEB_IRQ_STATUS, ENEB_IRQ_STATUS_IR);
705                 return ENE_IRQ_RX;
706         }
707 
708         irq_status = ene_read_reg(dev, ENE_IRQ);
709         if (!(irq_status & ENE_IRQ_STATUS))
710                 return 0;
711 
712         /* original driver does that twice - a workaround ? */
713         ene_write_reg(dev, ENE_IRQ, irq_status & ~ENE_IRQ_STATUS);
714         ene_write_reg(dev, ENE_IRQ, irq_status & ~ENE_IRQ_STATUS);
715 
716         /* check RX interrupt */
717         if (fw_flags2 & ENE_FW2_RXIRQ) {
718                 retval |= ENE_IRQ_RX;
719                 ene_write_reg(dev, ENE_FW2, fw_flags2 & ~ENE_FW2_RXIRQ);
720         }
721 
722         /* check TX interrupt */
723         fw_flags1 = ene_read_reg(dev, ENE_FW1);
724         if (fw_flags1 & ENE_FW1_TXIRQ) {
725                 ene_write_reg(dev, ENE_FW1, fw_flags1 & ~ENE_FW1_TXIRQ);
726                 retval |= ENE_IRQ_TX;
727         }
728 
729         return retval;
730 }
731 
732 /* interrupt handler */
733 static irqreturn_t ene_isr(int irq, void *data)
734 {
735         u16 hw_value, reg;
736         int hw_sample, irq_status;
737         bool pulse;
738         unsigned long flags;
739         irqreturn_t retval = IRQ_NONE;
740         struct ene_device *dev = (struct ene_device *)data;
741         DEFINE_IR_RAW_EVENT(ev);
742 
743         spin_lock_irqsave(&dev->hw_lock, flags);
744 
745         dbg_verbose("ISR called");
746         ene_rx_read_hw_pointer(dev);
747         irq_status = ene_irq_status(dev);
748 
749         if (!irq_status)
750                 goto unlock;
751 
752         retval = IRQ_HANDLED;
753 
754         if (irq_status & ENE_IRQ_TX) {
755                 dbg_verbose("TX interrupt");
756                 if (!dev->hw_learning_and_tx_capable) {
757                         dbg("TX interrupt on unsupported device!");
758                         goto unlock;
759                 }
760                 ene_tx_sample(dev);
761         }
762 
763         if (!(irq_status & ENE_IRQ_RX))
764                 goto unlock;
765 
766         dbg_verbose("RX interrupt");
767 
768         if (dev->hw_learning_and_tx_capable)
769                 ene_rx_sense_carrier(dev);
770 
771         /* On hardware that don't support extra buffer we need to trust
772                 the interrupt and not track the read pointer */
773         if (!dev->hw_extra_buffer)
774                 dev->r_pointer = dev->w_pointer == 0 ? ENE_FW_PACKET_SIZE : 0;
775 
776         while (1) {
777 
778                 reg = ene_rx_get_sample_reg(dev);
779 
780                 dbg_verbose("next sample to read at: %04x", reg);
781                 if (!reg)
782                         break;
783 
784                 hw_value = ene_read_reg(dev, reg);
785 
786                 if (dev->rx_fan_input_inuse) {
787 
788                         int offset = ENE_FW_SMPL_BUF_FAN - ENE_FW_SAMPLE_BUFFER;
789 
790                         /* read high part of the sample */
791                         hw_value |= ene_read_reg(dev, reg + offset) << 8;
792                         pulse = hw_value & ENE_FW_SMPL_BUF_FAN_PLS;
793 
794                         /* clear space bit, and other unused bits */
795                         hw_value &= ENE_FW_SMPL_BUF_FAN_MSK;
796                         hw_sample = hw_value * ENE_FW_SAMPLE_PERIOD_FAN;
797 
798                 } else {
799                         pulse = !(hw_value & ENE_FW_SAMPLE_SPACE);
800                         hw_value &= ~ENE_FW_SAMPLE_SPACE;
801                         hw_sample = hw_value * sample_period;
802 
803                         if (dev->rx_period_adjust) {
804                                 hw_sample *= 100;
805                                 hw_sample /= (100 + dev->rx_period_adjust);
806                         }
807                 }
808 
809                 if (!dev->hw_extra_buffer && !hw_sample) {
810                         dev->r_pointer = dev->w_pointer;
811                         continue;
812                 }
813 
814                 dbg("RX: %d (%s)", hw_sample, pulse ? "pulse" : "space");
815 
816                 ev.duration = US_TO_NS(hw_sample);
817                 ev.pulse = pulse;
818                 ir_raw_event_store_with_filter(dev->rdev, &ev);
819         }
820 
821         ir_raw_event_handle(dev->rdev);
822 unlock:
823         spin_unlock_irqrestore(&dev->hw_lock, flags);
824         return retval;
825 }
826 
827 /* Initialize default settings */
828 static void ene_setup_default_settings(struct ene_device *dev)
829 {
830         dev->tx_period = 32;
831         dev->tx_duty_cycle = 50; /*%*/
832         dev->transmitter_mask = 0x03;
833         dev->learning_mode_enabled = learning_mode_force;
834 
835         /* Set reasonable default timeout */
836         dev->rdev->timeout = US_TO_NS(150000);
837 }
838 
839 /* Upload all hardware settings at once. Used at load and resume time */
840 static void ene_setup_hw_settings(struct ene_device *dev)
841 {
842         if (dev->hw_learning_and_tx_capable) {
843                 ene_tx_set_carrier(dev);
844                 ene_tx_set_transmitters(dev);
845         }
846 
847         ene_rx_setup(dev);
848 }
849 
850 /* outside interface: called on first open*/
851 static int ene_open(struct rc_dev *rdev)
852 {
853         struct ene_device *dev = rdev->priv;
854         unsigned long flags;
855 
856         spin_lock_irqsave(&dev->hw_lock, flags);
857         ene_rx_enable(dev);
858         spin_unlock_irqrestore(&dev->hw_lock, flags);
859         return 0;
860 }
861 
862 /* outside interface: called on device close*/
863 static void ene_close(struct rc_dev *rdev)
864 {
865         struct ene_device *dev = rdev->priv;
866         unsigned long flags;
867         spin_lock_irqsave(&dev->hw_lock, flags);
868 
869         ene_rx_disable(dev);
870         spin_unlock_irqrestore(&dev->hw_lock, flags);
871 }
872 
873 /* outside interface: set transmitter mask */
874 static int ene_set_tx_mask(struct rc_dev *rdev, u32 tx_mask)
875 {
876         struct ene_device *dev = rdev->priv;
877         dbg("TX: attempt to set transmitter mask %02x", tx_mask);
878 
879         /* invalid txmask */
880         if (!tx_mask || tx_mask & ~0x03) {
881                 dbg("TX: invalid mask");
882                 /* return count of transmitters */
883                 return 2;
884         }
885 
886         dev->transmitter_mask = tx_mask;
887         ene_tx_set_transmitters(dev);
888         return 0;
889 }
890 
891 /* outside interface : set tx carrier */
892 static int ene_set_tx_carrier(struct rc_dev *rdev, u32 carrier)
893 {
894         struct ene_device *dev = rdev->priv;
895         u32 period;
896 
897         dbg("TX: attempt to set tx carrier to %d kHz", carrier);
898         if (carrier == 0)
899                 return -EINVAL;
900 
901         period = 2000000 / carrier;
902         if (period && (period > ENE_CIRMOD_PRD_MAX ||
903                         period < ENE_CIRMOD_PRD_MIN)) {
904 
905                 dbg("TX: out of range %d-%d kHz carrier",
906                         2000 / ENE_CIRMOD_PRD_MIN, 2000 / ENE_CIRMOD_PRD_MAX);
907                 return -1;
908         }
909 
910         dev->tx_period = period;
911         ene_tx_set_carrier(dev);
912         return 0;
913 }
914 
915 /*outside interface : set tx duty cycle */
916 static int ene_set_tx_duty_cycle(struct rc_dev *rdev, u32 duty_cycle)
917 {
918         struct ene_device *dev = rdev->priv;
919         dbg("TX: setting duty cycle to %d%%", duty_cycle);
920         dev->tx_duty_cycle = duty_cycle;
921         ene_tx_set_carrier(dev);
922         return 0;
923 }
924 
925 /* outside interface: enable learning mode */
926 static int ene_set_learning_mode(struct rc_dev *rdev, int enable)
927 {
928         struct ene_device *dev = rdev->priv;
929         unsigned long flags;
930         if (enable == dev->learning_mode_enabled)
931                 return 0;
932 
933         spin_lock_irqsave(&dev->hw_lock, flags);
934         dev->learning_mode_enabled = enable;
935         ene_rx_disable(dev);
936         ene_rx_setup(dev);
937         ene_rx_enable(dev);
938         spin_unlock_irqrestore(&dev->hw_lock, flags);
939         return 0;
940 }
941 
942 static int ene_set_carrier_report(struct rc_dev *rdev, int enable)
943 {
944         struct ene_device *dev = rdev->priv;
945         unsigned long flags;
946 
947         if (enable == dev->carrier_detect_enabled)
948                 return 0;
949 
950         spin_lock_irqsave(&dev->hw_lock, flags);
951         dev->carrier_detect_enabled = enable;
952         ene_rx_disable(dev);
953         ene_rx_setup(dev);
954         ene_rx_enable(dev);
955         spin_unlock_irqrestore(&dev->hw_lock, flags);
956         return 0;
957 }
958 
959 /* outside interface: enable or disable idle mode */
960 static void ene_set_idle(struct rc_dev *rdev, bool idle)
961 {
962         struct ene_device *dev = rdev->priv;
963 
964         if (idle) {
965                 ene_rx_reset(dev);
966                 dbg("RX: end of data");
967         }
968 }
969 
970 /* outside interface: transmit */
971 static int ene_transmit(struct rc_dev *rdev, unsigned *buf, unsigned n)
972 {
973         struct ene_device *dev = rdev->priv;
974         unsigned long flags;
975 
976         dev->tx_buffer = buf;
977         dev->tx_len = n;
978         dev->tx_pos = 0;
979         dev->tx_reg = 0;
980         dev->tx_done = 0;
981         dev->tx_sample = 0;
982         dev->tx_sample_pulse = false;
983 
984         dbg("TX: %d samples", dev->tx_len);
985 
986         spin_lock_irqsave(&dev->hw_lock, flags);
987 
988         ene_tx_enable(dev);
989 
990         /* Transmit first two samples */
991         ene_tx_sample(dev);
992         ene_tx_sample(dev);
993 
994         spin_unlock_irqrestore(&dev->hw_lock, flags);
995 
996         if (wait_for_completion_timeout(&dev->tx_complete, 2 * HZ) == 0) {
997                 dbg("TX: timeout");
998                 spin_lock_irqsave(&dev->hw_lock, flags);
999                 ene_tx_disable(dev);
1000                 spin_unlock_irqrestore(&dev->hw_lock, flags);
1001         } else
1002                 dbg("TX: done");
1003         return n;
1004 }
1005 
1006 /* probe entry */
1007 static int ene_probe(struct pnp_dev *pnp_dev, const struct pnp_device_id *id)
1008 {
1009         int error = -ENOMEM;
1010         struct rc_dev *rdev;
1011         struct ene_device *dev;
1012 
1013         /* allocate memory */
1014         dev = kzalloc(sizeof(struct ene_device), GFP_KERNEL);
1015         rdev = rc_allocate_device();
1016         if (!dev || !rdev)
1017                 goto exit_free_dev_rdev;
1018 
1019         /* validate resources */
1020         error = -ENODEV;
1021 
1022         /* init these to -1, as 0 is valid for both */
1023         dev->hw_io = -1;
1024         dev->irq = -1;
1025 
1026         if (!pnp_port_valid(pnp_dev, 0) ||
1027             pnp_port_len(pnp_dev, 0) < ENE_IO_SIZE)
1028                 goto exit_free_dev_rdev;
1029 
1030         if (!pnp_irq_valid(pnp_dev, 0))
1031                 goto exit_free_dev_rdev;
1032 
1033         spin_lock_init(&dev->hw_lock);
1034 
1035         dev->hw_io = pnp_port_start(pnp_dev, 0);
1036         dev->irq = pnp_irq(pnp_dev, 0);
1037 
1038 
1039         pnp_set_drvdata(pnp_dev, dev);
1040         dev->pnp_dev = pnp_dev;
1041 
1042         /* don't allow too short/long sample periods */
1043         if (sample_period < 5 || sample_period > 0x7F)
1044                 sample_period = ENE_DEFAULT_SAMPLE_PERIOD;
1045 
1046         /* detect hardware version and features */
1047         error = ene_hw_detect(dev);
1048         if (error)
1049                 goto exit_free_dev_rdev;
1050 
1051         if (!dev->hw_learning_and_tx_capable && txsim) {
1052                 dev->hw_learning_and_tx_capable = true;
1053                 setup_timer(&dev->tx_sim_timer, ene_tx_irqsim,
1054                                                 (long unsigned int)dev);
1055                 pr_warn("Simulation of TX activated\n");
1056         }
1057 
1058         if (!dev->hw_learning_and_tx_capable)
1059                 learning_mode_force = false;
1060 
1061         rdev->driver_type = RC_DRIVER_IR_RAW;
1062         rdev->allowed_protocols = RC_BIT_ALL;
1063         rdev->priv = dev;
1064         rdev->open = ene_open;
1065         rdev->close = ene_close;
1066         rdev->s_idle = ene_set_idle;
1067         rdev->driver_name = ENE_DRIVER_NAME;
1068         rdev->map_name = RC_MAP_RC6_MCE;
1069         rdev->input_name = "ENE eHome Infrared Remote Receiver";
1070 
1071         if (dev->hw_learning_and_tx_capable) {
1072                 rdev->s_learning_mode = ene_set_learning_mode;
1073                 init_completion(&dev->tx_complete);
1074                 rdev->tx_ir = ene_transmit;
1075                 rdev->s_tx_mask = ene_set_tx_mask;
1076                 rdev->s_tx_carrier = ene_set_tx_carrier;
1077                 rdev->s_tx_duty_cycle = ene_set_tx_duty_cycle;
1078                 rdev->s_carrier_report = ene_set_carrier_report;
1079                 rdev->input_name = "ENE eHome Infrared Remote Transceiver";
1080         }
1081 
1082         dev->rdev = rdev;
1083 
1084         ene_rx_setup_hw_buffer(dev);
1085         ene_setup_default_settings(dev);
1086         ene_setup_hw_settings(dev);
1087 
1088         device_set_wakeup_capable(&pnp_dev->dev, true);
1089         device_set_wakeup_enable(&pnp_dev->dev, true);
1090 
1091         error = rc_register_device(rdev);
1092         if (error < 0)
1093                 goto exit_free_dev_rdev;
1094 
1095         /* claim the resources */
1096         error = -EBUSY;
1097         if (!request_region(dev->hw_io, ENE_IO_SIZE, ENE_DRIVER_NAME)) {
1098                 goto exit_unregister_device;
1099         }
1100 
1101         if (request_irq(dev->irq, ene_isr,
1102                         IRQF_SHARED, ENE_DRIVER_NAME, (void *)dev)) {
1103                 goto exit_release_hw_io;
1104         }
1105 
1106         pr_notice("driver has been successfully loaded\n");
1107         return 0;
1108 
1109 exit_release_hw_io:
1110         release_region(dev->hw_io, ENE_IO_SIZE);
1111 exit_unregister_device:
1112         rc_unregister_device(rdev);
1113         rdev = NULL;
1114 exit_free_dev_rdev:
1115         rc_free_device(rdev);
1116         kfree(dev);
1117         return error;
1118 }
1119 
1120 /* main unload function */
1121 static void ene_remove(struct pnp_dev *pnp_dev)
1122 {
1123         struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1124         unsigned long flags;
1125 
1126         spin_lock_irqsave(&dev->hw_lock, flags);
1127         ene_rx_disable(dev);
1128         ene_rx_restore_hw_buffer(dev);
1129         spin_unlock_irqrestore(&dev->hw_lock, flags);
1130 
1131         free_irq(dev->irq, dev);
1132         release_region(dev->hw_io, ENE_IO_SIZE);
1133         rc_unregister_device(dev->rdev);
1134         kfree(dev);
1135 }
1136 
1137 /* enable wake on IR (wakes on specific button on original remote) */
1138 static void ene_enable_wake(struct ene_device *dev, bool enable)
1139 {
1140         dbg("wake on IR %s", enable ? "enabled" : "disabled");
1141         ene_set_clear_reg_mask(dev, ENE_FW1, ENE_FW1_WAKE, enable);
1142 }
1143 
1144 #ifdef CONFIG_PM
1145 static int ene_suspend(struct pnp_dev *pnp_dev, pm_message_t state)
1146 {
1147         struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1148         bool wake = device_may_wakeup(&dev->pnp_dev->dev);
1149 
1150         if (!wake && dev->rx_enabled)
1151                 ene_rx_disable_hw(dev);
1152 
1153         ene_enable_wake(dev, wake);
1154         return 0;
1155 }
1156 
1157 static int ene_resume(struct pnp_dev *pnp_dev)
1158 {
1159         struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1160         ene_setup_hw_settings(dev);
1161 
1162         if (dev->rx_enabled)
1163                 ene_rx_enable(dev);
1164 
1165         ene_enable_wake(dev, false);
1166         return 0;
1167 }
1168 #endif
1169 
1170 static void ene_shutdown(struct pnp_dev *pnp_dev)
1171 {
1172         struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1173         ene_enable_wake(dev, true);
1174 }
1175 
1176 static const struct pnp_device_id ene_ids[] = {
1177         {.id = "ENE0100",},
1178         {.id = "ENE0200",},
1179         {.id = "ENE0201",},
1180         {.id = "ENE0202",},
1181         {},
1182 };
1183 
1184 static struct pnp_driver ene_driver = {
1185         .name = ENE_DRIVER_NAME,
1186         .id_table = ene_ids,
1187         .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1188 
1189         .probe = ene_probe,
1190         .remove = ene_remove,
1191 #ifdef CONFIG_PM
1192         .suspend = ene_suspend,
1193         .resume = ene_resume,
1194 #endif
1195         .shutdown = ene_shutdown,
1196 };
1197 
1198 static int __init ene_init(void)
1199 {
1200         return pnp_register_driver(&ene_driver);
1201 }
1202 
1203 static void ene_exit(void)
1204 {
1205         pnp_unregister_driver(&ene_driver);
1206 }
1207 
1208 module_param(sample_period, int, S_IRUGO);
1209 MODULE_PARM_DESC(sample_period, "Hardware sample period (50 us default)");
1210 
1211 module_param(learning_mode_force, bool, S_IRUGO);
1212 MODULE_PARM_DESC(learning_mode_force, "Enable learning mode by default");
1213 
1214 module_param(debug, int, S_IRUGO | S_IWUSR);
1215 MODULE_PARM_DESC(debug, "Debug level");
1216 
1217 module_param(txsim, bool, S_IRUGO);
1218 MODULE_PARM_DESC(txsim,
1219         "Simulate TX features on unsupported hardware (dangerous)");
1220 
1221 MODULE_DEVICE_TABLE(pnp, ene_ids);
1222 MODULE_DESCRIPTION
1223         ("Infrared input driver for KB3926B/C/D/E/F "
1224         "(aka ENE0100/ENE0200/ENE0201/ENE0202) CIR port");
1225 
1226 MODULE_AUTHOR("Maxim Levitsky");
1227 MODULE_LICENSE("GPL");
1228 
1229 module_init(ene_init);
1230 module_exit(ene_exit);
1231 

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