Version:  2.0.40 2.2.26 2.4.37 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2 4.3 4.4 4.5

Linux/drivers/media/platform/soc_camera/mx3_camera.c

  1 /*
  2  * V4L2 Driver for i.MX3x camera host
  3  *
  4  * Copyright (C) 2008
  5  * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
  6  *
  7  * This program is free software; you can redistribute it and/or modify
  8  * it under the terms of the GNU General Public License version 2 as
  9  * published by the Free Software Foundation.
 10  */
 11 
 12 #include <linux/init.h>
 13 #include <linux/module.h>
 14 #include <linux/videodev2.h>
 15 #include <linux/platform_device.h>
 16 #include <linux/clk.h>
 17 #include <linux/vmalloc.h>
 18 #include <linux/interrupt.h>
 19 #include <linux/sched.h>
 20 #include <linux/dma/ipu-dma.h>
 21 
 22 #include <media/v4l2-common.h>
 23 #include <media/v4l2-dev.h>
 24 #include <media/videobuf2-dma-contig.h>
 25 #include <media/soc_camera.h>
 26 #include <media/drv-intf/soc_mediabus.h>
 27 
 28 #include <linux/platform_data/media/camera-mx3.h>
 29 #include <linux/platform_data/dma-imx.h>
 30 
 31 #define MX3_CAM_DRV_NAME "mx3-camera"
 32 
 33 /* CMOS Sensor Interface Registers */
 34 #define CSI_REG_START           0x60
 35 
 36 #define CSI_SENS_CONF           (0x60 - CSI_REG_START)
 37 #define CSI_SENS_FRM_SIZE       (0x64 - CSI_REG_START)
 38 #define CSI_ACT_FRM_SIZE        (0x68 - CSI_REG_START)
 39 #define CSI_OUT_FRM_CTRL        (0x6C - CSI_REG_START)
 40 #define CSI_TST_CTRL            (0x70 - CSI_REG_START)
 41 #define CSI_CCIR_CODE_1         (0x74 - CSI_REG_START)
 42 #define CSI_CCIR_CODE_2         (0x78 - CSI_REG_START)
 43 #define CSI_CCIR_CODE_3         (0x7C - CSI_REG_START)
 44 #define CSI_FLASH_STROBE_1      (0x80 - CSI_REG_START)
 45 #define CSI_FLASH_STROBE_2      (0x84 - CSI_REG_START)
 46 
 47 #define CSI_SENS_CONF_VSYNC_POL_SHIFT           0
 48 #define CSI_SENS_CONF_HSYNC_POL_SHIFT           1
 49 #define CSI_SENS_CONF_DATA_POL_SHIFT            2
 50 #define CSI_SENS_CONF_PIX_CLK_POL_SHIFT         3
 51 #define CSI_SENS_CONF_SENS_PRTCL_SHIFT          4
 52 #define CSI_SENS_CONF_SENS_CLKSRC_SHIFT         7
 53 #define CSI_SENS_CONF_DATA_FMT_SHIFT            8
 54 #define CSI_SENS_CONF_DATA_WIDTH_SHIFT          10
 55 #define CSI_SENS_CONF_EXT_VSYNC_SHIFT           15
 56 #define CSI_SENS_CONF_DIVRATIO_SHIFT            16
 57 
 58 #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444       (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
 59 #define CSI_SENS_CONF_DATA_FMT_YUV422           (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
 60 #define CSI_SENS_CONF_DATA_FMT_BAYER            (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
 61 
 62 #define MAX_VIDEO_MEM 16
 63 
 64 struct mx3_camera_buffer {
 65         /* common v4l buffer stuff -- must be first */
 66         struct vb2_v4l2_buffer vb;
 67         struct list_head                        queue;
 68 
 69         /* One descriptot per scatterlist (per frame) */
 70         struct dma_async_tx_descriptor          *txd;
 71 
 72         /* We have to "build" a scatterlist ourselves - one element per frame */
 73         struct scatterlist                      sg;
 74 };
 75 
 76 /**
 77  * struct mx3_camera_dev - i.MX3x camera (CSI) object
 78  * @dev:                camera device, to which the coherent buffer is attached
 79  * @icd:                currently attached camera sensor
 80  * @clk:                pointer to clock
 81  * @base:               remapped register base address
 82  * @pdata:              platform data
 83  * @platform_flags:     platform flags
 84  * @mclk:               master clock frequency in Hz
 85  * @capture:            list of capture videobuffers
 86  * @lock:               protects video buffer lists
 87  * @active:             active video buffer
 88  * @idmac_channel:      array of pointers to IPU DMAC DMA channels
 89  * @soc_host:           embedded soc_host object
 90  */
 91 struct mx3_camera_dev {
 92         /*
 93          * i.MX3x is only supposed to handle one camera on its Camera Sensor
 94          * Interface. If anyone ever builds hardware to enable more than one
 95          * camera _simultaneously_, they will have to modify this driver too
 96          */
 97         struct clk              *clk;
 98 
 99         void __iomem            *base;
100 
101         struct mx3_camera_pdata *pdata;
102 
103         unsigned long           platform_flags;
104         unsigned long           mclk;
105         u16                     width_flags;    /* max 15 bits */
106 
107         struct list_head        capture;
108         spinlock_t              lock;           /* Protects video buffer lists */
109         struct mx3_camera_buffer *active;
110         size_t                  buf_total;
111         struct vb2_alloc_ctx    *alloc_ctx;
112         enum v4l2_field         field;
113         int                     sequence;
114 
115         /* IDMAC / dmaengine interface */
116         struct idmac_channel    *idmac_channel[1];      /* We need one channel */
117 
118         struct soc_camera_host  soc_host;
119 };
120 
121 struct dma_chan_request {
122         struct mx3_camera_dev   *mx3_cam;
123         enum ipu_channel        id;
124 };
125 
126 static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg)
127 {
128         return __raw_readl(mx3->base + reg);
129 }
130 
131 static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg)
132 {
133         __raw_writel(value, mx3->base + reg);
134 }
135 
136 static struct mx3_camera_buffer *to_mx3_vb(struct vb2_v4l2_buffer *vb)
137 {
138         return container_of(vb, struct mx3_camera_buffer, vb);
139 }
140 
141 /* Called from the IPU IDMAC ISR */
142 static void mx3_cam_dma_done(void *arg)
143 {
144         struct idmac_tx_desc *desc = to_tx_desc(arg);
145         struct dma_chan *chan = desc->txd.chan;
146         struct idmac_channel *ichannel = to_idmac_chan(chan);
147         struct mx3_camera_dev *mx3_cam = ichannel->client;
148 
149         dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n",
150                 desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0);
151 
152         spin_lock(&mx3_cam->lock);
153         if (mx3_cam->active) {
154                 struct vb2_v4l2_buffer *vb = &mx3_cam->active->vb;
155                 struct mx3_camera_buffer *buf = to_mx3_vb(vb);
156 
157                 list_del_init(&buf->queue);
158                 vb->vb2_buf.timestamp = ktime_get_ns();
159                 vb->field = mx3_cam->field;
160                 vb->sequence = mx3_cam->sequence++;
161                 vb2_buffer_done(&vb->vb2_buf, VB2_BUF_STATE_DONE);
162         }
163 
164         if (list_empty(&mx3_cam->capture)) {
165                 mx3_cam->active = NULL;
166                 spin_unlock(&mx3_cam->lock);
167 
168                 /*
169                  * stop capture - without further buffers IPU_CHA_BUF0_RDY will
170                  * not get updated
171                  */
172                 return;
173         }
174 
175         mx3_cam->active = list_entry(mx3_cam->capture.next,
176                                      struct mx3_camera_buffer, queue);
177         spin_unlock(&mx3_cam->lock);
178 }
179 
180 /*
181  * Videobuf operations
182  */
183 
184 /*
185  * Calculate the __buffer__ (not data) size and number of buffers.
186  */
187 static int mx3_videobuf_setup(struct vb2_queue *vq,
188                         unsigned int *count, unsigned int *num_planes,
189                         unsigned int sizes[], void *alloc_ctxs[])
190 {
191         struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
192         struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
193         struct mx3_camera_dev *mx3_cam = ici->priv;
194 
195         if (!mx3_cam->idmac_channel[0])
196                 return -EINVAL;
197 
198         alloc_ctxs[0] = mx3_cam->alloc_ctx;
199 
200         if (!vq->num_buffers)
201                 mx3_cam->sequence = 0;
202 
203         if (!*count)
204                 *count = 2;
205 
206         /* Called from VIDIOC_REQBUFS or in compatibility mode */
207         if (!*num_planes)
208                 sizes[0] = icd->sizeimage;
209         else if (sizes[0] < icd->sizeimage)
210                 return -EINVAL;
211 
212         /* If *num_planes != 0, we have already verified *count. */
213         if (sizes[0] * *count + mx3_cam->buf_total > MAX_VIDEO_MEM * 1024 * 1024)
214                 *count = (MAX_VIDEO_MEM * 1024 * 1024 - mx3_cam->buf_total) /
215                         sizes[0];
216 
217         *num_planes = 1;
218 
219         return 0;
220 }
221 
222 static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
223 {
224         /* Add more formats as need arises and test possibilities appear... */
225         switch (fourcc) {
226         case V4L2_PIX_FMT_RGB24:
227                 return IPU_PIX_FMT_RGB24;
228         case V4L2_PIX_FMT_UYVY:
229         case V4L2_PIX_FMT_RGB565:
230         default:
231                 return IPU_PIX_FMT_GENERIC;
232         }
233 }
234 
235 static void mx3_videobuf_queue(struct vb2_buffer *vb)
236 {
237         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
238         struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
239         struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
240         struct mx3_camera_dev *mx3_cam = ici->priv;
241         struct mx3_camera_buffer *buf = to_mx3_vb(vbuf);
242         struct scatterlist *sg = &buf->sg;
243         struct dma_async_tx_descriptor *txd;
244         struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
245         struct idmac_video_param *video = &ichan->params.video;
246         const struct soc_mbus_pixelfmt *host_fmt = icd->current_fmt->host_fmt;
247         dma_cookie_t cookie;
248         size_t new_size;
249 
250         new_size = icd->sizeimage;
251 
252         if (vb2_plane_size(vb, 0) < new_size) {
253                 dev_err(icd->parent, "Buffer #%d too small (%lu < %zu)\n",
254                         vbuf->vb2_buf.index, vb2_plane_size(vb, 0), new_size);
255                 goto error;
256         }
257 
258         if (!buf->txd) {
259                 sg_dma_address(sg)      = vb2_dma_contig_plane_dma_addr(vb, 0);
260                 sg_dma_len(sg)          = new_size;
261 
262                 txd = dmaengine_prep_slave_sg(
263                         &ichan->dma_chan, sg, 1, DMA_DEV_TO_MEM,
264                         DMA_PREP_INTERRUPT);
265                 if (!txd)
266                         goto error;
267 
268                 txd->callback_param     = txd;
269                 txd->callback           = mx3_cam_dma_done;
270 
271                 buf->txd                = txd;
272         } else {
273                 txd = buf->txd;
274         }
275 
276         vb2_set_plane_payload(vb, 0, new_size);
277 
278         /* This is the configuration of one sg-element */
279         video->out_pixel_fmt = fourcc_to_ipu_pix(host_fmt->fourcc);
280 
281         if (video->out_pixel_fmt == IPU_PIX_FMT_GENERIC) {
282                 /*
283                  * If the IPU DMA channel is configured to transfer generic
284                  * 8-bit data, we have to set up the geometry parameters
285                  * correctly, according to the current pixel format. The DMA
286                  * horizontal parameters in this case are expressed in bytes,
287                  * not in pixels.
288                  */
289                 video->out_width        = icd->bytesperline;
290                 video->out_height       = icd->user_height;
291                 video->out_stride       = icd->bytesperline;
292         } else {
293                 /*
294                  * For IPU known formats the pixel unit will be managed
295                  * successfully by the IPU code
296                  */
297                 video->out_width        = icd->user_width;
298                 video->out_height       = icd->user_height;
299                 video->out_stride       = icd->user_width;
300         }
301 
302 #ifdef DEBUG
303         /* helps to see what DMA actually has written */
304         if (vb2_plane_vaddr(vb, 0))
305                 memset(vb2_plane_vaddr(vb, 0), 0xaa, vb2_get_plane_payload(vb, 0));
306 #endif
307 
308         spin_lock_irq(&mx3_cam->lock);
309         list_add_tail(&buf->queue, &mx3_cam->capture);
310 
311         if (!mx3_cam->active)
312                 mx3_cam->active = buf;
313 
314         spin_unlock_irq(&mx3_cam->lock);
315 
316         cookie = txd->tx_submit(txd);
317         dev_dbg(icd->parent, "Submitted cookie %d DMA 0x%08x\n",
318                 cookie, sg_dma_address(&buf->sg));
319 
320         if (cookie >= 0)
321                 return;
322 
323         spin_lock_irq(&mx3_cam->lock);
324 
325         /* Submit error */
326         list_del_init(&buf->queue);
327 
328         if (mx3_cam->active == buf)
329                 mx3_cam->active = NULL;
330 
331         spin_unlock_irq(&mx3_cam->lock);
332 error:
333         vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
334 }
335 
336 static void mx3_videobuf_release(struct vb2_buffer *vb)
337 {
338         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
339         struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
340         struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
341         struct mx3_camera_dev *mx3_cam = ici->priv;
342         struct mx3_camera_buffer *buf = to_mx3_vb(vbuf);
343         struct dma_async_tx_descriptor *txd = buf->txd;
344         unsigned long flags;
345 
346         dev_dbg(icd->parent,
347                 "Release%s DMA 0x%08x, queue %sempty\n",
348                 mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg),
349                 list_empty(&buf->queue) ? "" : "not ");
350 
351         spin_lock_irqsave(&mx3_cam->lock, flags);
352 
353         if (mx3_cam->active == buf)
354                 mx3_cam->active = NULL;
355 
356         /* Doesn't hurt also if the list is empty */
357         list_del_init(&buf->queue);
358 
359         if (txd) {
360                 buf->txd = NULL;
361                 if (mx3_cam->idmac_channel[0])
362                         async_tx_ack(txd);
363         }
364 
365         spin_unlock_irqrestore(&mx3_cam->lock, flags);
366 
367         mx3_cam->buf_total -= vb2_plane_size(vb, 0);
368 }
369 
370 static int mx3_videobuf_init(struct vb2_buffer *vb)
371 {
372         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
373         struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
374         struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
375         struct mx3_camera_dev *mx3_cam = ici->priv;
376         struct mx3_camera_buffer *buf = to_mx3_vb(vbuf);
377 
378         if (!buf->txd) {
379                 /* This is for locking debugging only */
380                 INIT_LIST_HEAD(&buf->queue);
381                 sg_init_table(&buf->sg, 1);
382 
383                 mx3_cam->buf_total += vb2_plane_size(vb, 0);
384         }
385 
386         return 0;
387 }
388 
389 static void mx3_stop_streaming(struct vb2_queue *q)
390 {
391         struct soc_camera_device *icd = soc_camera_from_vb2q(q);
392         struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
393         struct mx3_camera_dev *mx3_cam = ici->priv;
394         struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
395         struct mx3_camera_buffer *buf, *tmp;
396         unsigned long flags;
397 
398         if (ichan)
399                 dmaengine_pause(&ichan->dma_chan);
400 
401         spin_lock_irqsave(&mx3_cam->lock, flags);
402 
403         mx3_cam->active = NULL;
404 
405         list_for_each_entry_safe(buf, tmp, &mx3_cam->capture, queue) {
406                 list_del_init(&buf->queue);
407                 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
408         }
409 
410         spin_unlock_irqrestore(&mx3_cam->lock, flags);
411 }
412 
413 static struct vb2_ops mx3_videobuf_ops = {
414         .queue_setup    = mx3_videobuf_setup,
415         .buf_queue      = mx3_videobuf_queue,
416         .buf_cleanup    = mx3_videobuf_release,
417         .buf_init       = mx3_videobuf_init,
418         .wait_prepare   = vb2_ops_wait_prepare,
419         .wait_finish    = vb2_ops_wait_finish,
420         .stop_streaming = mx3_stop_streaming,
421 };
422 
423 static int mx3_camera_init_videobuf(struct vb2_queue *q,
424                                      struct soc_camera_device *icd)
425 {
426         struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
427 
428         q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
429         q->io_modes = VB2_MMAP | VB2_USERPTR;
430         q->drv_priv = icd;
431         q->ops = &mx3_videobuf_ops;
432         q->mem_ops = &vb2_dma_contig_memops;
433         q->buf_struct_size = sizeof(struct mx3_camera_buffer);
434         q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
435         q->lock = &ici->host_lock;
436 
437         return vb2_queue_init(q);
438 }
439 
440 /* First part of ipu_csi_init_interface() */
441 static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam)
442 {
443         u32 conf;
444         long rate;
445 
446         /* Set default size: ipu_csi_set_window_size() */
447         csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE);
448         /* ...and position to 0:0: ipu_csi_set_window_pos() */
449         conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
450         csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL);
451 
452         /* We use only gated clock synchronisation mode so far */
453         conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT;
454 
455         /* Set generic data, platform-biggest bus-width */
456         conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
457 
458         if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
459                 conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
460         else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
461                 conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
462         else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
463                 conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
464         else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
465                 conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
466 
467         if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC)
468                 conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT;
469         if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC)
470                 conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT;
471         if (mx3_cam->platform_flags & MX3_CAMERA_DP)
472                 conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
473         if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
474                 conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
475         if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
476                 conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
477         if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
478                 conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
479 
480         /* ipu_csi_init_interface() */
481         csi_reg_write(mx3_cam, conf, CSI_SENS_CONF);
482 
483         clk_prepare_enable(mx3_cam->clk);
484         rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk);
485         dev_dbg(mx3_cam->soc_host.v4l2_dev.dev, "Set SENS_CONF to %x, rate %ld\n", conf, rate);
486         if (rate)
487                 clk_set_rate(mx3_cam->clk, rate);
488 }
489 
490 static int mx3_camera_add_device(struct soc_camera_device *icd)
491 {
492         dev_info(icd->parent, "MX3 Camera driver attached to camera %d\n",
493                  icd->devnum);
494 
495         return 0;
496 }
497 
498 static void mx3_camera_remove_device(struct soc_camera_device *icd)
499 {
500         dev_info(icd->parent, "MX3 Camera driver detached from camera %d\n",
501                  icd->devnum);
502 }
503 
504 /* Called with .host_lock held */
505 static int mx3_camera_clock_start(struct soc_camera_host *ici)
506 {
507         struct mx3_camera_dev *mx3_cam = ici->priv;
508 
509         mx3_camera_activate(mx3_cam);
510 
511         mx3_cam->buf_total = 0;
512 
513         return 0;
514 }
515 
516 /* Called with .host_lock held */
517 static void mx3_camera_clock_stop(struct soc_camera_host *ici)
518 {
519         struct mx3_camera_dev *mx3_cam = ici->priv;
520         struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
521 
522         if (*ichan) {
523                 dma_release_channel(&(*ichan)->dma_chan);
524                 *ichan = NULL;
525         }
526 
527         clk_disable_unprepare(mx3_cam->clk);
528 }
529 
530 static int test_platform_param(struct mx3_camera_dev *mx3_cam,
531                                unsigned char buswidth, unsigned long *flags)
532 {
533         /*
534          * If requested data width is supported by the platform, use it or any
535          * possible lower value - i.MX31 is smart enough to shift bits
536          */
537         if (buswidth > fls(mx3_cam->width_flags))
538                 return -EINVAL;
539 
540         /*
541          * Platform specified synchronization and pixel clock polarities are
542          * only a recommendation and are only used during probing. MX3x
543          * camera interface only works in master mode, i.e., uses HSYNC and
544          * VSYNC signals from the sensor
545          */
546         *flags = V4L2_MBUS_MASTER |
547                 V4L2_MBUS_HSYNC_ACTIVE_HIGH |
548                 V4L2_MBUS_HSYNC_ACTIVE_LOW |
549                 V4L2_MBUS_VSYNC_ACTIVE_HIGH |
550                 V4L2_MBUS_VSYNC_ACTIVE_LOW |
551                 V4L2_MBUS_PCLK_SAMPLE_RISING |
552                 V4L2_MBUS_PCLK_SAMPLE_FALLING |
553                 V4L2_MBUS_DATA_ACTIVE_HIGH |
554                 V4L2_MBUS_DATA_ACTIVE_LOW;
555 
556         return 0;
557 }
558 
559 static int mx3_camera_try_bus_param(struct soc_camera_device *icd,
560                                     const unsigned int depth)
561 {
562         struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
563         struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
564         struct mx3_camera_dev *mx3_cam = ici->priv;
565         struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
566         unsigned long bus_flags, common_flags;
567         int ret = test_platform_param(mx3_cam, depth, &bus_flags);
568 
569         dev_dbg(icd->parent, "request bus width %d bit: %d\n", depth, ret);
570 
571         if (ret < 0)
572                 return ret;
573 
574         ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
575         if (!ret) {
576                 common_flags = soc_mbus_config_compatible(&cfg,
577                                                           bus_flags);
578                 if (!common_flags) {
579                         dev_warn(icd->parent,
580                                  "Flags incompatible: camera 0x%x, host 0x%lx\n",
581                                  cfg.flags, bus_flags);
582                         return -EINVAL;
583                 }
584         } else if (ret != -ENOIOCTLCMD) {
585                 return ret;
586         }
587 
588         return 0;
589 }
590 
591 static bool chan_filter(struct dma_chan *chan, void *arg)
592 {
593         struct dma_chan_request *rq = arg;
594         struct mx3_camera_pdata *pdata;
595 
596         if (!imx_dma_is_ipu(chan))
597                 return false;
598 
599         if (!rq)
600                 return false;
601 
602         pdata = rq->mx3_cam->soc_host.v4l2_dev.dev->platform_data;
603 
604         return rq->id == chan->chan_id &&
605                 pdata->dma_dev == chan->device->dev;
606 }
607 
608 static const struct soc_mbus_pixelfmt mx3_camera_formats[] = {
609         {
610                 .fourcc                 = V4L2_PIX_FMT_SBGGR8,
611                 .name                   = "Bayer BGGR (sRGB) 8 bit",
612                 .bits_per_sample        = 8,
613                 .packing                = SOC_MBUS_PACKING_NONE,
614                 .order                  = SOC_MBUS_ORDER_LE,
615                 .layout                 = SOC_MBUS_LAYOUT_PACKED,
616         }, {
617                 .fourcc                 = V4L2_PIX_FMT_GREY,
618                 .name                   = "Monochrome 8 bit",
619                 .bits_per_sample        = 8,
620                 .packing                = SOC_MBUS_PACKING_NONE,
621                 .order                  = SOC_MBUS_ORDER_LE,
622                 .layout                 = SOC_MBUS_LAYOUT_PACKED,
623         },
624 };
625 
626 /* This will be corrected as we get more formats */
627 static bool mx3_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt)
628 {
629         return  fmt->packing == SOC_MBUS_PACKING_NONE ||
630                 (fmt->bits_per_sample == 8 &&
631                  fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) ||
632                 (fmt->bits_per_sample > 8 &&
633                  fmt->packing == SOC_MBUS_PACKING_EXTEND16);
634 }
635 
636 static int mx3_camera_get_formats(struct soc_camera_device *icd, unsigned int idx,
637                                   struct soc_camera_format_xlate *xlate)
638 {
639         struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
640         struct device *dev = icd->parent;
641         int formats = 0, ret;
642         struct v4l2_subdev_mbus_code_enum code = {
643                 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
644                 .index = idx,
645         };
646         const struct soc_mbus_pixelfmt *fmt;
647 
648         ret = v4l2_subdev_call(sd, pad, enum_mbus_code, NULL, &code);
649         if (ret < 0)
650                 /* No more formats */
651                 return 0;
652 
653         fmt = soc_mbus_get_fmtdesc(code.code);
654         if (!fmt) {
655                 dev_warn(icd->parent,
656                          "Unsupported format code #%u: 0x%x\n", idx, code.code);
657                 return 0;
658         }
659 
660         /* This also checks support for the requested bits-per-sample */
661         ret = mx3_camera_try_bus_param(icd, fmt->bits_per_sample);
662         if (ret < 0)
663                 return 0;
664 
665         switch (code.code) {
666         case MEDIA_BUS_FMT_SBGGR10_1X10:
667                 formats++;
668                 if (xlate) {
669                         xlate->host_fmt = &mx3_camera_formats[0];
670                         xlate->code     = code.code;
671                         xlate++;
672                         dev_dbg(dev, "Providing format %s using code 0x%x\n",
673                                 mx3_camera_formats[0].name, code.code);
674                 }
675                 break;
676         case MEDIA_BUS_FMT_Y10_1X10:
677                 formats++;
678                 if (xlate) {
679                         xlate->host_fmt = &mx3_camera_formats[1];
680                         xlate->code     = code.code;
681                         xlate++;
682                         dev_dbg(dev, "Providing format %s using code 0x%x\n",
683                                 mx3_camera_formats[1].name, code.code);
684                 }
685                 break;
686         default:
687                 if (!mx3_camera_packing_supported(fmt))
688                         return 0;
689         }
690 
691         /* Generic pass-through */
692         formats++;
693         if (xlate) {
694                 xlate->host_fmt = fmt;
695                 xlate->code     = code.code;
696                 dev_dbg(dev, "Providing format %c%c%c%c in pass-through mode\n",
697                         (fmt->fourcc >> (0*8)) & 0xFF,
698                         (fmt->fourcc >> (1*8)) & 0xFF,
699                         (fmt->fourcc >> (2*8)) & 0xFF,
700                         (fmt->fourcc >> (3*8)) & 0xFF);
701                 xlate++;
702         }
703 
704         return formats;
705 }
706 
707 static void configure_geometry(struct mx3_camera_dev *mx3_cam,
708                                unsigned int width, unsigned int height,
709                                const struct soc_mbus_pixelfmt *fmt)
710 {
711         u32 ctrl, width_field, height_field;
712 
713         if (fourcc_to_ipu_pix(fmt->fourcc) == IPU_PIX_FMT_GENERIC) {
714                 /*
715                  * As the CSI will be configured to output BAYER, here
716                  * the width parameter count the number of samples to
717                  * capture to complete the whole image width.
718                  */
719                 unsigned int num, den;
720                 int ret = soc_mbus_samples_per_pixel(fmt, &num, &den);
721                 BUG_ON(ret < 0);
722                 width = width * num / den;
723         }
724 
725         /* Setup frame size - this cannot be changed on-the-fly... */
726         width_field = width - 1;
727         height_field = height - 1;
728         csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE);
729 
730         csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1);
731         csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2);
732 
733         csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE);
734 
735         /* ...and position */
736         ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
737         /* Sensor does the cropping */
738         csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL);
739 }
740 
741 static int acquire_dma_channel(struct mx3_camera_dev *mx3_cam)
742 {
743         dma_cap_mask_t mask;
744         struct dma_chan *chan;
745         struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
746         /* We have to use IDMAC_IC_7 for Bayer / generic data */
747         struct dma_chan_request rq = {.mx3_cam = mx3_cam,
748                                       .id = IDMAC_IC_7};
749 
750         dma_cap_zero(mask);
751         dma_cap_set(DMA_SLAVE, mask);
752         dma_cap_set(DMA_PRIVATE, mask);
753         chan = dma_request_channel(mask, chan_filter, &rq);
754         if (!chan)
755                 return -EBUSY;
756 
757         *ichan = to_idmac_chan(chan);
758         (*ichan)->client = mx3_cam;
759 
760         return 0;
761 }
762 
763 /*
764  * FIXME: learn to use stride != width, then we can keep stride properly aligned
765  * and support arbitrary (even) widths.
766  */
767 static inline void stride_align(__u32 *width)
768 {
769         if (ALIGN(*width, 8) < 4096)
770                 *width = ALIGN(*width, 8);
771         else
772                 *width = *width &  ~7;
773 }
774 
775 /*
776  * As long as we don't implement host-side cropping and scaling, we can use
777  * default g_crop and cropcap from soc_camera.c
778  */
779 static int mx3_camera_set_crop(struct soc_camera_device *icd,
780                                const struct v4l2_crop *a)
781 {
782         struct v4l2_crop a_writable = *a;
783         struct v4l2_rect *rect = &a_writable.c;
784         struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
785         struct mx3_camera_dev *mx3_cam = ici->priv;
786         struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
787         struct v4l2_subdev_format fmt = {
788                 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
789         };
790         struct v4l2_mbus_framefmt *mf = &fmt.format;
791         int ret;
792 
793         soc_camera_limit_side(&rect->left, &rect->width, 0, 2, 4096);
794         soc_camera_limit_side(&rect->top, &rect->height, 0, 2, 4096);
795 
796         ret = v4l2_subdev_call(sd, video, s_crop, a);
797         if (ret < 0)
798                 return ret;
799 
800         /* The capture device might have changed its output sizes */
801         ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &fmt);
802         if (ret < 0)
803                 return ret;
804 
805         if (mf->code != icd->current_fmt->code)
806                 return -EINVAL;
807 
808         if (mf->width & 7) {
809                 /* Ouch! We can only handle 8-byte aligned width... */
810                 stride_align(&mf->width);
811                 ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &fmt);
812                 if (ret < 0)
813                         return ret;
814         }
815 
816         if (mf->width != icd->user_width || mf->height != icd->user_height)
817                 configure_geometry(mx3_cam, mf->width, mf->height,
818                                    icd->current_fmt->host_fmt);
819 
820         dev_dbg(icd->parent, "Sensor cropped %dx%d\n",
821                 mf->width, mf->height);
822 
823         icd->user_width         = mf->width;
824         icd->user_height        = mf->height;
825 
826         return ret;
827 }
828 
829 static int mx3_camera_set_fmt(struct soc_camera_device *icd,
830                               struct v4l2_format *f)
831 {
832         struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
833         struct mx3_camera_dev *mx3_cam = ici->priv;
834         struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
835         const struct soc_camera_format_xlate *xlate;
836         struct v4l2_pix_format *pix = &f->fmt.pix;
837         struct v4l2_subdev_format format = {
838                 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
839         };
840         struct v4l2_mbus_framefmt *mf = &format.format;
841         int ret;
842 
843         xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
844         if (!xlate) {
845                 dev_warn(icd->parent, "Format %x not found\n",
846                          pix->pixelformat);
847                 return -EINVAL;
848         }
849 
850         stride_align(&pix->width);
851         dev_dbg(icd->parent, "Set format %dx%d\n", pix->width, pix->height);
852 
853         /*
854          * Might have to perform a complete interface initialisation like in
855          * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
856          * mxc_v4l2_s_fmt()
857          */
858 
859         configure_geometry(mx3_cam, pix->width, pix->height, xlate->host_fmt);
860 
861         mf->width       = pix->width;
862         mf->height      = pix->height;
863         mf->field       = pix->field;
864         mf->colorspace  = pix->colorspace;
865         mf->code        = xlate->code;
866 
867         ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &format);
868         if (ret < 0)
869                 return ret;
870 
871         if (mf->code != xlate->code)
872                 return -EINVAL;
873 
874         if (!mx3_cam->idmac_channel[0]) {
875                 ret = acquire_dma_channel(mx3_cam);
876                 if (ret < 0)
877                         return ret;
878         }
879 
880         pix->width              = mf->width;
881         pix->height             = mf->height;
882         pix->field              = mf->field;
883         mx3_cam->field          = mf->field;
884         pix->colorspace         = mf->colorspace;
885         icd->current_fmt        = xlate;
886 
887         dev_dbg(icd->parent, "Sensor set %dx%d\n", pix->width, pix->height);
888 
889         return ret;
890 }
891 
892 static int mx3_camera_try_fmt(struct soc_camera_device *icd,
893                               struct v4l2_format *f)
894 {
895         struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
896         const struct soc_camera_format_xlate *xlate;
897         struct v4l2_pix_format *pix = &f->fmt.pix;
898         struct v4l2_subdev_pad_config pad_cfg;
899         struct v4l2_subdev_format format = {
900                 .which = V4L2_SUBDEV_FORMAT_TRY,
901         };
902         struct v4l2_mbus_framefmt *mf = &format.format;
903         __u32 pixfmt = pix->pixelformat;
904         int ret;
905 
906         xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
907         if (pixfmt && !xlate) {
908                 dev_warn(icd->parent, "Format %x not found\n", pixfmt);
909                 return -EINVAL;
910         }
911 
912         /* limit to MX3 hardware capabilities */
913         if (pix->height > 4096)
914                 pix->height = 4096;
915         if (pix->width > 4096)
916                 pix->width = 4096;
917 
918         /* limit to sensor capabilities */
919         mf->width       = pix->width;
920         mf->height      = pix->height;
921         mf->field       = pix->field;
922         mf->colorspace  = pix->colorspace;
923         mf->code        = xlate->code;
924 
925         ret = v4l2_subdev_call(sd, pad, set_fmt, &pad_cfg, &format);
926         if (ret < 0)
927                 return ret;
928 
929         pix->width      = mf->width;
930         pix->height     = mf->height;
931         pix->colorspace = mf->colorspace;
932 
933         switch (mf->field) {
934         case V4L2_FIELD_ANY:
935                 pix->field = V4L2_FIELD_NONE;
936                 break;
937         case V4L2_FIELD_NONE:
938                 break;
939         default:
940                 dev_err(icd->parent, "Field type %d unsupported.\n",
941                         mf->field);
942                 ret = -EINVAL;
943         }
944 
945         return ret;
946 }
947 
948 static int mx3_camera_reqbufs(struct soc_camera_device *icd,
949                               struct v4l2_requestbuffers *p)
950 {
951         return 0;
952 }
953 
954 static unsigned int mx3_camera_poll(struct file *file, poll_table *pt)
955 {
956         struct soc_camera_device *icd = file->private_data;
957 
958         return vb2_poll(&icd->vb2_vidq, file, pt);
959 }
960 
961 static int mx3_camera_querycap(struct soc_camera_host *ici,
962                                struct v4l2_capability *cap)
963 {
964         /* cap->name is set by the firendly caller:-> */
965         strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card));
966         cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
967         cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
968 
969         return 0;
970 }
971 
972 static int mx3_camera_set_bus_param(struct soc_camera_device *icd)
973 {
974         struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
975         struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
976         struct mx3_camera_dev *mx3_cam = ici->priv;
977         struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
978         u32 pixfmt = icd->current_fmt->host_fmt->fourcc;
979         unsigned long bus_flags, common_flags;
980         u32 dw, sens_conf;
981         const struct soc_mbus_pixelfmt *fmt;
982         int buswidth;
983         int ret;
984         const struct soc_camera_format_xlate *xlate;
985         struct device *dev = icd->parent;
986 
987         fmt = soc_mbus_get_fmtdesc(icd->current_fmt->code);
988         if (!fmt)
989                 return -EINVAL;
990 
991         xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
992         if (!xlate) {
993                 dev_warn(dev, "Format %x not found\n", pixfmt);
994                 return -EINVAL;
995         }
996 
997         buswidth = fmt->bits_per_sample;
998         ret = test_platform_param(mx3_cam, buswidth, &bus_flags);
999 
1000         dev_dbg(dev, "requested bus width %d bit: %d\n", buswidth, ret);
1001 
1002         if (ret < 0)
1003                 return ret;
1004 
1005         ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
1006         if (!ret) {
1007                 common_flags = soc_mbus_config_compatible(&cfg,
1008                                                           bus_flags);
1009                 if (!common_flags) {
1010                         dev_warn(icd->parent,
1011                                  "Flags incompatible: camera 0x%x, host 0x%lx\n",
1012                                  cfg.flags, bus_flags);
1013                         return -EINVAL;
1014                 }
1015         } else if (ret != -ENOIOCTLCMD) {
1016                 return ret;
1017         } else {
1018                 common_flags = bus_flags;
1019         }
1020 
1021         dev_dbg(dev, "Flags cam: 0x%x host: 0x%lx common: 0x%lx\n",
1022                 cfg.flags, bus_flags, common_flags);
1023 
1024         /* Make choices, based on platform preferences */
1025         if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) &&
1026             (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) {
1027                 if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
1028                         common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_HIGH;
1029                 else
1030                         common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_LOW;
1031         }
1032 
1033         if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) &&
1034             (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) {
1035                 if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
1036                         common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH;
1037                 else
1038                         common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW;
1039         }
1040 
1041         if ((common_flags & V4L2_MBUS_DATA_ACTIVE_HIGH) &&
1042             (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)) {
1043                 if (mx3_cam->platform_flags & MX3_CAMERA_DP)
1044                         common_flags &= ~V4L2_MBUS_DATA_ACTIVE_HIGH;
1045                 else
1046                         common_flags &= ~V4L2_MBUS_DATA_ACTIVE_LOW;
1047         }
1048 
1049         if ((common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) &&
1050             (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)) {
1051                 if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
1052                         common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_RISING;
1053                 else
1054                         common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_FALLING;
1055         }
1056 
1057         cfg.flags = common_flags;
1058         ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg);
1059         if (ret < 0 && ret != -ENOIOCTLCMD) {
1060                 dev_dbg(dev, "camera s_mbus_config(0x%lx) returned %d\n",
1061                         common_flags, ret);
1062                 return ret;
1063         }
1064 
1065         /*
1066          * So far only gated clock mode is supported. Add a line
1067          *      (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
1068          * below and select the required mode when supporting other
1069          * synchronisation protocols.
1070          */
1071         sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) &
1072                 ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) |
1073                   (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) |
1074                   (1 << CSI_SENS_CONF_DATA_POL_SHIFT) |
1075                   (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) |
1076                   (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
1077                   (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
1078 
1079         /* TODO: Support RGB and YUV formats */
1080 
1081         /* This has been set in mx3_camera_activate(), but we clear it above */
1082         sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
1083 
1084         if (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
1085                 sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
1086         if (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
1087                 sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
1088         if (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
1089                 sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
1090         if (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)
1091                 sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
1092 
1093         /* Just do what we're asked to do */
1094         switch (xlate->host_fmt->bits_per_sample) {
1095         case 4:
1096                 dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1097                 break;
1098         case 8:
1099                 dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1100                 break;
1101         case 10:
1102                 dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1103                 break;
1104         default:
1105                 /*
1106                  * Actually it can only be 15 now, default is just to silence
1107                  * compiler warnings
1108                  */
1109         case 15:
1110                 dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1111         }
1112 
1113         csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF);
1114 
1115         dev_dbg(dev, "Set SENS_CONF to %x\n", sens_conf | dw);
1116 
1117         return 0;
1118 }
1119 
1120 static struct soc_camera_host_ops mx3_soc_camera_host_ops = {
1121         .owner          = THIS_MODULE,
1122         .add            = mx3_camera_add_device,
1123         .remove         = mx3_camera_remove_device,
1124         .clock_start    = mx3_camera_clock_start,
1125         .clock_stop     = mx3_camera_clock_stop,
1126         .set_crop       = mx3_camera_set_crop,
1127         .set_fmt        = mx3_camera_set_fmt,
1128         .try_fmt        = mx3_camera_try_fmt,
1129         .get_formats    = mx3_camera_get_formats,
1130         .init_videobuf2 = mx3_camera_init_videobuf,
1131         .reqbufs        = mx3_camera_reqbufs,
1132         .poll           = mx3_camera_poll,
1133         .querycap       = mx3_camera_querycap,
1134         .set_bus_param  = mx3_camera_set_bus_param,
1135 };
1136 
1137 static int mx3_camera_probe(struct platform_device *pdev)
1138 {
1139         struct mx3_camera_pdata *pdata = pdev->dev.platform_data;
1140         struct mx3_camera_dev *mx3_cam;
1141         struct resource *res;
1142         void __iomem *base;
1143         int err = 0;
1144         struct soc_camera_host *soc_host;
1145 
1146         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1147         base = devm_ioremap_resource(&pdev->dev, res);
1148         if (IS_ERR(base))
1149                 return PTR_ERR(base);
1150 
1151         if (!pdata)
1152                 return -EINVAL;
1153 
1154         mx3_cam = devm_kzalloc(&pdev->dev, sizeof(*mx3_cam), GFP_KERNEL);
1155         if (!mx3_cam) {
1156                 dev_err(&pdev->dev, "Could not allocate mx3 camera object\n");
1157                 return -ENOMEM;
1158         }
1159 
1160         mx3_cam->clk = devm_clk_get(&pdev->dev, NULL);
1161         if (IS_ERR(mx3_cam->clk))
1162                 return PTR_ERR(mx3_cam->clk);
1163 
1164         mx3_cam->pdata = pdata;
1165         mx3_cam->platform_flags = pdata->flags;
1166         if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_MASK)) {
1167                 /*
1168                  * Platform hasn't set available data widths. This is bad.
1169                  * Warn and use a default.
1170                  */
1171                 dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
1172                          "data widths, using default 8 bit\n");
1173                 mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8;
1174         }
1175         if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)
1176                 mx3_cam->width_flags = 1 << 3;
1177         if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
1178                 mx3_cam->width_flags |= 1 << 7;
1179         if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
1180                 mx3_cam->width_flags |= 1 << 9;
1181         if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
1182                 mx3_cam->width_flags |= 1 << 14;
1183 
1184         mx3_cam->mclk = pdata->mclk_10khz * 10000;
1185         if (!mx3_cam->mclk) {
1186                 dev_warn(&pdev->dev,
1187                          "mclk_10khz == 0! Please, fix your platform data. "
1188                          "Using default 20MHz\n");
1189                 mx3_cam->mclk = 20000000;
1190         }
1191 
1192         /* list of video-buffers */
1193         INIT_LIST_HEAD(&mx3_cam->capture);
1194         spin_lock_init(&mx3_cam->lock);
1195 
1196         mx3_cam->base   = base;
1197 
1198         soc_host                = &mx3_cam->soc_host;
1199         soc_host->drv_name      = MX3_CAM_DRV_NAME;
1200         soc_host->ops           = &mx3_soc_camera_host_ops;
1201         soc_host->priv          = mx3_cam;
1202         soc_host->v4l2_dev.dev  = &pdev->dev;
1203         soc_host->nr            = pdev->id;
1204 
1205         mx3_cam->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1206         if (IS_ERR(mx3_cam->alloc_ctx))
1207                 return PTR_ERR(mx3_cam->alloc_ctx);
1208 
1209         if (pdata->asd_sizes) {
1210                 soc_host->asd = pdata->asd;
1211                 soc_host->asd_sizes = pdata->asd_sizes;
1212         }
1213 
1214         err = soc_camera_host_register(soc_host);
1215         if (err)
1216                 goto ecamhostreg;
1217 
1218         /* IDMAC interface */
1219         dmaengine_get();
1220 
1221         return 0;
1222 
1223 ecamhostreg:
1224         vb2_dma_contig_cleanup_ctx(mx3_cam->alloc_ctx);
1225         return err;
1226 }
1227 
1228 static int mx3_camera_remove(struct platform_device *pdev)
1229 {
1230         struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
1231         struct mx3_camera_dev *mx3_cam = container_of(soc_host,
1232                                         struct mx3_camera_dev, soc_host);
1233 
1234         soc_camera_host_unregister(soc_host);
1235 
1236         /*
1237          * The channel has either not been allocated,
1238          * or should have been released
1239          */
1240         if (WARN_ON(mx3_cam->idmac_channel[0]))
1241                 dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan);
1242 
1243         vb2_dma_contig_cleanup_ctx(mx3_cam->alloc_ctx);
1244 
1245         dmaengine_put();
1246 
1247         return 0;
1248 }
1249 
1250 static struct platform_driver mx3_camera_driver = {
1251         .driver         = {
1252                 .name   = MX3_CAM_DRV_NAME,
1253         },
1254         .probe          = mx3_camera_probe,
1255         .remove         = mx3_camera_remove,
1256 };
1257 
1258 module_platform_driver(mx3_camera_driver);
1259 
1260 MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
1261 MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
1262 MODULE_LICENSE("GPL v2");
1263 MODULE_VERSION("0.2.3");
1264 MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME);
1265 

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