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Linux/drivers/media/platform/davinci/vpif.c

  1 /*
  2  * vpif - Video Port Interface driver
  3  * VPIF is a receiver and transmitter for video data. It has two channels(0, 1)
  4  * that receiveing video byte stream and two channels(2, 3) for video output.
  5  * The hardware supports SDTV, HDTV formats, raw data capture.
  6  * Currently, the driver supports NTSC and PAL standards.
  7  *
  8  * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
  9  *
 10  * This program is free software; you can redistribute it and/or
 11  * modify it under the terms of the GNU General Public License as
 12  * published by the Free Software Foundation version 2.
 13  *
 14  * This program is distributed .as is. WITHOUT ANY WARRANTY of any
 15  * kind, whether express or implied; without even the implied warranty
 16  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 17  * GNU General Public License for more details.
 18  */
 19 
 20 #include <linux/err.h>
 21 #include <linux/init.h>
 22 #include <linux/io.h>
 23 #include <linux/kernel.h>
 24 #include <linux/module.h>
 25 #include <linux/platform_device.h>
 26 #include <linux/pm_runtime.h>
 27 #include <linux/spinlock.h>
 28 #include <linux/v4l2-dv-timings.h>
 29 
 30 #include "vpif.h"
 31 
 32 MODULE_DESCRIPTION("TI DaVinci Video Port Interface driver");
 33 MODULE_LICENSE("GPL");
 34 
 35 #define VPIF_CH0_MAX_MODES      22
 36 #define VPIF_CH1_MAX_MODES      2
 37 #define VPIF_CH2_MAX_MODES      15
 38 #define VPIF_CH3_MAX_MODES      2
 39 
 40 spinlock_t vpif_lock;
 41 
 42 void __iomem *vpif_base;
 43 EXPORT_SYMBOL_GPL(vpif_base);
 44 
 45 /**
 46  * vpif_ch_params: video standard configuration parameters for vpif
 47  * The table must include all presets from supported subdevices.
 48  */
 49 const struct vpif_channel_config_params vpif_ch_params[] = {
 50         /* HDTV formats */
 51         {
 52                 .name = "480p59_94",
 53                 .width = 720,
 54                 .height = 480,
 55                 .frm_fmt = 1,
 56                 .ycmux_mode = 0,
 57                 .eav2sav = 138-8,
 58                 .sav2eav = 720,
 59                 .l1 = 1,
 60                 .l3 = 43,
 61                 .l5 = 523,
 62                 .vsize = 525,
 63                 .capture_format = 0,
 64                 .vbi_supported = 0,
 65                 .hd_sd = 1,
 66                 .dv_timings = V4L2_DV_BT_CEA_720X480P59_94,
 67         },
 68         {
 69                 .name = "576p50",
 70                 .width = 720,
 71                 .height = 576,
 72                 .frm_fmt = 1,
 73                 .ycmux_mode = 0,
 74                 .eav2sav = 144-8,
 75                 .sav2eav = 720,
 76                 .l1 = 1,
 77                 .l3 = 45,
 78                 .l5 = 621,
 79                 .vsize = 625,
 80                 .capture_format = 0,
 81                 .vbi_supported = 0,
 82                 .hd_sd = 1,
 83                 .dv_timings = V4L2_DV_BT_CEA_720X576P50,
 84         },
 85         {
 86                 .name = "720p50",
 87                 .width = 1280,
 88                 .height = 720,
 89                 .frm_fmt = 1,
 90                 .ycmux_mode = 0,
 91                 .eav2sav = 700-8,
 92                 .sav2eav = 1280,
 93                 .l1 = 1,
 94                 .l3 = 26,
 95                 .l5 = 746,
 96                 .vsize = 750,
 97                 .capture_format = 0,
 98                 .vbi_supported = 0,
 99                 .hd_sd = 1,
100                 .dv_timings = V4L2_DV_BT_CEA_1280X720P50,
101         },
102         {
103                 .name = "720p60",
104                 .width = 1280,
105                 .height = 720,
106                 .frm_fmt = 1,
107                 .ycmux_mode = 0,
108                 .eav2sav = 370 - 8,
109                 .sav2eav = 1280,
110                 .l1 = 1,
111                 .l3 = 26,
112                 .l5 = 746,
113                 .vsize = 750,
114                 .capture_format = 0,
115                 .vbi_supported = 0,
116                 .hd_sd = 1,
117                 .dv_timings = V4L2_DV_BT_CEA_1280X720P60,
118         },
119         {
120                 .name = "1080I50",
121                 .width = 1920,
122                 .height = 1080,
123                 .frm_fmt = 0,
124                 .ycmux_mode = 0,
125                 .eav2sav = 720 - 8,
126                 .sav2eav = 1920,
127                 .l1 = 1,
128                 .l3 = 21,
129                 .l5 = 561,
130                 .l7 = 563,
131                 .l9 = 584,
132                 .l11 = 1124,
133                 .vsize = 1125,
134                 .capture_format = 0,
135                 .vbi_supported = 0,
136                 .hd_sd = 1,
137                 .dv_timings = V4L2_DV_BT_CEA_1920X1080I50,
138         },
139         {
140                 .name = "1080I60",
141                 .width = 1920,
142                 .height = 1080,
143                 .frm_fmt = 0,
144                 .ycmux_mode = 0,
145                 .eav2sav = 280 - 8,
146                 .sav2eav = 1920,
147                 .l1 = 1,
148                 .l3 = 21,
149                 .l5 = 561,
150                 .l7 = 563,
151                 .l9 = 584,
152                 .l11 = 1124,
153                 .vsize = 1125,
154                 .capture_format = 0,
155                 .vbi_supported = 0,
156                 .hd_sd = 1,
157                 .dv_timings = V4L2_DV_BT_CEA_1920X1080I60,
158         },
159         {
160                 .name = "1080p60",
161                 .width = 1920,
162                 .height = 1080,
163                 .frm_fmt = 1,
164                 .ycmux_mode = 0,
165                 .eav2sav = 280 - 8,
166                 .sav2eav = 1920,
167                 .l1 = 1,
168                 .l3 = 42,
169                 .l5 = 1122,
170                 .vsize = 1125,
171                 .capture_format = 0,
172                 .vbi_supported = 0,
173                 .hd_sd = 1,
174                 .dv_timings = V4L2_DV_BT_CEA_1920X1080P60,
175         },
176 
177         /* SDTV formats */
178         {
179                 .name = "NTSC_M",
180                 .width = 720,
181                 .height = 480,
182                 .frm_fmt = 0,
183                 .ycmux_mode = 1,
184                 .eav2sav = 268,
185                 .sav2eav = 1440,
186                 .l1 = 1,
187                 .l3 = 23,
188                 .l5 = 263,
189                 .l7 = 266,
190                 .l9 = 286,
191                 .l11 = 525,
192                 .vsize = 525,
193                 .capture_format = 0,
194                 .vbi_supported = 1,
195                 .hd_sd = 0,
196                 .stdid = V4L2_STD_525_60,
197         },
198         {
199                 .name = "PAL_BDGHIK",
200                 .width = 720,
201                 .height = 576,
202                 .frm_fmt = 0,
203                 .ycmux_mode = 1,
204                 .eav2sav = 280,
205                 .sav2eav = 1440,
206                 .l1 = 1,
207                 .l3 = 23,
208                 .l5 = 311,
209                 .l7 = 313,
210                 .l9 = 336,
211                 .l11 = 624,
212                 .vsize = 625,
213                 .capture_format = 0,
214                 .vbi_supported = 1,
215                 .hd_sd = 0,
216                 .stdid = V4L2_STD_625_50,
217         },
218 };
219 EXPORT_SYMBOL_GPL(vpif_ch_params);
220 
221 const unsigned int vpif_ch_params_count = ARRAY_SIZE(vpif_ch_params);
222 EXPORT_SYMBOL_GPL(vpif_ch_params_count);
223 
224 static inline void vpif_wr_bit(u32 reg, u32 bit, u32 val)
225 {
226         if (val)
227                 vpif_set_bit(reg, bit);
228         else
229                 vpif_clr_bit(reg, bit);
230 }
231 
232 /* This structure is used to keep track of VPIF size register's offsets */
233 struct vpif_registers {
234         u32 h_cfg, v_cfg_00, v_cfg_01, v_cfg_02, v_cfg, ch_ctrl;
235         u32 line_offset, vanc0_strt, vanc0_size, vanc1_strt;
236         u32 vanc1_size, width_mask, len_mask;
237         u8 max_modes;
238 };
239 
240 static const struct vpif_registers vpifregs[VPIF_NUM_CHANNELS] = {
241         /* Channel0 */
242         {
243                 VPIF_CH0_H_CFG, VPIF_CH0_V_CFG_00, VPIF_CH0_V_CFG_01,
244                 VPIF_CH0_V_CFG_02, VPIF_CH0_V_CFG_03, VPIF_CH0_CTRL,
245                 VPIF_CH0_IMG_ADD_OFST, 0, 0, 0, 0, 0x1FFF, 0xFFF,
246                 VPIF_CH0_MAX_MODES,
247         },
248         /* Channel1 */
249         {
250                 VPIF_CH1_H_CFG, VPIF_CH1_V_CFG_00, VPIF_CH1_V_CFG_01,
251                 VPIF_CH1_V_CFG_02, VPIF_CH1_V_CFG_03, VPIF_CH1_CTRL,
252                 VPIF_CH1_IMG_ADD_OFST, 0, 0, 0, 0, 0x1FFF, 0xFFF,
253                 VPIF_CH1_MAX_MODES,
254         },
255         /* Channel2 */
256         {
257                 VPIF_CH2_H_CFG, VPIF_CH2_V_CFG_00, VPIF_CH2_V_CFG_01,
258                 VPIF_CH2_V_CFG_02, VPIF_CH2_V_CFG_03, VPIF_CH2_CTRL,
259                 VPIF_CH2_IMG_ADD_OFST, VPIF_CH2_VANC0_STRT, VPIF_CH2_VANC0_SIZE,
260                 VPIF_CH2_VANC1_STRT, VPIF_CH2_VANC1_SIZE, 0x7FF, 0x7FF,
261                 VPIF_CH2_MAX_MODES
262         },
263         /* Channel3 */
264         {
265                 VPIF_CH3_H_CFG, VPIF_CH3_V_CFG_00, VPIF_CH3_V_CFG_01,
266                 VPIF_CH3_V_CFG_02, VPIF_CH3_V_CFG_03, VPIF_CH3_CTRL,
267                 VPIF_CH3_IMG_ADD_OFST, VPIF_CH3_VANC0_STRT, VPIF_CH3_VANC0_SIZE,
268                 VPIF_CH3_VANC1_STRT, VPIF_CH3_VANC1_SIZE, 0x7FF, 0x7FF,
269                 VPIF_CH3_MAX_MODES
270         },
271 };
272 
273 /* vpif_set_mode_info:
274  * This function is used to set horizontal and vertical config parameters
275  * As per the standard in the channel, configure the values of L1, L3,
276  * L5, L7  L9, L11 in VPIF Register , also write width and height
277  */
278 static void vpif_set_mode_info(const struct vpif_channel_config_params *config,
279                                 u8 channel_id, u8 config_channel_id)
280 {
281         u32 value;
282 
283         value = (config->eav2sav & vpifregs[config_channel_id].width_mask);
284         value <<= VPIF_CH_LEN_SHIFT;
285         value |= (config->sav2eav & vpifregs[config_channel_id].width_mask);
286         regw(value, vpifregs[channel_id].h_cfg);
287 
288         value = (config->l1 & vpifregs[config_channel_id].len_mask);
289         value <<= VPIF_CH_LEN_SHIFT;
290         value |= (config->l3 & vpifregs[config_channel_id].len_mask);
291         regw(value, vpifregs[channel_id].v_cfg_00);
292 
293         value = (config->l5 & vpifregs[config_channel_id].len_mask);
294         value <<= VPIF_CH_LEN_SHIFT;
295         value |= (config->l7 & vpifregs[config_channel_id].len_mask);
296         regw(value, vpifregs[channel_id].v_cfg_01);
297 
298         value = (config->l9 & vpifregs[config_channel_id].len_mask);
299         value <<= VPIF_CH_LEN_SHIFT;
300         value |= (config->l11 & vpifregs[config_channel_id].len_mask);
301         regw(value, vpifregs[channel_id].v_cfg_02);
302 
303         value = (config->vsize & vpifregs[config_channel_id].len_mask);
304         regw(value, vpifregs[channel_id].v_cfg);
305 }
306 
307 /* config_vpif_params
308  * Function to set the parameters of a channel
309  * Mainly modifies the channel ciontrol register
310  * It sets frame format, yc mux mode
311  */
312 static void config_vpif_params(struct vpif_params *vpifparams,
313                                 u8 channel_id, u8 found)
314 {
315         const struct vpif_channel_config_params *config = &vpifparams->std_info;
316         u32 value, ch_nip, reg;
317         u8 start, end;
318         int i;
319 
320         start = channel_id;
321         end = channel_id + found;
322 
323         for (i = start; i < end; i++) {
324                 reg = vpifregs[i].ch_ctrl;
325                 if (channel_id < 2)
326                         ch_nip = VPIF_CAPTURE_CH_NIP;
327                 else
328                         ch_nip = VPIF_DISPLAY_CH_NIP;
329 
330                 vpif_wr_bit(reg, ch_nip, config->frm_fmt);
331                 vpif_wr_bit(reg, VPIF_CH_YC_MUX_BIT, config->ycmux_mode);
332                 vpif_wr_bit(reg, VPIF_CH_INPUT_FIELD_FRAME_BIT,
333                                         vpifparams->video_params.storage_mode);
334 
335                 /* Set raster scanning SDR Format */
336                 vpif_clr_bit(reg, VPIF_CH_SDR_FMT_BIT);
337                 vpif_wr_bit(reg, VPIF_CH_DATA_MODE_BIT, config->capture_format);
338 
339                 if (channel_id > 1)     /* Set the Pixel enable bit */
340                         vpif_set_bit(reg, VPIF_DISPLAY_PIX_EN_BIT);
341                 else if (config->capture_format) {
342                         /* Set the polarity of various pins */
343                         vpif_wr_bit(reg, VPIF_CH_FID_POLARITY_BIT,
344                                         vpifparams->iface.fid_pol);
345                         vpif_wr_bit(reg, VPIF_CH_V_VALID_POLARITY_BIT,
346                                         vpifparams->iface.vd_pol);
347                         vpif_wr_bit(reg, VPIF_CH_H_VALID_POLARITY_BIT,
348                                         vpifparams->iface.hd_pol);
349 
350                         value = regr(reg);
351                         /* Set data width */
352                         value &= ~(0x3u <<
353                                         VPIF_CH_DATA_WIDTH_BIT);
354                         value |= ((vpifparams->params.data_sz) <<
355                                                      VPIF_CH_DATA_WIDTH_BIT);
356                         regw(value, reg);
357                 }
358 
359                 /* Write the pitch in the driver */
360                 regw((vpifparams->video_params.hpitch),
361                                                 vpifregs[i].line_offset);
362         }
363 }
364 
365 /* vpif_set_video_params
366  * This function is used to set video parameters in VPIF register
367  */
368 int vpif_set_video_params(struct vpif_params *vpifparams, u8 channel_id)
369 {
370         const struct vpif_channel_config_params *config = &vpifparams->std_info;
371         int found = 1;
372 
373         vpif_set_mode_info(config, channel_id, channel_id);
374         if (!config->ycmux_mode) {
375                 /* YC are on separate channels (HDTV formats) */
376                 vpif_set_mode_info(config, channel_id + 1, channel_id);
377                 found = 2;
378         }
379 
380         config_vpif_params(vpifparams, channel_id, found);
381 
382         regw(0x80, VPIF_REQ_SIZE);
383         regw(0x01, VPIF_EMULATION_CTRL);
384 
385         return found;
386 }
387 EXPORT_SYMBOL(vpif_set_video_params);
388 
389 void vpif_set_vbi_display_params(struct vpif_vbi_params *vbiparams,
390                                 u8 channel_id)
391 {
392         u32 value;
393 
394         value = 0x3F8 & (vbiparams->hstart0);
395         value |= 0x3FFFFFF & ((vbiparams->vstart0) << 16);
396         regw(value, vpifregs[channel_id].vanc0_strt);
397 
398         value = 0x3F8 & (vbiparams->hstart1);
399         value |= 0x3FFFFFF & ((vbiparams->vstart1) << 16);
400         regw(value, vpifregs[channel_id].vanc1_strt);
401 
402         value = 0x3F8 & (vbiparams->hsize0);
403         value |= 0x3FFFFFF & ((vbiparams->vsize0) << 16);
404         regw(value, vpifregs[channel_id].vanc0_size);
405 
406         value = 0x3F8 & (vbiparams->hsize1);
407         value |= 0x3FFFFFF & ((vbiparams->vsize1) << 16);
408         regw(value, vpifregs[channel_id].vanc1_size);
409 
410 }
411 EXPORT_SYMBOL(vpif_set_vbi_display_params);
412 
413 int vpif_channel_getfid(u8 channel_id)
414 {
415         return (regr(vpifregs[channel_id].ch_ctrl) & VPIF_CH_FID_MASK)
416                                         >> VPIF_CH_FID_SHIFT;
417 }
418 EXPORT_SYMBOL(vpif_channel_getfid);
419 
420 static int vpif_probe(struct platform_device *pdev)
421 {
422         static struct resource  *res;
423 
424         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
425         vpif_base = devm_ioremap_resource(&pdev->dev, res);
426         if (IS_ERR(vpif_base))
427                 return PTR_ERR(vpif_base);
428 
429         pm_runtime_enable(&pdev->dev);
430         pm_runtime_get(&pdev->dev);
431 
432         spin_lock_init(&vpif_lock);
433         dev_info(&pdev->dev, "vpif probe success\n");
434         return 0;
435 }
436 
437 static int vpif_remove(struct platform_device *pdev)
438 {
439         pm_runtime_disable(&pdev->dev);
440         return 0;
441 }
442 
443 #ifdef CONFIG_PM
444 static int vpif_suspend(struct device *dev)
445 {
446         pm_runtime_put(dev);
447         return 0;
448 }
449 
450 static int vpif_resume(struct device *dev)
451 {
452         pm_runtime_get(dev);
453         return 0;
454 }
455 
456 static const struct dev_pm_ops vpif_pm = {
457         .suspend        = vpif_suspend,
458         .resume         = vpif_resume,
459 };
460 
461 #define vpif_pm_ops (&vpif_pm)
462 #else
463 #define vpif_pm_ops NULL
464 #endif
465 
466 static struct platform_driver vpif_driver = {
467         .driver = {
468                 .name   = "vpif",
469                 .owner = THIS_MODULE,
470                 .pm     = vpif_pm_ops,
471         },
472         .remove = vpif_remove,
473         .probe = vpif_probe,
474 };
475 
476 static void vpif_exit(void)
477 {
478         platform_driver_unregister(&vpif_driver);
479 }
480 
481 static int __init vpif_init(void)
482 {
483         return platform_driver_register(&vpif_driver);
484 }
485 subsys_initcall(vpif_init);
486 module_exit(vpif_exit);
487 
488 

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