Version:  2.0.40 2.2.26 2.4.37 2.6.39 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15

Linux/drivers/media/platform/coda.c

  1 /*
  2  * Coda multi-standard codec IP
  3  *
  4  * Copyright (C) 2012 Vista Silicon S.L.
  5  *    Javier Martin, <javier.martin@vista-silicon.com>
  6  *    Xavier Duret
  7  *
  8  * This program is free software; you can redistribute it and/or modify
  9  * it under the terms of the GNU General Public License as published by
 10  * the Free Software Foundation; either version 2 of the License, or
 11  * (at your option) any later version.
 12  */
 13 
 14 #include <linux/clk.h>
 15 #include <linux/delay.h>
 16 #include <linux/firmware.h>
 17 #include <linux/genalloc.h>
 18 #include <linux/interrupt.h>
 19 #include <linux/io.h>
 20 #include <linux/irq.h>
 21 #include <linux/kfifo.h>
 22 #include <linux/module.h>
 23 #include <linux/of_device.h>
 24 #include <linux/platform_device.h>
 25 #include <linux/slab.h>
 26 #include <linux/videodev2.h>
 27 #include <linux/of.h>
 28 #include <linux/platform_data/coda.h>
 29 
 30 #include <media/v4l2-ctrls.h>
 31 #include <media/v4l2-device.h>
 32 #include <media/v4l2-event.h>
 33 #include <media/v4l2-ioctl.h>
 34 #include <media/v4l2-mem2mem.h>
 35 #include <media/videobuf2-core.h>
 36 #include <media/videobuf2-dma-contig.h>
 37 
 38 #include "coda.h"
 39 
 40 #define CODA_NAME               "coda"
 41 
 42 #define CODADX6_MAX_INSTANCES   4
 43 
 44 #define CODA_FMO_BUF_SIZE       32
 45 #define CODADX6_WORK_BUF_SIZE   (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
 46 #define CODA7_WORK_BUF_SIZE     (128 * 1024)
 47 #define CODA7_TEMP_BUF_SIZE     (304 * 1024)
 48 #define CODA_PARA_BUF_SIZE      (10 * 1024)
 49 #define CODA_ISRAM_SIZE (2048 * 2)
 50 #define CODADX6_IRAM_SIZE       0xb000
 51 #define CODA7_IRAM_SIZE         0x14000
 52 
 53 #define CODA7_PS_BUF_SIZE       0x28000
 54 
 55 #define CODA_MAX_FRAMEBUFFERS   8
 56 
 57 #define CODA_MAX_FRAME_SIZE     0x100000
 58 #define FMO_SLICE_SAVE_BUF_SIZE         (32)
 59 #define CODA_DEFAULT_GAMMA              4096
 60 
 61 #define MIN_W 176
 62 #define MIN_H 144
 63 
 64 #define S_ALIGN         1 /* multiple of 2 */
 65 #define W_ALIGN         1 /* multiple of 2 */
 66 #define H_ALIGN         1 /* multiple of 2 */
 67 
 68 #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
 69 
 70 static int coda_debug;
 71 module_param(coda_debug, int, 0644);
 72 MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
 73 
 74 enum {
 75         V4L2_M2M_SRC = 0,
 76         V4L2_M2M_DST = 1,
 77 };
 78 
 79 enum coda_inst_type {
 80         CODA_INST_ENCODER,
 81         CODA_INST_DECODER,
 82 };
 83 
 84 enum coda_product {
 85         CODA_DX6 = 0xf001,
 86         CODA_7541 = 0xf012,
 87 };
 88 
 89 struct coda_fmt {
 90         char *name;
 91         u32 fourcc;
 92 };
 93 
 94 struct coda_codec {
 95         u32 mode;
 96         u32 src_fourcc;
 97         u32 dst_fourcc;
 98         u32 max_w;
 99         u32 max_h;
100 };
101 
102 struct coda_devtype {
103         char                    *firmware;
104         enum coda_product       product;
105         struct coda_codec       *codecs;
106         unsigned int            num_codecs;
107         size_t                  workbuf_size;
108 };
109 
110 /* Per-queue, driver-specific private data */
111 struct coda_q_data {
112         unsigned int            width;
113         unsigned int            height;
114         unsigned int            sizeimage;
115         unsigned int            fourcc;
116 };
117 
118 struct coda_aux_buf {
119         void                    *vaddr;
120         dma_addr_t              paddr;
121         u32                     size;
122 };
123 
124 struct coda_dev {
125         struct v4l2_device      v4l2_dev;
126         struct video_device     vfd;
127         struct platform_device  *plat_dev;
128         const struct coda_devtype *devtype;
129 
130         void __iomem            *regs_base;
131         struct clk              *clk_per;
132         struct clk              *clk_ahb;
133 
134         struct coda_aux_buf     codebuf;
135         struct coda_aux_buf     tempbuf;
136         struct coda_aux_buf     workbuf;
137         struct gen_pool         *iram_pool;
138         long unsigned int       iram_vaddr;
139         long unsigned int       iram_paddr;
140         unsigned long           iram_size;
141 
142         spinlock_t              irqlock;
143         struct mutex            dev_mutex;
144         struct mutex            coda_mutex;
145         struct v4l2_m2m_dev     *m2m_dev;
146         struct vb2_alloc_ctx    *alloc_ctx;
147         struct list_head        instances;
148         unsigned long           instance_mask;
149         struct delayed_work     timeout;
150 };
151 
152 struct coda_params {
153         u8                      rot_mode;
154         u8                      h264_intra_qp;
155         u8                      h264_inter_qp;
156         u8                      mpeg4_intra_qp;
157         u8                      mpeg4_inter_qp;
158         u8                      gop_size;
159         int                     codec_mode;
160         int                     codec_mode_aux;
161         enum v4l2_mpeg_video_multi_slice_mode slice_mode;
162         u32                     framerate;
163         u16                     bitrate;
164         u32                     slice_max_bits;
165         u32                     slice_max_mb;
166 };
167 
168 struct coda_iram_info {
169         u32             axi_sram_use;
170         phys_addr_t     buf_bit_use;
171         phys_addr_t     buf_ip_ac_dc_use;
172         phys_addr_t     buf_dbk_y_use;
173         phys_addr_t     buf_dbk_c_use;
174         phys_addr_t     buf_ovl_use;
175         phys_addr_t     buf_btp_use;
176         phys_addr_t     search_ram_paddr;
177         int             search_ram_size;
178 };
179 
180 struct coda_ctx {
181         struct coda_dev                 *dev;
182         struct mutex                    buffer_mutex;
183         struct list_head                list;
184         struct work_struct              skip_run;
185         int                             aborting;
186         int                             initialized;
187         int                             streamon_out;
188         int                             streamon_cap;
189         u32                             isequence;
190         u32                             qsequence;
191         u32                             osequence;
192         struct coda_q_data              q_data[2];
193         enum coda_inst_type             inst_type;
194         struct coda_codec               *codec;
195         enum v4l2_colorspace            colorspace;
196         struct coda_params              params;
197         struct v4l2_m2m_ctx             *m2m_ctx;
198         struct v4l2_ctrl_handler        ctrls;
199         struct v4l2_fh                  fh;
200         int                             gopcounter;
201         int                             runcounter;
202         char                            vpu_header[3][64];
203         int                             vpu_header_size[3];
204         struct kfifo                    bitstream_fifo;
205         struct mutex                    bitstream_mutex;
206         struct coda_aux_buf             bitstream;
207         bool                            prescan_failed;
208         struct coda_aux_buf             parabuf;
209         struct coda_aux_buf             psbuf;
210         struct coda_aux_buf             slicebuf;
211         struct coda_aux_buf             internal_frames[CODA_MAX_FRAMEBUFFERS];
212         struct coda_aux_buf             workbuf;
213         int                             num_internal_frames;
214         int                             idx;
215         int                             reg_idx;
216         struct coda_iram_info           iram_info;
217         u32                             bit_stream_param;
218         u32                             frm_dis_flg;
219         int                             display_idx;
220 };
221 
222 static const u8 coda_filler_nal[14] = { 0x00, 0x00, 0x00, 0x01, 0x0c, 0xff,
223                         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 };
224 static const u8 coda_filler_size[8] = { 0, 7, 14, 13, 12, 11, 10, 9 };
225 
226 static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
227 {
228         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
229                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
230         writel(data, dev->regs_base + reg);
231 }
232 
233 static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
234 {
235         u32 data;
236         data = readl(dev->regs_base + reg);
237         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
238                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
239         return data;
240 }
241 
242 static inline unsigned long coda_isbusy(struct coda_dev *dev)
243 {
244         return coda_read(dev, CODA_REG_BIT_BUSY);
245 }
246 
247 static inline int coda_is_initialized(struct coda_dev *dev)
248 {
249         return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
250 }
251 
252 static int coda_wait_timeout(struct coda_dev *dev)
253 {
254         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
255 
256         while (coda_isbusy(dev)) {
257                 if (time_after(jiffies, timeout))
258                         return -ETIMEDOUT;
259         }
260         return 0;
261 }
262 
263 static void coda_command_async(struct coda_ctx *ctx, int cmd)
264 {
265         struct coda_dev *dev = ctx->dev;
266 
267         if (dev->devtype->product == CODA_7541) {
268                 /* Restore context related registers to CODA */
269                 coda_write(dev, ctx->bit_stream_param,
270                                 CODA_REG_BIT_BIT_STREAM_PARAM);
271                 coda_write(dev, ctx->frm_dis_flg,
272                                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
273                 coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
274         }
275 
276         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
277 
278         coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
279         coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
280         coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
281 
282         coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
283 }
284 
285 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
286 {
287         struct coda_dev *dev = ctx->dev;
288 
289         coda_command_async(ctx, cmd);
290         return coda_wait_timeout(dev);
291 }
292 
293 static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
294                                          enum v4l2_buf_type type)
295 {
296         switch (type) {
297         case V4L2_BUF_TYPE_VIDEO_OUTPUT:
298                 return &(ctx->q_data[V4L2_M2M_SRC]);
299         case V4L2_BUF_TYPE_VIDEO_CAPTURE:
300                 return &(ctx->q_data[V4L2_M2M_DST]);
301         default:
302                 BUG();
303         }
304         return NULL;
305 }
306 
307 /*
308  * Array of all formats supported by any version of Coda:
309  */
310 static struct coda_fmt coda_formats[] = {
311         {
312                 .name = "YUV 4:2:0 Planar, YCbCr",
313                 .fourcc = V4L2_PIX_FMT_YUV420,
314         },
315         {
316                 .name = "YUV 4:2:0 Planar, YCrCb",
317                 .fourcc = V4L2_PIX_FMT_YVU420,
318         },
319         {
320                 .name = "H264 Encoded Stream",
321                 .fourcc = V4L2_PIX_FMT_H264,
322         },
323         {
324                 .name = "MPEG4 Encoded Stream",
325                 .fourcc = V4L2_PIX_FMT_MPEG4,
326         },
327 };
328 
329 #define CODA_CODEC(mode, src_fourcc, dst_fourcc, max_w, max_h) \
330         { mode, src_fourcc, dst_fourcc, max_w, max_h }
331 
332 /*
333  * Arrays of codecs supported by each given version of Coda:
334  *  i.MX27 -> codadx6
335  *  i.MX5x -> coda7
336  *  i.MX6  -> coda960
337  * Use V4L2_PIX_FMT_YUV420 as placeholder for all supported YUV 4:2:0 variants
338  */
339 static struct coda_codec codadx6_codecs[] = {
340         CODA_CODEC(CODADX6_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264,  720, 576),
341         CODA_CODEC(CODADX6_MODE_ENCODE_MP4,  V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 720, 576),
342 };
343 
344 static struct coda_codec coda7_codecs[] = {
345         CODA_CODEC(CODA7_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264,   1280, 720),
346         CODA_CODEC(CODA7_MODE_ENCODE_MP4,  V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4,  1280, 720),
347         CODA_CODEC(CODA7_MODE_DECODE_H264, V4L2_PIX_FMT_H264,   V4L2_PIX_FMT_YUV420, 1920, 1080),
348         CODA_CODEC(CODA7_MODE_DECODE_MP4,  V4L2_PIX_FMT_MPEG4,  V4L2_PIX_FMT_YUV420, 1920, 1080),
349 };
350 
351 static bool coda_format_is_yuv(u32 fourcc)
352 {
353         switch (fourcc) {
354         case V4L2_PIX_FMT_YUV420:
355         case V4L2_PIX_FMT_YVU420:
356                 return true;
357         default:
358                 return false;
359         }
360 }
361 
362 /*
363  * Normalize all supported YUV 4:2:0 formats to the value used in the codec
364  * tables.
365  */
366 static u32 coda_format_normalize_yuv(u32 fourcc)
367 {
368         return coda_format_is_yuv(fourcc) ? V4L2_PIX_FMT_YUV420 : fourcc;
369 }
370 
371 static struct coda_codec *coda_find_codec(struct coda_dev *dev, int src_fourcc,
372                                           int dst_fourcc)
373 {
374         struct coda_codec *codecs = dev->devtype->codecs;
375         int num_codecs = dev->devtype->num_codecs;
376         int k;
377 
378         src_fourcc = coda_format_normalize_yuv(src_fourcc);
379         dst_fourcc = coda_format_normalize_yuv(dst_fourcc);
380         if (src_fourcc == dst_fourcc)
381                 return NULL;
382 
383         for (k = 0; k < num_codecs; k++) {
384                 if (codecs[k].src_fourcc == src_fourcc &&
385                     codecs[k].dst_fourcc == dst_fourcc)
386                         break;
387         }
388 
389         if (k == num_codecs)
390                 return NULL;
391 
392         return &codecs[k];
393 }
394 
395 static void coda_get_max_dimensions(struct coda_dev *dev,
396                                     struct coda_codec *codec,
397                                     int *max_w, int *max_h)
398 {
399         struct coda_codec *codecs = dev->devtype->codecs;
400         int num_codecs = dev->devtype->num_codecs;
401         unsigned int w, h;
402         int k;
403 
404         if (codec) {
405                 w = codec->max_w;
406                 h = codec->max_h;
407         } else {
408                 for (k = 0, w = 0, h = 0; k < num_codecs; k++) {
409                         w = max(w, codecs[k].max_w);
410                         h = max(h, codecs[k].max_h);
411                 }
412         }
413 
414         if (max_w)
415                 *max_w = w;
416         if (max_h)
417                 *max_h = h;
418 }
419 
420 static char *coda_product_name(int product)
421 {
422         static char buf[9];
423 
424         switch (product) {
425         case CODA_DX6:
426                 return "CodaDx6";
427         case CODA_7541:
428                 return "CODA7541";
429         default:
430                 snprintf(buf, sizeof(buf), "(0x%04x)", product);
431                 return buf;
432         }
433 }
434 
435 /*
436  * V4L2 ioctl() operations.
437  */
438 static int coda_querycap(struct file *file, void *priv,
439                          struct v4l2_capability *cap)
440 {
441         struct coda_ctx *ctx = fh_to_ctx(priv);
442 
443         strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
444         strlcpy(cap->card, coda_product_name(ctx->dev->devtype->product),
445                 sizeof(cap->card));
446         strlcpy(cap->bus_info, "platform:" CODA_NAME, sizeof(cap->bus_info));
447         /*
448          * This is only a mem-to-mem video device. The capture and output
449          * device capability flags are left only for backward compatibility
450          * and are scheduled for removal.
451          */
452         cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
453                            V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
454         cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
455 
456         return 0;
457 }
458 
459 static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
460                         enum v4l2_buf_type type, int src_fourcc)
461 {
462         struct coda_ctx *ctx = fh_to_ctx(priv);
463         struct coda_codec *codecs = ctx->dev->devtype->codecs;
464         struct coda_fmt *formats = coda_formats;
465         struct coda_fmt *fmt;
466         int num_codecs = ctx->dev->devtype->num_codecs;
467         int num_formats = ARRAY_SIZE(coda_formats);
468         int i, k, num = 0;
469 
470         for (i = 0; i < num_formats; i++) {
471                 /* Both uncompressed formats are always supported */
472                 if (coda_format_is_yuv(formats[i].fourcc) &&
473                     !coda_format_is_yuv(src_fourcc)) {
474                         if (num == f->index)
475                                 break;
476                         ++num;
477                         continue;
478                 }
479                 /* Compressed formats may be supported, check the codec list */
480                 for (k = 0; k < num_codecs; k++) {
481                         /* if src_fourcc is set, only consider matching codecs */
482                         if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
483                             formats[i].fourcc == codecs[k].dst_fourcc &&
484                             (!src_fourcc || src_fourcc == codecs[k].src_fourcc))
485                                 break;
486                         if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT &&
487                             formats[i].fourcc == codecs[k].src_fourcc)
488                                 break;
489                 }
490                 if (k < num_codecs) {
491                         if (num == f->index)
492                                 break;
493                         ++num;
494                 }
495         }
496 
497         if (i < num_formats) {
498                 fmt = &formats[i];
499                 strlcpy(f->description, fmt->name, sizeof(f->description));
500                 f->pixelformat = fmt->fourcc;
501                 if (!coda_format_is_yuv(fmt->fourcc))
502                         f->flags |= V4L2_FMT_FLAG_COMPRESSED;
503                 return 0;
504         }
505 
506         /* Format not found */
507         return -EINVAL;
508 }
509 
510 static int coda_enum_fmt_vid_cap(struct file *file, void *priv,
511                                  struct v4l2_fmtdesc *f)
512 {
513         struct coda_ctx *ctx = fh_to_ctx(priv);
514         struct vb2_queue *src_vq;
515         struct coda_q_data *q_data_src;
516 
517         /* If the source format is already fixed, only list matching formats */
518         src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
519         if (vb2_is_streaming(src_vq)) {
520                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
521 
522                 return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_CAPTURE,
523                                 q_data_src->fourcc);
524         }
525 
526         return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_CAPTURE, 0);
527 }
528 
529 static int coda_enum_fmt_vid_out(struct file *file, void *priv,
530                                  struct v4l2_fmtdesc *f)
531 {
532         return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_OUTPUT, 0);
533 }
534 
535 static int coda_g_fmt(struct file *file, void *priv,
536                       struct v4l2_format *f)
537 {
538         struct vb2_queue *vq;
539         struct coda_q_data *q_data;
540         struct coda_ctx *ctx = fh_to_ctx(priv);
541 
542         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
543         if (!vq)
544                 return -EINVAL;
545 
546         q_data = get_q_data(ctx, f->type);
547 
548         f->fmt.pix.field        = V4L2_FIELD_NONE;
549         f->fmt.pix.pixelformat  = q_data->fourcc;
550         f->fmt.pix.width        = q_data->width;
551         f->fmt.pix.height       = q_data->height;
552         if (coda_format_is_yuv(f->fmt.pix.pixelformat))
553                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
554         else /* encoded formats h.264/mpeg4 */
555                 f->fmt.pix.bytesperline = 0;
556 
557         f->fmt.pix.sizeimage    = q_data->sizeimage;
558         f->fmt.pix.colorspace   = ctx->colorspace;
559 
560         return 0;
561 }
562 
563 static int coda_try_fmt(struct coda_ctx *ctx, struct coda_codec *codec,
564                         struct v4l2_format *f)
565 {
566         struct coda_dev *dev = ctx->dev;
567         struct coda_q_data *q_data;
568         unsigned int max_w, max_h;
569         enum v4l2_field field;
570 
571         field = f->fmt.pix.field;
572         if (field == V4L2_FIELD_ANY)
573                 field = V4L2_FIELD_NONE;
574         else if (V4L2_FIELD_NONE != field)
575                 return -EINVAL;
576 
577         /* V4L2 specification suggests the driver corrects the format struct
578          * if any of the dimensions is unsupported */
579         f->fmt.pix.field = field;
580 
581         coda_get_max_dimensions(dev, codec, &max_w, &max_h);
582         v4l_bound_align_image(&f->fmt.pix.width, MIN_W, max_w, W_ALIGN,
583                               &f->fmt.pix.height, MIN_H, max_h, H_ALIGN,
584                               S_ALIGN);
585 
586         switch (f->fmt.pix.pixelformat) {
587         case V4L2_PIX_FMT_YUV420:
588         case V4L2_PIX_FMT_YVU420:
589         case V4L2_PIX_FMT_H264:
590         case V4L2_PIX_FMT_MPEG4:
591         case V4L2_PIX_FMT_JPEG:
592                 break;
593         default:
594                 q_data = get_q_data(ctx, f->type);
595                 f->fmt.pix.pixelformat = q_data->fourcc;
596         }
597 
598         switch (f->fmt.pix.pixelformat) {
599         case V4L2_PIX_FMT_YUV420:
600         case V4L2_PIX_FMT_YVU420:
601                 /* Frame stride must be multiple of 8 */
602                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 8);
603                 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
604                                         f->fmt.pix.height * 3 / 2;
605                 break;
606         case V4L2_PIX_FMT_H264:
607         case V4L2_PIX_FMT_MPEG4:
608         case V4L2_PIX_FMT_JPEG:
609                 f->fmt.pix.bytesperline = 0;
610                 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
611                 break;
612         default:
613                 BUG();
614         }
615 
616         f->fmt.pix.priv = 0;
617 
618         return 0;
619 }
620 
621 static int coda_try_fmt_vid_cap(struct file *file, void *priv,
622                                 struct v4l2_format *f)
623 {
624         struct coda_ctx *ctx = fh_to_ctx(priv);
625         struct coda_codec *codec;
626         struct vb2_queue *src_vq;
627         int ret;
628 
629         /*
630          * If the source format is already fixed, try to find a codec that
631          * converts to the given destination format
632          */
633         src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
634         if (vb2_is_streaming(src_vq)) {
635                 struct coda_q_data *q_data_src;
636 
637                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
638                 codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
639                                         f->fmt.pix.pixelformat);
640                 if (!codec)
641                         return -EINVAL;
642         } else {
643                 /* Otherwise determine codec by encoded format, if possible */
644                 codec = coda_find_codec(ctx->dev, V4L2_PIX_FMT_YUV420,
645                                         f->fmt.pix.pixelformat);
646         }
647 
648         f->fmt.pix.colorspace = ctx->colorspace;
649 
650         ret = coda_try_fmt(ctx, codec, f);
651         if (ret < 0)
652                 return ret;
653 
654         /* The h.264 decoder only returns complete 16x16 macroblocks */
655         if (codec && codec->src_fourcc == V4L2_PIX_FMT_H264) {
656                 f->fmt.pix.width = round_up(f->fmt.pix.width, 16);
657                 f->fmt.pix.height = round_up(f->fmt.pix.height, 16);
658                 f->fmt.pix.bytesperline = f->fmt.pix.width;
659                 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
660                                        f->fmt.pix.height * 3 / 2;
661         }
662 
663         return 0;
664 }
665 
666 static int coda_try_fmt_vid_out(struct file *file, void *priv,
667                                 struct v4l2_format *f)
668 {
669         struct coda_ctx *ctx = fh_to_ctx(priv);
670         struct coda_codec *codec;
671 
672         /* Determine codec by encoded format, returns NULL if raw or invalid */
673         codec = coda_find_codec(ctx->dev, f->fmt.pix.pixelformat,
674                                 V4L2_PIX_FMT_YUV420);
675 
676         if (!f->fmt.pix.colorspace)
677                 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
678 
679         return coda_try_fmt(ctx, codec, f);
680 }
681 
682 static int coda_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
683 {
684         struct coda_q_data *q_data;
685         struct vb2_queue *vq;
686 
687         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
688         if (!vq)
689                 return -EINVAL;
690 
691         q_data = get_q_data(ctx, f->type);
692         if (!q_data)
693                 return -EINVAL;
694 
695         if (vb2_is_busy(vq)) {
696                 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
697                 return -EBUSY;
698         }
699 
700         q_data->fourcc = f->fmt.pix.pixelformat;
701         q_data->width = f->fmt.pix.width;
702         q_data->height = f->fmt.pix.height;
703         q_data->sizeimage = f->fmt.pix.sizeimage;
704 
705         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
706                 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
707                 f->type, q_data->width, q_data->height, q_data->fourcc);
708 
709         return 0;
710 }
711 
712 static int coda_s_fmt_vid_cap(struct file *file, void *priv,
713                               struct v4l2_format *f)
714 {
715         struct coda_ctx *ctx = fh_to_ctx(priv);
716         int ret;
717 
718         ret = coda_try_fmt_vid_cap(file, priv, f);
719         if (ret)
720                 return ret;
721 
722         return coda_s_fmt(ctx, f);
723 }
724 
725 static int coda_s_fmt_vid_out(struct file *file, void *priv,
726                               struct v4l2_format *f)
727 {
728         struct coda_ctx *ctx = fh_to_ctx(priv);
729         int ret;
730 
731         ret = coda_try_fmt_vid_out(file, priv, f);
732         if (ret)
733                 return ret;
734 
735         ret = coda_s_fmt(ctx, f);
736         if (ret)
737                 ctx->colorspace = f->fmt.pix.colorspace;
738 
739         return ret;
740 }
741 
742 static int coda_reqbufs(struct file *file, void *priv,
743                         struct v4l2_requestbuffers *reqbufs)
744 {
745         struct coda_ctx *ctx = fh_to_ctx(priv);
746 
747         return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
748 }
749 
750 static int coda_querybuf(struct file *file, void *priv,
751                          struct v4l2_buffer *buf)
752 {
753         struct coda_ctx *ctx = fh_to_ctx(priv);
754 
755         return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
756 }
757 
758 static int coda_qbuf(struct file *file, void *priv,
759                      struct v4l2_buffer *buf)
760 {
761         struct coda_ctx *ctx = fh_to_ctx(priv);
762 
763         return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
764 }
765 
766 static int coda_expbuf(struct file *file, void *priv,
767                        struct v4l2_exportbuffer *eb)
768 {
769         struct coda_ctx *ctx = fh_to_ctx(priv);
770 
771         return v4l2_m2m_expbuf(file, ctx->m2m_ctx, eb);
772 }
773 
774 static bool coda_buf_is_end_of_stream(struct coda_ctx *ctx,
775                                       struct v4l2_buffer *buf)
776 {
777         struct vb2_queue *src_vq;
778 
779         src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
780 
781         return ((ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) &&
782                 (buf->sequence == (ctx->qsequence - 1)));
783 }
784 
785 static int coda_dqbuf(struct file *file, void *priv,
786                       struct v4l2_buffer *buf)
787 {
788         struct coda_ctx *ctx = fh_to_ctx(priv);
789         int ret;
790 
791         ret = v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
792 
793         /* If this is the last capture buffer, emit an end-of-stream event */
794         if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
795             coda_buf_is_end_of_stream(ctx, buf)) {
796                 const struct v4l2_event eos_event = {
797                         .type = V4L2_EVENT_EOS
798                 };
799 
800                 v4l2_event_queue_fh(&ctx->fh, &eos_event);
801         }
802 
803         return ret;
804 }
805 
806 static int coda_create_bufs(struct file *file, void *priv,
807                             struct v4l2_create_buffers *create)
808 {
809         struct coda_ctx *ctx = fh_to_ctx(priv);
810 
811         return v4l2_m2m_create_bufs(file, ctx->m2m_ctx, create);
812 }
813 
814 static int coda_streamon(struct file *file, void *priv,
815                          enum v4l2_buf_type type)
816 {
817         struct coda_ctx *ctx = fh_to_ctx(priv);
818 
819         return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
820 }
821 
822 static int coda_streamoff(struct file *file, void *priv,
823                           enum v4l2_buf_type type)
824 {
825         struct coda_ctx *ctx = fh_to_ctx(priv);
826         int ret;
827 
828         /*
829          * This indirectly calls __vb2_queue_cancel, which dequeues all buffers.
830          * We therefore have to lock it against running hardware in this context,
831          * which still needs the buffers.
832          */
833         mutex_lock(&ctx->buffer_mutex);
834         ret = v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
835         mutex_unlock(&ctx->buffer_mutex);
836 
837         return ret;
838 }
839 
840 static int coda_try_decoder_cmd(struct file *file, void *fh,
841                                 struct v4l2_decoder_cmd *dc)
842 {
843         if (dc->cmd != V4L2_DEC_CMD_STOP)
844                 return -EINVAL;
845 
846         if (dc->flags & V4L2_DEC_CMD_STOP_TO_BLACK)
847                 return -EINVAL;
848 
849         if (!(dc->flags & V4L2_DEC_CMD_STOP_IMMEDIATELY) && (dc->stop.pts != 0))
850                 return -EINVAL;
851 
852         return 0;
853 }
854 
855 static int coda_decoder_cmd(struct file *file, void *fh,
856                             struct v4l2_decoder_cmd *dc)
857 {
858         struct coda_ctx *ctx = fh_to_ctx(fh);
859         int ret;
860 
861         ret = coda_try_decoder_cmd(file, fh, dc);
862         if (ret < 0)
863                 return ret;
864 
865         /* Ignore decoder stop command silently in encoder context */
866         if (ctx->inst_type != CODA_INST_DECODER)
867                 return 0;
868 
869         /* Set the strem-end flag on this context */
870         ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
871 
872         return 0;
873 }
874 
875 static int coda_subscribe_event(struct v4l2_fh *fh,
876                                 const struct v4l2_event_subscription *sub)
877 {
878         switch (sub->type) {
879         case V4L2_EVENT_EOS:
880                 return v4l2_event_subscribe(fh, sub, 0, NULL);
881         default:
882                 return v4l2_ctrl_subscribe_event(fh, sub);
883         }
884 }
885 
886 static const struct v4l2_ioctl_ops coda_ioctl_ops = {
887         .vidioc_querycap        = coda_querycap,
888 
889         .vidioc_enum_fmt_vid_cap = coda_enum_fmt_vid_cap,
890         .vidioc_g_fmt_vid_cap   = coda_g_fmt,
891         .vidioc_try_fmt_vid_cap = coda_try_fmt_vid_cap,
892         .vidioc_s_fmt_vid_cap   = coda_s_fmt_vid_cap,
893 
894         .vidioc_enum_fmt_vid_out = coda_enum_fmt_vid_out,
895         .vidioc_g_fmt_vid_out   = coda_g_fmt,
896         .vidioc_try_fmt_vid_out = coda_try_fmt_vid_out,
897         .vidioc_s_fmt_vid_out   = coda_s_fmt_vid_out,
898 
899         .vidioc_reqbufs         = coda_reqbufs,
900         .vidioc_querybuf        = coda_querybuf,
901 
902         .vidioc_qbuf            = coda_qbuf,
903         .vidioc_expbuf          = coda_expbuf,
904         .vidioc_dqbuf           = coda_dqbuf,
905         .vidioc_create_bufs     = coda_create_bufs,
906 
907         .vidioc_streamon        = coda_streamon,
908         .vidioc_streamoff       = coda_streamoff,
909 
910         .vidioc_try_decoder_cmd = coda_try_decoder_cmd,
911         .vidioc_decoder_cmd     = coda_decoder_cmd,
912 
913         .vidioc_subscribe_event = coda_subscribe_event,
914         .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
915 };
916 
917 static int coda_start_decoding(struct coda_ctx *ctx);
918 
919 static void coda_skip_run(struct work_struct *work)
920 {
921         struct coda_ctx *ctx = container_of(work, struct coda_ctx, skip_run);
922 
923         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
924 }
925 
926 static inline int coda_get_bitstream_payload(struct coda_ctx *ctx)
927 {
928         return kfifo_len(&ctx->bitstream_fifo);
929 }
930 
931 static void coda_kfifo_sync_from_device(struct coda_ctx *ctx)
932 {
933         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
934         struct coda_dev *dev = ctx->dev;
935         u32 rd_ptr;
936 
937         rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
938         kfifo->out = (kfifo->in & ~kfifo->mask) |
939                       (rd_ptr - ctx->bitstream.paddr);
940         if (kfifo->out > kfifo->in)
941                 kfifo->out -= kfifo->mask + 1;
942 }
943 
944 static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx)
945 {
946         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
947         struct coda_dev *dev = ctx->dev;
948         u32 rd_ptr, wr_ptr;
949 
950         rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask);
951         coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
952         wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
953         coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
954 }
955 
956 static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx)
957 {
958         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
959         struct coda_dev *dev = ctx->dev;
960         u32 wr_ptr;
961 
962         wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
963         coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
964 }
965 
966 static int coda_bitstream_queue(struct coda_ctx *ctx, struct vb2_buffer *src_buf)
967 {
968         u32 src_size = vb2_get_plane_payload(src_buf, 0);
969         u32 n;
970 
971         n = kfifo_in(&ctx->bitstream_fifo, vb2_plane_vaddr(src_buf, 0), src_size);
972         if (n < src_size)
973                 return -ENOSPC;
974 
975         dma_sync_single_for_device(&ctx->dev->plat_dev->dev, ctx->bitstream.paddr,
976                                    ctx->bitstream.size, DMA_TO_DEVICE);
977 
978         ctx->qsequence++;
979 
980         return 0;
981 }
982 
983 static bool coda_bitstream_try_queue(struct coda_ctx *ctx,
984                                      struct vb2_buffer *src_buf)
985 {
986         int ret;
987 
988         if (coda_get_bitstream_payload(ctx) +
989             vb2_get_plane_payload(src_buf, 0) + 512 >= ctx->bitstream.size)
990                 return false;
991 
992         if (vb2_plane_vaddr(src_buf, 0) == NULL) {
993                 v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n");
994                 return true;
995         }
996 
997         ret = coda_bitstream_queue(ctx, src_buf);
998         if (ret < 0) {
999                 v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n");
1000                 return false;
1001         }
1002         /* Sync read pointer to device */
1003         if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev))
1004                 coda_kfifo_sync_to_device_write(ctx);
1005 
1006         ctx->prescan_failed = false;
1007 
1008         return true;
1009 }
1010 
1011 static void coda_fill_bitstream(struct coda_ctx *ctx)
1012 {
1013         struct vb2_buffer *src_buf;
1014 
1015         while (v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) > 0) {
1016                 src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
1017 
1018                 if (coda_bitstream_try_queue(ctx, src_buf)) {
1019                         src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
1020                         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1021                 } else {
1022                         break;
1023                 }
1024         }
1025 }
1026 
1027 /*
1028  * Mem-to-mem operations.
1029  */
1030 static int coda_prepare_decode(struct coda_ctx *ctx)
1031 {
1032         struct vb2_buffer *dst_buf;
1033         struct coda_dev *dev = ctx->dev;
1034         struct coda_q_data *q_data_dst;
1035         u32 stridey, height;
1036         u32 picture_y, picture_cb, picture_cr;
1037 
1038         dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1039         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1040 
1041         if (ctx->params.rot_mode & CODA_ROT_90) {
1042                 stridey = q_data_dst->height;
1043                 height = q_data_dst->width;
1044         } else {
1045                 stridey = q_data_dst->width;
1046                 height = q_data_dst->height;
1047         }
1048 
1049         /* Try to copy source buffer contents into the bitstream ringbuffer */
1050         mutex_lock(&ctx->bitstream_mutex);
1051         coda_fill_bitstream(ctx);
1052         mutex_unlock(&ctx->bitstream_mutex);
1053 
1054         if (coda_get_bitstream_payload(ctx) < 512 &&
1055             (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
1056                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1057                          "bitstream payload: %d, skipping\n",
1058                          coda_get_bitstream_payload(ctx));
1059                 schedule_work(&ctx->skip_run);
1060                 return -EAGAIN;
1061         }
1062 
1063         /* Run coda_start_decoding (again) if not yet initialized */
1064         if (!ctx->initialized) {
1065                 int ret = coda_start_decoding(ctx);
1066                 if (ret < 0) {
1067                         v4l2_err(&dev->v4l2_dev, "failed to start decoding\n");
1068                         schedule_work(&ctx->skip_run);
1069                         return -EAGAIN;
1070                 } else {
1071                         ctx->initialized = 1;
1072                 }
1073         }
1074 
1075         /* Set rotator output */
1076         picture_y = vb2_dma_contig_plane_dma_addr(dst_buf, 0);
1077         if (q_data_dst->fourcc == V4L2_PIX_FMT_YVU420) {
1078                 /* Switch Cr and Cb for YVU420 format */
1079                 picture_cr = picture_y + stridey * height;
1080                 picture_cb = picture_cr + stridey / 2 * height / 2;
1081         } else {
1082                 picture_cb = picture_y + stridey * height;
1083                 picture_cr = picture_cb + stridey / 2 * height / 2;
1084         }
1085         coda_write(dev, picture_y, CODA_CMD_DEC_PIC_ROT_ADDR_Y);
1086         coda_write(dev, picture_cb, CODA_CMD_DEC_PIC_ROT_ADDR_CB);
1087         coda_write(dev, picture_cr, CODA_CMD_DEC_PIC_ROT_ADDR_CR);
1088         coda_write(dev, stridey, CODA_CMD_DEC_PIC_ROT_STRIDE);
1089         coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode,
1090                         CODA_CMD_DEC_PIC_ROT_MODE);
1091 
1092         switch (dev->devtype->product) {
1093         case CODA_DX6:
1094                 /* TBD */
1095         case CODA_7541:
1096                 coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
1097                 break;
1098         }
1099 
1100         coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM);
1101 
1102         coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START);
1103         coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE);
1104 
1105         return 0;
1106 }
1107 
1108 static void coda_prepare_encode(struct coda_ctx *ctx)
1109 {
1110         struct coda_q_data *q_data_src, *q_data_dst;
1111         struct vb2_buffer *src_buf, *dst_buf;
1112         struct coda_dev *dev = ctx->dev;
1113         int force_ipicture;
1114         int quant_param = 0;
1115         u32 picture_y, picture_cb, picture_cr;
1116         u32 pic_stream_buffer_addr, pic_stream_buffer_size;
1117         u32 dst_fourcc;
1118 
1119         src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
1120         dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1121         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1122         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1123         dst_fourcc = q_data_dst->fourcc;
1124 
1125         src_buf->v4l2_buf.sequence = ctx->osequence;
1126         dst_buf->v4l2_buf.sequence = ctx->osequence;
1127         ctx->osequence++;
1128 
1129         /*
1130          * Workaround coda firmware BUG that only marks the first
1131          * frame as IDR. This is a problem for some decoders that can't
1132          * recover when a frame is lost.
1133          */
1134         if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
1135                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1136                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1137         } else {
1138                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1139                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1140         }
1141 
1142         /*
1143          * Copy headers at the beginning of the first frame for H.264 only.
1144          * In MPEG4 they are already copied by the coda.
1145          */
1146         if (src_buf->v4l2_buf.sequence == 0) {
1147                 pic_stream_buffer_addr =
1148                         vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
1149                         ctx->vpu_header_size[0] +
1150                         ctx->vpu_header_size[1] +
1151                         ctx->vpu_header_size[2];
1152                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
1153                         ctx->vpu_header_size[0] -
1154                         ctx->vpu_header_size[1] -
1155                         ctx->vpu_header_size[2];
1156                 memcpy(vb2_plane_vaddr(dst_buf, 0),
1157                        &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
1158                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
1159                        &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
1160                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
1161                         ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
1162                         ctx->vpu_header_size[2]);
1163         } else {
1164                 pic_stream_buffer_addr =
1165                         vb2_dma_contig_plane_dma_addr(dst_buf, 0);
1166                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
1167         }
1168 
1169         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1170                 force_ipicture = 1;
1171                 switch (dst_fourcc) {
1172                 case V4L2_PIX_FMT_H264:
1173                         quant_param = ctx->params.h264_intra_qp;
1174                         break;
1175                 case V4L2_PIX_FMT_MPEG4:
1176                         quant_param = ctx->params.mpeg4_intra_qp;
1177                         break;
1178                 default:
1179                         v4l2_warn(&ctx->dev->v4l2_dev,
1180                                 "cannot set intra qp, fmt not supported\n");
1181                         break;
1182                 }
1183         } else {
1184                 force_ipicture = 0;
1185                 switch (dst_fourcc) {
1186                 case V4L2_PIX_FMT_H264:
1187                         quant_param = ctx->params.h264_inter_qp;
1188                         break;
1189                 case V4L2_PIX_FMT_MPEG4:
1190                         quant_param = ctx->params.mpeg4_inter_qp;
1191                         break;
1192                 default:
1193                         v4l2_warn(&ctx->dev->v4l2_dev,
1194                                 "cannot set inter qp, fmt not supported\n");
1195                         break;
1196                 }
1197         }
1198 
1199         /* submit */
1200         coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
1201         coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
1202 
1203 
1204         picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
1205         switch (q_data_src->fourcc) {
1206         case V4L2_PIX_FMT_YVU420:
1207                 /* Switch Cb and Cr for YVU420 format */
1208                 picture_cr = picture_y + q_data_src->width * q_data_src->height;
1209                 picture_cb = picture_cr + q_data_src->width / 2 *
1210                                 q_data_src->height / 2;
1211                 break;
1212         case V4L2_PIX_FMT_YUV420:
1213         default:
1214                 picture_cb = picture_y + q_data_src->width * q_data_src->height;
1215                 picture_cr = picture_cb + q_data_src->width / 2 *
1216                                 q_data_src->height / 2;
1217                 break;
1218         }
1219 
1220         coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
1221         coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
1222         coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
1223         coda_write(dev, force_ipicture << 1 & 0x2,
1224                    CODA_CMD_ENC_PIC_OPTION);
1225 
1226         coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
1227         coda_write(dev, pic_stream_buffer_size / 1024,
1228                    CODA_CMD_ENC_PIC_BB_SIZE);
1229 }
1230 
1231 static void coda_device_run(void *m2m_priv)
1232 {
1233         struct coda_ctx *ctx = m2m_priv;
1234         struct coda_dev *dev = ctx->dev;
1235         int ret;
1236 
1237         mutex_lock(&ctx->buffer_mutex);
1238 
1239         /*
1240          * If streamoff dequeued all buffers before we could get the lock,
1241          * just bail out immediately.
1242          */
1243         if ((!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) &&
1244             ctx->inst_type != CODA_INST_DECODER) ||
1245                 !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
1246                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1247                         "%d: device_run without buffers\n", ctx->idx);
1248                 mutex_unlock(&ctx->buffer_mutex);
1249                 schedule_work(&ctx->skip_run);
1250                 return;
1251         }
1252 
1253         mutex_lock(&dev->coda_mutex);
1254 
1255         if (ctx->inst_type == CODA_INST_DECODER) {
1256                 ret = coda_prepare_decode(ctx);
1257                 if (ret < 0) {
1258                         mutex_unlock(&dev->coda_mutex);
1259                         mutex_unlock(&ctx->buffer_mutex);
1260                         /* job_finish scheduled by prepare_decode */
1261                         return;
1262                 }
1263         } else {
1264                 coda_prepare_encode(ctx);
1265         }
1266 
1267         if (dev->devtype->product != CODA_DX6)
1268                 coda_write(dev, ctx->iram_info.axi_sram_use,
1269                                 CODA7_REG_BIT_AXI_SRAM_USE);
1270 
1271         /* 1 second timeout in case CODA locks up */
1272         schedule_delayed_work(&dev->timeout, HZ);
1273 
1274         if (ctx->inst_type == CODA_INST_DECODER)
1275                 coda_kfifo_sync_to_device_full(ctx);
1276         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1277 }
1278 
1279 static int coda_job_ready(void *m2m_priv)
1280 {
1281         struct coda_ctx *ctx = m2m_priv;
1282 
1283         /*
1284          * For both 'P' and 'key' frame cases 1 picture
1285          * and 1 frame are needed. In the decoder case,
1286          * the compressed frame can be in the bitstream.
1287          */
1288         if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) &&
1289             ctx->inst_type != CODA_INST_DECODER) {
1290                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1291                          "not ready: not enough video buffers.\n");
1292                 return 0;
1293         }
1294 
1295         if (!v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
1296                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1297                          "not ready: not enough video capture buffers.\n");
1298                 return 0;
1299         }
1300 
1301         if (ctx->prescan_failed ||
1302             ((ctx->inst_type == CODA_INST_DECODER) &&
1303              (coda_get_bitstream_payload(ctx) < 512) &&
1304              !(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
1305                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1306                          "%d: not ready: not enough bitstream data.\n",
1307                          ctx->idx);
1308                 return 0;
1309         }
1310 
1311         if (ctx->aborting) {
1312                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1313                          "not ready: aborting\n");
1314                 return 0;
1315         }
1316 
1317         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1318                         "job ready\n");
1319         return 1;
1320 }
1321 
1322 static void coda_job_abort(void *priv)
1323 {
1324         struct coda_ctx *ctx = priv;
1325 
1326         ctx->aborting = 1;
1327 
1328         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1329                  "Aborting task\n");
1330 }
1331 
1332 static void coda_lock(void *m2m_priv)
1333 {
1334         struct coda_ctx *ctx = m2m_priv;
1335         struct coda_dev *pcdev = ctx->dev;
1336         mutex_lock(&pcdev->dev_mutex);
1337 }
1338 
1339 static void coda_unlock(void *m2m_priv)
1340 {
1341         struct coda_ctx *ctx = m2m_priv;
1342         struct coda_dev *pcdev = ctx->dev;
1343         mutex_unlock(&pcdev->dev_mutex);
1344 }
1345 
1346 static struct v4l2_m2m_ops coda_m2m_ops = {
1347         .device_run     = coda_device_run,
1348         .job_ready      = coda_job_ready,
1349         .job_abort      = coda_job_abort,
1350         .lock           = coda_lock,
1351         .unlock         = coda_unlock,
1352 };
1353 
1354 static void set_default_params(struct coda_ctx *ctx)
1355 {
1356         int max_w;
1357         int max_h;
1358 
1359         ctx->codec = &ctx->dev->devtype->codecs[0];
1360         max_w = ctx->codec->max_w;
1361         max_h = ctx->codec->max_h;
1362 
1363         ctx->params.codec_mode = CODA_MODE_INVALID;
1364         ctx->colorspace = V4L2_COLORSPACE_REC709;
1365         ctx->params.framerate = 30;
1366         ctx->aborting = 0;
1367 
1368         /* Default formats for output and input queues */
1369         ctx->q_data[V4L2_M2M_SRC].fourcc = ctx->codec->src_fourcc;
1370         ctx->q_data[V4L2_M2M_DST].fourcc = ctx->codec->dst_fourcc;
1371         ctx->q_data[V4L2_M2M_SRC].width = max_w;
1372         ctx->q_data[V4L2_M2M_SRC].height = max_h;
1373         ctx->q_data[V4L2_M2M_SRC].sizeimage = (max_w * max_h * 3) / 2;
1374         ctx->q_data[V4L2_M2M_DST].width = max_w;
1375         ctx->q_data[V4L2_M2M_DST].height = max_h;
1376         ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
1377 }
1378 
1379 /*
1380  * Queue operations
1381  */
1382 static int coda_queue_setup(struct vb2_queue *vq,
1383                                 const struct v4l2_format *fmt,
1384                                 unsigned int *nbuffers, unsigned int *nplanes,
1385                                 unsigned int sizes[], void *alloc_ctxs[])
1386 {
1387         struct coda_ctx *ctx = vb2_get_drv_priv(vq);
1388         struct coda_q_data *q_data;
1389         unsigned int size;
1390 
1391         q_data = get_q_data(ctx, vq->type);
1392         size = q_data->sizeimage;
1393 
1394         *nplanes = 1;
1395         sizes[0] = size;
1396 
1397         alloc_ctxs[0] = ctx->dev->alloc_ctx;
1398 
1399         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1400                  "get %d buffer(s) of size %d each.\n", *nbuffers, size);
1401 
1402         return 0;
1403 }
1404 
1405 static int coda_buf_prepare(struct vb2_buffer *vb)
1406 {
1407         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
1408         struct coda_q_data *q_data;
1409 
1410         q_data = get_q_data(ctx, vb->vb2_queue->type);
1411 
1412         if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
1413                 v4l2_warn(&ctx->dev->v4l2_dev,
1414                           "%s data will not fit into plane (%lu < %lu)\n",
1415                           __func__, vb2_plane_size(vb, 0),
1416                           (long)q_data->sizeimage);
1417                 return -EINVAL;
1418         }
1419 
1420         return 0;
1421 }
1422 
1423 static void coda_buf_queue(struct vb2_buffer *vb)
1424 {
1425         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
1426         struct coda_q_data *q_data;
1427 
1428         q_data = get_q_data(ctx, vb->vb2_queue->type);
1429 
1430         /*
1431          * In the decoder case, immediately try to copy the buffer into the
1432          * bitstream ringbuffer and mark it as ready to be dequeued.
1433          */
1434         if (q_data->fourcc == V4L2_PIX_FMT_H264 &&
1435             vb->vb2_queue->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1436                 /*
1437                  * For backwards compatibility, queuing an empty buffer marks
1438                  * the stream end
1439                  */
1440                 if (vb2_get_plane_payload(vb, 0) == 0)
1441                         ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
1442                 mutex_lock(&ctx->bitstream_mutex);
1443                 v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
1444                 coda_fill_bitstream(ctx);
1445                 mutex_unlock(&ctx->bitstream_mutex);
1446         } else {
1447                 v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
1448         }
1449 }
1450 
1451 static void coda_wait_prepare(struct vb2_queue *q)
1452 {
1453         struct coda_ctx *ctx = vb2_get_drv_priv(q);
1454         coda_unlock(ctx);
1455 }
1456 
1457 static void coda_wait_finish(struct vb2_queue *q)
1458 {
1459         struct coda_ctx *ctx = vb2_get_drv_priv(q);
1460         coda_lock(ctx);
1461 }
1462 
1463 static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
1464 {
1465         struct coda_dev *dev = ctx->dev;
1466         u32 *p = ctx->parabuf.vaddr;
1467 
1468         if (dev->devtype->product == CODA_DX6)
1469                 p[index] = value;
1470         else
1471                 p[index ^ 1] = value;
1472 }
1473 
1474 static int coda_alloc_aux_buf(struct coda_dev *dev,
1475                               struct coda_aux_buf *buf, size_t size)
1476 {
1477         buf->vaddr = dma_alloc_coherent(&dev->plat_dev->dev, size, &buf->paddr,
1478                                         GFP_KERNEL);
1479         if (!buf->vaddr)
1480                 return -ENOMEM;
1481 
1482         buf->size = size;
1483 
1484         return 0;
1485 }
1486 
1487 static inline int coda_alloc_context_buf(struct coda_ctx *ctx,
1488                                          struct coda_aux_buf *buf, size_t size)
1489 {
1490         return coda_alloc_aux_buf(ctx->dev, buf, size);
1491 }
1492 
1493 static void coda_free_aux_buf(struct coda_dev *dev,
1494                               struct coda_aux_buf *buf)
1495 {
1496         if (buf->vaddr) {
1497                 dma_free_coherent(&dev->plat_dev->dev, buf->size,
1498                                   buf->vaddr, buf->paddr);
1499                 buf->vaddr = NULL;
1500                 buf->size = 0;
1501         }
1502 }
1503 
1504 static void coda_free_framebuffers(struct coda_ctx *ctx)
1505 {
1506         int i;
1507 
1508         for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
1509                 coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]);
1510 }
1511 
1512 static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
1513 {
1514         struct coda_dev *dev = ctx->dev;
1515         int height = q_data->height;
1516         dma_addr_t paddr;
1517         int ysize;
1518         int ret;
1519         int i;
1520 
1521         if (ctx->codec && ctx->codec->src_fourcc == V4L2_PIX_FMT_H264)
1522                 height = round_up(height, 16);
1523         ysize = round_up(q_data->width, 8) * height;
1524 
1525         /* Allocate frame buffers */
1526         for (i = 0; i < ctx->num_internal_frames; i++) {
1527                 size_t size;
1528 
1529                 size = q_data->sizeimage;
1530                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
1531                     dev->devtype->product != CODA_DX6)
1532                         ctx->internal_frames[i].size += ysize/4;
1533                 ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i], size);
1534                 if (ret < 0) {
1535                         coda_free_framebuffers(ctx);
1536                         return ret;
1537                 }
1538         }
1539 
1540         /* Register frame buffers in the parameter buffer */
1541         for (i = 0; i < ctx->num_internal_frames; i++) {
1542                 paddr = ctx->internal_frames[i].paddr;
1543                 coda_parabuf_write(ctx, i * 3 + 0, paddr); /* Y */
1544                 coda_parabuf_write(ctx, i * 3 + 1, paddr + ysize); /* Cb */
1545                 coda_parabuf_write(ctx, i * 3 + 2, paddr + ysize + ysize/4); /* Cr */
1546 
1547                 /* mvcol buffer for h.264 */
1548                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
1549                     dev->devtype->product != CODA_DX6)
1550                         coda_parabuf_write(ctx, 96 + i,
1551                                            ctx->internal_frames[i].paddr +
1552                                            ysize + ysize/4 + ysize/4);
1553         }
1554 
1555         /* mvcol buffer for mpeg4 */
1556         if ((dev->devtype->product != CODA_DX6) &&
1557             (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4))
1558                 coda_parabuf_write(ctx, 97, ctx->internal_frames[i].paddr +
1559                                             ysize + ysize/4 + ysize/4);
1560 
1561         return 0;
1562 }
1563 
1564 static int coda_h264_padding(int size, char *p)
1565 {
1566         int nal_size;
1567         int diff;
1568 
1569         diff = size - (size & ~0x7);
1570         if (diff == 0)
1571                 return 0;
1572 
1573         nal_size = coda_filler_size[diff];
1574         memcpy(p, coda_filler_nal, nal_size);
1575 
1576         /* Add rbsp stop bit and trailing at the end */
1577         *(p + nal_size - 1) = 0x80;
1578 
1579         return nal_size;
1580 }
1581 
1582 static void coda_setup_iram(struct coda_ctx *ctx)
1583 {
1584         struct coda_iram_info *iram_info = &ctx->iram_info;
1585         struct coda_dev *dev = ctx->dev;
1586         int ipacdc_size;
1587         int bitram_size;
1588         int dbk_size;
1589         int ovl_size;
1590         int mb_width;
1591         int me_size;
1592         int size;
1593 
1594         memset(iram_info, 0, sizeof(*iram_info));
1595         size = dev->iram_size;
1596 
1597         if (dev->devtype->product == CODA_DX6)
1598                 return;
1599 
1600         if (ctx->inst_type == CODA_INST_ENCODER) {
1601                 struct coda_q_data *q_data_src;
1602 
1603                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1604                 mb_width = DIV_ROUND_UP(q_data_src->width, 16);
1605 
1606                 /* Prioritize in case IRAM is too small for everything */
1607                 me_size = round_up(round_up(q_data_src->width, 16) * 36 + 2048,
1608                                    1024);
1609                 iram_info->search_ram_size = me_size;
1610                 if (size >= iram_info->search_ram_size) {
1611                         if (dev->devtype->product == CODA_7541)
1612                                 iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE;
1613                         iram_info->search_ram_paddr = dev->iram_paddr;
1614                         size -= iram_info->search_ram_size;
1615                 } else {
1616                         pr_err("IRAM is smaller than the search ram size\n");
1617                         goto out;
1618                 }
1619 
1620                 /* Only H.264BP and H.263P3 are considered */
1621                 dbk_size = round_up(128 * mb_width, 1024);
1622                 if (size >= dbk_size) {
1623                         iram_info->axi_sram_use |= CODA7_USE_HOST_DBK_ENABLE;
1624                         iram_info->buf_dbk_y_use = dev->iram_paddr +
1625                                                    iram_info->search_ram_size;
1626                         iram_info->buf_dbk_c_use = iram_info->buf_dbk_y_use +
1627                                                    dbk_size / 2;
1628                         size -= dbk_size;
1629                 } else {
1630                         goto out;
1631                 }
1632 
1633                 bitram_size = round_up(128 * mb_width, 1024);
1634                 if (size >= bitram_size) {
1635                         iram_info->axi_sram_use |= CODA7_USE_HOST_BIT_ENABLE;
1636                         iram_info->buf_bit_use = iram_info->buf_dbk_c_use +
1637                                                  dbk_size / 2;
1638                         size -= bitram_size;
1639                 } else {
1640                         goto out;
1641                 }
1642 
1643                 ipacdc_size = round_up(128 * mb_width, 1024);
1644                 if (size >= ipacdc_size) {
1645                         iram_info->axi_sram_use |= CODA7_USE_HOST_IP_ENABLE;
1646                         iram_info->buf_ip_ac_dc_use = iram_info->buf_bit_use +
1647                                                       bitram_size;
1648                         size -= ipacdc_size;
1649                 }
1650 
1651                 /* OVL and BTP disabled for encoder */
1652         } else if (ctx->inst_type == CODA_INST_DECODER) {
1653                 struct coda_q_data *q_data_dst;
1654                 int mb_height;
1655 
1656                 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1657                 mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
1658                 mb_height = DIV_ROUND_UP(q_data_dst->height, 16);
1659 
1660                 dbk_size = round_up(256 * mb_width, 1024);
1661                 if (size >= dbk_size) {
1662                         iram_info->axi_sram_use |= CODA7_USE_HOST_DBK_ENABLE;
1663                         iram_info->buf_dbk_y_use = dev->iram_paddr;
1664                         iram_info->buf_dbk_c_use = dev->iram_paddr +
1665                                                    dbk_size / 2;
1666                         size -= dbk_size;
1667                 } else {
1668                         goto out;
1669                 }
1670 
1671                 bitram_size = round_up(128 * mb_width, 1024);
1672                 if (size >= bitram_size) {
1673                         iram_info->axi_sram_use |= CODA7_USE_HOST_BIT_ENABLE;
1674                         iram_info->buf_bit_use = iram_info->buf_dbk_c_use +
1675                                                  dbk_size / 2;
1676                         size -= bitram_size;
1677                 } else {
1678                         goto out;
1679                 }
1680 
1681                 ipacdc_size = round_up(128 * mb_width, 1024);
1682                 if (size >= ipacdc_size) {
1683                         iram_info->axi_sram_use |= CODA7_USE_HOST_IP_ENABLE;
1684                         iram_info->buf_ip_ac_dc_use = iram_info->buf_bit_use +
1685                                                       bitram_size;
1686                         size -= ipacdc_size;
1687                 } else {
1688                         goto out;
1689                 }
1690 
1691                 ovl_size = round_up(80 * mb_width, 1024);
1692         }
1693 
1694 out:
1695         switch (dev->devtype->product) {
1696         case CODA_DX6:
1697                 break;
1698         case CODA_7541:
1699                 /* i.MX53 uses secondary AXI for IRAM access */
1700                 if (iram_info->axi_sram_use & CODA7_USE_HOST_BIT_ENABLE)
1701                         iram_info->axi_sram_use |= CODA7_USE_BIT_ENABLE;
1702                 if (iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE)
1703                         iram_info->axi_sram_use |= CODA7_USE_IP_ENABLE;
1704                 if (iram_info->axi_sram_use & CODA7_USE_HOST_DBK_ENABLE)
1705                         iram_info->axi_sram_use |= CODA7_USE_DBK_ENABLE;
1706                 if (iram_info->axi_sram_use & CODA7_USE_HOST_OVL_ENABLE)
1707                         iram_info->axi_sram_use |= CODA7_USE_OVL_ENABLE;
1708                 if (iram_info->axi_sram_use & CODA7_USE_HOST_ME_ENABLE)
1709                         iram_info->axi_sram_use |= CODA7_USE_ME_ENABLE;
1710         }
1711 
1712         if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
1713                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1714                          "IRAM smaller than needed\n");
1715 
1716         if (dev->devtype->product == CODA_7541) {
1717                 /* TODO - Enabling these causes picture errors on CODA7541 */
1718                 if (ctx->inst_type == CODA_INST_DECODER) {
1719                         /* fw 1.4.50 */
1720                         iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
1721                                                      CODA7_USE_IP_ENABLE);
1722                 } else {
1723                         /* fw 13.4.29 */
1724                         iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
1725                                                      CODA7_USE_HOST_DBK_ENABLE |
1726                                                      CODA7_USE_IP_ENABLE |
1727                                                      CODA7_USE_DBK_ENABLE);
1728                 }
1729         }
1730 }
1731 
1732 static void coda_free_context_buffers(struct coda_ctx *ctx)
1733 {
1734         struct coda_dev *dev = ctx->dev;
1735 
1736         coda_free_aux_buf(dev, &ctx->slicebuf);
1737         coda_free_aux_buf(dev, &ctx->psbuf);
1738         if (dev->devtype->product != CODA_DX6)
1739                 coda_free_aux_buf(dev, &ctx->workbuf);
1740 }
1741 
1742 static int coda_alloc_context_buffers(struct coda_ctx *ctx,
1743                                       struct coda_q_data *q_data)
1744 {
1745         struct coda_dev *dev = ctx->dev;
1746         size_t size;
1747         int ret;
1748 
1749         switch (dev->devtype->product) {
1750         case CODA_7541:
1751                 size = CODA7_WORK_BUF_SIZE;
1752                 break;
1753         default:
1754                 return 0;
1755         }
1756 
1757         if (ctx->psbuf.vaddr) {
1758                 v4l2_err(&dev->v4l2_dev, "psmembuf still allocated\n");
1759                 return -EBUSY;
1760         }
1761         if (ctx->slicebuf.vaddr) {
1762                 v4l2_err(&dev->v4l2_dev, "slicebuf still allocated\n");
1763                 return -EBUSY;
1764         }
1765         if (ctx->workbuf.vaddr) {
1766                 v4l2_err(&dev->v4l2_dev, "context buffer still allocated\n");
1767                 ret = -EBUSY;
1768                 return -ENOMEM;
1769         }
1770 
1771         if (q_data->fourcc == V4L2_PIX_FMT_H264) {
1772                 /* worst case slice size */
1773                 size = (DIV_ROUND_UP(q_data->width, 16) *
1774                         DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512;
1775                 ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size);
1776                 if (ret < 0) {
1777                         v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte slice buffer",
1778                                  ctx->slicebuf.size);
1779                         return ret;
1780                 }
1781         }
1782 
1783         if (dev->devtype->product == CODA_7541) {
1784                 ret = coda_alloc_context_buf(ctx, &ctx->psbuf, CODA7_PS_BUF_SIZE);
1785                 if (ret < 0) {
1786                         v4l2_err(&dev->v4l2_dev, "failed to allocate psmem buffer");
1787                         goto err;
1788                 }
1789         }
1790 
1791         ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size);
1792         if (ret < 0) {
1793                 v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte context buffer",
1794                          ctx->workbuf.size);
1795                 goto err;
1796         }
1797 
1798         return 0;
1799 
1800 err:
1801         coda_free_context_buffers(ctx);
1802         return ret;
1803 }
1804 
1805 static int coda_start_decoding(struct coda_ctx *ctx)
1806 {
1807         struct coda_q_data *q_data_src, *q_data_dst;
1808         u32 bitstream_buf, bitstream_size;
1809         struct coda_dev *dev = ctx->dev;
1810         int width, height;
1811         u32 src_fourcc;
1812         u32 val;
1813         int ret;
1814 
1815         /* Start decoding */
1816         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1817         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1818         bitstream_buf = ctx->bitstream.paddr;
1819         bitstream_size = ctx->bitstream.size;
1820         src_fourcc = q_data_src->fourcc;
1821 
1822         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1823 
1824         /* Update coda bitstream read and write pointers from kfifo */
1825         coda_kfifo_sync_to_device_full(ctx);
1826 
1827         ctx->display_idx = -1;
1828         ctx->frm_dis_flg = 0;
1829         coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1830 
1831         coda_write(dev, CODA_BIT_DEC_SEQ_INIT_ESCAPE,
1832                         CODA_REG_BIT_BIT_STREAM_PARAM);
1833 
1834         coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START);
1835         coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE);
1836         val = 0;
1837         if (dev->devtype->product == CODA_7541)
1838                 val |= CODA_REORDER_ENABLE;
1839         coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION);
1840 
1841         ctx->params.codec_mode = ctx->codec->mode;
1842         ctx->params.codec_mode_aux = 0;
1843         if (src_fourcc == V4L2_PIX_FMT_H264) {
1844                 if (dev->devtype->product == CODA_7541) {
1845                         coda_write(dev, ctx->psbuf.paddr,
1846                                         CODA_CMD_DEC_SEQ_PS_BB_START);
1847                         coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
1848                                         CODA_CMD_DEC_SEQ_PS_BB_SIZE);
1849                 }
1850         }
1851 
1852         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1853                 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1854                 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1855                 return -ETIMEDOUT;
1856         }
1857 
1858         /* Update kfifo out pointer from coda bitstream read pointer */
1859         coda_kfifo_sync_from_device(ctx);
1860 
1861         coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1862 
1863         if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) {
1864                 v4l2_err(&dev->v4l2_dev,
1865                         "CODA_COMMAND_SEQ_INIT failed, error code = %d\n",
1866                         coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON));
1867                 return -EAGAIN;
1868         }
1869 
1870         val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE);
1871         if (dev->devtype->product == CODA_DX6) {
1872                 width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK;
1873                 height = val & CODADX6_PICHEIGHT_MASK;
1874         } else {
1875                 width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK;
1876                 height = val & CODA7_PICHEIGHT_MASK;
1877         }
1878 
1879         if (width > q_data_dst->width || height > q_data_dst->height) {
1880                 v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n",
1881                          width, height, q_data_dst->width, q_data_dst->height);
1882                 return -EINVAL;
1883         }
1884 
1885         width = round_up(width, 16);
1886         height = round_up(height, 16);
1887 
1888         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n",
1889                  __func__, ctx->idx, width, height);
1890 
1891         ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED) + 1;
1892         if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) {
1893                 v4l2_err(&dev->v4l2_dev,
1894                          "not enough framebuffers to decode (%d < %d)\n",
1895                          CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames);
1896                 return -EINVAL;
1897         }
1898 
1899         ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc);
1900         if (ret < 0)
1901                 return ret;
1902 
1903         /* Tell the decoder how many frame buffers we allocated. */
1904         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1905         coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE);
1906 
1907         if (dev->devtype->product != CODA_DX6) {
1908                 /* Set secondary AXI IRAM */
1909                 coda_setup_iram(ctx);
1910 
1911                 coda_write(dev, ctx->iram_info.buf_bit_use,
1912                                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1913                 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
1914                                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1915                 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
1916                                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1917                 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
1918                                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1919                 coda_write(dev, ctx->iram_info.buf_ovl_use,
1920                                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1921         }
1922 
1923         if (src_fourcc == V4L2_PIX_FMT_H264) {
1924                 coda_write(dev, ctx->slicebuf.paddr,
1925                                 CODA_CMD_SET_FRAME_SLICE_BB_START);
1926                 coda_write(dev, ctx->slicebuf.size / 1024,
1927                                 CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
1928         }
1929 
1930         if (dev->devtype->product == CODA_7541) {
1931                 int max_mb_x = 1920 / 16;
1932                 int max_mb_y = 1088 / 16;
1933                 int max_mb_num = max_mb_x * max_mb_y;
1934                 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
1935                                 CODA7_CMD_SET_FRAME_MAX_DEC_SIZE);
1936         }
1937 
1938         if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1939                 v4l2_err(&ctx->dev->v4l2_dev,
1940                          "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1941                 return -ETIMEDOUT;
1942         }
1943 
1944         return 0;
1945 }
1946 
1947 static int coda_encode_header(struct coda_ctx *ctx, struct vb2_buffer *buf,
1948                               int header_code, u8 *header, int *size)
1949 {
1950         struct coda_dev *dev = ctx->dev;
1951         int ret;
1952 
1953         coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0),
1954                    CODA_CMD_ENC_HEADER_BB_START);
1955         coda_write(dev, vb2_plane_size(buf, 0), CODA_CMD_ENC_HEADER_BB_SIZE);
1956         coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
1957         ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
1958         if (ret < 0) {
1959                 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1960                 return ret;
1961         }
1962         *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
1963                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1964         memcpy(header, vb2_plane_vaddr(buf, 0), *size);
1965 
1966         return 0;
1967 }
1968 
1969 static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
1970 {
1971         struct coda_ctx *ctx = vb2_get_drv_priv(q);
1972         struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
1973         u32 bitstream_buf, bitstream_size;
1974         struct coda_dev *dev = ctx->dev;
1975         struct coda_q_data *q_data_src, *q_data_dst;
1976         struct vb2_buffer *buf;
1977         u32 dst_fourcc;
1978         u32 value;
1979         int ret = 0;
1980 
1981         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1982         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1983                 if (q_data_src->fourcc == V4L2_PIX_FMT_H264) {
1984                         if (coda_get_bitstream_payload(ctx) < 512)
1985                                 return -EINVAL;
1986                 } else {
1987                         if (count < 1)
1988                                 return -EINVAL;
1989                 }
1990 
1991                 ctx->streamon_out = 1;
1992 
1993                 if (coda_format_is_yuv(q_data_src->fourcc))
1994                         ctx->inst_type = CODA_INST_ENCODER;
1995                 else
1996                         ctx->inst_type = CODA_INST_DECODER;
1997         } else {
1998                 if (count < 1)
1999                         return -EINVAL;
2000 
2001                 ctx->streamon_cap = 1;
2002         }
2003 
2004         /* Don't start the coda unless both queues are on */
2005         if (!(ctx->streamon_out & ctx->streamon_cap))
2006                 return 0;
2007 
2008         /* Allow decoder device_run with no new buffers queued */
2009         if (ctx->inst_type == CODA_INST_DECODER)
2010                 v4l2_m2m_set_src_buffered(ctx->m2m_ctx, true);
2011 
2012         ctx->gopcounter = ctx->params.gop_size - 1;
2013         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
2014         bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
2015         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2016         bitstream_size = q_data_dst->sizeimage;
2017         dst_fourcc = q_data_dst->fourcc;
2018 
2019         ctx->codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
2020                                      q_data_dst->fourcc);
2021         if (!ctx->codec) {
2022                 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
2023                 return -EINVAL;
2024         }
2025 
2026         /* Allocate per-instance buffers */
2027         ret = coda_alloc_context_buffers(ctx, q_data_src);
2028         if (ret < 0)
2029                 return ret;
2030 
2031         if (ctx->inst_type == CODA_INST_DECODER) {
2032                 mutex_lock(&dev->coda_mutex);
2033                 ret = coda_start_decoding(ctx);
2034                 mutex_unlock(&dev->coda_mutex);
2035                 if (ret == -EAGAIN) {
2036                         return 0;
2037                 } else if (ret < 0) {
2038                         return ret;
2039                 } else {
2040                         ctx->initialized = 1;
2041                         return 0;
2042                 }
2043         }
2044 
2045         if (!coda_is_initialized(dev)) {
2046                 v4l2_err(v4l2_dev, "coda is not initialized.\n");
2047                 return -EFAULT;
2048         }
2049 
2050         mutex_lock(&dev->coda_mutex);
2051 
2052         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
2053         coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
2054         coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
2055         switch (dev->devtype->product) {
2056         case CODA_DX6:
2057                 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
2058                         CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
2059                 break;
2060         default:
2061                 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
2062                         CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
2063         }
2064 
2065         if (dev->devtype->product == CODA_DX6) {
2066                 /* Configure the coda */
2067                 coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
2068         }
2069 
2070         /* Could set rotation here if needed */
2071         switch (dev->devtype->product) {
2072         case CODA_DX6:
2073                 value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
2074                 value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
2075                 break;
2076         default:
2077                 value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
2078                 value |= (q_data_src->height & CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
2079         }
2080         coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
2081         coda_write(dev, ctx->params.framerate,
2082                    CODA_CMD_ENC_SEQ_SRC_F_RATE);
2083 
2084         ctx->params.codec_mode = ctx->codec->mode;
2085         switch (dst_fourcc) {
2086         case V4L2_PIX_FMT_MPEG4:
2087                 coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
2088                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
2089                 break;
2090         case V4L2_PIX_FMT_H264:
2091                 coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
2092                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
2093                 break;
2094         default:
2095                 v4l2_err(v4l2_dev,
2096                          "dst format (0x%08x) invalid.\n", dst_fourcc);
2097                 ret = -EINVAL;
2098                 goto out;
2099         }
2100 
2101         switch (ctx->params.slice_mode) {
2102         case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
2103                 value = 0;
2104                 break;
2105         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
2106                 value  = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
2107                 value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
2108                 value |=  1 & CODA_SLICING_MODE_MASK;
2109                 break;
2110         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
2111                 value  = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
2112                 value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
2113                 value |=  1 & CODA_SLICING_MODE_MASK;
2114                 break;
2115         }
2116         coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
2117         value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
2118         coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
2119 
2120         if (ctx->params.bitrate) {
2121                 /* Rate control enabled */
2122                 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
2123                 value |=  1 & CODA_RATECONTROL_ENABLE_MASK;
2124         } else {
2125                 value = 0;
2126         }
2127         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
2128 
2129         coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
2130         coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
2131 
2132         coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
2133         coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
2134 
2135         /* set default gamma */
2136         value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
2137         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
2138 
2139         if (CODA_DEFAULT_GAMMA > 0) {
2140                 if (dev->devtype->product == CODA_DX6)
2141                         value  = 1 << CODADX6_OPTION_GAMMA_OFFSET;
2142                 else
2143                         value  = 1 << CODA7_OPTION_GAMMA_OFFSET;
2144         } else {
2145                 value = 0;
2146         }
2147         coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
2148 
2149         coda_setup_iram(ctx);
2150 
2151         if (dst_fourcc == V4L2_PIX_FMT_H264) {
2152                 if (dev->devtype->product == CODA_DX6) {
2153                         value = FMO_SLICE_SAVE_BUF_SIZE << 7;
2154                         coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
2155                 } else {
2156                         coda_write(dev, ctx->iram_info.search_ram_paddr,
2157                                         CODA7_CMD_ENC_SEQ_SEARCH_BASE);
2158                         coda_write(dev, ctx->iram_info.search_ram_size,
2159                                         CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
2160                 }
2161         }
2162 
2163         ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
2164         if (ret < 0) {
2165                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
2166                 goto out;
2167         }
2168 
2169         if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
2170                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
2171                 ret = -EFAULT;
2172                 goto out;
2173         }
2174 
2175         ctx->num_internal_frames = 2;
2176         ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
2177         if (ret < 0) {
2178                 v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
2179                 goto out;
2180         }
2181 
2182         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
2183         coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
2184         if (dev->devtype->product == CODA_7541)
2185                 coda_write(dev, round_up(q_data_src->width, 8),
2186                                 CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
2187         if (dev->devtype->product != CODA_DX6) {
2188                 coda_write(dev, ctx->iram_info.buf_bit_use,
2189                                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
2190                 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
2191                                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
2192                 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
2193                                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
2194                 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
2195                                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
2196                 coda_write(dev, ctx->iram_info.buf_ovl_use,
2197                                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
2198         }
2199         ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
2200         if (ret < 0) {
2201                 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
2202                 goto out;
2203         }
2204 
2205         /* Save stream headers */
2206         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
2207         switch (dst_fourcc) {
2208         case V4L2_PIX_FMT_H264:
2209                 /*
2210                  * Get SPS in the first frame and copy it to an
2211                  * intermediate buffer.
2212                  */
2213                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
2214                                          &ctx->vpu_header[0][0],
2215                                          &ctx->vpu_header_size[0]);
2216                 if (ret < 0)
2217                         goto out;
2218 
2219                 /*
2220                  * Get PPS in the first frame and copy it to an
2221                  * intermediate buffer.
2222                  */
2223                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
2224                                          &ctx->vpu_header[1][0],
2225                                          &ctx->vpu_header_size[1]);
2226                 if (ret < 0)
2227                         goto out;
2228 
2229                 /*
2230                  * Length of H.264 headers is variable and thus it might not be
2231                  * aligned for the coda to append the encoded frame. In that is
2232                  * the case a filler NAL must be added to header 2.
2233                  */
2234                 ctx->vpu_header_size[2] = coda_h264_padding(
2235                                         (ctx->vpu_header_size[0] +
2236                                          ctx->vpu_header_size[1]),
2237                                          ctx->vpu_header[2]);
2238                 break;
2239         case V4L2_PIX_FMT_MPEG4:
2240                 /*
2241                  * Get VOS in the first frame and copy it to an
2242                  * intermediate buffer
2243                  */
2244                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
2245                                          &ctx->vpu_header[0][0],
2246                                          &ctx->vpu_header_size[0]);
2247                 if (ret < 0)
2248                         goto out;
2249 
2250                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
2251                                          &ctx->vpu_header[1][0],
2252                                          &ctx->vpu_header_size[1]);
2253                 if (ret < 0)
2254                         goto out;
2255 
2256                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
2257                                          &ctx->vpu_header[2][0],
2258                                          &ctx->vpu_header_size[2]);
2259                 if (ret < 0)
2260                         goto out;
2261                 break;
2262         default:
2263                 /* No more formats need to save headers at the moment */
2264                 break;
2265         }
2266 
2267 out:
2268         mutex_unlock(&dev->coda_mutex);
2269         return ret;
2270 }
2271 
2272 static int coda_stop_streaming(struct vb2_queue *q)
2273 {
2274         struct coda_ctx *ctx = vb2_get_drv_priv(q);
2275         struct coda_dev *dev = ctx->dev;
2276 
2277         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
2278                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2279                          "%s: output\n", __func__);
2280                 ctx->streamon_out = 0;
2281 
2282                 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
2283 
2284                 ctx->isequence = 0;
2285         } else {
2286                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2287                          "%s: capture\n", __func__);
2288                 ctx->streamon_cap = 0;
2289 
2290                 ctx->osequence = 0;
2291         }
2292 
2293         if (!ctx->streamon_out && !ctx->streamon_cap) {
2294                 kfifo_init(&ctx->bitstream_fifo,
2295                         ctx->bitstream.vaddr, ctx->bitstream.size);
2296                 ctx->runcounter = 0;
2297         }
2298 
2299         return 0;
2300 }
2301 
2302 static struct vb2_ops coda_qops = {
2303         .queue_setup            = coda_queue_setup,
2304         .buf_prepare            = coda_buf_prepare,
2305         .buf_queue              = coda_buf_queue,
2306         .wait_prepare           = coda_wait_prepare,
2307         .wait_finish            = coda_wait_finish,
2308         .start_streaming        = coda_start_streaming,
2309         .stop_streaming         = coda_stop_streaming,
2310 };
2311 
2312 static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
2313 {
2314         struct coda_ctx *ctx =
2315                         container_of(ctrl->handler, struct coda_ctx, ctrls);
2316 
2317         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2318                  "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
2319 
2320         switch (ctrl->id) {
2321         case V4L2_CID_HFLIP:
2322                 if (ctrl->val)
2323                         ctx->params.rot_mode |= CODA_MIR_HOR;
2324                 else
2325                         ctx->params.rot_mode &= ~CODA_MIR_HOR;
2326                 break;
2327         case V4L2_CID_VFLIP:
2328                 if (ctrl->val)
2329                         ctx->params.rot_mode |= CODA_MIR_VER;
2330                 else
2331                         ctx->params.rot_mode &= ~CODA_MIR_VER;
2332                 break;
2333         case V4L2_CID_MPEG_VIDEO_BITRATE:
2334                 ctx->params.bitrate = ctrl->val / 1000;
2335                 break;
2336         case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
2337                 ctx->params.gop_size = ctrl->val;
2338                 break;
2339         case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
2340                 ctx->params.h264_intra_qp = ctrl->val;
2341                 break;
2342         case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
2343                 ctx->params.h264_inter_qp = ctrl->val;
2344                 break;
2345         case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
2346                 ctx->params.mpeg4_intra_qp = ctrl->val;
2347                 break;
2348         case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
2349                 ctx->params.mpeg4_inter_qp = ctrl->val;
2350                 break;
2351         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
2352                 ctx->params.slice_mode = ctrl->val;
2353                 break;
2354         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
2355                 ctx->params.slice_max_mb = ctrl->val;
2356                 break;
2357         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
2358                 ctx->params.slice_max_bits = ctrl->val * 8;
2359                 break;
2360         case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
2361                 break;
2362         default:
2363                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2364                         "Invalid control, id=%d, val=%d\n",
2365                         ctrl->id, ctrl->val);
2366                 return -EINVAL;
2367         }
2368 
2369         return 0;
2370 }
2371 
2372 static struct v4l2_ctrl_ops coda_ctrl_ops = {
2373         .s_ctrl = coda_s_ctrl,
2374 };
2375 
2376 static int coda_ctrls_setup(struct coda_ctx *ctx)
2377 {
2378         v4l2_ctrl_handler_init(&ctx->ctrls, 9);
2379 
2380         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2381                 V4L2_CID_HFLIP, 0, 1, 1, 0);
2382         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2383                 V4L2_CID_VFLIP, 0, 1, 1, 0);
2384         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2385                 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
2386         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2387                 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
2388         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2389                 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
2390         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2391                 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
2392         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2393                 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
2394         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2395                 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
2396         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
2397                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
2398                 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, 0x0,
2399                 V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE);
2400         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2401                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
2402         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2403                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, 1, 0x3fffffff, 1, 500);
2404         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
2405                 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
2406                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
2407                 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
2408                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
2409 
2410         if (ctx->ctrls.error) {
2411                 v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
2412                         ctx->ctrls.error);
2413                 return -EINVAL;
2414         }
2415 
2416         return v4l2_ctrl_handler_setup(&ctx->ctrls);
2417 }
2418 
2419 static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
2420                       struct vb2_queue *dst_vq)
2421 {
2422         struct coda_ctx *ctx = priv;
2423         int ret;
2424 
2425         src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
2426         src_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
2427         src_vq->drv_priv = ctx;
2428         src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
2429         src_vq->ops = &coda_qops;
2430         src_vq->mem_ops = &vb2_dma_contig_memops;
2431         src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
2432 
2433         ret = vb2_queue_init(src_vq);
2434         if (ret)
2435                 return ret;
2436 
2437         dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2438         dst_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
2439         dst_vq->drv_priv = ctx;
2440         dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
2441         dst_vq->ops = &coda_qops;
2442         dst_vq->mem_ops = &vb2_dma_contig_memops;
2443         dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
2444 
2445         return vb2_queue_init(dst_vq);
2446 }
2447 
2448 static int coda_next_free_instance(struct coda_dev *dev)
2449 {
2450         int idx = ffz(dev->instance_mask);
2451 
2452         if ((idx < 0) ||
2453             (dev->devtype->product == CODA_DX6 && idx > CODADX6_MAX_INSTANCES))
2454                 return -EBUSY;
2455 
2456         return idx;
2457 }
2458 
2459 static int coda_open(struct file *file)
2460 {
2461         struct coda_dev *dev = video_drvdata(file);
2462         struct coda_ctx *ctx = NULL;
2463         int ret;
2464         int idx;
2465 
2466         ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
2467         if (!ctx)
2468                 return -ENOMEM;
2469 
2470         idx = coda_next_free_instance(dev);
2471         if (idx < 0) {
2472                 ret = idx;
2473                 goto err_coda_max;
2474         }
2475         set_bit(idx, &dev->instance_mask);
2476 
2477         INIT_WORK(&ctx->skip_run, coda_skip_run);
2478         v4l2_fh_init(&ctx->fh, video_devdata(file));
2479         file->private_data = &ctx->fh;
2480         v4l2_fh_add(&ctx->fh);
2481         ctx->dev = dev;
2482         ctx->idx = idx;
2483         switch (dev->devtype->product) {
2484         case CODA_7541:
2485                 ctx->reg_idx = 0;
2486                 break;
2487         default:
2488                 ctx->reg_idx = idx;
2489         }
2490 
2491         ret = clk_prepare_enable(dev->clk_per);
2492         if (ret)
2493                 goto err_clk_per;
2494 
2495         ret = clk_prepare_enable(dev->clk_ahb);
2496         if (ret)
2497                 goto err_clk_ahb;
2498 
2499         set_default_params(ctx);
2500         ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
2501                                          &coda_queue_init);
2502         if (IS_ERR(ctx->m2m_ctx)) {
2503                 ret = PTR_ERR(ctx->m2m_ctx);
2504 
2505                 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
2506                          __func__, ret);
2507                 goto err_ctx_init;
2508         }
2509         ret = coda_ctrls_setup(ctx);
2510         if (ret) {
2511                 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
2512                 goto err_ctrls_setup;
2513         }
2514 
2515         ctx->fh.ctrl_handler = &ctx->ctrls;
2516 
2517         ret = coda_alloc_context_buf(ctx, &ctx->parabuf, CODA_PARA_BUF_SIZE);
2518         if (ret < 0) {
2519                 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
2520                 goto err_dma_alloc;
2521         }
2522 
2523         ctx->bitstream.size = CODA_MAX_FRAME_SIZE;
2524         ctx->bitstream.vaddr = dma_alloc_writecombine(&dev->plat_dev->dev,
2525                         ctx->bitstream.size, &ctx->bitstream.paddr, GFP_KERNEL);
2526         if (!ctx->bitstream.vaddr) {
2527                 v4l2_err(&dev->v4l2_dev, "failed to allocate bitstream ringbuffer");
2528                 ret = -ENOMEM;
2529                 goto err_dma_writecombine;
2530         }
2531         kfifo_init(&ctx->bitstream_fifo,
2532                 ctx->bitstream.vaddr, ctx->bitstream.size);
2533         mutex_init(&ctx->bitstream_mutex);
2534         mutex_init(&ctx->buffer_mutex);
2535 
2536         coda_lock(ctx);
2537         list_add(&ctx->list, &dev->instances);
2538         coda_unlock(ctx);
2539 
2540         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
2541                  ctx->idx, ctx);
2542 
2543         return 0;
2544 
2545 err_dma_writecombine:
2546         coda_free_context_buffers(ctx);
2547         if (ctx->dev->devtype->product == CODA_DX6)
2548                 coda_free_aux_buf(dev, &ctx->workbuf);
2549         coda_free_aux_buf(dev, &ctx->parabuf);
2550 err_dma_alloc:
2551         v4l2_ctrl_handler_free(&ctx->ctrls);
2552 err_ctrls_setup:
2553         v4l2_m2m_ctx_release(ctx->m2m_ctx);
2554 err_ctx_init:
2555         clk_disable_unprepare(dev->clk_ahb);
2556 err_clk_ahb:
2557         clk_disable_unprepare(dev->clk_per);
2558 err_clk_per:
2559         v4l2_fh_del(&ctx->fh);
2560         v4l2_fh_exit(&ctx->fh);
2561         clear_bit(ctx->idx, &dev->instance_mask);
2562 err_coda_max:
2563         kfree(ctx);
2564         return ret;
2565 }
2566 
2567 static int coda_release(struct file *file)
2568 {
2569         struct coda_dev *dev = video_drvdata(file);
2570         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
2571 
2572         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
2573                  ctx);
2574 
2575         /* If this instance is running, call .job_abort and wait for it to end */
2576         v4l2_m2m_ctx_release(ctx->m2m_ctx);
2577 
2578         /* In case the instance was not running, we still need to call SEQ_END */
2579         mutex_lock(&dev->coda_mutex);
2580         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2581                  "%s: sent command 'SEQ_END' to coda\n", __func__);
2582         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
2583                 v4l2_err(&dev->v4l2_dev,
2584                          "CODA_COMMAND_SEQ_END failed\n");
2585                 mutex_unlock(&dev->coda_mutex);
2586                 return -ETIMEDOUT;
2587         }
2588         mutex_unlock(&dev->coda_mutex);
2589 
2590         coda_free_framebuffers(ctx);
2591 
2592         coda_lock(ctx);
2593         list_del(&ctx->list);
2594         coda_unlock(ctx);
2595 
2596         dma_free_writecombine(&dev->plat_dev->dev, ctx->bitstream.size,
2597                 ctx->bitstream.vaddr, ctx->bitstream.paddr);
2598         coda_free_context_buffers(ctx);
2599         if (ctx->dev->devtype->product == CODA_DX6)
2600                 coda_free_aux_buf(dev, &ctx->workbuf);
2601 
2602         coda_free_aux_buf(dev, &ctx->parabuf);
2603         v4l2_ctrl_handler_free(&ctx->ctrls);
2604         clk_disable_unprepare(dev->clk_ahb);
2605         clk_disable_unprepare(dev->clk_per);
2606         v4l2_fh_del(&ctx->fh);
2607         v4l2_fh_exit(&ctx->fh);
2608         clear_bit(ctx->idx, &dev->instance_mask);
2609         kfree(ctx);
2610 
2611         return 0;
2612 }
2613 
2614 static unsigned int coda_poll(struct file *file,
2615                                  struct poll_table_struct *wait)
2616 {
2617         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
2618         int ret;
2619 
2620         coda_lock(ctx);
2621         ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
2622         coda_unlock(ctx);
2623         return ret;
2624 }
2625 
2626 static int coda_mmap(struct file *file, struct vm_area_struct *vma)
2627 {
2628         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
2629 
2630         return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
2631 }
2632 
2633 static const struct v4l2_file_operations coda_fops = {
2634         .owner          = THIS_MODULE,
2635         .open           = coda_open,
2636         .release        = coda_release,
2637         .poll           = coda_poll,
2638         .unlocked_ioctl = video_ioctl2,
2639         .mmap           = coda_mmap,
2640 };
2641 
2642 static void coda_finish_decode(struct coda_ctx *ctx)
2643 {
2644         struct coda_dev *dev = ctx->dev;
2645         struct coda_q_data *q_data_src;
2646         struct coda_q_data *q_data_dst;
2647         struct vb2_buffer *dst_buf;
2648         int width, height;
2649         int decoded_idx;
2650         int display_idx;
2651         u32 src_fourcc;
2652         int success;
2653         u32 val;
2654 
2655         dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
2656 
2657         /* Update kfifo out pointer from coda bitstream read pointer */
2658         coda_kfifo_sync_from_device(ctx);
2659 
2660         /*
2661          * in stream-end mode, the read pointer can overshoot the write pointer
2662          * by up to 512 bytes
2663          */
2664         if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) {
2665                 if (coda_get_bitstream_payload(ctx) >= 0x100000 - 512)
2666                         kfifo_init(&ctx->bitstream_fifo,
2667                                 ctx->bitstream.vaddr, ctx->bitstream.size);
2668         }
2669 
2670         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2671         src_fourcc = q_data_src->fourcc;
2672 
2673         val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS);
2674         if (val != 1)
2675                 pr_err("DEC_PIC_SUCCESS = %d\n", val);
2676 
2677         success = val & 0x1;
2678         if (!success)
2679                 v4l2_err(&dev->v4l2_dev, "decode failed\n");
2680 
2681         if (src_fourcc == V4L2_PIX_FMT_H264) {
2682                 if (val & (1 << 3))
2683                         v4l2_err(&dev->v4l2_dev,
2684                                  "insufficient PS buffer space (%d bytes)\n",
2685                                  ctx->psbuf.size);
2686                 if (val & (1 << 2))
2687                         v4l2_err(&dev->v4l2_dev,
2688                                  "insufficient slice buffer space (%d bytes)\n",
2689                                  ctx->slicebuf.size);
2690         }
2691 
2692         val = coda_read(dev, CODA_RET_DEC_PIC_SIZE);
2693         width = (val >> 16) & 0xffff;
2694         height = val & 0xffff;
2695 
2696         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2697 
2698         val = coda_read(dev, CODA_RET_DEC_PIC_TYPE);
2699         if ((val & 0x7) == 0) {
2700                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
2701                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
2702         } else {
2703                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
2704                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
2705         }
2706 
2707         val = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB);
2708         if (val > 0)
2709                 v4l2_err(&dev->v4l2_dev,
2710                          "errors in %d macroblocks\n", val);
2711 
2712         if (dev->devtype->product == CODA_7541) {
2713                 val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
2714                 if (val == 0) {
2715                         /* not enough bitstream data */
2716                         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2717                                  "prescan failed: %d\n", val);
2718                         ctx->prescan_failed = true;
2719                         return;
2720                 }
2721         }
2722 
2723         ctx->frm_dis_flg = coda_read(dev, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
2724 
2725         /*
2726          * The previous display frame was copied out by the rotator,
2727          * now it can be overwritten again
2728          */
2729         if (ctx->display_idx >= 0 &&
2730             ctx->display_idx < ctx->num_internal_frames) {
2731                 ctx->frm_dis_flg &= ~(1 << ctx->display_idx);
2732                 coda_write(dev, ctx->frm_dis_flg,
2733                                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
2734         }
2735 
2736         /*
2737          * The index of the last decoded frame, not necessarily in
2738          * display order, and the index of the next display frame.
2739          * The latter could have been decoded in a previous run.
2740          */
2741         decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX);
2742         display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX);
2743 
2744         if (decoded_idx == -1) {
2745                 /* no frame was decoded, but we might have a display frame */
2746                 if (display_idx < 0 && ctx->display_idx < 0)
2747                         ctx->prescan_failed = true;
2748         } else if (decoded_idx == -2) {
2749                 /* no frame was decoded, we still return the remaining buffers */
2750         } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) {
2751                 v4l2_err(&dev->v4l2_dev,
2752                          "decoded frame index out of range: %d\n", decoded_idx);
2753         }
2754 
2755         if (display_idx == -1) {
2756                 /*
2757                  * no more frames to be decoded, but there could still
2758                  * be rotator output to dequeue
2759                  */
2760                 ctx->prescan_failed = true;
2761         } else if (display_idx == -3) {
2762                 /* possibly prescan failure */
2763         } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) {
2764                 v4l2_err(&dev->v4l2_dev,
2765                          "presentation frame index out of range: %d\n",
2766                          display_idx);
2767         }
2768 
2769         /* If a frame was copied out, return it */
2770         if (ctx->display_idx >= 0 &&
2771             ctx->display_idx < ctx->num_internal_frames) {
2772                 dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
2773                 dst_buf->v4l2_buf.sequence = ctx->osequence++;
2774 
2775                 vb2_set_plane_payload(dst_buf, 0, width * height * 3 / 2);
2776 
2777                 v4l2_m2m_buf_done(dst_buf, success ? VB2_BUF_STATE_DONE :
2778                                                      VB2_BUF_STATE_ERROR);
2779 
2780                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2781                         "job finished: decoding frame (%d) (%s)\n",
2782                         dst_buf->v4l2_buf.sequence,
2783                         (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
2784                         "KEYFRAME" : "PFRAME");
2785         } else {
2786                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2787                         "job finished: no frame decoded\n");
2788         }
2789 
2790         /* The rotator will copy the current display frame next time */
2791         ctx->display_idx = display_idx;
2792 }
2793 
2794 static void coda_finish_encode(struct coda_ctx *ctx)
2795 {
2796         struct vb2_buffer *src_buf, *dst_buf;
2797         struct coda_dev *dev = ctx->dev;
2798         u32 wr_ptr, start_ptr;
2799 
2800         src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
2801         dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
2802 
2803         /* Get results from the coda */
2804         start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
2805         wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
2806 
2807         /* Calculate bytesused field */
2808         if (dst_buf->v4l2_buf.sequence == 0) {
2809                 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr +
2810                                         ctx->vpu_header_size[0] +
2811                                         ctx->vpu_header_size[1] +
2812                                         ctx->vpu_header_size[2]);
2813         } else {
2814                 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr);
2815         }
2816 
2817         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
2818                  wr_ptr - start_ptr);
2819 
2820         coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
2821         coda_read(dev, CODA_RET_ENC_PIC_FLAG);
2822 
2823         if (coda_read(dev, CODA_RET_ENC_PIC_TYPE) == 0) {
2824                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
2825                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
2826         } else {
2827                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
2828                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
2829         }
2830 
2831         dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp;
2832         dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
2833         dst_buf->v4l2_buf.flags |=
2834                 src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
2835         dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode;
2836 
2837         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
2838         v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
2839 
2840         ctx->gopcounter--;
2841         if (ctx->gopcounter < 0)
2842                 ctx->gopcounter = ctx->params.gop_size - 1;
2843 
2844         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2845                 "job finished: encoding frame (%d) (%s)\n",
2846                 dst_buf->v4l2_buf.sequence,
2847                 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
2848                 "KEYFRAME" : "PFRAME");
2849 }
2850 
2851 static irqreturn_t coda_irq_handler(int irq, void *data)
2852 {
2853         struct coda_dev *dev = data;
2854         struct coda_ctx *ctx;
2855 
2856         cancel_delayed_work(&dev->timeout);
2857 
2858         /* read status register to attend the IRQ */
2859         coda_read(dev, CODA_REG_BIT_INT_STATUS);
2860         coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
2861                       CODA_REG_BIT_INT_CLEAR);
2862 
2863         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
2864         if (ctx == NULL) {
2865                 v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
2866                 mutex_unlock(&dev->coda_mutex);
2867                 return IRQ_HANDLED;
2868         }
2869 
2870         if (ctx->aborting) {
2871                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2872                          "task has been aborted\n");
2873                 goto out;
2874         }
2875 
2876         if (coda_isbusy(ctx->dev)) {
2877                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2878                          "coda is still busy!!!!\n");
2879                 return IRQ_NONE;
2880         }
2881 
2882         if (ctx->inst_type == CODA_INST_DECODER)
2883                 coda_finish_decode(ctx);
2884         else
2885                 coda_finish_encode(ctx);
2886 
2887 out:
2888         if (ctx->aborting || (!ctx->streamon_cap && !ctx->streamon_out)) {
2889                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2890                          "%s: sent command 'SEQ_END' to coda\n", __func__);
2891                 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
2892                         v4l2_err(&dev->v4l2_dev,
2893                                  "CODA_COMMAND_SEQ_END failed\n");
2894                 }
2895 
2896                 kfifo_init(&ctx->bitstream_fifo,
2897                         ctx->bitstream.vaddr, ctx->bitstream.size);
2898 
2899                 coda_free_framebuffers(ctx);
2900                 coda_free_context_buffers(ctx);
2901         }
2902 
2903         mutex_unlock(&dev->coda_mutex);
2904         mutex_unlock(&ctx->buffer_mutex);
2905 
2906         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
2907 
2908         return IRQ_HANDLED;
2909 }
2910 
2911 static void coda_timeout(struct work_struct *work)
2912 {
2913         struct coda_ctx *ctx;
2914         struct coda_dev *dev = container_of(to_delayed_work(work),
2915                                             struct coda_dev, timeout);
2916 
2917         dev_err(&dev->plat_dev->dev, "CODA PIC_RUN timeout, stopping all streams\n");
2918 
2919         mutex_lock(&dev->dev_mutex);
2920         list_for_each_entry(ctx, &dev->instances, list) {
2921                 if (mutex_is_locked(&ctx->buffer_mutex))
2922                         mutex_unlock(&ctx->buffer_mutex);
2923                 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2924                 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2925         }
2926         mutex_unlock(&dev->dev_mutex);
2927 
2928         mutex_unlock(&dev->coda_mutex);
2929         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
2930         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
2931 }
2932 
2933 static u32 coda_supported_firmwares[] = {
2934         CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
2935         CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
2936 };
2937 
2938 static bool coda_firmware_supported(u32 vernum)
2939 {
2940         int i;
2941 
2942         for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
2943                 if (vernum == coda_supported_firmwares[i])
2944                         return true;
2945         return false;
2946 }
2947 
2948 static int coda_hw_init(struct coda_dev *dev)
2949 {
2950         u16 product, major, minor, release;
2951         u32 data;
2952         u16 *p;
2953         int i, ret;
2954 
2955         ret = clk_prepare_enable(dev->clk_per);
2956         if (ret)
2957                 return ret;
2958 
2959         ret = clk_prepare_enable(dev->clk_ahb);
2960         if (ret)
2961                 goto err_clk_ahb;
2962 
2963         /*
2964          * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
2965          * The 16-bit chars in the code buffer are in memory access
2966          * order, re-sort them to CODA order for register download.
2967          * Data in this SRAM survives a reboot.
2968          */
2969         p = (u16 *)dev->codebuf.vaddr;
2970         if (dev->devtype->product == CODA_DX6) {
2971                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++)  {
2972                         data = CODA_DOWN_ADDRESS_SET(i) |
2973                                 CODA_DOWN_DATA_SET(p[i ^ 1]);
2974                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
2975                 }
2976         } else {
2977                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
2978                         data = CODA_DOWN_ADDRESS_SET(i) |
2979                                 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
2980                                                         3 - (i % 4)]);
2981                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
2982                 }
2983         }
2984 
2985         /* Clear registers */
2986         for (i = 0; i < 64; i++)
2987                 coda_write(dev, 0, CODA_REG_BIT_CODE_BUF_ADDR + i * 4);
2988 
2989         /* Tell the BIT where to find everything it needs */
2990         if (dev->devtype->product == CODA_7541) {
2991                 coda_write(dev, dev->tempbuf.paddr,
2992                                 CODA_REG_BIT_TEMP_BUF_ADDR);
2993                 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
2994         } else {
2995                 coda_write(dev, dev->workbuf.paddr,
2996                               CODA_REG_BIT_WORK_BUF_ADDR);
2997         }
2998         coda_write(dev, dev->codebuf.paddr,
2999                       CODA_REG_BIT_CODE_BUF_ADDR);
3000         coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
3001 
3002         /* Set default values */
3003         switch (dev->devtype->product) {
3004         case CODA_DX6:
3005                 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
3006                 break;
3007         default:
3008                 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
3009         }
3010         coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
3011 
3012         if (dev->devtype->product != CODA_DX6)
3013                 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
3014 
3015         coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
3016                       CODA_REG_BIT_INT_ENABLE);
3017 
3018         /* Reset VPU and start processor */
3019         data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
3020         data |= CODA_REG_RESET_ENABLE;
3021         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
3022         udelay(10);
3023         data &= ~CODA_REG_RESET_ENABLE;
3024         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
3025         coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
3026 
3027         /* Load firmware */
3028         coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
3029         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
3030         coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
3031         coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
3032         coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
3033         if (coda_wait_timeout(dev)) {
3034                 clk_disable_unprepare(dev->clk_per);
3035                 clk_disable_unprepare(dev->clk_ahb);
3036                 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
3037                 return -EIO;
3038         }
3039 
3040         /* Check we are compatible with the loaded firmware */
3041         data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
3042         product = CODA_FIRMWARE_PRODUCT(data);
3043         major = CODA_FIRMWARE_MAJOR(data);
3044         minor = CODA_FIRMWARE_MINOR(data);
3045         release = CODA_FIRMWARE_RELEASE(data);
3046 
3047         clk_disable_unprepare(dev->clk_per);
3048         clk_disable_unprepare(dev->clk_ahb);
3049 
3050         if (product != dev->devtype->product) {
3051                 v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
3052                          " Version: %u.%u.%u\n",
3053                          coda_product_name(dev->devtype->product),
3054                          coda_product_name(product), major, minor, release);
3055                 return -EINVAL;
3056         }
3057 
3058         v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
3059                   coda_product_name(product));
3060 
3061         if (coda_firmware_supported(data)) {
3062                 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
3063                           major, minor, release);
3064         } else {
3065                 v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
3066                           "%u.%u.%u\n", major, minor, release);
3067         }
3068 
3069         return 0;
3070 
3071 err_clk_ahb:
3072         clk_disable_unprepare(dev->clk_per);
3073         return ret;
3074 }
3075 
3076 static void coda_fw_callback(const struct firmware *fw, void *context)
3077 {
3078         struct coda_dev *dev = context;
3079         struct platform_device *pdev = dev->plat_dev;
3080         int ret;
3081 
3082         if (!fw) {
3083                 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
3084                 return;
3085         }
3086 
3087         /* allocate auxiliary per-device code buffer for the BIT processor */
3088         ret = coda_alloc_aux_buf(dev, &dev->codebuf, fw->size);
3089         if (ret < 0) {
3090                 dev_err(&pdev->dev, "failed to allocate code buffer\n");
3091                 return;
3092         }
3093 
3094         /* Copy the whole firmware image to the code buffer */
3095         memcpy(dev->codebuf.vaddr, fw->data, fw->size);
3096         release_firmware(fw);
3097 
3098         ret = coda_hw_init(dev);
3099         if (ret) {
3100                 v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
3101                 return;
3102         }
3103 
3104         dev->vfd.fops   = &coda_fops,
3105         dev->vfd.ioctl_ops      = &coda_ioctl_ops;
3106         dev->vfd.release        = video_device_release_empty,
3107         dev->vfd.lock   = &dev->dev_mutex;
3108         dev->vfd.v4l2_dev       = &dev->v4l2_dev;
3109         dev->vfd.vfl_dir        = VFL_DIR_M2M;
3110         snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
3111         video_set_drvdata(&dev->vfd, dev);
3112 
3113         dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
3114         if (IS_ERR(dev->alloc_ctx)) {
3115                 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
3116                 return;
3117         }
3118 
3119         dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
3120         if (IS_ERR(dev->m2m_dev)) {
3121                 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
3122                 goto rel_ctx;
3123         }
3124 
3125         ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
3126         if (ret) {
3127                 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
3128                 goto rel_m2m;
3129         }
3130         v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
3131                   dev->vfd.num);
3132 
3133         return;
3134 
3135 rel_m2m:
3136         v4l2_m2m_release(dev->m2m_dev);
3137 rel_ctx:
3138         vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
3139 }
3140 
3141 static int coda_firmware_request(struct coda_dev *dev)
3142 {
3143         char *fw = dev->devtype->firmware;
3144 
3145         dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
3146                 coda_product_name(dev->devtype->product));
3147 
3148         return request_firmware_nowait(THIS_MODULE, true,
3149                 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
3150 }
3151 
3152 enum coda_platform {
3153         CODA_IMX27,
3154         CODA_IMX53,
3155 };
3156 
3157 static const struct coda_devtype coda_devdata[] = {
3158         [CODA_IMX27] = {
3159                 .firmware   = "v4l-codadx6-imx27.bin",
3160                 .product    = CODA_DX6,
3161                 .codecs     = codadx6_codecs,
3162                 .num_codecs = ARRAY_SIZE(codadx6_codecs),
3163         },
3164         [CODA_IMX53] = {
3165                 .firmware   = "v4l-coda7541-imx53.bin",
3166                 .product    = CODA_7541,
3167                 .codecs     = coda7_codecs,
3168                 .num_codecs = ARRAY_SIZE(coda7_codecs),
3169         },
3170 };
3171 
3172 static struct platform_device_id coda_platform_ids[] = {
3173         { .name = "coda-imx27", .driver_data = CODA_IMX27 },
3174         { .name = "coda-imx53", .driver_data = CODA_IMX53 },
3175         { /* sentinel */ }
3176 };
3177 MODULE_DEVICE_TABLE(platform, coda_platform_ids);
3178 
3179 #ifdef CONFIG_OF
3180 static const struct of_device_id coda_dt_ids[] = {
3181         { .compatible = "fsl,imx27-vpu", .data = &coda_devdata[CODA_IMX27] },
3182         { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
3183         { /* sentinel */ }
3184 };
3185 MODULE_DEVICE_TABLE(of, coda_dt_ids);
3186 #endif
3187 
3188 static int coda_probe(struct platform_device *pdev)
3189 {
3190         const struct of_device_id *of_id =
3191                         of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
3192         const struct platform_device_id *pdev_id;
3193         struct coda_platform_data *pdata = pdev->dev.platform_data;
3194         struct device_node *np = pdev->dev.of_node;
3195         struct gen_pool *pool;
3196         struct coda_dev *dev;
3197         struct resource *res;
3198         int ret, irq;
3199 
3200         dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
3201         if (!dev) {
3202                 dev_err(&pdev->dev, "Not enough memory for %s\n",
3203                         CODA_NAME);
3204                 return -ENOMEM;
3205         }
3206 
3207         spin_lock_init(&dev->irqlock);
3208         INIT_LIST_HEAD(&dev->instances);
3209         INIT_DELAYED_WORK(&dev->timeout, coda_timeout);
3210 
3211         dev->plat_dev = pdev;
3212         dev->clk_per = devm_clk_get(&pdev->dev, "per");
3213         if (IS_ERR(dev->clk_per)) {
3214                 dev_err(&pdev->dev, "Could not get per clock\n");
3215                 return PTR_ERR(dev->clk_per);
3216         }
3217 
3218         dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
3219         if (IS_ERR(dev->clk_ahb)) {
3220                 dev_err(&pdev->dev, "Could not get ahb clock\n");
3221                 return PTR_ERR(dev->clk_ahb);
3222         }
3223 
3224         /* Get  memory for physical registers */
3225         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3226         dev->regs_base = devm_ioremap_resource(&pdev->dev, res);
3227         if (IS_ERR(dev->regs_base))
3228                 return PTR_ERR(dev->regs_base);
3229 
3230         /* IRQ */
3231         irq = platform_get_irq(pdev, 0);
3232         if (irq < 0) {
3233                 dev_err(&pdev->dev, "failed to get irq resource\n");
3234                 return -ENOENT;
3235         }
3236 
3237         if (devm_request_threaded_irq(&pdev->dev, irq, NULL, coda_irq_handler,
3238                 IRQF_ONESHOT, CODA_NAME, dev) < 0) {
3239                 dev_err(&pdev->dev, "failed to request irq\n");
3240                 return -ENOENT;
3241         }
3242 
3243         /* Get IRAM pool from device tree or platform data */
3244         pool = of_get_named_gen_pool(np, "iram", 0);
3245         if (!pool && pdata)
3246                 pool = dev_get_gen_pool(pdata->iram_dev);
3247         if (!pool) {
3248                 dev_err(&pdev->dev, "iram pool not available\n");
3249                 return -ENOMEM;
3250         }
3251         dev->iram_pool = pool;
3252 
3253         ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
3254         if (ret)
3255                 return ret;
3256 
3257         mutex_init(&dev->dev_mutex);
3258         mutex_init(&dev->coda_mutex);
3259 
3260         pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
3261 
3262         if (of_id) {
3263                 dev->devtype = of_id->data;
3264         } else if (pdev_id) {
3265                 dev->devtype = &coda_devdata[pdev_id->driver_data];
3266         } else {
3267                 v4l2_device_unregister(&dev->v4l2_dev);
3268                 return -EINVAL;
3269         }
3270 
3271         /* allocate auxiliary per-device buffers for the BIT processor */
3272         switch (dev->devtype->product) {
3273         case CODA_DX6:
3274                 ret = coda_alloc_aux_buf(dev, &dev->workbuf,
3275                                          CODADX6_WORK_BUF_SIZE);
3276                 if (ret < 0) {
3277                         dev_err(&pdev->dev, "failed to allocate work buffer\n");
3278                         v4l2_device_unregister(&dev->v4l2_dev);
3279                         return ret;
3280                 }
3281                 break;
3282         case CODA_7541:
3283                 dev->tempbuf.size = CODA7_TEMP_BUF_SIZE;
3284                 break;
3285         }
3286         if (dev->tempbuf.size) {
3287                 ret = coda_alloc_aux_buf(dev, &dev->tempbuf,
3288                                          dev->tempbuf.size);
3289                 if (ret < 0) {
3290                         dev_err(&pdev->dev, "failed to allocate temp buffer\n");
3291                         v4l2_device_unregister(&dev->v4l2_dev);
3292                         return ret;
3293                 }
3294         }
3295 
3296         switch (dev->devtype->product) {
3297         case CODA_DX6:
3298                 dev->iram_size = CODADX6_IRAM_SIZE;
3299                 break;
3300         case CODA_7541:
3301                 dev->iram_size = CODA7_IRAM_SIZE;
3302                 break;
3303         }
3304         dev->iram_vaddr = (unsigned long)gen_pool_dma_alloc(dev->iram_pool,
3305                         dev->iram_size, (dma_addr_t *)&dev->iram_paddr);
3306         if (!dev->iram_vaddr) {
3307                 dev_err(&pdev->dev, "unable to alloc iram\n");
3308                 return -ENOMEM;
3309         }
3310 
3311         platform_set_drvdata(pdev, dev);
3312 
3313         return coda_firmware_request(dev);
3314 }
3315 
3316 static int coda_remove(struct platform_device *pdev)
3317 {
3318         struct coda_dev *dev = platform_get_drvdata(pdev);
3319 
3320         video_unregister_device(&dev->vfd);
3321         if (dev->m2m_dev)
3322                 v4l2_m2m_release(dev->m2m_dev);
3323         if (dev->alloc_ctx)
3324                 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
3325         v4l2_device_unregister(&dev->v4l2_dev);
3326         if (dev->iram_vaddr)
3327                 gen_pool_free(dev->iram_pool, dev->iram_vaddr, dev->iram_size);
3328         coda_free_aux_buf(dev, &dev->codebuf);
3329         coda_free_aux_buf(dev, &dev->tempbuf);
3330         coda_free_aux_buf(dev, &dev->workbuf);
3331         return 0;
3332 }
3333 
3334 static struct platform_driver coda_driver = {
3335         .probe  = coda_probe,
3336         .remove = coda_remove,
3337         .driver = {
3338                 .name   = CODA_NAME,
3339                 .owner  = THIS_MODULE,
3340                 .of_match_table = of_match_ptr(coda_dt_ids),
3341         },
3342         .id_table = coda_platform_ids,
3343 };
3344 
3345 module_platform_driver(coda_driver);
3346 
3347 MODULE_LICENSE("GPL");
3348 MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
3349 MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");
3350 

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