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Linux/drivers/mailbox/mailbox-omap2.c

  1 /*
  2  * Mailbox reservation modules for OMAP2/3
  3  *
  4  * Copyright (C) 2006-2009 Nokia Corporation
  5  * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
  6  *        and  Paul Mundt
  7  *
  8  * This file is subject to the terms and conditions of the GNU General Public
  9  * License.  See the file "COPYING" in the main directory of this archive
 10  * for more details.
 11  */
 12 
 13 #include <linux/module.h>
 14 #include <linux/slab.h>
 15 #include <linux/clk.h>
 16 #include <linux/err.h>
 17 #include <linux/platform_device.h>
 18 #include <linux/io.h>
 19 #include <linux/pm_runtime.h>
 20 #include <linux/platform_data/mailbox-omap.h>
 21 
 22 #include "omap-mbox.h"
 23 
 24 #define MAILBOX_REVISION                0x000
 25 #define MAILBOX_MESSAGE(m)              (0x040 + 4 * (m))
 26 #define MAILBOX_FIFOSTATUS(m)           (0x080 + 4 * (m))
 27 #define MAILBOX_MSGSTATUS(m)            (0x0c0 + 4 * (m))
 28 #define MAILBOX_IRQSTATUS(u)            (0x100 + 8 * (u))
 29 #define MAILBOX_IRQENABLE(u)            (0x104 + 8 * (u))
 30 
 31 #define OMAP4_MAILBOX_IRQSTATUS(u)      (0x104 + 0x10 * (u))
 32 #define OMAP4_MAILBOX_IRQENABLE(u)      (0x108 + 0x10 * (u))
 33 #define OMAP4_MAILBOX_IRQENABLE_CLR(u)  (0x10c + 0x10 * (u))
 34 
 35 #define MAILBOX_IRQ_NEWMSG(m)           (1 << (2 * (m)))
 36 #define MAILBOX_IRQ_NOTFULL(m)          (1 << (2 * (m) + 1))
 37 
 38 #define MBOX_REG_SIZE                   0x120
 39 
 40 #define OMAP4_MBOX_REG_SIZE             0x130
 41 
 42 #define MBOX_NR_REGS                    (MBOX_REG_SIZE / sizeof(u32))
 43 #define OMAP4_MBOX_NR_REGS              (OMAP4_MBOX_REG_SIZE / sizeof(u32))
 44 
 45 static void __iomem *mbox_base;
 46 
 47 struct omap_mbox2_fifo {
 48         unsigned long msg;
 49         unsigned long fifo_stat;
 50         unsigned long msg_stat;
 51 };
 52 
 53 struct omap_mbox2_priv {
 54         struct omap_mbox2_fifo tx_fifo;
 55         struct omap_mbox2_fifo rx_fifo;
 56         unsigned long irqenable;
 57         unsigned long irqstatus;
 58         u32 newmsg_bit;
 59         u32 notfull_bit;
 60         u32 ctx[OMAP4_MBOX_NR_REGS];
 61         unsigned long irqdisable;
 62         u32 intr_type;
 63 };
 64 
 65 static inline unsigned int mbox_read_reg(size_t ofs)
 66 {
 67         return __raw_readl(mbox_base + ofs);
 68 }
 69 
 70 static inline void mbox_write_reg(u32 val, size_t ofs)
 71 {
 72         __raw_writel(val, mbox_base + ofs);
 73 }
 74 
 75 /* Mailbox H/W preparations */
 76 static int omap2_mbox_startup(struct omap_mbox *mbox)
 77 {
 78         u32 l;
 79 
 80         pm_runtime_enable(mbox->dev->parent);
 81         pm_runtime_get_sync(mbox->dev->parent);
 82 
 83         l = mbox_read_reg(MAILBOX_REVISION);
 84         pr_debug("omap mailbox rev %d.%d\n", (l & 0xf0) >> 4, (l & 0x0f));
 85 
 86         return 0;
 87 }
 88 
 89 static void omap2_mbox_shutdown(struct omap_mbox *mbox)
 90 {
 91         pm_runtime_put_sync(mbox->dev->parent);
 92         pm_runtime_disable(mbox->dev->parent);
 93 }
 94 
 95 /* Mailbox FIFO handle functions */
 96 static mbox_msg_t omap2_mbox_fifo_read(struct omap_mbox *mbox)
 97 {
 98         struct omap_mbox2_fifo *fifo =
 99                 &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo;
100         return (mbox_msg_t) mbox_read_reg(fifo->msg);
101 }
102 
103 static void omap2_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
104 {
105         struct omap_mbox2_fifo *fifo =
106                 &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo;
107         mbox_write_reg(msg, fifo->msg);
108 }
109 
110 static int omap2_mbox_fifo_empty(struct omap_mbox *mbox)
111 {
112         struct omap_mbox2_fifo *fifo =
113                 &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo;
114         return (mbox_read_reg(fifo->msg_stat) == 0);
115 }
116 
117 static int omap2_mbox_fifo_full(struct omap_mbox *mbox)
118 {
119         struct omap_mbox2_fifo *fifo =
120                 &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo;
121         return mbox_read_reg(fifo->fifo_stat);
122 }
123 
124 /* Mailbox IRQ handle functions */
125 static void omap2_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
126 {
127         struct omap_mbox2_priv *p = mbox->priv;
128         u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
129 
130         l = mbox_read_reg(p->irqenable);
131         l |= bit;
132         mbox_write_reg(l, p->irqenable);
133 }
134 
135 static void omap2_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
136 {
137         struct omap_mbox2_priv *p = mbox->priv;
138         u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
139 
140         /*
141          * Read and update the interrupt configuration register for pre-OMAP4.
142          * OMAP4 and later SoCs have a dedicated interrupt disabling register.
143          */
144         if (!p->intr_type)
145                 bit = mbox_read_reg(p->irqdisable) & ~bit;
146 
147         mbox_write_reg(bit, p->irqdisable);
148 }
149 
150 static void omap2_mbox_ack_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
151 {
152         struct omap_mbox2_priv *p = mbox->priv;
153         u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
154 
155         mbox_write_reg(bit, p->irqstatus);
156 
157         /* Flush posted write for irq status to avoid spurious interrupts */
158         mbox_read_reg(p->irqstatus);
159 }
160 
161 static int omap2_mbox_is_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
162 {
163         struct omap_mbox2_priv *p = mbox->priv;
164         u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
165         u32 enable = mbox_read_reg(p->irqenable);
166         u32 status = mbox_read_reg(p->irqstatus);
167 
168         return (int)(enable & status & bit);
169 }
170 
171 static void omap2_mbox_save_ctx(struct omap_mbox *mbox)
172 {
173         int i;
174         struct omap_mbox2_priv *p = mbox->priv;
175         int nr_regs;
176 
177         if (p->intr_type)
178                 nr_regs = OMAP4_MBOX_NR_REGS;
179         else
180                 nr_regs = MBOX_NR_REGS;
181         for (i = 0; i < nr_regs; i++) {
182                 p->ctx[i] = mbox_read_reg(i * sizeof(u32));
183 
184                 dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
185                         i, p->ctx[i]);
186         }
187 }
188 
189 static void omap2_mbox_restore_ctx(struct omap_mbox *mbox)
190 {
191         int i;
192         struct omap_mbox2_priv *p = mbox->priv;
193         int nr_regs;
194 
195         if (p->intr_type)
196                 nr_regs = OMAP4_MBOX_NR_REGS;
197         else
198                 nr_regs = MBOX_NR_REGS;
199         for (i = 0; i < nr_regs; i++) {
200                 mbox_write_reg(p->ctx[i], i * sizeof(u32));
201 
202                 dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
203                         i, p->ctx[i]);
204         }
205 }
206 
207 static struct omap_mbox_ops omap2_mbox_ops = {
208         .type           = OMAP_MBOX_TYPE2,
209         .startup        = omap2_mbox_startup,
210         .shutdown       = omap2_mbox_shutdown,
211         .fifo_read      = omap2_mbox_fifo_read,
212         .fifo_write     = omap2_mbox_fifo_write,
213         .fifo_empty     = omap2_mbox_fifo_empty,
214         .fifo_full      = omap2_mbox_fifo_full,
215         .enable_irq     = omap2_mbox_enable_irq,
216         .disable_irq    = omap2_mbox_disable_irq,
217         .ack_irq        = omap2_mbox_ack_irq,
218         .is_irq         = omap2_mbox_is_irq,
219         .save_ctx       = omap2_mbox_save_ctx,
220         .restore_ctx    = omap2_mbox_restore_ctx,
221 };
222 
223 static int omap2_mbox_probe(struct platform_device *pdev)
224 {
225         struct resource *mem;
226         int ret;
227         struct omap_mbox **list, *mbox, *mboxblk;
228         struct omap_mbox2_priv *priv, *privblk;
229         struct omap_mbox_pdata *pdata = pdev->dev.platform_data;
230         struct omap_mbox_dev_info *info;
231         int i;
232 
233         if (!pdata || !pdata->info_cnt || !pdata->info) {
234                 pr_err("%s: platform not supported\n", __func__);
235                 return -ENODEV;
236         }
237 
238         /* allocate one extra for marking end of list */
239         list = kzalloc((pdata->info_cnt + 1) * sizeof(*list), GFP_KERNEL);
240         if (!list)
241                 return -ENOMEM;
242 
243         mboxblk = mbox = kzalloc(pdata->info_cnt * sizeof(*mbox), GFP_KERNEL);
244         if (!mboxblk) {
245                 ret = -ENOMEM;
246                 goto free_list;
247         }
248 
249         privblk = priv = kzalloc(pdata->info_cnt * sizeof(*priv), GFP_KERNEL);
250         if (!privblk) {
251                 ret = -ENOMEM;
252                 goto free_mboxblk;
253         }
254 
255         info = pdata->info;
256         for (i = 0; i < pdata->info_cnt; i++, info++, priv++) {
257                 priv->tx_fifo.msg = MAILBOX_MESSAGE(info->tx_id);
258                 priv->tx_fifo.fifo_stat = MAILBOX_FIFOSTATUS(info->tx_id);
259                 priv->rx_fifo.msg =  MAILBOX_MESSAGE(info->rx_id);
260                 priv->rx_fifo.msg_stat =  MAILBOX_MSGSTATUS(info->rx_id);
261                 priv->notfull_bit = MAILBOX_IRQ_NOTFULL(info->tx_id);
262                 priv->newmsg_bit = MAILBOX_IRQ_NEWMSG(info->rx_id);
263                 if (pdata->intr_type) {
264                         priv->irqenable = OMAP4_MAILBOX_IRQENABLE(info->usr_id);
265                         priv->irqstatus = OMAP4_MAILBOX_IRQSTATUS(info->usr_id);
266                         priv->irqdisable =
267                                 OMAP4_MAILBOX_IRQENABLE_CLR(info->usr_id);
268                 } else {
269                         priv->irqenable = MAILBOX_IRQENABLE(info->usr_id);
270                         priv->irqstatus = MAILBOX_IRQSTATUS(info->usr_id);
271                         priv->irqdisable = MAILBOX_IRQENABLE(info->usr_id);
272                 }
273                 priv->intr_type = pdata->intr_type;
274 
275                 mbox->priv = priv;
276                 mbox->name = info->name;
277                 mbox->ops = &omap2_mbox_ops;
278                 mbox->irq = platform_get_irq(pdev, info->irq_id);
279                 if (mbox->irq < 0) {
280                         ret = mbox->irq;
281                         goto free_privblk;
282                 }
283                 list[i] = mbox++;
284         }
285 
286         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
287         if (!mem) {
288                 ret = -ENOENT;
289                 goto free_privblk;
290         }
291 
292         mbox_base = ioremap(mem->start, resource_size(mem));
293         if (!mbox_base) {
294                 ret = -ENOMEM;
295                 goto free_privblk;
296         }
297 
298         ret = omap_mbox_register(&pdev->dev, list);
299         if (ret)
300                 goto unmap_mbox;
301         platform_set_drvdata(pdev, list);
302 
303         return 0;
304 
305 unmap_mbox:
306         iounmap(mbox_base);
307 free_privblk:
308         kfree(privblk);
309 free_mboxblk:
310         kfree(mboxblk);
311 free_list:
312         kfree(list);
313         return ret;
314 }
315 
316 static int omap2_mbox_remove(struct platform_device *pdev)
317 {
318         struct omap_mbox2_priv *privblk;
319         struct omap_mbox **list = platform_get_drvdata(pdev);
320         struct omap_mbox *mboxblk = list[0];
321 
322         privblk = mboxblk->priv;
323         omap_mbox_unregister();
324         iounmap(mbox_base);
325         kfree(privblk);
326         kfree(mboxblk);
327         kfree(list);
328 
329         return 0;
330 }
331 
332 static struct platform_driver omap2_mbox_driver = {
333         .probe  = omap2_mbox_probe,
334         .remove = omap2_mbox_remove,
335         .driver = {
336                 .name = "omap-mailbox",
337         },
338 };
339 
340 static int __init omap2_mbox_init(void)
341 {
342         return platform_driver_register(&omap2_mbox_driver);
343 }
344 
345 static void __exit omap2_mbox_exit(void)
346 {
347         platform_driver_unregister(&omap2_mbox_driver);
348 }
349 
350 module_init(omap2_mbox_init);
351 module_exit(omap2_mbox_exit);
352 
353 MODULE_LICENSE("GPL v2");
354 MODULE_DESCRIPTION("omap mailbox: omap2/3/4 architecture specific functions");
355 MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>");
356 MODULE_AUTHOR("Paul Mundt");
357 MODULE_ALIAS("platform:omap2-mailbox");
358 

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