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Linux/drivers/input/serio/i8042.c

  1 /*
  2  *  i8042 keyboard and mouse controller driver for Linux
  3  *
  4  *  Copyright (c) 1999-2004 Vojtech Pavlik
  5  */
  6 
  7 /*
  8  * This program is free software; you can redistribute it and/or modify it
  9  * under the terms of the GNU General Public License version 2 as published by
 10  * the Free Software Foundation.
 11  */
 12 
 13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 14 
 15 #include <linux/types.h>
 16 #include <linux/delay.h>
 17 #include <linux/module.h>
 18 #include <linux/interrupt.h>
 19 #include <linux/ioport.h>
 20 #include <linux/init.h>
 21 #include <linux/serio.h>
 22 #include <linux/err.h>
 23 #include <linux/rcupdate.h>
 24 #include <linux/platform_device.h>
 25 #include <linux/i8042.h>
 26 #include <linux/slab.h>
 27 
 28 #include <asm/io.h>
 29 
 30 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
 31 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
 32 MODULE_LICENSE("GPL");
 33 
 34 static bool i8042_nokbd;
 35 module_param_named(nokbd, i8042_nokbd, bool, 0);
 36 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
 37 
 38 static bool i8042_noaux;
 39 module_param_named(noaux, i8042_noaux, bool, 0);
 40 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
 41 
 42 static bool i8042_nomux;
 43 module_param_named(nomux, i8042_nomux, bool, 0);
 44 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present.");
 45 
 46 static bool i8042_unlock;
 47 module_param_named(unlock, i8042_unlock, bool, 0);
 48 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
 49 
 50 static bool i8042_reset;
 51 module_param_named(reset, i8042_reset, bool, 0);
 52 MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
 53 
 54 static bool i8042_direct;
 55 module_param_named(direct, i8042_direct, bool, 0);
 56 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
 57 
 58 static bool i8042_dumbkbd;
 59 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
 60 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
 61 
 62 static bool i8042_noloop;
 63 module_param_named(noloop, i8042_noloop, bool, 0);
 64 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
 65 
 66 static bool i8042_notimeout;
 67 module_param_named(notimeout, i8042_notimeout, bool, 0);
 68 MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042");
 69 
 70 #ifdef CONFIG_X86
 71 static bool i8042_dritek;
 72 module_param_named(dritek, i8042_dritek, bool, 0);
 73 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension");
 74 #endif
 75 
 76 #ifdef CONFIG_PNP
 77 static bool i8042_nopnp;
 78 module_param_named(nopnp, i8042_nopnp, bool, 0);
 79 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
 80 #endif
 81 
 82 #define DEBUG
 83 #ifdef DEBUG
 84 static bool i8042_debug;
 85 module_param_named(debug, i8042_debug, bool, 0600);
 86 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
 87 #endif
 88 
 89 static bool i8042_bypass_aux_irq_test;
 90 static char i8042_kbd_firmware_id[128];
 91 static char i8042_aux_firmware_id[128];
 92 
 93 #include "i8042.h"
 94 
 95 /*
 96  * i8042_lock protects serialization between i8042_command and
 97  * the interrupt handler.
 98  */
 99 static DEFINE_SPINLOCK(i8042_lock);
100 
101 /*
102  * Writers to AUX and KBD ports as well as users issuing i8042_command
103  * directly should acquire i8042_mutex (by means of calling
104  * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that
105  * they do not disturb each other (unfortunately in many i8042
106  * implementations write to one of the ports will immediately abort
107  * command that is being processed by another port).
108  */
109 static DEFINE_MUTEX(i8042_mutex);
110 
111 struct i8042_port {
112         struct serio *serio;
113         int irq;
114         bool exists;
115         signed char mux;
116 };
117 
118 #define I8042_KBD_PORT_NO       0
119 #define I8042_AUX_PORT_NO       1
120 #define I8042_MUX_PORT_NO       2
121 #define I8042_NUM_PORTS         (I8042_NUM_MUX_PORTS + 2)
122 
123 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
124 
125 static unsigned char i8042_initial_ctr;
126 static unsigned char i8042_ctr;
127 static bool i8042_mux_present;
128 static bool i8042_kbd_irq_registered;
129 static bool i8042_aux_irq_registered;
130 static unsigned char i8042_suppress_kbd_ack;
131 static struct platform_device *i8042_platform_device;
132 
133 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
134 static bool (*i8042_platform_filter)(unsigned char data, unsigned char str,
135                                      struct serio *serio);
136 
137 void i8042_lock_chip(void)
138 {
139         mutex_lock(&i8042_mutex);
140 }
141 EXPORT_SYMBOL(i8042_lock_chip);
142 
143 void i8042_unlock_chip(void)
144 {
145         mutex_unlock(&i8042_mutex);
146 }
147 EXPORT_SYMBOL(i8042_unlock_chip);
148 
149 int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
150                                         struct serio *serio))
151 {
152         unsigned long flags;
153         int ret = 0;
154 
155         spin_lock_irqsave(&i8042_lock, flags);
156 
157         if (i8042_platform_filter) {
158                 ret = -EBUSY;
159                 goto out;
160         }
161 
162         i8042_platform_filter = filter;
163 
164 out:
165         spin_unlock_irqrestore(&i8042_lock, flags);
166         return ret;
167 }
168 EXPORT_SYMBOL(i8042_install_filter);
169 
170 int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
171                                        struct serio *port))
172 {
173         unsigned long flags;
174         int ret = 0;
175 
176         spin_lock_irqsave(&i8042_lock, flags);
177 
178         if (i8042_platform_filter != filter) {
179                 ret = -EINVAL;
180                 goto out;
181         }
182 
183         i8042_platform_filter = NULL;
184 
185 out:
186         spin_unlock_irqrestore(&i8042_lock, flags);
187         return ret;
188 }
189 EXPORT_SYMBOL(i8042_remove_filter);
190 
191 /*
192  * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
193  * be ready for reading values from it / writing values to it.
194  * Called always with i8042_lock held.
195  */
196 
197 static int i8042_wait_read(void)
198 {
199         int i = 0;
200 
201         while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
202                 udelay(50);
203                 i++;
204         }
205         return -(i == I8042_CTL_TIMEOUT);
206 }
207 
208 static int i8042_wait_write(void)
209 {
210         int i = 0;
211 
212         while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
213                 udelay(50);
214                 i++;
215         }
216         return -(i == I8042_CTL_TIMEOUT);
217 }
218 
219 /*
220  * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
221  * of the i8042 down the toilet.
222  */
223 
224 static int i8042_flush(void)
225 {
226         unsigned long flags;
227         unsigned char data, str;
228         int count = 0;
229         int retval = 0;
230 
231         spin_lock_irqsave(&i8042_lock, flags);
232 
233         while ((str = i8042_read_status()) & I8042_STR_OBF) {
234                 if (count++ < I8042_BUFFER_SIZE) {
235                         udelay(50);
236                         data = i8042_read_data();
237                         dbg("%02x <- i8042 (flush, %s)\n",
238                             data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
239                 } else {
240                         retval = -EIO;
241                         break;
242                 }
243         }
244 
245         spin_unlock_irqrestore(&i8042_lock, flags);
246 
247         return retval;
248 }
249 
250 /*
251  * i8042_command() executes a command on the i8042. It also sends the input
252  * parameter(s) of the commands to it, and receives the output value(s). The
253  * parameters are to be stored in the param array, and the output is placed
254  * into the same array. The number of the parameters and output values is
255  * encoded in bits 8-11 of the command number.
256  */
257 
258 static int __i8042_command(unsigned char *param, int command)
259 {
260         int i, error;
261 
262         if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
263                 return -1;
264 
265         error = i8042_wait_write();
266         if (error)
267                 return error;
268 
269         dbg("%02x -> i8042 (command)\n", command & 0xff);
270         i8042_write_command(command & 0xff);
271 
272         for (i = 0; i < ((command >> 12) & 0xf); i++) {
273                 error = i8042_wait_write();
274                 if (error)
275                         return error;
276                 dbg("%02x -> i8042 (parameter)\n", param[i]);
277                 i8042_write_data(param[i]);
278         }
279 
280         for (i = 0; i < ((command >> 8) & 0xf); i++) {
281                 error = i8042_wait_read();
282                 if (error) {
283                         dbg("     -- i8042 (timeout)\n");
284                         return error;
285                 }
286 
287                 if (command == I8042_CMD_AUX_LOOP &&
288                     !(i8042_read_status() & I8042_STR_AUXDATA)) {
289                         dbg("     -- i8042 (auxerr)\n");
290                         return -1;
291                 }
292 
293                 param[i] = i8042_read_data();
294                 dbg("%02x <- i8042 (return)\n", param[i]);
295         }
296 
297         return 0;
298 }
299 
300 int i8042_command(unsigned char *param, int command)
301 {
302         unsigned long flags;
303         int retval;
304 
305         spin_lock_irqsave(&i8042_lock, flags);
306         retval = __i8042_command(param, command);
307         spin_unlock_irqrestore(&i8042_lock, flags);
308 
309         return retval;
310 }
311 EXPORT_SYMBOL(i8042_command);
312 
313 /*
314  * i8042_kbd_write() sends a byte out through the keyboard interface.
315  */
316 
317 static int i8042_kbd_write(struct serio *port, unsigned char c)
318 {
319         unsigned long flags;
320         int retval = 0;
321 
322         spin_lock_irqsave(&i8042_lock, flags);
323 
324         if (!(retval = i8042_wait_write())) {
325                 dbg("%02x -> i8042 (kbd-data)\n", c);
326                 i8042_write_data(c);
327         }
328 
329         spin_unlock_irqrestore(&i8042_lock, flags);
330 
331         return retval;
332 }
333 
334 /*
335  * i8042_aux_write() sends a byte out through the aux interface.
336  */
337 
338 static int i8042_aux_write(struct serio *serio, unsigned char c)
339 {
340         struct i8042_port *port = serio->port_data;
341 
342         return i8042_command(&c, port->mux == -1 ?
343                                         I8042_CMD_AUX_SEND :
344                                         I8042_CMD_MUX_SEND + port->mux);
345 }
346 
347 
348 /*
349  * i8042_aux_close attempts to clear AUX or KBD port state by disabling
350  * and then re-enabling it.
351  */
352 
353 static void i8042_port_close(struct serio *serio)
354 {
355         int irq_bit;
356         int disable_bit;
357         const char *port_name;
358 
359         if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) {
360                 irq_bit = I8042_CTR_AUXINT;
361                 disable_bit = I8042_CTR_AUXDIS;
362                 port_name = "AUX";
363         } else {
364                 irq_bit = I8042_CTR_KBDINT;
365                 disable_bit = I8042_CTR_KBDDIS;
366                 port_name = "KBD";
367         }
368 
369         i8042_ctr &= ~irq_bit;
370         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
371                 pr_warn("Can't write CTR while closing %s port\n", port_name);
372 
373         udelay(50);
374 
375         i8042_ctr &= ~disable_bit;
376         i8042_ctr |= irq_bit;
377         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
378                 pr_err("Can't reactivate %s port\n", port_name);
379 
380         /*
381          * See if there is any data appeared while we were messing with
382          * port state.
383          */
384         i8042_interrupt(0, NULL);
385 }
386 
387 /*
388  * i8042_start() is called by serio core when port is about to finish
389  * registering. It will mark port as existing so i8042_interrupt can
390  * start sending data through it.
391  */
392 static int i8042_start(struct serio *serio)
393 {
394         struct i8042_port *port = serio->port_data;
395 
396         port->exists = true;
397         mb();
398         return 0;
399 }
400 
401 /*
402  * i8042_stop() marks serio port as non-existing so i8042_interrupt
403  * will not try to send data to the port that is about to go away.
404  * The function is called by serio core as part of unregister procedure.
405  */
406 static void i8042_stop(struct serio *serio)
407 {
408         struct i8042_port *port = serio->port_data;
409 
410         port->exists = false;
411 
412         /*
413          * We synchronize with both AUX and KBD IRQs because there is
414          * a (very unlikely) chance that AUX IRQ is raised for KBD port
415          * and vice versa.
416          */
417         synchronize_irq(I8042_AUX_IRQ);
418         synchronize_irq(I8042_KBD_IRQ);
419         port->serio = NULL;
420 }
421 
422 /*
423  * i8042_filter() filters out unwanted bytes from the input data stream.
424  * It is called from i8042_interrupt and thus is running with interrupts
425  * off and i8042_lock held.
426  */
427 static bool i8042_filter(unsigned char data, unsigned char str,
428                          struct serio *serio)
429 {
430         if (unlikely(i8042_suppress_kbd_ack)) {
431                 if ((~str & I8042_STR_AUXDATA) &&
432                     (data == 0xfa || data == 0xfe)) {
433                         i8042_suppress_kbd_ack--;
434                         dbg("Extra keyboard ACK - filtered out\n");
435                         return true;
436                 }
437         }
438 
439         if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
440                 dbg("Filtered out by platform filter\n");
441                 return true;
442         }
443 
444         return false;
445 }
446 
447 /*
448  * i8042_interrupt() is the most important function in this driver -
449  * it handles the interrupts from the i8042, and sends incoming bytes
450  * to the upper layers.
451  */
452 
453 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
454 {
455         struct i8042_port *port;
456         struct serio *serio;
457         unsigned long flags;
458         unsigned char str, data;
459         unsigned int dfl;
460         unsigned int port_no;
461         bool filtered;
462         int ret = 1;
463 
464         spin_lock_irqsave(&i8042_lock, flags);
465 
466         str = i8042_read_status();
467         if (unlikely(~str & I8042_STR_OBF)) {
468                 spin_unlock_irqrestore(&i8042_lock, flags);
469                 if (irq)
470                         dbg("Interrupt %d, without any data\n", irq);
471                 ret = 0;
472                 goto out;
473         }
474 
475         data = i8042_read_data();
476 
477         if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
478                 static unsigned long last_transmit;
479                 static unsigned char last_str;
480 
481                 dfl = 0;
482                 if (str & I8042_STR_MUXERR) {
483                         dbg("MUX error, status is %02x, data is %02x\n",
484                             str, data);
485 /*
486  * When MUXERR condition is signalled the data register can only contain
487  * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
488  * it is not always the case. Some KBCs also report 0xfc when there is
489  * nothing connected to the port while others sometimes get confused which
490  * port the data came from and signal error leaving the data intact. They
491  * _do not_ revert to legacy mode (actually I've never seen KBC reverting
492  * to legacy mode yet, when we see one we'll add proper handling).
493  * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
494  * rest assume that the data came from the same serio last byte
495  * was transmitted (if transmission happened not too long ago).
496  */
497 
498                         switch (data) {
499                                 default:
500                                         if (time_before(jiffies, last_transmit + HZ/10)) {
501                                                 str = last_str;
502                                                 break;
503                                         }
504                                         /* fall through - report timeout */
505                                 case 0xfc:
506                                 case 0xfd:
507                                 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
508                                 case 0xff: dfl = SERIO_PARITY;  data = 0xfe; break;
509                         }
510                 }
511 
512                 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
513                 last_str = str;
514                 last_transmit = jiffies;
515         } else {
516 
517                 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
518                       ((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0);
519 
520                 port_no = (str & I8042_STR_AUXDATA) ?
521                                 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
522         }
523 
524         port = &i8042_ports[port_no];
525         serio = port->exists ? port->serio : NULL;
526 
527         dbg("%02x <- i8042 (interrupt, %d, %d%s%s)\n",
528             data, port_no, irq,
529             dfl & SERIO_PARITY ? ", bad parity" : "",
530             dfl & SERIO_TIMEOUT ? ", timeout" : "");
531 
532         filtered = i8042_filter(data, str, serio);
533 
534         spin_unlock_irqrestore(&i8042_lock, flags);
535 
536         if (likely(port->exists && !filtered))
537                 serio_interrupt(serio, data, dfl);
538 
539  out:
540         return IRQ_RETVAL(ret);
541 }
542 
543 /*
544  * i8042_enable_kbd_port enables keyboard port on chip
545  */
546 
547 static int i8042_enable_kbd_port(void)
548 {
549         i8042_ctr &= ~I8042_CTR_KBDDIS;
550         i8042_ctr |= I8042_CTR_KBDINT;
551 
552         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
553                 i8042_ctr &= ~I8042_CTR_KBDINT;
554                 i8042_ctr |= I8042_CTR_KBDDIS;
555                 pr_err("Failed to enable KBD port\n");
556                 return -EIO;
557         }
558 
559         return 0;
560 }
561 
562 /*
563  * i8042_enable_aux_port enables AUX (mouse) port on chip
564  */
565 
566 static int i8042_enable_aux_port(void)
567 {
568         i8042_ctr &= ~I8042_CTR_AUXDIS;
569         i8042_ctr |= I8042_CTR_AUXINT;
570 
571         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
572                 i8042_ctr &= ~I8042_CTR_AUXINT;
573                 i8042_ctr |= I8042_CTR_AUXDIS;
574                 pr_err("Failed to enable AUX port\n");
575                 return -EIO;
576         }
577 
578         return 0;
579 }
580 
581 /*
582  * i8042_enable_mux_ports enables 4 individual AUX ports after
583  * the controller has been switched into Multiplexed mode
584  */
585 
586 static int i8042_enable_mux_ports(void)
587 {
588         unsigned char param;
589         int i;
590 
591         for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
592                 i8042_command(&param, I8042_CMD_MUX_PFX + i);
593                 i8042_command(&param, I8042_CMD_AUX_ENABLE);
594         }
595 
596         return i8042_enable_aux_port();
597 }
598 
599 /*
600  * i8042_set_mux_mode checks whether the controller has an
601  * active multiplexor and puts the chip into Multiplexed (true)
602  * or Legacy (false) mode.
603  */
604 
605 static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version)
606 {
607 
608         unsigned char param, val;
609 /*
610  * Get rid of bytes in the queue.
611  */
612 
613         i8042_flush();
614 
615 /*
616  * Internal loopback test - send three bytes, they should come back from the
617  * mouse interface, the last should be version.
618  */
619 
620         param = val = 0xf0;
621         if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != val)
622                 return -1;
623         param = val = multiplex ? 0x56 : 0xf6;
624         if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != val)
625                 return -1;
626         param = val = multiplex ? 0xa4 : 0xa5;
627         if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param == val)
628                 return -1;
629 
630 /*
631  * Workaround for interference with USB Legacy emulation
632  * that causes a v10.12 MUX to be found.
633  */
634         if (param == 0xac)
635                 return -1;
636 
637         if (mux_version)
638                 *mux_version = param;
639 
640         return 0;
641 }
642 
643 /*
644  * i8042_check_mux() checks whether the controller supports the PS/2 Active
645  * Multiplexing specification by Synaptics, Phoenix, Insyde and
646  * LCS/Telegraphics.
647  */
648 
649 static int __init i8042_check_mux(void)
650 {
651         unsigned char mux_version;
652 
653         if (i8042_set_mux_mode(true, &mux_version))
654                 return -1;
655 
656         pr_info("Detected active multiplexing controller, rev %d.%d\n",
657                 (mux_version >> 4) & 0xf, mux_version & 0xf);
658 
659 /*
660  * Disable all muxed ports by disabling AUX.
661  */
662         i8042_ctr |= I8042_CTR_AUXDIS;
663         i8042_ctr &= ~I8042_CTR_AUXINT;
664 
665         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
666                 pr_err("Failed to disable AUX port, can't use MUX\n");
667                 return -EIO;
668         }
669 
670         i8042_mux_present = true;
671 
672         return 0;
673 }
674 
675 /*
676  * The following is used to test AUX IRQ delivery.
677  */
678 static struct completion i8042_aux_irq_delivered __initdata;
679 static bool i8042_irq_being_tested __initdata;
680 
681 static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id)
682 {
683         unsigned long flags;
684         unsigned char str, data;
685         int ret = 0;
686 
687         spin_lock_irqsave(&i8042_lock, flags);
688         str = i8042_read_status();
689         if (str & I8042_STR_OBF) {
690                 data = i8042_read_data();
691                 dbg("%02x <- i8042 (aux_test_irq, %s)\n",
692                     data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
693                 if (i8042_irq_being_tested &&
694                     data == 0xa5 && (str & I8042_STR_AUXDATA))
695                         complete(&i8042_aux_irq_delivered);
696                 ret = 1;
697         }
698         spin_unlock_irqrestore(&i8042_lock, flags);
699 
700         return IRQ_RETVAL(ret);
701 }
702 
703 /*
704  * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
705  * verifies success by readinng CTR. Used when testing for presence of AUX
706  * port.
707  */
708 static int __init i8042_toggle_aux(bool on)
709 {
710         unsigned char param;
711         int i;
712 
713         if (i8042_command(&param,
714                         on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
715                 return -1;
716 
717         /* some chips need some time to set the I8042_CTR_AUXDIS bit */
718         for (i = 0; i < 100; i++) {
719                 udelay(50);
720 
721                 if (i8042_command(&param, I8042_CMD_CTL_RCTR))
722                         return -1;
723 
724                 if (!(param & I8042_CTR_AUXDIS) == on)
725                         return 0;
726         }
727 
728         return -1;
729 }
730 
731 /*
732  * i8042_check_aux() applies as much paranoia as it can at detecting
733  * the presence of an AUX interface.
734  */
735 
736 static int __init i8042_check_aux(void)
737 {
738         int retval = -1;
739         bool irq_registered = false;
740         bool aux_loop_broken = false;
741         unsigned long flags;
742         unsigned char param;
743 
744 /*
745  * Get rid of bytes in the queue.
746  */
747 
748         i8042_flush();
749 
750 /*
751  * Internal loopback test - filters out AT-type i8042's. Unfortunately
752  * SiS screwed up and their 5597 doesn't support the LOOP command even
753  * though it has an AUX port.
754  */
755 
756         param = 0x5a;
757         retval = i8042_command(&param, I8042_CMD_AUX_LOOP);
758         if (retval || param != 0x5a) {
759 
760 /*
761  * External connection test - filters out AT-soldered PS/2 i8042's
762  * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
763  * 0xfa - no error on some notebooks which ignore the spec
764  * Because it's common for chipsets to return error on perfectly functioning
765  * AUX ports, we test for this only when the LOOP command failed.
766  */
767 
768                 if (i8042_command(&param, I8042_CMD_AUX_TEST) ||
769                     (param && param != 0xfa && param != 0xff))
770                         return -1;
771 
772 /*
773  * If AUX_LOOP completed without error but returned unexpected data
774  * mark it as broken
775  */
776                 if (!retval)
777                         aux_loop_broken = true;
778         }
779 
780 /*
781  * Bit assignment test - filters out PS/2 i8042's in AT mode
782  */
783 
784         if (i8042_toggle_aux(false)) {
785                 pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
786                 pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n");
787         }
788 
789         if (i8042_toggle_aux(true))
790                 return -1;
791 
792 /*
793  * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
794  * used it for a PCI card or somethig else.
795  */
796 
797         if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) {
798 /*
799  * Without LOOP command we can't test AUX IRQ delivery. Assume the port
800  * is working and hope we are right.
801  */
802                 retval = 0;
803                 goto out;
804         }
805 
806         if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
807                         "i8042", i8042_platform_device))
808                 goto out;
809 
810         irq_registered = true;
811 
812         if (i8042_enable_aux_port())
813                 goto out;
814 
815         spin_lock_irqsave(&i8042_lock, flags);
816 
817         init_completion(&i8042_aux_irq_delivered);
818         i8042_irq_being_tested = true;
819 
820         param = 0xa5;
821         retval = __i8042_command(&param, I8042_CMD_AUX_LOOP & 0xf0ff);
822 
823         spin_unlock_irqrestore(&i8042_lock, flags);
824 
825         if (retval)
826                 goto out;
827 
828         if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
829                                         msecs_to_jiffies(250)) == 0) {
830 /*
831  * AUX IRQ was never delivered so we need to flush the controller to
832  * get rid of the byte we put there; otherwise keyboard may not work.
833  */
834                 dbg("     -- i8042 (aux irq test timeout)\n");
835                 i8042_flush();
836                 retval = -1;
837         }
838 
839  out:
840 
841 /*
842  * Disable the interface.
843  */
844 
845         i8042_ctr |= I8042_CTR_AUXDIS;
846         i8042_ctr &= ~I8042_CTR_AUXINT;
847 
848         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
849                 retval = -1;
850 
851         if (irq_registered)
852                 free_irq(I8042_AUX_IRQ, i8042_platform_device);
853 
854         return retval;
855 }
856 
857 static int i8042_controller_check(void)
858 {
859         if (i8042_flush()) {
860                 pr_err("No controller found\n");
861                 return -ENODEV;
862         }
863 
864         return 0;
865 }
866 
867 static int i8042_controller_selftest(void)
868 {
869         unsigned char param;
870         int i = 0;
871 
872         /*
873          * We try this 5 times; on some really fragile systems this does not
874          * take the first time...
875          */
876         do {
877 
878                 if (i8042_command(&param, I8042_CMD_CTL_TEST)) {
879                         pr_err("i8042 controller selftest timeout\n");
880                         return -ENODEV;
881                 }
882 
883                 if (param == I8042_RET_CTL_TEST)
884                         return 0;
885 
886                 dbg("i8042 controller selftest: %#x != %#x\n",
887                     param, I8042_RET_CTL_TEST);
888                 msleep(50);
889         } while (i++ < 5);
890 
891 #ifdef CONFIG_X86
892         /*
893          * On x86, we don't fail entire i8042 initialization if controller
894          * reset fails in hopes that keyboard port will still be functional
895          * and user will still get a working keyboard. This is especially
896          * important on netbooks. On other arches we trust hardware more.
897          */
898         pr_info("giving up on controller selftest, continuing anyway...\n");
899         return 0;
900 #else
901         pr_err("i8042 controller selftest failed\n");
902         return -EIO;
903 #endif
904 }
905 
906 /*
907  * i8042_controller init initializes the i8042 controller, and,
908  * most importantly, sets it into non-xlated mode if that's
909  * desired.
910  */
911 
912 static int i8042_controller_init(void)
913 {
914         unsigned long flags;
915         int n = 0;
916         unsigned char ctr[2];
917 
918 /*
919  * Save the CTR for restore on unload / reboot.
920  */
921 
922         do {
923                 if (n >= 10) {
924                         pr_err("Unable to get stable CTR read\n");
925                         return -EIO;
926                 }
927 
928                 if (n != 0)
929                         udelay(50);
930 
931                 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
932                         pr_err("Can't read CTR while initializing i8042\n");
933                         return -EIO;
934                 }
935 
936         } while (n < 2 || ctr[0] != ctr[1]);
937 
938         i8042_initial_ctr = i8042_ctr = ctr[0];
939 
940 /*
941  * Disable the keyboard interface and interrupt.
942  */
943 
944         i8042_ctr |= I8042_CTR_KBDDIS;
945         i8042_ctr &= ~I8042_CTR_KBDINT;
946 
947 /*
948  * Handle keylock.
949  */
950 
951         spin_lock_irqsave(&i8042_lock, flags);
952         if (~i8042_read_status() & I8042_STR_KEYLOCK) {
953                 if (i8042_unlock)
954                         i8042_ctr |= I8042_CTR_IGNKEYLOCK;
955                 else
956                         pr_warn("Warning: Keylock active\n");
957         }
958         spin_unlock_irqrestore(&i8042_lock, flags);
959 
960 /*
961  * If the chip is configured into nontranslated mode by the BIOS, don't
962  * bother enabling translating and be happy.
963  */
964 
965         if (~i8042_ctr & I8042_CTR_XLATE)
966                 i8042_direct = true;
967 
968 /*
969  * Set nontranslated mode for the kbd interface if requested by an option.
970  * After this the kbd interface becomes a simple serial in/out, like the aux
971  * interface is. We don't do this by default, since it can confuse notebook
972  * BIOSes.
973  */
974 
975         if (i8042_direct)
976                 i8042_ctr &= ~I8042_CTR_XLATE;
977 
978 /*
979  * Write CTR back.
980  */
981 
982         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
983                 pr_err("Can't write CTR while initializing i8042\n");
984                 return -EIO;
985         }
986 
987 /*
988  * Flush whatever accumulated while we were disabling keyboard port.
989  */
990 
991         i8042_flush();
992 
993         return 0;
994 }
995 
996 
997 /*
998  * Reset the controller and reset CRT to the original value set by BIOS.
999  */
1000 
1001 static void i8042_controller_reset(bool force_reset)
1002 {
1003         i8042_flush();
1004 
1005 /*
1006  * Disable both KBD and AUX interfaces so they don't get in the way
1007  */
1008 
1009         i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
1010         i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
1011 
1012         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
1013                 pr_warn("Can't write CTR while resetting\n");
1014 
1015 /*
1016  * Disable MUX mode if present.
1017  */
1018 
1019         if (i8042_mux_present)
1020                 i8042_set_mux_mode(false, NULL);
1021 
1022 /*
1023  * Reset the controller if requested.
1024  */
1025 
1026         if (i8042_reset || force_reset)
1027                 i8042_controller_selftest();
1028 
1029 /*
1030  * Restore the original control register setting.
1031  */
1032 
1033         if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
1034                 pr_warn("Can't restore CTR\n");
1035 }
1036 
1037 
1038 /*
1039  * i8042_panic_blink() will turn the keyboard LEDs on or off and is called
1040  * when kernel panics. Flashing LEDs is useful for users running X who may
1041  * not see the console and will help distinguishing panics from "real"
1042  * lockups.
1043  *
1044  * Note that DELAY has a limit of 10ms so we will not get stuck here
1045  * waiting for KBC to free up even if KBD interrupt is off
1046  */
1047 
1048 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
1049 
1050 static long i8042_panic_blink(int state)
1051 {
1052         long delay = 0;
1053         char led;
1054 
1055         led = (state) ? 0x01 | 0x04 : 0;
1056         while (i8042_read_status() & I8042_STR_IBF)
1057                 DELAY;
1058         dbg("%02x -> i8042 (panic blink)\n", 0xed);
1059         i8042_suppress_kbd_ack = 2;
1060         i8042_write_data(0xed); /* set leds */
1061         DELAY;
1062         while (i8042_read_status() & I8042_STR_IBF)
1063                 DELAY;
1064         DELAY;
1065         dbg("%02x -> i8042 (panic blink)\n", led);
1066         i8042_write_data(led);
1067         DELAY;
1068         return delay;
1069 }
1070 
1071 #undef DELAY
1072 
1073 #ifdef CONFIG_X86
1074 static void i8042_dritek_enable(void)
1075 {
1076         unsigned char param = 0x90;
1077         int error;
1078 
1079         error = i8042_command(&param, 0x1059);
1080         if (error)
1081                 pr_warn("Failed to enable DRITEK extension: %d\n", error);
1082 }
1083 #endif
1084 
1085 #ifdef CONFIG_PM
1086 
1087 /*
1088  * Here we try to reset everything back to a state we had
1089  * before suspending.
1090  */
1091 
1092 static int i8042_controller_resume(bool force_reset)
1093 {
1094         int error;
1095 
1096         error = i8042_controller_check();
1097         if (error)
1098                 return error;
1099 
1100         if (i8042_reset || force_reset) {
1101                 error = i8042_controller_selftest();
1102                 if (error)
1103                         return error;
1104         }
1105 
1106 /*
1107  * Restore original CTR value and disable all ports
1108  */
1109 
1110         i8042_ctr = i8042_initial_ctr;
1111         if (i8042_direct)
1112                 i8042_ctr &= ~I8042_CTR_XLATE;
1113         i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
1114         i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
1115         if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1116                 pr_warn("Can't write CTR to resume, retrying...\n");
1117                 msleep(50);
1118                 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1119                         pr_err("CTR write retry failed\n");
1120                         return -EIO;
1121                 }
1122         }
1123 
1124 
1125 #ifdef CONFIG_X86
1126         if (i8042_dritek)
1127                 i8042_dritek_enable();
1128 #endif
1129 
1130         if (i8042_mux_present) {
1131                 if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports())
1132                         pr_warn("failed to resume active multiplexor, mouse won't work\n");
1133         } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
1134                 i8042_enable_aux_port();
1135 
1136         if (i8042_ports[I8042_KBD_PORT_NO].serio)
1137                 i8042_enable_kbd_port();
1138 
1139         i8042_interrupt(0, NULL);
1140 
1141         return 0;
1142 }
1143 
1144 /*
1145  * Here we try to restore the original BIOS settings to avoid
1146  * upsetting it.
1147  */
1148 
1149 static int i8042_pm_suspend(struct device *dev)
1150 {
1151         i8042_controller_reset(true);
1152 
1153         return 0;
1154 }
1155 
1156 static int i8042_pm_resume(struct device *dev)
1157 {
1158         /*
1159          * On resume from S2R we always try to reset the controller
1160          * to bring it in a sane state. (In case of S2D we expect
1161          * BIOS to reset the controller for us.)
1162          */
1163         return i8042_controller_resume(true);
1164 }
1165 
1166 static int i8042_pm_thaw(struct device *dev)
1167 {
1168         i8042_interrupt(0, NULL);
1169 
1170         return 0;
1171 }
1172 
1173 static int i8042_pm_reset(struct device *dev)
1174 {
1175         i8042_controller_reset(false);
1176 
1177         return 0;
1178 }
1179 
1180 static int i8042_pm_restore(struct device *dev)
1181 {
1182         return i8042_controller_resume(false);
1183 }
1184 
1185 static const struct dev_pm_ops i8042_pm_ops = {
1186         .suspend        = i8042_pm_suspend,
1187         .resume         = i8042_pm_resume,
1188         .thaw           = i8042_pm_thaw,
1189         .poweroff       = i8042_pm_reset,
1190         .restore        = i8042_pm_restore,
1191 };
1192 
1193 #endif /* CONFIG_PM */
1194 
1195 /*
1196  * We need to reset the 8042 back to original mode on system shutdown,
1197  * because otherwise BIOSes will be confused.
1198  */
1199 
1200 static void i8042_shutdown(struct platform_device *dev)
1201 {
1202         i8042_controller_reset(false);
1203 }
1204 
1205 static int __init i8042_create_kbd_port(void)
1206 {
1207         struct serio *serio;
1208         struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
1209 
1210         serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1211         if (!serio)
1212                 return -ENOMEM;
1213 
1214         serio->id.type          = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
1215         serio->write            = i8042_dumbkbd ? NULL : i8042_kbd_write;
1216         serio->start            = i8042_start;
1217         serio->stop             = i8042_stop;
1218         serio->close            = i8042_port_close;
1219         serio->port_data        = port;
1220         serio->dev.parent       = &i8042_platform_device->dev;
1221         strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
1222         strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
1223         strlcpy(serio->firmware_id, i8042_kbd_firmware_id,
1224                 sizeof(serio->firmware_id));
1225 
1226         port->serio = serio;
1227         port->irq = I8042_KBD_IRQ;
1228 
1229         return 0;
1230 }
1231 
1232 static int __init i8042_create_aux_port(int idx)
1233 {
1234         struct serio *serio;
1235         int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
1236         struct i8042_port *port = &i8042_ports[port_no];
1237 
1238         serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1239         if (!serio)
1240                 return -ENOMEM;
1241 
1242         serio->id.type          = SERIO_8042;
1243         serio->write            = i8042_aux_write;
1244         serio->start            = i8042_start;
1245         serio->stop             = i8042_stop;
1246         serio->port_data        = port;
1247         serio->dev.parent       = &i8042_platform_device->dev;
1248         if (idx < 0) {
1249                 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1250                 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1251                 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1252                         sizeof(serio->firmware_id));
1253                 serio->close = i8042_port_close;
1254         } else {
1255                 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1256                 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1257         }
1258 
1259         port->serio = serio;
1260         port->mux = idx;
1261         port->irq = I8042_AUX_IRQ;
1262 
1263         return 0;
1264 }
1265 
1266 static void __init i8042_free_kbd_port(void)
1267 {
1268         kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1269         i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1270 }
1271 
1272 static void __init i8042_free_aux_ports(void)
1273 {
1274         int i;
1275 
1276         for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1277                 kfree(i8042_ports[i].serio);
1278                 i8042_ports[i].serio = NULL;
1279         }
1280 }
1281 
1282 static void __init i8042_register_ports(void)
1283 {
1284         int i;
1285 
1286         for (i = 0; i < I8042_NUM_PORTS; i++) {
1287                 if (i8042_ports[i].serio) {
1288                         printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1289                                 i8042_ports[i].serio->name,
1290                                 (unsigned long) I8042_DATA_REG,
1291                                 (unsigned long) I8042_COMMAND_REG,
1292                                 i8042_ports[i].irq);
1293                         serio_register_port(i8042_ports[i].serio);
1294                 }
1295         }
1296 }
1297 
1298 static void i8042_unregister_ports(void)
1299 {
1300         int i;
1301 
1302         for (i = 0; i < I8042_NUM_PORTS; i++) {
1303                 if (i8042_ports[i].serio) {
1304                         serio_unregister_port(i8042_ports[i].serio);
1305                         i8042_ports[i].serio = NULL;
1306                 }
1307         }
1308 }
1309 
1310 /*
1311  * Checks whether port belongs to i8042 controller.
1312  */
1313 bool i8042_check_port_owner(const struct serio *port)
1314 {
1315         int i;
1316 
1317         for (i = 0; i < I8042_NUM_PORTS; i++)
1318                 if (i8042_ports[i].serio == port)
1319                         return true;
1320 
1321         return false;
1322 }
1323 EXPORT_SYMBOL(i8042_check_port_owner);
1324 
1325 static void i8042_free_irqs(void)
1326 {
1327         if (i8042_aux_irq_registered)
1328                 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1329         if (i8042_kbd_irq_registered)
1330                 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1331 
1332         i8042_aux_irq_registered = i8042_kbd_irq_registered = false;
1333 }
1334 
1335 static int __init i8042_setup_aux(void)
1336 {
1337         int (*aux_enable)(void);
1338         int error;
1339         int i;
1340 
1341         if (i8042_check_aux())
1342                 return -ENODEV;
1343 
1344         if (i8042_nomux || i8042_check_mux()) {
1345                 error = i8042_create_aux_port(-1);
1346                 if (error)
1347                         goto err_free_ports;
1348                 aux_enable = i8042_enable_aux_port;
1349         } else {
1350                 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1351                         error = i8042_create_aux_port(i);
1352                         if (error)
1353                                 goto err_free_ports;
1354                 }
1355                 aux_enable = i8042_enable_mux_ports;
1356         }
1357 
1358         error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1359                             "i8042", i8042_platform_device);
1360         if (error)
1361                 goto err_free_ports;
1362 
1363         if (aux_enable())
1364                 goto err_free_irq;
1365 
1366         i8042_aux_irq_registered = true;
1367         return 0;
1368 
1369  err_free_irq:
1370         free_irq(I8042_AUX_IRQ, i8042_platform_device);
1371  err_free_ports:
1372         i8042_free_aux_ports();
1373         return error;
1374 }
1375 
1376 static int __init i8042_setup_kbd(void)
1377 {
1378         int error;
1379 
1380         error = i8042_create_kbd_port();
1381         if (error)
1382                 return error;
1383 
1384         error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1385                             "i8042", i8042_platform_device);
1386         if (error)
1387                 goto err_free_port;
1388 
1389         error = i8042_enable_kbd_port();
1390         if (error)
1391                 goto err_free_irq;
1392 
1393         i8042_kbd_irq_registered = true;
1394         return 0;
1395 
1396  err_free_irq:
1397         free_irq(I8042_KBD_IRQ, i8042_platform_device);
1398  err_free_port:
1399         i8042_free_kbd_port();
1400         return error;
1401 }
1402 
1403 static int __init i8042_probe(struct platform_device *dev)
1404 {
1405         int error;
1406 
1407         i8042_platform_device = dev;
1408 
1409         if (i8042_reset) {
1410                 error = i8042_controller_selftest();
1411                 if (error)
1412                         return error;
1413         }
1414 
1415         error = i8042_controller_init();
1416         if (error)
1417                 return error;
1418 
1419 #ifdef CONFIG_X86
1420         if (i8042_dritek)
1421                 i8042_dritek_enable();
1422 #endif
1423 
1424         if (!i8042_noaux) {
1425                 error = i8042_setup_aux();
1426                 if (error && error != -ENODEV && error != -EBUSY)
1427                         goto out_fail;
1428         }
1429 
1430         if (!i8042_nokbd) {
1431                 error = i8042_setup_kbd();
1432                 if (error)
1433                         goto out_fail;
1434         }
1435 /*
1436  * Ok, everything is ready, let's register all serio ports
1437  */
1438         i8042_register_ports();
1439 
1440         return 0;
1441 
1442  out_fail:
1443         i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1444         i8042_free_irqs();
1445         i8042_controller_reset(false);
1446         i8042_platform_device = NULL;
1447 
1448         return error;
1449 }
1450 
1451 static int i8042_remove(struct platform_device *dev)
1452 {
1453         i8042_unregister_ports();
1454         i8042_free_irqs();
1455         i8042_controller_reset(false);
1456         i8042_platform_device = NULL;
1457 
1458         return 0;
1459 }
1460 
1461 static struct platform_driver i8042_driver = {
1462         .driver         = {
1463                 .name   = "i8042",
1464                 .owner  = THIS_MODULE,
1465 #ifdef CONFIG_PM
1466                 .pm     = &i8042_pm_ops,
1467 #endif
1468         },
1469         .remove         = i8042_remove,
1470         .shutdown       = i8042_shutdown,
1471 };
1472 
1473 static int __init i8042_init(void)
1474 {
1475         struct platform_device *pdev;
1476         int err;
1477 
1478         dbg_init();
1479 
1480         err = i8042_platform_init();
1481         if (err)
1482                 return err;
1483 
1484         err = i8042_controller_check();
1485         if (err)
1486                 goto err_platform_exit;
1487 
1488         pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0);
1489         if (IS_ERR(pdev)) {
1490                 err = PTR_ERR(pdev);
1491                 goto err_platform_exit;
1492         }
1493 
1494         panic_blink = i8042_panic_blink;
1495 
1496         return 0;
1497 
1498  err_platform_exit:
1499         i8042_platform_exit();
1500         return err;
1501 }
1502 
1503 static void __exit i8042_exit(void)
1504 {
1505         platform_device_unregister(i8042_platform_device);
1506         platform_driver_unregister(&i8042_driver);
1507         i8042_platform_exit();
1508 
1509         panic_blink = NULL;
1510 }
1511 
1512 module_init(i8042_init);
1513 module_exit(i8042_exit);
1514 

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