Version:  2.0.40 2.2.26 2.4.37 2.6.39 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15

Linux/drivers/iio/adc/mcp3422.c

  1 /*
  2  * mcp3422.c - driver for the Microchip mcp3422/3/4 chip family
  3  *
  4  * Copyright (C) 2013, Angelo Compagnucci
  5  * Author: Angelo Compagnucci <angelo.compagnucci@gmail.com>
  6  *
  7  * Datasheet: http://ww1.microchip.com/downloads/en/devicedoc/22088b.pdf
  8  *
  9  * This driver exports the value of analog input voltage to sysfs, the
 10  * voltage unit is nV.
 11  *
 12  * This program is free software; you can redistribute it and/or modify
 13  * it under the terms of the GNU General Public License as published by
 14  * the Free Software Foundation; either version 2 of the License, or
 15  * (at your option) any later version.
 16  */
 17 
 18 #include <linux/err.h>
 19 #include <linux/i2c.h>
 20 #include <linux/module.h>
 21 #include <linux/delay.h>
 22 #include <linux/sysfs.h>
 23 #include <linux/of.h>
 24 
 25 #include <linux/iio/iio.h>
 26 #include <linux/iio/sysfs.h>
 27 
 28 /* Masks */
 29 #define MCP3422_CHANNEL_MASK    0x60
 30 #define MCP3422_PGA_MASK        0x03
 31 #define MCP3422_SRATE_MASK      0x0C
 32 #define MCP3422_SRATE_240       0x0
 33 #define MCP3422_SRATE_60        0x1
 34 #define MCP3422_SRATE_15        0x2
 35 #define MCP3422_SRATE_3 0x3
 36 #define MCP3422_PGA_1   0
 37 #define MCP3422_PGA_2   1
 38 #define MCP3422_PGA_4   2
 39 #define MCP3422_PGA_8   3
 40 #define MCP3422_CONT_SAMPLING   0x10
 41 
 42 #define MCP3422_CHANNEL(config) (((config) & MCP3422_CHANNEL_MASK) >> 5)
 43 #define MCP3422_PGA(config)     ((config) & MCP3422_PGA_MASK)
 44 #define MCP3422_SAMPLE_RATE(config)     (((config) & MCP3422_SRATE_MASK) >> 2)
 45 
 46 #define MCP3422_CHANNEL_VALUE(value) (((value) << 5) & MCP3422_CHANNEL_MASK)
 47 #define MCP3422_PGA_VALUE(value) ((value) & MCP3422_PGA_MASK)
 48 #define MCP3422_SAMPLE_RATE_VALUE(value) ((value << 2) & MCP3422_SRATE_MASK)
 49 
 50 #define MCP3422_CHAN(_index) \
 51         { \
 52                 .type = IIO_VOLTAGE, \
 53                 .indexed = 1, \
 54                 .channel = _index, \
 55                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
 56                                 | BIT(IIO_CHAN_INFO_SCALE), \
 57                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
 58         }
 59 
 60 /* LSB is in nV to eliminate floating point */
 61 static const u32 rates_to_lsb[] = {1000000, 250000, 62500, 15625};
 62 
 63 /*
 64  *  scales calculated as:
 65  *  rates_to_lsb[sample_rate] / (1 << pga);
 66  *  pga is 1 for 0, 2
 67  */
 68 
 69 static const int mcp3422_scales[4][4] = {
 70         { 1000000, 250000, 62500, 15625 },
 71         { 500000 , 125000, 31250, 7812 },
 72         { 250000 , 62500 , 15625, 3906 },
 73         { 125000 , 31250 , 7812 , 1953 } };
 74 
 75 /* Constant msleep times for data acquisitions */
 76 static const int mcp3422_read_times[4] = {
 77         [MCP3422_SRATE_240] = 1000 / 240,
 78         [MCP3422_SRATE_60] = 1000 / 60,
 79         [MCP3422_SRATE_15] = 1000 / 15,
 80         [MCP3422_SRATE_3] = 1000 / 3 };
 81 
 82 /* sample rates to integer conversion table */
 83 static const int mcp3422_sample_rates[4] = {
 84         [MCP3422_SRATE_240] = 240,
 85         [MCP3422_SRATE_60] = 60,
 86         [MCP3422_SRATE_15] = 15,
 87         [MCP3422_SRATE_3] = 3 };
 88 
 89 /* sample rates to sign extension table */
 90 static const int mcp3422_sign_extend[4] = {
 91         [MCP3422_SRATE_240] = 11,
 92         [MCP3422_SRATE_60] = 13,
 93         [MCP3422_SRATE_15] = 15,
 94         [MCP3422_SRATE_3] = 17 };
 95 
 96 /* Client data (each client gets its own) */
 97 struct mcp3422 {
 98         struct i2c_client *i2c;
 99         u8 config;
100         u8 pga[4];
101         struct mutex lock;
102 };
103 
104 static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig)
105 {
106         int ret;
107 
108         mutex_lock(&adc->lock);
109 
110         ret = i2c_master_send(adc->i2c, &newconfig, 1);
111         if (ret > 0) {
112                 adc->config = newconfig;
113                 ret = 0;
114         }
115 
116         mutex_unlock(&adc->lock);
117 
118         return ret;
119 }
120 
121 static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config)
122 {
123         int ret = 0;
124         u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
125         u8 buf[4] = {0, 0, 0, 0};
126         u32 temp;
127 
128         if (sample_rate == MCP3422_SRATE_3) {
129                 ret = i2c_master_recv(adc->i2c, buf, 4);
130                 temp = buf[0] << 16 | buf[1] << 8 | buf[2];
131                 *config = buf[3];
132         } else {
133                 ret = i2c_master_recv(adc->i2c, buf, 3);
134                 temp = buf[0] << 8 | buf[1];
135                 *config = buf[2];
136         }
137 
138         *value = sign_extend32(temp, mcp3422_sign_extend[sample_rate]);
139 
140         return ret;
141 }
142 
143 static int mcp3422_read_channel(struct mcp3422 *adc,
144                                 struct iio_chan_spec const *channel, int *value)
145 {
146         int ret;
147         u8 config;
148         u8 req_channel = channel->channel;
149 
150         if (req_channel != MCP3422_CHANNEL(adc->config)) {
151                 config = adc->config;
152                 config &= ~MCP3422_CHANNEL_MASK;
153                 config |= MCP3422_CHANNEL_VALUE(req_channel);
154                 config &= ~MCP3422_PGA_MASK;
155                 config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
156                 ret = mcp3422_update_config(adc, config);
157                 if (ret < 0)
158                         return ret;
159                 msleep(mcp3422_read_times[MCP3422_SAMPLE_RATE(adc->config)]);
160         }
161 
162         return mcp3422_read(adc, value, &config);
163 }
164 
165 static int mcp3422_read_raw(struct iio_dev *iio,
166                         struct iio_chan_spec const *channel, int *val1,
167                         int *val2, long mask)
168 {
169         struct mcp3422 *adc = iio_priv(iio);
170         int err;
171 
172         u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
173         u8 pga           = MCP3422_PGA(adc->config);
174 
175         switch (mask) {
176         case IIO_CHAN_INFO_RAW:
177                 err = mcp3422_read_channel(adc, channel, val1);
178                 if (err < 0)
179                         return -EINVAL;
180                 return IIO_VAL_INT;
181 
182         case IIO_CHAN_INFO_SCALE:
183 
184                 *val1 = 0;
185                 *val2 = mcp3422_scales[sample_rate][pga];
186                 return IIO_VAL_INT_PLUS_NANO;
187 
188         case IIO_CHAN_INFO_SAMP_FREQ:
189                 *val1 = mcp3422_sample_rates[MCP3422_SAMPLE_RATE(adc->config)];
190                 return IIO_VAL_INT;
191 
192         default:
193                 break;
194         }
195 
196         return -EINVAL;
197 }
198 
199 static int mcp3422_write_raw(struct iio_dev *iio,
200                         struct iio_chan_spec const *channel, int val1,
201                         int val2, long mask)
202 {
203         struct mcp3422 *adc = iio_priv(iio);
204         u8 temp;
205         u8 config = adc->config;
206         u8 req_channel = channel->channel;
207         u8 sample_rate = MCP3422_SAMPLE_RATE(config);
208         u8 i;
209 
210         switch (mask) {
211         case IIO_CHAN_INFO_SCALE:
212                 if (val1 != 0)
213                         return -EINVAL;
214 
215                 for (i = 0; i < ARRAY_SIZE(mcp3422_scales[0]); i++) {
216                         if (val2 == mcp3422_scales[sample_rate][i]) {
217                                 adc->pga[req_channel] = i;
218 
219                                 config &= ~MCP3422_CHANNEL_MASK;
220                                 config |= MCP3422_CHANNEL_VALUE(req_channel);
221                                 config &= ~MCP3422_PGA_MASK;
222                                 config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
223 
224                                 return mcp3422_update_config(adc, config);
225                         }
226                 }
227                 return -EINVAL;
228 
229         case IIO_CHAN_INFO_SAMP_FREQ:
230                 switch (val1) {
231                 case 240:
232                         temp = MCP3422_SRATE_240;
233                         break;
234                 case 60:
235                         temp = MCP3422_SRATE_60;
236                         break;
237                 case 15:
238                         temp = MCP3422_SRATE_15;
239                         break;
240                 case 3:
241                         temp = MCP3422_SRATE_3;
242                         break;
243                 default:
244                         return -EINVAL;
245                 }
246 
247                 config &= ~MCP3422_CHANNEL_MASK;
248                 config |= MCP3422_CHANNEL_VALUE(req_channel);
249                 config &= ~MCP3422_SRATE_MASK;
250                 config |= MCP3422_SAMPLE_RATE_VALUE(temp);
251 
252                 return mcp3422_update_config(adc, config);
253 
254         default:
255                 break;
256         }
257 
258         return -EINVAL;
259 }
260 
261 static int mcp3422_write_raw_get_fmt(struct iio_dev *indio_dev,
262                 struct iio_chan_spec const *chan, long mask)
263 {
264         switch (mask) {
265         case IIO_CHAN_INFO_SCALE:
266                 return IIO_VAL_INT_PLUS_NANO;
267         case IIO_CHAN_INFO_SAMP_FREQ:
268                 return IIO_VAL_INT_PLUS_MICRO;
269         default:
270                 return -EINVAL;
271         }
272 }
273 
274 static ssize_t mcp3422_show_scales(struct device *dev,
275                 struct device_attribute *attr, char *buf)
276 {
277         struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
278         u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
279 
280         return sprintf(buf, "0.%09u 0.%09u 0.%09u 0.%09u\n",
281                 mcp3422_scales[sample_rate][0],
282                 mcp3422_scales[sample_rate][1],
283                 mcp3422_scales[sample_rate][2],
284                 mcp3422_scales[sample_rate][3]);
285 }
286 
287 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("240 60 15 3");
288 static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO,
289                 mcp3422_show_scales, NULL, 0);
290 
291 static struct attribute *mcp3422_attributes[] = {
292         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
293         &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
294         NULL,
295 };
296 
297 static const struct attribute_group mcp3422_attribute_group = {
298         .attrs = mcp3422_attributes,
299 };
300 
301 static const struct iio_chan_spec mcp3422_channels[] = {
302         MCP3422_CHAN(0),
303         MCP3422_CHAN(1),
304 };
305 
306 static const struct iio_chan_spec mcp3424_channels[] = {
307         MCP3422_CHAN(0),
308         MCP3422_CHAN(1),
309         MCP3422_CHAN(2),
310         MCP3422_CHAN(3),
311 };
312 
313 static const struct iio_info mcp3422_info = {
314         .read_raw = mcp3422_read_raw,
315         .write_raw = mcp3422_write_raw,
316         .write_raw_get_fmt = mcp3422_write_raw_get_fmt,
317         .attrs = &mcp3422_attribute_group,
318         .driver_module = THIS_MODULE,
319 };
320 
321 static int mcp3422_probe(struct i2c_client *client,
322                          const struct i2c_device_id *id)
323 {
324         struct iio_dev *indio_dev;
325         struct mcp3422 *adc;
326         int err;
327         u8 config;
328 
329         if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
330                 return -ENODEV;
331 
332         indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adc));
333         if (!indio_dev)
334                 return -ENOMEM;
335 
336         adc = iio_priv(indio_dev);
337         adc->i2c = client;
338 
339         mutex_init(&adc->lock);
340 
341         indio_dev->dev.parent = &client->dev;
342         indio_dev->name = dev_name(&client->dev);
343         indio_dev->modes = INDIO_DIRECT_MODE;
344         indio_dev->info = &mcp3422_info;
345 
346         switch ((unsigned int)(id->driver_data)) {
347         case 2:
348         case 3:
349                 indio_dev->channels = mcp3422_channels;
350                 indio_dev->num_channels = ARRAY_SIZE(mcp3422_channels);
351                 break;
352         case 4:
353                 indio_dev->channels = mcp3424_channels;
354                 indio_dev->num_channels = ARRAY_SIZE(mcp3424_channels);
355                 break;
356         }
357 
358         /* meaningful default configuration */
359         config = (MCP3422_CONT_SAMPLING
360                 | MCP3422_CHANNEL_VALUE(1)
361                 | MCP3422_PGA_VALUE(MCP3422_PGA_1)
362                 | MCP3422_SAMPLE_RATE_VALUE(MCP3422_SRATE_240));
363         mcp3422_update_config(adc, config);
364 
365         err = devm_iio_device_register(&client->dev, indio_dev);
366         if (err < 0)
367                 return err;
368 
369         i2c_set_clientdata(client, indio_dev);
370 
371         return 0;
372 }
373 
374 static const struct i2c_device_id mcp3422_id[] = {
375         { "mcp3422", 2 },
376         { "mcp3423", 3 },
377         { "mcp3424", 4 },
378         { }
379 };
380 MODULE_DEVICE_TABLE(i2c, mcp3422_id);
381 
382 #ifdef CONFIG_OF
383 static const struct of_device_id mcp3422_of_match[] = {
384         { .compatible = "mcp3422" },
385         { }
386 };
387 MODULE_DEVICE_TABLE(of, mcp3422_of_match);
388 #endif
389 
390 static struct i2c_driver mcp3422_driver = {
391         .driver = {
392                 .name = "mcp3422",
393                 .owner = THIS_MODULE,
394                 .of_match_table = of_match_ptr(mcp3422_of_match),
395         },
396         .probe = mcp3422_probe,
397         .id_table = mcp3422_id,
398 };
399 module_i2c_driver(mcp3422_driver);
400 
401 MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
402 MODULE_DESCRIPTION("Microchip mcp3422/3/4 driver");
403 MODULE_LICENSE("GPL v2");
404 

This page was automatically generated by LXR 0.3.1 (source).  •  Linux is a registered trademark of Linus Torvalds  •  Contact us