Version:  2.6.34 2.6.35 2.6.36 2.6.37 2.6.38 2.6.39 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14

Linux/drivers/i2c/busses/i2c-amd756.c

  1 /*
  2     Copyright (c) 1999-2002 Merlin Hughes <merlin@merlin.org>
  3 
  4     Shamelessly ripped from i2c-piix4.c:
  5 
  6     Copyright (c) 1998, 1999  Frodo Looijaard <frodol@dds.nl> and
  7     Philip Edelbrock <phil@netroedge.com>
  8 
  9     This program is free software; you can redistribute it and/or modify
 10     it under the terms of the GNU General Public License as published by
 11     the Free Software Foundation; either version 2 of the License, or
 12     (at your option) any later version.
 13 
 14     This program is distributed in the hope that it will be useful,
 15     but WITHOUT ANY WARRANTY; without even the implied warranty of
 16     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 17     GNU General Public License for more details.
 18 
 19     You should have received a copy of the GNU General Public License
 20     along with this program; if not, write to the Free Software
 21     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 22 */
 23 
 24 /*
 25     2002-04-08: Added nForce support. (Csaba Halasz)
 26     2002-10-03: Fixed nForce PnP I/O port. (Michael Steil)
 27     2002-12-28: Rewritten into something that resembles a Linux driver (hch)
 28     2003-11-29: Added back AMD8111 removed by the previous rewrite.
 29                 (Philip Pokorny)
 30 */
 31 
 32 /*
 33    Supports AMD756, AMD766, AMD768, AMD8111 and nVidia nForce
 34    Note: we assume there can only be one device, with one SMBus interface.
 35 */
 36 
 37 #include <linux/module.h>
 38 #include <linux/pci.h>
 39 #include <linux/kernel.h>
 40 #include <linux/delay.h>
 41 #include <linux/stddef.h>
 42 #include <linux/ioport.h>
 43 #include <linux/i2c.h>
 44 #include <linux/acpi.h>
 45 #include <linux/io.h>
 46 
 47 /* AMD756 SMBus address offsets */
 48 #define SMB_ADDR_OFFSET         0xE0
 49 #define SMB_IOSIZE              16
 50 #define SMB_GLOBAL_STATUS       (0x0 + amd756_ioport)
 51 #define SMB_GLOBAL_ENABLE       (0x2 + amd756_ioport)
 52 #define SMB_HOST_ADDRESS        (0x4 + amd756_ioport)
 53 #define SMB_HOST_DATA           (0x6 + amd756_ioport)
 54 #define SMB_HOST_COMMAND        (0x8 + amd756_ioport)
 55 #define SMB_HOST_BLOCK_DATA     (0x9 + amd756_ioport)
 56 #define SMB_HAS_DATA            (0xA + amd756_ioport)
 57 #define SMB_HAS_DEVICE_ADDRESS  (0xC + amd756_ioport)
 58 #define SMB_HAS_HOST_ADDRESS    (0xE + amd756_ioport)
 59 #define SMB_SNOOP_ADDRESS       (0xF + amd756_ioport)
 60 
 61 /* PCI Address Constants */
 62 
 63 /* address of I/O space */
 64 #define SMBBA           0x058           /* mh */
 65 #define SMBBANFORCE     0x014
 66 
 67 /* general configuration */
 68 #define SMBGCFG         0x041           /* mh */
 69 
 70 /* silicon revision code */
 71 #define SMBREV          0x008
 72 
 73 /* Other settings */
 74 #define MAX_TIMEOUT     500
 75 
 76 /* AMD756 constants */
 77 #define AMD756_QUICK            0x00
 78 #define AMD756_BYTE             0x01
 79 #define AMD756_BYTE_DATA        0x02
 80 #define AMD756_WORD_DATA        0x03
 81 #define AMD756_PROCESS_CALL     0x04
 82 #define AMD756_BLOCK_DATA       0x05
 83 
 84 static struct pci_driver amd756_driver;
 85 static unsigned short amd756_ioport;
 86 
 87 /* 
 88   SMBUS event = I/O 28-29 bit 11
 89      see E0 for the status bits and enabled in E2
 90      
 91 */
 92 #define GS_ABRT_STS     (1 << 0)
 93 #define GS_COL_STS      (1 << 1)
 94 #define GS_PRERR_STS    (1 << 2)
 95 #define GS_HST_STS      (1 << 3)
 96 #define GS_HCYC_STS     (1 << 4)
 97 #define GS_TO_STS       (1 << 5)
 98 #define GS_SMB_STS      (1 << 11)
 99 
100 #define GS_CLEAR_STS    (GS_ABRT_STS | GS_COL_STS | GS_PRERR_STS | \
101                          GS_HCYC_STS | GS_TO_STS )
102 
103 #define GE_CYC_TYPE_MASK        (7)
104 #define GE_HOST_STC             (1 << 3)
105 #define GE_ABORT                (1 << 5)
106 
107 
108 static int amd756_transaction(struct i2c_adapter *adap)
109 {
110         int temp;
111         int result = 0;
112         int timeout = 0;
113 
114         dev_dbg(&adap->dev, "Transaction (pre): GS=%04x, GE=%04x, ADD=%04x, "
115                 "DAT=%04x\n", inw_p(SMB_GLOBAL_STATUS),
116                 inw_p(SMB_GLOBAL_ENABLE), inw_p(SMB_HOST_ADDRESS),
117                 inb_p(SMB_HOST_DATA));
118 
119         /* Make sure the SMBus host is ready to start transmitting */
120         if ((temp = inw_p(SMB_GLOBAL_STATUS)) & (GS_HST_STS | GS_SMB_STS)) {
121                 dev_dbg(&adap->dev, "SMBus busy (%04x). Waiting...\n", temp);
122                 do {
123                         msleep(1);
124                         temp = inw_p(SMB_GLOBAL_STATUS);
125                 } while ((temp & (GS_HST_STS | GS_SMB_STS)) &&
126                          (timeout++ < MAX_TIMEOUT));
127                 /* If the SMBus is still busy, we give up */
128                 if (timeout > MAX_TIMEOUT) {
129                         dev_dbg(&adap->dev, "Busy wait timeout (%04x)\n", temp);
130                         goto abort;
131                 }
132                 timeout = 0;
133         }
134 
135         /* start the transaction by setting the start bit */
136         outw_p(inw(SMB_GLOBAL_ENABLE) | GE_HOST_STC, SMB_GLOBAL_ENABLE);
137 
138         /* We will always wait for a fraction of a second! */
139         do {
140                 msleep(1);
141                 temp = inw_p(SMB_GLOBAL_STATUS);
142         } while ((temp & GS_HST_STS) && (timeout++ < MAX_TIMEOUT));
143 
144         /* If the SMBus is still busy, we give up */
145         if (timeout > MAX_TIMEOUT) {
146                 dev_dbg(&adap->dev, "Completion timeout!\n");
147                 goto abort;
148         }
149 
150         if (temp & GS_PRERR_STS) {
151                 result = -ENXIO;
152                 dev_dbg(&adap->dev, "SMBus Protocol error (no response)!\n");
153         }
154 
155         if (temp & GS_COL_STS) {
156                 result = -EIO;
157                 dev_warn(&adap->dev, "SMBus collision!\n");
158         }
159 
160         if (temp & GS_TO_STS) {
161                 result = -ETIMEDOUT;
162                 dev_dbg(&adap->dev, "SMBus protocol timeout!\n");
163         }
164 
165         if (temp & GS_HCYC_STS)
166                 dev_dbg(&adap->dev, "SMBus protocol success!\n");
167 
168         outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
169 
170 #ifdef DEBUG
171         if (((temp = inw_p(SMB_GLOBAL_STATUS)) & GS_CLEAR_STS) != 0x00) {
172                 dev_dbg(&adap->dev,
173                         "Failed reset at end of transaction (%04x)\n", temp);
174         }
175 #endif
176 
177         dev_dbg(&adap->dev,
178                 "Transaction (post): GS=%04x, GE=%04x, ADD=%04x, DAT=%04x\n",
179                 inw_p(SMB_GLOBAL_STATUS), inw_p(SMB_GLOBAL_ENABLE),
180                 inw_p(SMB_HOST_ADDRESS), inb_p(SMB_HOST_DATA));
181 
182         return result;
183 
184  abort:
185         dev_warn(&adap->dev, "Sending abort\n");
186         outw_p(inw(SMB_GLOBAL_ENABLE) | GE_ABORT, SMB_GLOBAL_ENABLE);
187         msleep(100);
188         outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
189         return -EIO;
190 }
191 
192 /* Return negative errno on error. */
193 static s32 amd756_access(struct i2c_adapter * adap, u16 addr,
194                   unsigned short flags, char read_write,
195                   u8 command, int size, union i2c_smbus_data * data)
196 {
197         int i, len;
198         int status;
199 
200         switch (size) {
201         case I2C_SMBUS_QUICK:
202                 outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
203                        SMB_HOST_ADDRESS);
204                 size = AMD756_QUICK;
205                 break;
206         case I2C_SMBUS_BYTE:
207                 outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
208                        SMB_HOST_ADDRESS);
209                 if (read_write == I2C_SMBUS_WRITE)
210                         outb_p(command, SMB_HOST_DATA);
211                 size = AMD756_BYTE;
212                 break;
213         case I2C_SMBUS_BYTE_DATA:
214                 outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
215                        SMB_HOST_ADDRESS);
216                 outb_p(command, SMB_HOST_COMMAND);
217                 if (read_write == I2C_SMBUS_WRITE)
218                         outw_p(data->byte, SMB_HOST_DATA);
219                 size = AMD756_BYTE_DATA;
220                 break;
221         case I2C_SMBUS_WORD_DATA:
222                 outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
223                        SMB_HOST_ADDRESS);
224                 outb_p(command, SMB_HOST_COMMAND);
225                 if (read_write == I2C_SMBUS_WRITE)
226                         outw_p(data->word, SMB_HOST_DATA);      /* TODO: endian???? */
227                 size = AMD756_WORD_DATA;
228                 break;
229         case I2C_SMBUS_BLOCK_DATA:
230                 outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
231                        SMB_HOST_ADDRESS);
232                 outb_p(command, SMB_HOST_COMMAND);
233                 if (read_write == I2C_SMBUS_WRITE) {
234                         len = data->block[0];
235                         if (len < 0)
236                                 len = 0;
237                         if (len > 32)
238                                 len = 32;
239                         outw_p(len, SMB_HOST_DATA);
240                         /* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
241                         for (i = 1; i <= len; i++)
242                                 outb_p(data->block[i],
243                                        SMB_HOST_BLOCK_DATA);
244                 }
245                 size = AMD756_BLOCK_DATA;
246                 break;
247         default:
248                 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
249                 return -EOPNOTSUPP;
250         }
251 
252         /* How about enabling interrupts... */
253         outw_p(size & GE_CYC_TYPE_MASK, SMB_GLOBAL_ENABLE);
254 
255         status = amd756_transaction(adap);
256         if (status)
257                 return status;
258 
259         if ((read_write == I2C_SMBUS_WRITE) || (size == AMD756_QUICK))
260                 return 0;
261 
262 
263         switch (size) {
264         case AMD756_BYTE:
265                 data->byte = inw_p(SMB_HOST_DATA);
266                 break;
267         case AMD756_BYTE_DATA:
268                 data->byte = inw_p(SMB_HOST_DATA);
269                 break;
270         case AMD756_WORD_DATA:
271                 data->word = inw_p(SMB_HOST_DATA);      /* TODO: endian???? */
272                 break;
273         case AMD756_BLOCK_DATA:
274                 data->block[0] = inw_p(SMB_HOST_DATA) & 0x3f;
275                 if(data->block[0] > 32)
276                         data->block[0] = 32;
277                 /* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
278                 for (i = 1; i <= data->block[0]; i++)
279                         data->block[i] = inb_p(SMB_HOST_BLOCK_DATA);
280                 break;
281         }
282 
283         return 0;
284 }
285 
286 static u32 amd756_func(struct i2c_adapter *adapter)
287 {
288         return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
289             I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
290             I2C_FUNC_SMBUS_BLOCK_DATA;
291 }
292 
293 static const struct i2c_algorithm smbus_algorithm = {
294         .smbus_xfer     = amd756_access,
295         .functionality  = amd756_func,
296 };
297 
298 struct i2c_adapter amd756_smbus = {
299         .owner          = THIS_MODULE,
300         .class          = I2C_CLASS_HWMON | I2C_CLASS_SPD,
301         .algo           = &smbus_algorithm,
302 };
303 
304 enum chiptype { AMD756, AMD766, AMD768, NFORCE, AMD8111 };
305 static const char* chipname[] = {
306         "AMD756", "AMD766", "AMD768",
307         "nVidia nForce", "AMD8111",
308 };
309 
310 static DEFINE_PCI_DEVICE_TABLE(amd756_ids) = {
311         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_740B),
312           .driver_data = AMD756 },
313         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7413),
314           .driver_data = AMD766 },
315         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_OPUS_7443),
316           .driver_data = AMD768 },
317         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS),
318           .driver_data = AMD8111 },
319         { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_SMBUS),
320           .driver_data = NFORCE },
321         { 0, }
322 };
323 
324 MODULE_DEVICE_TABLE (pci, amd756_ids);
325 
326 static int amd756_probe(struct pci_dev *pdev, const struct pci_device_id *id)
327 {
328         int nforce = (id->driver_data == NFORCE);
329         int error;
330         u8 temp;
331         
332         if (amd756_ioport) {
333                 dev_err(&pdev->dev, "Only one device supported "
334                        "(you have a strange motherboard, btw)\n");
335                 return -ENODEV;
336         }
337 
338         if (nforce) {
339                 if (PCI_FUNC(pdev->devfn) != 1)
340                         return -ENODEV;
341 
342                 pci_read_config_word(pdev, SMBBANFORCE, &amd756_ioport);
343                 amd756_ioport &= 0xfffc;
344         } else { /* amd */
345                 if (PCI_FUNC(pdev->devfn) != 3)
346                         return -ENODEV;
347 
348                 pci_read_config_byte(pdev, SMBGCFG, &temp);
349                 if ((temp & 128) == 0) {
350                         dev_err(&pdev->dev,
351                                 "Error: SMBus controller I/O not enabled!\n");
352                         return -ENODEV;
353                 }
354 
355                 /* Determine the address of the SMBus areas */
356                 /* Technically it is a dword but... */
357                 pci_read_config_word(pdev, SMBBA, &amd756_ioport);
358                 amd756_ioport &= 0xff00;
359                 amd756_ioport += SMB_ADDR_OFFSET;
360         }
361 
362         error = acpi_check_region(amd756_ioport, SMB_IOSIZE,
363                                   amd756_driver.name);
364         if (error)
365                 return -ENODEV;
366 
367         if (!request_region(amd756_ioport, SMB_IOSIZE, amd756_driver.name)) {
368                 dev_err(&pdev->dev, "SMB region 0x%x already in use!\n",
369                         amd756_ioport);
370                 return -ENODEV;
371         }
372 
373         pci_read_config_byte(pdev, SMBREV, &temp);
374         dev_dbg(&pdev->dev, "SMBREV = 0x%X\n", temp);
375         dev_dbg(&pdev->dev, "AMD756_smba = 0x%X\n", amd756_ioport);
376 
377         /* set up the sysfs linkage to our parent device */
378         amd756_smbus.dev.parent = &pdev->dev;
379 
380         snprintf(amd756_smbus.name, sizeof(amd756_smbus.name),
381                  "SMBus %s adapter at %04x", chipname[id->driver_data],
382                  amd756_ioport);
383 
384         error = i2c_add_adapter(&amd756_smbus);
385         if (error) {
386                 dev_err(&pdev->dev,
387                         "Adapter registration failed, module not inserted\n");
388                 goto out_err;
389         }
390 
391         return 0;
392 
393  out_err:
394         release_region(amd756_ioport, SMB_IOSIZE);
395         return error;
396 }
397 
398 static void amd756_remove(struct pci_dev *dev)
399 {
400         i2c_del_adapter(&amd756_smbus);
401         release_region(amd756_ioport, SMB_IOSIZE);
402 }
403 
404 static struct pci_driver amd756_driver = {
405         .name           = "amd756_smbus",
406         .id_table       = amd756_ids,
407         .probe          = amd756_probe,
408         .remove         = amd756_remove,
409 };
410 
411 module_pci_driver(amd756_driver);
412 
413 MODULE_AUTHOR("Merlin Hughes <merlin@merlin.org>");
414 MODULE_DESCRIPTION("AMD756/766/768/8111 and nVidia nForce SMBus driver");
415 MODULE_LICENSE("GPL");
416 
417 EXPORT_SYMBOL(amd756_smbus);
418 

This page was automatically generated by LXR 0.3.1 (source).  •  Linux is a registered trademark of Linus Torvalds  •  Contact us