Version:  2.0.40 2.2.26 2.4.37 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0

Linux/drivers/gpu/drm/radeon/radeon_drv.c

  1 /**
  2  * \file radeon_drv.c
  3  * ATI Radeon driver
  4  *
  5  * \author Gareth Hughes <gareth@valinux.com>
  6  */
  7 
  8 /*
  9  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
 10  * All Rights Reserved.
 11  *
 12  * Permission is hereby granted, free of charge, to any person obtaining a
 13  * copy of this software and associated documentation files (the "Software"),
 14  * to deal in the Software without restriction, including without limitation
 15  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 16  * and/or sell copies of the Software, and to permit persons to whom the
 17  * Software is furnished to do so, subject to the following conditions:
 18  *
 19  * The above copyright notice and this permission notice (including the next
 20  * paragraph) shall be included in all copies or substantial portions of the
 21  * Software.
 22  *
 23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 26  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 27  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 28  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 29  * OTHER DEALINGS IN THE SOFTWARE.
 30  */
 31 
 32 #include <drm/drmP.h>
 33 #include <drm/radeon_drm.h>
 34 #include "radeon_drv.h"
 35 
 36 #include <drm/drm_pciids.h>
 37 #include <linux/console.h>
 38 #include <linux/module.h>
 39 #include <linux/pm_runtime.h>
 40 #include <linux/vga_switcheroo.h>
 41 #include <drm/drm_gem.h>
 42 
 43 #include "drm_crtc_helper.h"
 44 #include "radeon_kfd.h"
 45 
 46 /*
 47  * KMS wrapper.
 48  * - 2.0.0 - initial interface
 49  * - 2.1.0 - add square tiling interface
 50  * - 2.2.0 - add r6xx/r7xx const buffer support
 51  * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
 52  * - 2.4.0 - add crtc id query
 53  * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
 54  * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
 55  *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
 56  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
 57  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
 58  *   2.10.0 - fusion 2D tiling
 59  *   2.11.0 - backend map, initial compute support for the CS checker
 60  *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
 61  *   2.13.0 - virtual memory support, streamout
 62  *   2.14.0 - add evergreen tiling informations
 63  *   2.15.0 - add max_pipes query
 64  *   2.16.0 - fix evergreen 2D tiled surface calculation
 65  *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
 66  *   2.18.0 - r600-eg: allow "invalid" DB formats
 67  *   2.19.0 - r600-eg: MSAA textures
 68  *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
 69  *   2.21.0 - r600-r700: FMASK and CMASK
 70  *   2.22.0 - r600 only: RESOLVE_BOX allowed
 71  *   2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
 72  *   2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
 73  *   2.25.0 - eg+: new info request for num SE and num SH
 74  *   2.26.0 - r600-eg: fix htile size computation
 75  *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
 76  *   2.28.0 - r600-eg: Add MEM_WRITE packet support
 77  *   2.29.0 - R500 FP16 color clear registers
 78  *   2.30.0 - fix for FMASK texturing
 79  *   2.31.0 - Add fastfb support for rs690
 80  *   2.32.0 - new info request for rings working
 81  *   2.33.0 - Add SI tiling mode array query
 82  *   2.34.0 - Add CIK tiling mode array query
 83  *   2.35.0 - Add CIK macrotile mode array query
 84  *   2.36.0 - Fix CIK DCE tiling setup
 85  *   2.37.0 - allow GS ring setup on r6xx/r7xx
 86  *   2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN),
 87  *            CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
 88  *   2.39.0 - Add INFO query for number of active CUs
 89  *   2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting
 90  *            CS to GPU on >= r600
 91  *   2.41.0 - evergreen/cayman: Add SET_BASE/DRAW_INDIRECT command parsing support
 92  */
 93 #define KMS_DRIVER_MAJOR        2
 94 #define KMS_DRIVER_MINOR        41
 95 #define KMS_DRIVER_PATCHLEVEL   0
 96 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
 97 int radeon_driver_unload_kms(struct drm_device *dev);
 98 void radeon_driver_lastclose_kms(struct drm_device *dev);
 99 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
100 void radeon_driver_postclose_kms(struct drm_device *dev,
101                                  struct drm_file *file_priv);
102 void radeon_driver_preclose_kms(struct drm_device *dev,
103                                 struct drm_file *file_priv);
104 int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon);
105 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
106 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
107 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
108 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
109 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
110                                     int *max_error,
111                                     struct timeval *vblank_time,
112                                     unsigned flags);
113 void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
114 int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
115 void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
116 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg);
117 void radeon_gem_object_free(struct drm_gem_object *obj);
118 int radeon_gem_object_open(struct drm_gem_object *obj,
119                                 struct drm_file *file_priv);
120 void radeon_gem_object_close(struct drm_gem_object *obj,
121                                 struct drm_file *file_priv);
122 struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
123                                         struct drm_gem_object *gobj,
124                                         int flags);
125 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
126                                       unsigned int flags,
127                                       int *vpos, int *hpos, ktime_t *stime,
128                                       ktime_t *etime);
129 extern bool radeon_is_px(struct drm_device *dev);
130 extern const struct drm_ioctl_desc radeon_ioctls_kms[];
131 extern int radeon_max_kms_ioctl;
132 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
133 int radeon_mode_dumb_mmap(struct drm_file *filp,
134                           struct drm_device *dev,
135                           uint32_t handle, uint64_t *offset_p);
136 int radeon_mode_dumb_create(struct drm_file *file_priv,
137                             struct drm_device *dev,
138                             struct drm_mode_create_dumb *args);
139 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
140 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
141                                                         struct dma_buf_attachment *,
142                                                         struct sg_table *sg);
143 int radeon_gem_prime_pin(struct drm_gem_object *obj);
144 void radeon_gem_prime_unpin(struct drm_gem_object *obj);
145 struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *);
146 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
147 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
148 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
149                                     unsigned long arg);
150 
151 #if defined(CONFIG_DEBUG_FS)
152 int radeon_debugfs_init(struct drm_minor *minor);
153 void radeon_debugfs_cleanup(struct drm_minor *minor);
154 #endif
155 
156 /* atpx handler */
157 #if defined(CONFIG_VGA_SWITCHEROO)
158 void radeon_register_atpx_handler(void);
159 void radeon_unregister_atpx_handler(void);
160 #else
161 static inline void radeon_register_atpx_handler(void) {}
162 static inline void radeon_unregister_atpx_handler(void) {}
163 #endif
164 
165 int radeon_no_wb;
166 int radeon_modeset = -1;
167 int radeon_dynclks = -1;
168 int radeon_r4xx_atom = 0;
169 int radeon_agpmode = 0;
170 int radeon_vram_limit = 0;
171 int radeon_gart_size = -1; /* auto */
172 int radeon_benchmarking = 0;
173 int radeon_testing = 0;
174 int radeon_connector_table = 0;
175 int radeon_tv = 1;
176 int radeon_audio = -1;
177 int radeon_disp_priority = 0;
178 int radeon_hw_i2c = 0;
179 int radeon_pcie_gen2 = -1;
180 int radeon_msi = -1;
181 int radeon_lockup_timeout = 10000;
182 int radeon_fastfb = 0;
183 int radeon_dpm = -1;
184 int radeon_aspm = -1;
185 int radeon_runtime_pm = -1;
186 int radeon_hard_reset = 0;
187 int radeon_vm_size = 8;
188 int radeon_vm_block_size = -1;
189 int radeon_deep_color = 0;
190 int radeon_use_pflipirq = 2;
191 int radeon_bapm = -1;
192 int radeon_backlight = -1;
193 
194 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
195 module_param_named(no_wb, radeon_no_wb, int, 0444);
196 
197 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
198 module_param_named(modeset, radeon_modeset, int, 0400);
199 
200 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
201 module_param_named(dynclks, radeon_dynclks, int, 0444);
202 
203 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
204 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
205 
206 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
207 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
208 
209 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
210 module_param_named(agpmode, radeon_agpmode, int, 0444);
211 
212 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
213 module_param_named(gartsize, radeon_gart_size, int, 0600);
214 
215 MODULE_PARM_DESC(benchmark, "Run benchmark");
216 module_param_named(benchmark, radeon_benchmarking, int, 0444);
217 
218 MODULE_PARM_DESC(test, "Run tests");
219 module_param_named(test, radeon_testing, int, 0444);
220 
221 MODULE_PARM_DESC(connector_table, "Force connector table");
222 module_param_named(connector_table, radeon_connector_table, int, 0444);
223 
224 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
225 module_param_named(tv, radeon_tv, int, 0444);
226 
227 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
228 module_param_named(audio, radeon_audio, int, 0444);
229 
230 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
231 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
232 
233 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
234 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
235 
236 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
237 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
238 
239 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
240 module_param_named(msi, radeon_msi, int, 0444);
241 
242 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
243 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
244 
245 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
246 module_param_named(fastfb, radeon_fastfb, int, 0444);
247 
248 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
249 module_param_named(dpm, radeon_dpm, int, 0444);
250 
251 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
252 module_param_named(aspm, radeon_aspm, int, 0444);
253 
254 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
255 module_param_named(runpm, radeon_runtime_pm, int, 0444);
256 
257 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
258 module_param_named(hard_reset, radeon_hard_reset, int, 0444);
259 
260 MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
261 module_param_named(vm_size, radeon_vm_size, int, 0444);
262 
263 MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
264 module_param_named(vm_block_size, radeon_vm_block_size, int, 0444);
265 
266 MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
267 module_param_named(deep_color, radeon_deep_color, int, 0444);
268 
269 MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))");
270 module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
271 
272 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
273 module_param_named(bapm, radeon_bapm, int, 0444);
274 
275 MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)");
276 module_param_named(backlight, radeon_backlight, int, 0444);
277 
278 static struct pci_device_id pciidlist[] = {
279         radeon_PCI_IDS
280 };
281 
282 MODULE_DEVICE_TABLE(pci, pciidlist);
283 
284 #ifdef CONFIG_DRM_RADEON_UMS
285 
286 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
287 {
288         drm_radeon_private_t *dev_priv = dev->dev_private;
289 
290         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
291                 return 0;
292 
293         /* Disable *all* interrupts */
294         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
295                 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
296         RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
297         return 0;
298 }
299 
300 static int radeon_resume(struct drm_device *dev)
301 {
302         drm_radeon_private_t *dev_priv = dev->dev_private;
303 
304         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
305                 return 0;
306 
307         /* Restore interrupt registers */
308         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
309                 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
310         RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
311         return 0;
312 }
313 
314 
315 static const struct file_operations radeon_driver_old_fops = {
316         .owner = THIS_MODULE,
317         .open = drm_open,
318         .release = drm_release,
319         .unlocked_ioctl = drm_ioctl,
320         .mmap = drm_legacy_mmap,
321         .poll = drm_poll,
322         .read = drm_read,
323 #ifdef CONFIG_COMPAT
324         .compat_ioctl = radeon_compat_ioctl,
325 #endif
326         .llseek = noop_llseek,
327 };
328 
329 static struct drm_driver driver_old = {
330         .driver_features =
331             DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
332             DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
333         .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
334         .load = radeon_driver_load,
335         .firstopen = radeon_driver_firstopen,
336         .open = radeon_driver_open,
337         .preclose = radeon_driver_preclose,
338         .postclose = radeon_driver_postclose,
339         .lastclose = radeon_driver_lastclose,
340         .set_busid = drm_pci_set_busid,
341         .unload = radeon_driver_unload,
342         .suspend = radeon_suspend,
343         .resume = radeon_resume,
344         .get_vblank_counter = radeon_get_vblank_counter,
345         .enable_vblank = radeon_enable_vblank,
346         .disable_vblank = radeon_disable_vblank,
347         .master_create = radeon_master_create,
348         .master_destroy = radeon_master_destroy,
349         .irq_preinstall = radeon_driver_irq_preinstall,
350         .irq_postinstall = radeon_driver_irq_postinstall,
351         .irq_uninstall = radeon_driver_irq_uninstall,
352         .irq_handler = radeon_driver_irq_handler,
353         .ioctls = radeon_ioctls,
354         .dma_ioctl = radeon_cp_buffers,
355         .fops = &radeon_driver_old_fops,
356         .name = DRIVER_NAME,
357         .desc = DRIVER_DESC,
358         .date = DRIVER_DATE,
359         .major = DRIVER_MAJOR,
360         .minor = DRIVER_MINOR,
361         .patchlevel = DRIVER_PATCHLEVEL,
362 };
363 
364 #endif
365 
366 static struct drm_driver kms_driver;
367 
368 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
369 {
370         struct apertures_struct *ap;
371         bool primary = false;
372 
373         ap = alloc_apertures(1);
374         if (!ap)
375                 return -ENOMEM;
376 
377         ap->ranges[0].base = pci_resource_start(pdev, 0);
378         ap->ranges[0].size = pci_resource_len(pdev, 0);
379 
380 #ifdef CONFIG_X86
381         primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
382 #endif
383         remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
384         kfree(ap);
385 
386         return 0;
387 }
388 
389 static int radeon_pci_probe(struct pci_dev *pdev,
390                             const struct pci_device_id *ent)
391 {
392         int ret;
393 
394         /* Get rid of things like offb */
395         ret = radeon_kick_out_firmware_fb(pdev);
396         if (ret)
397                 return ret;
398 
399         return drm_get_pci_dev(pdev, ent, &kms_driver);
400 }
401 
402 static void
403 radeon_pci_remove(struct pci_dev *pdev)
404 {
405         struct drm_device *dev = pci_get_drvdata(pdev);
406 
407         drm_put_dev(dev);
408 }
409 
410 static int radeon_pmops_suspend(struct device *dev)
411 {
412         struct pci_dev *pdev = to_pci_dev(dev);
413         struct drm_device *drm_dev = pci_get_drvdata(pdev);
414         return radeon_suspend_kms(drm_dev, true, true);
415 }
416 
417 static int radeon_pmops_resume(struct device *dev)
418 {
419         struct pci_dev *pdev = to_pci_dev(dev);
420         struct drm_device *drm_dev = pci_get_drvdata(pdev);
421         return radeon_resume_kms(drm_dev, true, true);
422 }
423 
424 static int radeon_pmops_freeze(struct device *dev)
425 {
426         struct pci_dev *pdev = to_pci_dev(dev);
427         struct drm_device *drm_dev = pci_get_drvdata(pdev);
428         return radeon_suspend_kms(drm_dev, false, true);
429 }
430 
431 static int radeon_pmops_thaw(struct device *dev)
432 {
433         struct pci_dev *pdev = to_pci_dev(dev);
434         struct drm_device *drm_dev = pci_get_drvdata(pdev);
435         return radeon_resume_kms(drm_dev, false, true);
436 }
437 
438 static int radeon_pmops_runtime_suspend(struct device *dev)
439 {
440         struct pci_dev *pdev = to_pci_dev(dev);
441         struct drm_device *drm_dev = pci_get_drvdata(pdev);
442         int ret;
443 
444         if (!radeon_is_px(drm_dev)) {
445                 pm_runtime_forbid(dev);
446                 return -EBUSY;
447         }
448 
449         drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
450         drm_kms_helper_poll_disable(drm_dev);
451         vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
452 
453         ret = radeon_suspend_kms(drm_dev, false, false);
454         pci_save_state(pdev);
455         pci_disable_device(pdev);
456         pci_ignore_hotplug(pdev);
457         pci_set_power_state(pdev, PCI_D3cold);
458         drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
459 
460         return 0;
461 }
462 
463 static int radeon_pmops_runtime_resume(struct device *dev)
464 {
465         struct pci_dev *pdev = to_pci_dev(dev);
466         struct drm_device *drm_dev = pci_get_drvdata(pdev);
467         int ret;
468 
469         if (!radeon_is_px(drm_dev))
470                 return -EINVAL;
471 
472         drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
473 
474         pci_set_power_state(pdev, PCI_D0);
475         pci_restore_state(pdev);
476         ret = pci_enable_device(pdev);
477         if (ret)
478                 return ret;
479         pci_set_master(pdev);
480 
481         ret = radeon_resume_kms(drm_dev, false, false);
482         drm_kms_helper_poll_enable(drm_dev);
483         vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
484         drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
485         return 0;
486 }
487 
488 static int radeon_pmops_runtime_idle(struct device *dev)
489 {
490         struct pci_dev *pdev = to_pci_dev(dev);
491         struct drm_device *drm_dev = pci_get_drvdata(pdev);
492         struct drm_crtc *crtc;
493 
494         if (!radeon_is_px(drm_dev)) {
495                 pm_runtime_forbid(dev);
496                 return -EBUSY;
497         }
498 
499         list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
500                 if (crtc->enabled) {
501                         DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
502                         return -EBUSY;
503                 }
504         }
505 
506         pm_runtime_mark_last_busy(dev);
507         pm_runtime_autosuspend(dev);
508         /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
509         return 1;
510 }
511 
512 long radeon_drm_ioctl(struct file *filp,
513                       unsigned int cmd, unsigned long arg)
514 {
515         struct drm_file *file_priv = filp->private_data;
516         struct drm_device *dev;
517         long ret;
518         dev = file_priv->minor->dev;
519         ret = pm_runtime_get_sync(dev->dev);
520         if (ret < 0)
521                 return ret;
522 
523         ret = drm_ioctl(filp, cmd, arg);
524         
525         pm_runtime_mark_last_busy(dev->dev);
526         pm_runtime_put_autosuspend(dev->dev);
527         return ret;
528 }
529 
530 static const struct dev_pm_ops radeon_pm_ops = {
531         .suspend = radeon_pmops_suspend,
532         .resume = radeon_pmops_resume,
533         .freeze = radeon_pmops_freeze,
534         .thaw = radeon_pmops_thaw,
535         .poweroff = radeon_pmops_freeze,
536         .restore = radeon_pmops_resume,
537         .runtime_suspend = radeon_pmops_runtime_suspend,
538         .runtime_resume = radeon_pmops_runtime_resume,
539         .runtime_idle = radeon_pmops_runtime_idle,
540 };
541 
542 static const struct file_operations radeon_driver_kms_fops = {
543         .owner = THIS_MODULE,
544         .open = drm_open,
545         .release = drm_release,
546         .unlocked_ioctl = radeon_drm_ioctl,
547         .mmap = radeon_mmap,
548         .poll = drm_poll,
549         .read = drm_read,
550 #ifdef CONFIG_COMPAT
551         .compat_ioctl = radeon_kms_compat_ioctl,
552 #endif
553 };
554 
555 static struct drm_driver kms_driver = {
556         .driver_features =
557             DRIVER_USE_AGP |
558             DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
559             DRIVER_PRIME | DRIVER_RENDER,
560         .load = radeon_driver_load_kms,
561         .open = radeon_driver_open_kms,
562         .preclose = radeon_driver_preclose_kms,
563         .postclose = radeon_driver_postclose_kms,
564         .lastclose = radeon_driver_lastclose_kms,
565         .set_busid = drm_pci_set_busid,
566         .unload = radeon_driver_unload_kms,
567         .get_vblank_counter = radeon_get_vblank_counter_kms,
568         .enable_vblank = radeon_enable_vblank_kms,
569         .disable_vblank = radeon_disable_vblank_kms,
570         .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
571         .get_scanout_position = radeon_get_crtc_scanoutpos,
572 #if defined(CONFIG_DEBUG_FS)
573         .debugfs_init = radeon_debugfs_init,
574         .debugfs_cleanup = radeon_debugfs_cleanup,
575 #endif
576         .irq_preinstall = radeon_driver_irq_preinstall_kms,
577         .irq_postinstall = radeon_driver_irq_postinstall_kms,
578         .irq_uninstall = radeon_driver_irq_uninstall_kms,
579         .irq_handler = radeon_driver_irq_handler_kms,
580         .ioctls = radeon_ioctls_kms,
581         .gem_free_object = radeon_gem_object_free,
582         .gem_open_object = radeon_gem_object_open,
583         .gem_close_object = radeon_gem_object_close,
584         .dumb_create = radeon_mode_dumb_create,
585         .dumb_map_offset = radeon_mode_dumb_mmap,
586         .dumb_destroy = drm_gem_dumb_destroy,
587         .fops = &radeon_driver_kms_fops,
588 
589         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
590         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
591         .gem_prime_export = radeon_gem_prime_export,
592         .gem_prime_import = drm_gem_prime_import,
593         .gem_prime_pin = radeon_gem_prime_pin,
594         .gem_prime_unpin = radeon_gem_prime_unpin,
595         .gem_prime_res_obj = radeon_gem_prime_res_obj,
596         .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
597         .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
598         .gem_prime_vmap = radeon_gem_prime_vmap,
599         .gem_prime_vunmap = radeon_gem_prime_vunmap,
600 
601         .name = DRIVER_NAME,
602         .desc = DRIVER_DESC,
603         .date = DRIVER_DATE,
604         .major = KMS_DRIVER_MAJOR,
605         .minor = KMS_DRIVER_MINOR,
606         .patchlevel = KMS_DRIVER_PATCHLEVEL,
607 };
608 
609 static struct drm_driver *driver;
610 static struct pci_driver *pdriver;
611 
612 #ifdef CONFIG_DRM_RADEON_UMS
613 static struct pci_driver radeon_pci_driver = {
614         .name = DRIVER_NAME,
615         .id_table = pciidlist,
616 };
617 #endif
618 
619 static struct pci_driver radeon_kms_pci_driver = {
620         .name = DRIVER_NAME,
621         .id_table = pciidlist,
622         .probe = radeon_pci_probe,
623         .remove = radeon_pci_remove,
624         .driver.pm = &radeon_pm_ops,
625 };
626 
627 static int __init radeon_init(void)
628 {
629 #ifdef CONFIG_VGA_CONSOLE
630         if (vgacon_text_force() && radeon_modeset == -1) {
631                 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
632                 radeon_modeset = 0;
633         }
634 #endif
635         /* set to modesetting by default if not nomodeset */
636         if (radeon_modeset == -1)
637                 radeon_modeset = 1;
638 
639         if (radeon_modeset == 1) {
640                 DRM_INFO("radeon kernel modesetting enabled.\n");
641                 driver = &kms_driver;
642                 pdriver = &radeon_kms_pci_driver;
643                 driver->driver_features |= DRIVER_MODESET;
644                 driver->num_ioctls = radeon_max_kms_ioctl;
645                 radeon_register_atpx_handler();
646 
647         } else {
648 #ifdef CONFIG_DRM_RADEON_UMS
649                 DRM_INFO("radeon userspace modesetting enabled.\n");
650                 driver = &driver_old;
651                 pdriver = &radeon_pci_driver;
652                 driver->driver_features &= ~DRIVER_MODESET;
653                 driver->num_ioctls = radeon_max_ioctl;
654 #else
655                 DRM_ERROR("No UMS support in radeon module!\n");
656                 return -EINVAL;
657 #endif
658         }
659 
660         radeon_kfd_init();
661 
662         /* let modprobe override vga console setting */
663         return drm_pci_init(driver, pdriver);
664 }
665 
666 static void __exit radeon_exit(void)
667 {
668         radeon_kfd_fini();
669         drm_pci_exit(driver, pdriver);
670         radeon_unregister_atpx_handler();
671 }
672 
673 module_init(radeon_init);
674 module_exit(radeon_exit);
675 
676 MODULE_AUTHOR(DRIVER_AUTHOR);
677 MODULE_DESCRIPTION(DRIVER_DESC);
678 MODULE_LICENSE("GPL and additional rights");
679 

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