Version:  2.0.40 2.2.26 2.4.37 2.6.39 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15

Linux/drivers/gpu/drm/radeon/radeon_drv.c

  1 /**
  2  * \file radeon_drv.c
  3  * ATI Radeon driver
  4  *
  5  * \author Gareth Hughes <gareth@valinux.com>
  6  */
  7 
  8 /*
  9  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
 10  * All Rights Reserved.
 11  *
 12  * Permission is hereby granted, free of charge, to any person obtaining a
 13  * copy of this software and associated documentation files (the "Software"),
 14  * to deal in the Software without restriction, including without limitation
 15  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 16  * and/or sell copies of the Software, and to permit persons to whom the
 17  * Software is furnished to do so, subject to the following conditions:
 18  *
 19  * The above copyright notice and this permission notice (including the next
 20  * paragraph) shall be included in all copies or substantial portions of the
 21  * Software.
 22  *
 23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 26  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 27  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 28  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 29  * OTHER DEALINGS IN THE SOFTWARE.
 30  */
 31 
 32 #include <drm/drmP.h>
 33 #include <drm/radeon_drm.h>
 34 #include "radeon_drv.h"
 35 
 36 #include <drm/drm_pciids.h>
 37 #include <linux/console.h>
 38 #include <linux/module.h>
 39 #include <linux/pm_runtime.h>
 40 #include <linux/vga_switcheroo.h>
 41 #include "drm_crtc_helper.h"
 42 /*
 43  * KMS wrapper.
 44  * - 2.0.0 - initial interface
 45  * - 2.1.0 - add square tiling interface
 46  * - 2.2.0 - add r6xx/r7xx const buffer support
 47  * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
 48  * - 2.4.0 - add crtc id query
 49  * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
 50  * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
 51  *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
 52  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
 53  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
 54  *   2.10.0 - fusion 2D tiling
 55  *   2.11.0 - backend map, initial compute support for the CS checker
 56  *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
 57  *   2.13.0 - virtual memory support, streamout
 58  *   2.14.0 - add evergreen tiling informations
 59  *   2.15.0 - add max_pipes query
 60  *   2.16.0 - fix evergreen 2D tiled surface calculation
 61  *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
 62  *   2.18.0 - r600-eg: allow "invalid" DB formats
 63  *   2.19.0 - r600-eg: MSAA textures
 64  *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
 65  *   2.21.0 - r600-r700: FMASK and CMASK
 66  *   2.22.0 - r600 only: RESOLVE_BOX allowed
 67  *   2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
 68  *   2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
 69  *   2.25.0 - eg+: new info request for num SE and num SH
 70  *   2.26.0 - r600-eg: fix htile size computation
 71  *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
 72  *   2.28.0 - r600-eg: Add MEM_WRITE packet support
 73  *   2.29.0 - R500 FP16 color clear registers
 74  *   2.30.0 - fix for FMASK texturing
 75  *   2.31.0 - Add fastfb support for rs690
 76  *   2.32.0 - new info request for rings working
 77  *   2.33.0 - Add SI tiling mode array query
 78  *   2.34.0 - Add CIK tiling mode array query
 79  *   2.35.0 - Add CIK macrotile mode array query
 80  *   2.36.0 - Fix CIK DCE tiling setup
 81  *   2.37.0 - allow GS ring setup on r6xx/r7xx
 82  *   2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN),
 83  *            CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
 84  */
 85 #define KMS_DRIVER_MAJOR        2
 86 #define KMS_DRIVER_MINOR        38
 87 #define KMS_DRIVER_PATCHLEVEL   0
 88 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
 89 int radeon_driver_unload_kms(struct drm_device *dev);
 90 void radeon_driver_lastclose_kms(struct drm_device *dev);
 91 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
 92 void radeon_driver_postclose_kms(struct drm_device *dev,
 93                                  struct drm_file *file_priv);
 94 void radeon_driver_preclose_kms(struct drm_device *dev,
 95                                 struct drm_file *file_priv);
 96 int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon);
 97 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
 98 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
 99 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
100 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
101 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
102                                     int *max_error,
103                                     struct timeval *vblank_time,
104                                     unsigned flags);
105 void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
106 int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
107 void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
108 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg);
109 void radeon_gem_object_free(struct drm_gem_object *obj);
110 int radeon_gem_object_open(struct drm_gem_object *obj,
111                                 struct drm_file *file_priv);
112 void radeon_gem_object_close(struct drm_gem_object *obj,
113                                 struct drm_file *file_priv);
114 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
115                                       unsigned int flags,
116                                       int *vpos, int *hpos, ktime_t *stime,
117                                       ktime_t *etime);
118 extern bool radeon_is_px(struct drm_device *dev);
119 extern const struct drm_ioctl_desc radeon_ioctls_kms[];
120 extern int radeon_max_kms_ioctl;
121 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
122 int radeon_mode_dumb_mmap(struct drm_file *filp,
123                           struct drm_device *dev,
124                           uint32_t handle, uint64_t *offset_p);
125 int radeon_mode_dumb_create(struct drm_file *file_priv,
126                             struct drm_device *dev,
127                             struct drm_mode_create_dumb *args);
128 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
129 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
130                                                         size_t size,
131                                                         struct sg_table *sg);
132 int radeon_gem_prime_pin(struct drm_gem_object *obj);
133 void radeon_gem_prime_unpin(struct drm_gem_object *obj);
134 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
135 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
136 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
137                                     unsigned long arg);
138 
139 #if defined(CONFIG_DEBUG_FS)
140 int radeon_debugfs_init(struct drm_minor *minor);
141 void radeon_debugfs_cleanup(struct drm_minor *minor);
142 #endif
143 
144 /* atpx handler */
145 #if defined(CONFIG_VGA_SWITCHEROO)
146 void radeon_register_atpx_handler(void);
147 void radeon_unregister_atpx_handler(void);
148 #else
149 static inline void radeon_register_atpx_handler(void) {}
150 static inline void radeon_unregister_atpx_handler(void) {}
151 #endif
152 
153 int radeon_no_wb;
154 int radeon_modeset = -1;
155 int radeon_dynclks = -1;
156 int radeon_r4xx_atom = 0;
157 int radeon_agpmode = 0;
158 int radeon_vram_limit = 0;
159 int radeon_gart_size = -1; /* auto */
160 int radeon_benchmarking = 0;
161 int radeon_testing = 0;
162 int radeon_connector_table = 0;
163 int radeon_tv = 1;
164 int radeon_audio = -1;
165 int radeon_disp_priority = 0;
166 int radeon_hw_i2c = 0;
167 int radeon_pcie_gen2 = -1;
168 int radeon_msi = -1;
169 int radeon_lockup_timeout = 10000;
170 int radeon_fastfb = 0;
171 int radeon_dpm = -1;
172 int radeon_aspm = -1;
173 int radeon_runtime_pm = -1;
174 int radeon_hard_reset = 0;
175 
176 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
177 module_param_named(no_wb, radeon_no_wb, int, 0444);
178 
179 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
180 module_param_named(modeset, radeon_modeset, int, 0400);
181 
182 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
183 module_param_named(dynclks, radeon_dynclks, int, 0444);
184 
185 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
186 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
187 
188 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
189 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
190 
191 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
192 module_param_named(agpmode, radeon_agpmode, int, 0444);
193 
194 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
195 module_param_named(gartsize, radeon_gart_size, int, 0600);
196 
197 MODULE_PARM_DESC(benchmark, "Run benchmark");
198 module_param_named(benchmark, radeon_benchmarking, int, 0444);
199 
200 MODULE_PARM_DESC(test, "Run tests");
201 module_param_named(test, radeon_testing, int, 0444);
202 
203 MODULE_PARM_DESC(connector_table, "Force connector table");
204 module_param_named(connector_table, radeon_connector_table, int, 0444);
205 
206 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
207 module_param_named(tv, radeon_tv, int, 0444);
208 
209 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
210 module_param_named(audio, radeon_audio, int, 0444);
211 
212 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
213 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
214 
215 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
216 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
217 
218 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
219 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
220 
221 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
222 module_param_named(msi, radeon_msi, int, 0444);
223 
224 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
225 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
226 
227 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
228 module_param_named(fastfb, radeon_fastfb, int, 0444);
229 
230 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
231 module_param_named(dpm, radeon_dpm, int, 0444);
232 
233 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
234 module_param_named(aspm, radeon_aspm, int, 0444);
235 
236 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
237 module_param_named(runpm, radeon_runtime_pm, int, 0444);
238 
239 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
240 module_param_named(hard_reset, radeon_hard_reset, int, 0444);
241 
242 static struct pci_device_id pciidlist[] = {
243         radeon_PCI_IDS
244 };
245 
246 MODULE_DEVICE_TABLE(pci, pciidlist);
247 
248 #ifdef CONFIG_DRM_RADEON_UMS
249 
250 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
251 {
252         drm_radeon_private_t *dev_priv = dev->dev_private;
253 
254         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
255                 return 0;
256 
257         /* Disable *all* interrupts */
258         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
259                 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
260         RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
261         return 0;
262 }
263 
264 static int radeon_resume(struct drm_device *dev)
265 {
266         drm_radeon_private_t *dev_priv = dev->dev_private;
267 
268         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
269                 return 0;
270 
271         /* Restore interrupt registers */
272         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
273                 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
274         RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
275         return 0;
276 }
277 
278 
279 static const struct file_operations radeon_driver_old_fops = {
280         .owner = THIS_MODULE,
281         .open = drm_open,
282         .release = drm_release,
283         .unlocked_ioctl = drm_ioctl,
284         .mmap = drm_mmap,
285         .poll = drm_poll,
286         .read = drm_read,
287 #ifdef CONFIG_COMPAT
288         .compat_ioctl = radeon_compat_ioctl,
289 #endif
290         .llseek = noop_llseek,
291 };
292 
293 static struct drm_driver driver_old = {
294         .driver_features =
295             DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
296             DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
297         .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
298         .load = radeon_driver_load,
299         .firstopen = radeon_driver_firstopen,
300         .open = radeon_driver_open,
301         .preclose = radeon_driver_preclose,
302         .postclose = radeon_driver_postclose,
303         .lastclose = radeon_driver_lastclose,
304         .unload = radeon_driver_unload,
305         .suspend = radeon_suspend,
306         .resume = radeon_resume,
307         .get_vblank_counter = radeon_get_vblank_counter,
308         .enable_vblank = radeon_enable_vblank,
309         .disable_vblank = radeon_disable_vblank,
310         .master_create = radeon_master_create,
311         .master_destroy = radeon_master_destroy,
312         .irq_preinstall = radeon_driver_irq_preinstall,
313         .irq_postinstall = radeon_driver_irq_postinstall,
314         .irq_uninstall = radeon_driver_irq_uninstall,
315         .irq_handler = radeon_driver_irq_handler,
316         .ioctls = radeon_ioctls,
317         .dma_ioctl = radeon_cp_buffers,
318         .fops = &radeon_driver_old_fops,
319         .name = DRIVER_NAME,
320         .desc = DRIVER_DESC,
321         .date = DRIVER_DATE,
322         .major = DRIVER_MAJOR,
323         .minor = DRIVER_MINOR,
324         .patchlevel = DRIVER_PATCHLEVEL,
325 };
326 
327 #endif
328 
329 static struct drm_driver kms_driver;
330 
331 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
332 {
333         struct apertures_struct *ap;
334         bool primary = false;
335 
336         ap = alloc_apertures(1);
337         if (!ap)
338                 return -ENOMEM;
339 
340         ap->ranges[0].base = pci_resource_start(pdev, 0);
341         ap->ranges[0].size = pci_resource_len(pdev, 0);
342 
343 #ifdef CONFIG_X86
344         primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
345 #endif
346         remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
347         kfree(ap);
348 
349         return 0;
350 }
351 
352 static int radeon_pci_probe(struct pci_dev *pdev,
353                             const struct pci_device_id *ent)
354 {
355         int ret;
356 
357         /* Get rid of things like offb */
358         ret = radeon_kick_out_firmware_fb(pdev);
359         if (ret)
360                 return ret;
361 
362         return drm_get_pci_dev(pdev, ent, &kms_driver);
363 }
364 
365 static void
366 radeon_pci_remove(struct pci_dev *pdev)
367 {
368         struct drm_device *dev = pci_get_drvdata(pdev);
369 
370         drm_put_dev(dev);
371 }
372 
373 static int radeon_pmops_suspend(struct device *dev)
374 {
375         struct pci_dev *pdev = to_pci_dev(dev);
376         struct drm_device *drm_dev = pci_get_drvdata(pdev);
377         return radeon_suspend_kms(drm_dev, true, true);
378 }
379 
380 static int radeon_pmops_resume(struct device *dev)
381 {
382         struct pci_dev *pdev = to_pci_dev(dev);
383         struct drm_device *drm_dev = pci_get_drvdata(pdev);
384         return radeon_resume_kms(drm_dev, true, true);
385 }
386 
387 static int radeon_pmops_freeze(struct device *dev)
388 {
389         struct pci_dev *pdev = to_pci_dev(dev);
390         struct drm_device *drm_dev = pci_get_drvdata(pdev);
391         return radeon_suspend_kms(drm_dev, false, true);
392 }
393 
394 static int radeon_pmops_thaw(struct device *dev)
395 {
396         struct pci_dev *pdev = to_pci_dev(dev);
397         struct drm_device *drm_dev = pci_get_drvdata(pdev);
398         return radeon_resume_kms(drm_dev, false, true);
399 }
400 
401 static int radeon_pmops_runtime_suspend(struct device *dev)
402 {
403         struct pci_dev *pdev = to_pci_dev(dev);
404         struct drm_device *drm_dev = pci_get_drvdata(pdev);
405         int ret;
406 
407         if (!radeon_is_px(drm_dev)) {
408                 pm_runtime_forbid(dev);
409                 return -EBUSY;
410         }
411 
412         drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
413         drm_kms_helper_poll_disable(drm_dev);
414         vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
415 
416         ret = radeon_suspend_kms(drm_dev, false, false);
417         pci_save_state(pdev);
418         pci_disable_device(pdev);
419         pci_set_power_state(pdev, PCI_D3cold);
420         drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
421 
422         return 0;
423 }
424 
425 static int radeon_pmops_runtime_resume(struct device *dev)
426 {
427         struct pci_dev *pdev = to_pci_dev(dev);
428         struct drm_device *drm_dev = pci_get_drvdata(pdev);
429         int ret;
430 
431         if (!radeon_is_px(drm_dev))
432                 return -EINVAL;
433 
434         drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
435 
436         pci_set_power_state(pdev, PCI_D0);
437         pci_restore_state(pdev);
438         ret = pci_enable_device(pdev);
439         if (ret)
440                 return ret;
441         pci_set_master(pdev);
442 
443         ret = radeon_resume_kms(drm_dev, false, false);
444         drm_kms_helper_poll_enable(drm_dev);
445         vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
446         drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
447         return 0;
448 }
449 
450 static int radeon_pmops_runtime_idle(struct device *dev)
451 {
452         struct pci_dev *pdev = to_pci_dev(dev);
453         struct drm_device *drm_dev = pci_get_drvdata(pdev);
454         struct drm_crtc *crtc;
455 
456         if (!radeon_is_px(drm_dev)) {
457                 pm_runtime_forbid(dev);
458                 return -EBUSY;
459         }
460 
461         list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
462                 if (crtc->enabled) {
463                         DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
464                         return -EBUSY;
465                 }
466         }
467 
468         pm_runtime_mark_last_busy(dev);
469         pm_runtime_autosuspend(dev);
470         /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
471         return 1;
472 }
473 
474 long radeon_drm_ioctl(struct file *filp,
475                       unsigned int cmd, unsigned long arg)
476 {
477         struct drm_file *file_priv = filp->private_data;
478         struct drm_device *dev;
479         long ret;
480         dev = file_priv->minor->dev;
481         ret = pm_runtime_get_sync(dev->dev);
482         if (ret < 0)
483                 return ret;
484 
485         ret = drm_ioctl(filp, cmd, arg);
486         
487         pm_runtime_mark_last_busy(dev->dev);
488         pm_runtime_put_autosuspend(dev->dev);
489         return ret;
490 }
491 
492 static const struct dev_pm_ops radeon_pm_ops = {
493         .suspend = radeon_pmops_suspend,
494         .resume = radeon_pmops_resume,
495         .freeze = radeon_pmops_freeze,
496         .thaw = radeon_pmops_thaw,
497         .poweroff = radeon_pmops_freeze,
498         .restore = radeon_pmops_resume,
499         .runtime_suspend = radeon_pmops_runtime_suspend,
500         .runtime_resume = radeon_pmops_runtime_resume,
501         .runtime_idle = radeon_pmops_runtime_idle,
502 };
503 
504 static const struct file_operations radeon_driver_kms_fops = {
505         .owner = THIS_MODULE,
506         .open = drm_open,
507         .release = drm_release,
508         .unlocked_ioctl = radeon_drm_ioctl,
509         .mmap = radeon_mmap,
510         .poll = drm_poll,
511         .read = drm_read,
512 #ifdef CONFIG_COMPAT
513         .compat_ioctl = radeon_kms_compat_ioctl,
514 #endif
515 };
516 
517 static struct drm_driver kms_driver = {
518         .driver_features =
519             DRIVER_USE_AGP |
520             DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
521             DRIVER_PRIME | DRIVER_RENDER,
522         .dev_priv_size = 0,
523         .load = radeon_driver_load_kms,
524         .open = radeon_driver_open_kms,
525         .preclose = radeon_driver_preclose_kms,
526         .postclose = radeon_driver_postclose_kms,
527         .lastclose = radeon_driver_lastclose_kms,
528         .unload = radeon_driver_unload_kms,
529         .get_vblank_counter = radeon_get_vblank_counter_kms,
530         .enable_vblank = radeon_enable_vblank_kms,
531         .disable_vblank = radeon_disable_vblank_kms,
532         .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
533         .get_scanout_position = radeon_get_crtc_scanoutpos,
534 #if defined(CONFIG_DEBUG_FS)
535         .debugfs_init = radeon_debugfs_init,
536         .debugfs_cleanup = radeon_debugfs_cleanup,
537 #endif
538         .irq_preinstall = radeon_driver_irq_preinstall_kms,
539         .irq_postinstall = radeon_driver_irq_postinstall_kms,
540         .irq_uninstall = radeon_driver_irq_uninstall_kms,
541         .irq_handler = radeon_driver_irq_handler_kms,
542         .ioctls = radeon_ioctls_kms,
543         .gem_free_object = radeon_gem_object_free,
544         .gem_open_object = radeon_gem_object_open,
545         .gem_close_object = radeon_gem_object_close,
546         .dumb_create = radeon_mode_dumb_create,
547         .dumb_map_offset = radeon_mode_dumb_mmap,
548         .dumb_destroy = drm_gem_dumb_destroy,
549         .fops = &radeon_driver_kms_fops,
550 
551         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
552         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
553         .gem_prime_export = drm_gem_prime_export,
554         .gem_prime_import = drm_gem_prime_import,
555         .gem_prime_pin = radeon_gem_prime_pin,
556         .gem_prime_unpin = radeon_gem_prime_unpin,
557         .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
558         .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
559         .gem_prime_vmap = radeon_gem_prime_vmap,
560         .gem_prime_vunmap = radeon_gem_prime_vunmap,
561 
562         .name = DRIVER_NAME,
563         .desc = DRIVER_DESC,
564         .date = DRIVER_DATE,
565         .major = KMS_DRIVER_MAJOR,
566         .minor = KMS_DRIVER_MINOR,
567         .patchlevel = KMS_DRIVER_PATCHLEVEL,
568 };
569 
570 static struct drm_driver *driver;
571 static struct pci_driver *pdriver;
572 
573 #ifdef CONFIG_DRM_RADEON_UMS
574 static struct pci_driver radeon_pci_driver = {
575         .name = DRIVER_NAME,
576         .id_table = pciidlist,
577 };
578 #endif
579 
580 static struct pci_driver radeon_kms_pci_driver = {
581         .name = DRIVER_NAME,
582         .id_table = pciidlist,
583         .probe = radeon_pci_probe,
584         .remove = radeon_pci_remove,
585         .driver.pm = &radeon_pm_ops,
586 };
587 
588 static int __init radeon_init(void)
589 {
590 #ifdef CONFIG_VGA_CONSOLE
591         if (vgacon_text_force() && radeon_modeset == -1) {
592                 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
593                 radeon_modeset = 0;
594         }
595 #endif
596         /* set to modesetting by default if not nomodeset */
597         if (radeon_modeset == -1)
598                 radeon_modeset = 1;
599 
600         if (radeon_modeset == 1) {
601                 DRM_INFO("radeon kernel modesetting enabled.\n");
602                 driver = &kms_driver;
603                 pdriver = &radeon_kms_pci_driver;
604                 driver->driver_features |= DRIVER_MODESET;
605                 driver->num_ioctls = radeon_max_kms_ioctl;
606                 radeon_register_atpx_handler();
607 
608         } else {
609 #ifdef CONFIG_DRM_RADEON_UMS
610                 DRM_INFO("radeon userspace modesetting enabled.\n");
611                 driver = &driver_old;
612                 pdriver = &radeon_pci_driver;
613                 driver->driver_features &= ~DRIVER_MODESET;
614                 driver->num_ioctls = radeon_max_ioctl;
615 #else
616                 DRM_ERROR("No UMS support in radeon module!\n");
617                 return -EINVAL;
618 #endif
619         }
620 
621         /* let modprobe override vga console setting */
622         return drm_pci_init(driver, pdriver);
623 }
624 
625 static void __exit radeon_exit(void)
626 {
627         drm_pci_exit(driver, pdriver);
628         radeon_unregister_atpx_handler();
629 }
630 
631 module_init(radeon_init);
632 module_exit(radeon_exit);
633 
634 MODULE_AUTHOR(DRIVER_AUTHOR);
635 MODULE_DESCRIPTION(DRIVER_DESC);
636 MODULE_LICENSE("GPL and additional rights");
637 

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