Version:  2.0.40 2.2.26 2.4.37 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17

Linux/drivers/gpu/drm/radeon/radeon_drv.c

  1 /**
  2  * \file radeon_drv.c
  3  * ATI Radeon driver
  4  *
  5  * \author Gareth Hughes <gareth@valinux.com>
  6  */
  7 
  8 /*
  9  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
 10  * All Rights Reserved.
 11  *
 12  * Permission is hereby granted, free of charge, to any person obtaining a
 13  * copy of this software and associated documentation files (the "Software"),
 14  * to deal in the Software without restriction, including without limitation
 15  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 16  * and/or sell copies of the Software, and to permit persons to whom the
 17  * Software is furnished to do so, subject to the following conditions:
 18  *
 19  * The above copyright notice and this permission notice (including the next
 20  * paragraph) shall be included in all copies or substantial portions of the
 21  * Software.
 22  *
 23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 26  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 27  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 28  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 29  * OTHER DEALINGS IN THE SOFTWARE.
 30  */
 31 
 32 #include <drm/drmP.h>
 33 #include <drm/radeon_drm.h>
 34 #include "radeon_drv.h"
 35 
 36 #include <drm/drm_pciids.h>
 37 #include <linux/console.h>
 38 #include <linux/module.h>
 39 #include <linux/pm_runtime.h>
 40 #include <linux/vga_switcheroo.h>
 41 #include "drm_crtc_helper.h"
 42 /*
 43  * KMS wrapper.
 44  * - 2.0.0 - initial interface
 45  * - 2.1.0 - add square tiling interface
 46  * - 2.2.0 - add r6xx/r7xx const buffer support
 47  * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
 48  * - 2.4.0 - add crtc id query
 49  * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
 50  * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
 51  *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
 52  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
 53  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
 54  *   2.10.0 - fusion 2D tiling
 55  *   2.11.0 - backend map, initial compute support for the CS checker
 56  *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
 57  *   2.13.0 - virtual memory support, streamout
 58  *   2.14.0 - add evergreen tiling informations
 59  *   2.15.0 - add max_pipes query
 60  *   2.16.0 - fix evergreen 2D tiled surface calculation
 61  *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
 62  *   2.18.0 - r600-eg: allow "invalid" DB formats
 63  *   2.19.0 - r600-eg: MSAA textures
 64  *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
 65  *   2.21.0 - r600-r700: FMASK and CMASK
 66  *   2.22.0 - r600 only: RESOLVE_BOX allowed
 67  *   2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
 68  *   2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
 69  *   2.25.0 - eg+: new info request for num SE and num SH
 70  *   2.26.0 - r600-eg: fix htile size computation
 71  *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
 72  *   2.28.0 - r600-eg: Add MEM_WRITE packet support
 73  *   2.29.0 - R500 FP16 color clear registers
 74  *   2.30.0 - fix for FMASK texturing
 75  *   2.31.0 - Add fastfb support for rs690
 76  *   2.32.0 - new info request for rings working
 77  *   2.33.0 - Add SI tiling mode array query
 78  *   2.34.0 - Add CIK tiling mode array query
 79  *   2.35.0 - Add CIK macrotile mode array query
 80  *   2.36.0 - Fix CIK DCE tiling setup
 81  *   2.37.0 - allow GS ring setup on r6xx/r7xx
 82  *   2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN),
 83  *            CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
 84  *   2.39.0 - Add INFO query for number of active CUs
 85  *   2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting
 86  *            CS to GPU on >= r600
 87  */
 88 #define KMS_DRIVER_MAJOR        2
 89 #define KMS_DRIVER_MINOR        40
 90 #define KMS_DRIVER_PATCHLEVEL   0
 91 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
 92 int radeon_driver_unload_kms(struct drm_device *dev);
 93 void radeon_driver_lastclose_kms(struct drm_device *dev);
 94 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
 95 void radeon_driver_postclose_kms(struct drm_device *dev,
 96                                  struct drm_file *file_priv);
 97 void radeon_driver_preclose_kms(struct drm_device *dev,
 98                                 struct drm_file *file_priv);
 99 int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon);
100 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
101 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
102 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
103 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
104 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
105                                     int *max_error,
106                                     struct timeval *vblank_time,
107                                     unsigned flags);
108 void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
109 int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
110 void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
111 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg);
112 void radeon_gem_object_free(struct drm_gem_object *obj);
113 int radeon_gem_object_open(struct drm_gem_object *obj,
114                                 struct drm_file *file_priv);
115 void radeon_gem_object_close(struct drm_gem_object *obj,
116                                 struct drm_file *file_priv);
117 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
118                                       unsigned int flags,
119                                       int *vpos, int *hpos, ktime_t *stime,
120                                       ktime_t *etime);
121 extern bool radeon_is_px(struct drm_device *dev);
122 extern const struct drm_ioctl_desc radeon_ioctls_kms[];
123 extern int radeon_max_kms_ioctl;
124 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
125 int radeon_mode_dumb_mmap(struct drm_file *filp,
126                           struct drm_device *dev,
127                           uint32_t handle, uint64_t *offset_p);
128 int radeon_mode_dumb_create(struct drm_file *file_priv,
129                             struct drm_device *dev,
130                             struct drm_mode_create_dumb *args);
131 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
132 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
133                                                         size_t size,
134                                                         struct sg_table *sg);
135 int radeon_gem_prime_pin(struct drm_gem_object *obj);
136 void radeon_gem_prime_unpin(struct drm_gem_object *obj);
137 struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *);
138 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
139 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
140 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
141                                     unsigned long arg);
142 
143 #if defined(CONFIG_DEBUG_FS)
144 int radeon_debugfs_init(struct drm_minor *minor);
145 void radeon_debugfs_cleanup(struct drm_minor *minor);
146 #endif
147 
148 /* atpx handler */
149 #if defined(CONFIG_VGA_SWITCHEROO)
150 void radeon_register_atpx_handler(void);
151 void radeon_unregister_atpx_handler(void);
152 #else
153 static inline void radeon_register_atpx_handler(void) {}
154 static inline void radeon_unregister_atpx_handler(void) {}
155 #endif
156 
157 int radeon_no_wb;
158 int radeon_modeset = -1;
159 int radeon_dynclks = -1;
160 int radeon_r4xx_atom = 0;
161 int radeon_agpmode = 0;
162 int radeon_vram_limit = 0;
163 int radeon_gart_size = -1; /* auto */
164 int radeon_benchmarking = 0;
165 int radeon_testing = 0;
166 int radeon_connector_table = 0;
167 int radeon_tv = 1;
168 int radeon_audio = -1;
169 int radeon_disp_priority = 0;
170 int radeon_hw_i2c = 0;
171 int radeon_pcie_gen2 = -1;
172 int radeon_msi = -1;
173 int radeon_lockup_timeout = 10000;
174 int radeon_fastfb = 0;
175 int radeon_dpm = -1;
176 int radeon_aspm = -1;
177 int radeon_runtime_pm = -1;
178 int radeon_hard_reset = 0;
179 int radeon_vm_size = 8;
180 int radeon_vm_block_size = -1;
181 int radeon_deep_color = 0;
182 int radeon_use_pflipirq = 2;
183 int radeon_bapm = -1;
184 int radeon_backlight = -1;
185 
186 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
187 module_param_named(no_wb, radeon_no_wb, int, 0444);
188 
189 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
190 module_param_named(modeset, radeon_modeset, int, 0400);
191 
192 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
193 module_param_named(dynclks, radeon_dynclks, int, 0444);
194 
195 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
196 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
197 
198 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
199 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
200 
201 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
202 module_param_named(agpmode, radeon_agpmode, int, 0444);
203 
204 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
205 module_param_named(gartsize, radeon_gart_size, int, 0600);
206 
207 MODULE_PARM_DESC(benchmark, "Run benchmark");
208 module_param_named(benchmark, radeon_benchmarking, int, 0444);
209 
210 MODULE_PARM_DESC(test, "Run tests");
211 module_param_named(test, radeon_testing, int, 0444);
212 
213 MODULE_PARM_DESC(connector_table, "Force connector table");
214 module_param_named(connector_table, radeon_connector_table, int, 0444);
215 
216 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
217 module_param_named(tv, radeon_tv, int, 0444);
218 
219 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
220 module_param_named(audio, radeon_audio, int, 0444);
221 
222 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
223 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
224 
225 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
226 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
227 
228 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
229 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
230 
231 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
232 module_param_named(msi, radeon_msi, int, 0444);
233 
234 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
235 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
236 
237 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
238 module_param_named(fastfb, radeon_fastfb, int, 0444);
239 
240 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
241 module_param_named(dpm, radeon_dpm, int, 0444);
242 
243 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
244 module_param_named(aspm, radeon_aspm, int, 0444);
245 
246 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
247 module_param_named(runpm, radeon_runtime_pm, int, 0444);
248 
249 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
250 module_param_named(hard_reset, radeon_hard_reset, int, 0444);
251 
252 MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
253 module_param_named(vm_size, radeon_vm_size, int, 0444);
254 
255 MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
256 module_param_named(vm_block_size, radeon_vm_block_size, int, 0444);
257 
258 MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
259 module_param_named(deep_color, radeon_deep_color, int, 0444);
260 
261 MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))");
262 module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
263 
264 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
265 module_param_named(bapm, radeon_bapm, int, 0444);
266 
267 MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)");
268 module_param_named(backlight, radeon_backlight, int, 0444);
269 
270 static struct pci_device_id pciidlist[] = {
271         radeon_PCI_IDS
272 };
273 
274 MODULE_DEVICE_TABLE(pci, pciidlist);
275 
276 #ifdef CONFIG_DRM_RADEON_UMS
277 
278 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
279 {
280         drm_radeon_private_t *dev_priv = dev->dev_private;
281 
282         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
283                 return 0;
284 
285         /* Disable *all* interrupts */
286         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
287                 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
288         RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
289         return 0;
290 }
291 
292 static int radeon_resume(struct drm_device *dev)
293 {
294         drm_radeon_private_t *dev_priv = dev->dev_private;
295 
296         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
297                 return 0;
298 
299         /* Restore interrupt registers */
300         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
301                 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
302         RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
303         return 0;
304 }
305 
306 
307 static const struct file_operations radeon_driver_old_fops = {
308         .owner = THIS_MODULE,
309         .open = drm_open,
310         .release = drm_release,
311         .unlocked_ioctl = drm_ioctl,
312         .mmap = drm_mmap,
313         .poll = drm_poll,
314         .read = drm_read,
315 #ifdef CONFIG_COMPAT
316         .compat_ioctl = radeon_compat_ioctl,
317 #endif
318         .llseek = noop_llseek,
319 };
320 
321 static struct drm_driver driver_old = {
322         .driver_features =
323             DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
324             DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
325         .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
326         .load = radeon_driver_load,
327         .firstopen = radeon_driver_firstopen,
328         .open = radeon_driver_open,
329         .preclose = radeon_driver_preclose,
330         .postclose = radeon_driver_postclose,
331         .lastclose = radeon_driver_lastclose,
332         .unload = radeon_driver_unload,
333         .suspend = radeon_suspend,
334         .resume = radeon_resume,
335         .get_vblank_counter = radeon_get_vblank_counter,
336         .enable_vblank = radeon_enable_vblank,
337         .disable_vblank = radeon_disable_vblank,
338         .master_create = radeon_master_create,
339         .master_destroy = radeon_master_destroy,
340         .irq_preinstall = radeon_driver_irq_preinstall,
341         .irq_postinstall = radeon_driver_irq_postinstall,
342         .irq_uninstall = radeon_driver_irq_uninstall,
343         .irq_handler = radeon_driver_irq_handler,
344         .ioctls = radeon_ioctls,
345         .dma_ioctl = radeon_cp_buffers,
346         .fops = &radeon_driver_old_fops,
347         .name = DRIVER_NAME,
348         .desc = DRIVER_DESC,
349         .date = DRIVER_DATE,
350         .major = DRIVER_MAJOR,
351         .minor = DRIVER_MINOR,
352         .patchlevel = DRIVER_PATCHLEVEL,
353 };
354 
355 #endif
356 
357 static struct drm_driver kms_driver;
358 
359 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
360 {
361         struct apertures_struct *ap;
362         bool primary = false;
363 
364         ap = alloc_apertures(1);
365         if (!ap)
366                 return -ENOMEM;
367 
368         ap->ranges[0].base = pci_resource_start(pdev, 0);
369         ap->ranges[0].size = pci_resource_len(pdev, 0);
370 
371 #ifdef CONFIG_X86
372         primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
373 #endif
374         remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
375         kfree(ap);
376 
377         return 0;
378 }
379 
380 static int radeon_pci_probe(struct pci_dev *pdev,
381                             const struct pci_device_id *ent)
382 {
383         int ret;
384 
385         /* Get rid of things like offb */
386         ret = radeon_kick_out_firmware_fb(pdev);
387         if (ret)
388                 return ret;
389 
390         return drm_get_pci_dev(pdev, ent, &kms_driver);
391 }
392 
393 static void
394 radeon_pci_remove(struct pci_dev *pdev)
395 {
396         struct drm_device *dev = pci_get_drvdata(pdev);
397 
398         drm_put_dev(dev);
399 }
400 
401 static int radeon_pmops_suspend(struct device *dev)
402 {
403         struct pci_dev *pdev = to_pci_dev(dev);
404         struct drm_device *drm_dev = pci_get_drvdata(pdev);
405         return radeon_suspend_kms(drm_dev, true, true);
406 }
407 
408 static int radeon_pmops_resume(struct device *dev)
409 {
410         struct pci_dev *pdev = to_pci_dev(dev);
411         struct drm_device *drm_dev = pci_get_drvdata(pdev);
412         return radeon_resume_kms(drm_dev, true, true);
413 }
414 
415 static int radeon_pmops_freeze(struct device *dev)
416 {
417         struct pci_dev *pdev = to_pci_dev(dev);
418         struct drm_device *drm_dev = pci_get_drvdata(pdev);
419         return radeon_suspend_kms(drm_dev, false, true);
420 }
421 
422 static int radeon_pmops_thaw(struct device *dev)
423 {
424         struct pci_dev *pdev = to_pci_dev(dev);
425         struct drm_device *drm_dev = pci_get_drvdata(pdev);
426         return radeon_resume_kms(drm_dev, false, true);
427 }
428 
429 static int radeon_pmops_runtime_suspend(struct device *dev)
430 {
431         struct pci_dev *pdev = to_pci_dev(dev);
432         struct drm_device *drm_dev = pci_get_drvdata(pdev);
433         int ret;
434 
435         if (!radeon_is_px(drm_dev)) {
436                 pm_runtime_forbid(dev);
437                 return -EBUSY;
438         }
439 
440         drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
441         drm_kms_helper_poll_disable(drm_dev);
442         vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
443 
444         ret = radeon_suspend_kms(drm_dev, false, false);
445         pci_save_state(pdev);
446         pci_disable_device(pdev);
447         pci_ignore_hotplug(pdev);
448         pci_set_power_state(pdev, PCI_D3cold);
449         drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
450 
451         return 0;
452 }
453 
454 static int radeon_pmops_runtime_resume(struct device *dev)
455 {
456         struct pci_dev *pdev = to_pci_dev(dev);
457         struct drm_device *drm_dev = pci_get_drvdata(pdev);
458         int ret;
459 
460         if (!radeon_is_px(drm_dev))
461                 return -EINVAL;
462 
463         drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
464 
465         pci_set_power_state(pdev, PCI_D0);
466         pci_restore_state(pdev);
467         ret = pci_enable_device(pdev);
468         if (ret)
469                 return ret;
470         pci_set_master(pdev);
471 
472         ret = radeon_resume_kms(drm_dev, false, false);
473         drm_kms_helper_poll_enable(drm_dev);
474         vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
475         drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
476         return 0;
477 }
478 
479 static int radeon_pmops_runtime_idle(struct device *dev)
480 {
481         struct pci_dev *pdev = to_pci_dev(dev);
482         struct drm_device *drm_dev = pci_get_drvdata(pdev);
483         struct drm_crtc *crtc;
484 
485         if (!radeon_is_px(drm_dev)) {
486                 pm_runtime_forbid(dev);
487                 return -EBUSY;
488         }
489 
490         list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
491                 if (crtc->enabled) {
492                         DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
493                         return -EBUSY;
494                 }
495         }
496 
497         pm_runtime_mark_last_busy(dev);
498         pm_runtime_autosuspend(dev);
499         /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
500         return 1;
501 }
502 
503 long radeon_drm_ioctl(struct file *filp,
504                       unsigned int cmd, unsigned long arg)
505 {
506         struct drm_file *file_priv = filp->private_data;
507         struct drm_device *dev;
508         long ret;
509         dev = file_priv->minor->dev;
510         ret = pm_runtime_get_sync(dev->dev);
511         if (ret < 0)
512                 return ret;
513 
514         ret = drm_ioctl(filp, cmd, arg);
515         
516         pm_runtime_mark_last_busy(dev->dev);
517         pm_runtime_put_autosuspend(dev->dev);
518         return ret;
519 }
520 
521 static const struct dev_pm_ops radeon_pm_ops = {
522         .suspend = radeon_pmops_suspend,
523         .resume = radeon_pmops_resume,
524         .freeze = radeon_pmops_freeze,
525         .thaw = radeon_pmops_thaw,
526         .poweroff = radeon_pmops_freeze,
527         .restore = radeon_pmops_resume,
528         .runtime_suspend = radeon_pmops_runtime_suspend,
529         .runtime_resume = radeon_pmops_runtime_resume,
530         .runtime_idle = radeon_pmops_runtime_idle,
531 };
532 
533 static const struct file_operations radeon_driver_kms_fops = {
534         .owner = THIS_MODULE,
535         .open = drm_open,
536         .release = drm_release,
537         .unlocked_ioctl = radeon_drm_ioctl,
538         .mmap = radeon_mmap,
539         .poll = drm_poll,
540         .read = drm_read,
541 #ifdef CONFIG_COMPAT
542         .compat_ioctl = radeon_kms_compat_ioctl,
543 #endif
544 };
545 
546 static struct drm_driver kms_driver = {
547         .driver_features =
548             DRIVER_USE_AGP |
549             DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
550             DRIVER_PRIME | DRIVER_RENDER,
551         .load = radeon_driver_load_kms,
552         .open = radeon_driver_open_kms,
553         .preclose = radeon_driver_preclose_kms,
554         .postclose = radeon_driver_postclose_kms,
555         .lastclose = radeon_driver_lastclose_kms,
556         .unload = radeon_driver_unload_kms,
557         .get_vblank_counter = radeon_get_vblank_counter_kms,
558         .enable_vblank = radeon_enable_vblank_kms,
559         .disable_vblank = radeon_disable_vblank_kms,
560         .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
561         .get_scanout_position = radeon_get_crtc_scanoutpos,
562 #if defined(CONFIG_DEBUG_FS)
563         .debugfs_init = radeon_debugfs_init,
564         .debugfs_cleanup = radeon_debugfs_cleanup,
565 #endif
566         .irq_preinstall = radeon_driver_irq_preinstall_kms,
567         .irq_postinstall = radeon_driver_irq_postinstall_kms,
568         .irq_uninstall = radeon_driver_irq_uninstall_kms,
569         .irq_handler = radeon_driver_irq_handler_kms,
570         .ioctls = radeon_ioctls_kms,
571         .gem_free_object = radeon_gem_object_free,
572         .gem_open_object = radeon_gem_object_open,
573         .gem_close_object = radeon_gem_object_close,
574         .dumb_create = radeon_mode_dumb_create,
575         .dumb_map_offset = radeon_mode_dumb_mmap,
576         .dumb_destroy = drm_gem_dumb_destroy,
577         .fops = &radeon_driver_kms_fops,
578 
579         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
580         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
581         .gem_prime_export = drm_gem_prime_export,
582         .gem_prime_import = drm_gem_prime_import,
583         .gem_prime_pin = radeon_gem_prime_pin,
584         .gem_prime_unpin = radeon_gem_prime_unpin,
585         .gem_prime_res_obj = radeon_gem_prime_res_obj,
586         .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
587         .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
588         .gem_prime_vmap = radeon_gem_prime_vmap,
589         .gem_prime_vunmap = radeon_gem_prime_vunmap,
590 
591         .name = DRIVER_NAME,
592         .desc = DRIVER_DESC,
593         .date = DRIVER_DATE,
594         .major = KMS_DRIVER_MAJOR,
595         .minor = KMS_DRIVER_MINOR,
596         .patchlevel = KMS_DRIVER_PATCHLEVEL,
597 };
598 
599 static struct drm_driver *driver;
600 static struct pci_driver *pdriver;
601 
602 #ifdef CONFIG_DRM_RADEON_UMS
603 static struct pci_driver radeon_pci_driver = {
604         .name = DRIVER_NAME,
605         .id_table = pciidlist,
606 };
607 #endif
608 
609 static struct pci_driver radeon_kms_pci_driver = {
610         .name = DRIVER_NAME,
611         .id_table = pciidlist,
612         .probe = radeon_pci_probe,
613         .remove = radeon_pci_remove,
614         .driver.pm = &radeon_pm_ops,
615 };
616 
617 static int __init radeon_init(void)
618 {
619 #ifdef CONFIG_VGA_CONSOLE
620         if (vgacon_text_force() && radeon_modeset == -1) {
621                 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
622                 radeon_modeset = 0;
623         }
624 #endif
625         /* set to modesetting by default if not nomodeset */
626         if (radeon_modeset == -1)
627                 radeon_modeset = 1;
628 
629         if (radeon_modeset == 1) {
630                 DRM_INFO("radeon kernel modesetting enabled.\n");
631                 driver = &kms_driver;
632                 pdriver = &radeon_kms_pci_driver;
633                 driver->driver_features |= DRIVER_MODESET;
634                 driver->num_ioctls = radeon_max_kms_ioctl;
635                 radeon_register_atpx_handler();
636 
637         } else {
638 #ifdef CONFIG_DRM_RADEON_UMS
639                 DRM_INFO("radeon userspace modesetting enabled.\n");
640                 driver = &driver_old;
641                 pdriver = &radeon_pci_driver;
642                 driver->driver_features &= ~DRIVER_MODESET;
643                 driver->num_ioctls = radeon_max_ioctl;
644 #else
645                 DRM_ERROR("No UMS support in radeon module!\n");
646                 return -EINVAL;
647 #endif
648         }
649 
650         /* let modprobe override vga console setting */
651         return drm_pci_init(driver, pdriver);
652 }
653 
654 static void __exit radeon_exit(void)
655 {
656         drm_pci_exit(driver, pdriver);
657         radeon_unregister_atpx_handler();
658 }
659 
660 module_init(radeon_init);
661 module_exit(radeon_exit);
662 
663 MODULE_AUTHOR(DRIVER_AUTHOR);
664 MODULE_DESCRIPTION(DRIVER_DESC);
665 MODULE_LICENSE("GPL and additional rights");
666 

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