Version:  2.0.40 2.2.26 2.4.37 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10

Linux/drivers/gpu/drm/omapdrm/omap_drv.c

  1 /*
  2  * drivers/gpu/drm/omapdrm/omap_drv.c
  3  *
  4  * Copyright (C) 2011 Texas Instruments
  5  * Author: Rob Clark <rob@ti.com>
  6  *
  7  * This program is free software; you can redistribute it and/or modify it
  8  * under the terms of the GNU General Public License version 2 as published by
  9  * the Free Software Foundation.
 10  *
 11  * This program is distributed in the hope that it will be useful, but WITHOUT
 12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 14  * more details.
 15  *
 16  * You should have received a copy of the GNU General Public License along with
 17  * this program.  If not, see <http://www.gnu.org/licenses/>.
 18  */
 19 
 20 #include <linux/wait.h>
 21 
 22 #include <drm/drm_atomic.h>
 23 #include <drm/drm_atomic_helper.h>
 24 #include <drm/drm_crtc_helper.h>
 25 #include <drm/drm_fb_helper.h>
 26 
 27 #include "omap_dmm_tiler.h"
 28 #include "omap_drv.h"
 29 
 30 #define DRIVER_NAME             MODULE_NAME
 31 #define DRIVER_DESC             "OMAP DRM"
 32 #define DRIVER_DATE             "20110917"
 33 #define DRIVER_MAJOR            1
 34 #define DRIVER_MINOR            0
 35 #define DRIVER_PATCHLEVEL       0
 36 
 37 static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
 38 
 39 MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
 40 module_param(num_crtc, int, 0600);
 41 
 42 /*
 43  * mode config funcs
 44  */
 45 
 46 /* Notes about mapping DSS and DRM entities:
 47  *    CRTC:        overlay
 48  *    encoder:     manager.. with some extension to allow one primary CRTC
 49  *                 and zero or more video CRTC's to be mapped to one encoder?
 50  *    connector:   dssdev.. manager can be attached/detached from different
 51  *                 devices
 52  */
 53 
 54 static void omap_fb_output_poll_changed(struct drm_device *dev)
 55 {
 56         struct omap_drm_private *priv = dev->dev_private;
 57         DBG("dev=%p", dev);
 58         if (priv->fbdev)
 59                 drm_fb_helper_hotplug_event(priv->fbdev);
 60 }
 61 
 62 struct omap_atomic_state_commit {
 63         struct work_struct work;
 64         struct drm_device *dev;
 65         struct drm_atomic_state *state;
 66         u32 crtcs;
 67 };
 68 
 69 static void omap_atomic_wait_for_completion(struct drm_device *dev,
 70                                             struct drm_atomic_state *old_state)
 71 {
 72         struct drm_crtc_state *old_crtc_state;
 73         struct drm_crtc *crtc;
 74         unsigned int i;
 75         int ret;
 76 
 77         for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) {
 78                 if (!crtc->state->enable)
 79                         continue;
 80 
 81                 ret = omap_crtc_wait_pending(crtc);
 82 
 83                 if (!ret)
 84                         dev_warn(dev->dev,
 85                                  "atomic complete timeout (pipe %u)!\n", i);
 86         }
 87 }
 88 
 89 static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
 90 {
 91         struct drm_device *dev = commit->dev;
 92         struct omap_drm_private *priv = dev->dev_private;
 93         struct drm_atomic_state *old_state = commit->state;
 94 
 95         /* Apply the atomic update. */
 96         dispc_runtime_get();
 97 
 98         drm_atomic_helper_commit_modeset_disables(dev, old_state);
 99         drm_atomic_helper_commit_planes(dev, old_state, 0);
100         drm_atomic_helper_commit_modeset_enables(dev, old_state);
101 
102         omap_atomic_wait_for_completion(dev, old_state);
103 
104         drm_atomic_helper_cleanup_planes(dev, old_state);
105 
106         dispc_runtime_put();
107 
108         drm_atomic_state_put(old_state);
109 
110         /* Complete the commit, wake up any waiter. */
111         spin_lock(&priv->commit.lock);
112         priv->commit.pending &= ~commit->crtcs;
113         spin_unlock(&priv->commit.lock);
114 
115         wake_up_all(&priv->commit.wait);
116 
117         kfree(commit);
118 }
119 
120 static void omap_atomic_work(struct work_struct *work)
121 {
122         struct omap_atomic_state_commit *commit =
123                 container_of(work, struct omap_atomic_state_commit, work);
124 
125         omap_atomic_complete(commit);
126 }
127 
128 static bool omap_atomic_is_pending(struct omap_drm_private *priv,
129                                    struct omap_atomic_state_commit *commit)
130 {
131         bool pending;
132 
133         spin_lock(&priv->commit.lock);
134         pending = priv->commit.pending & commit->crtcs;
135         spin_unlock(&priv->commit.lock);
136 
137         return pending;
138 }
139 
140 static int omap_atomic_commit(struct drm_device *dev,
141                               struct drm_atomic_state *state, bool nonblock)
142 {
143         struct omap_drm_private *priv = dev->dev_private;
144         struct omap_atomic_state_commit *commit;
145         struct drm_crtc *crtc;
146         struct drm_crtc_state *crtc_state;
147         int i, ret;
148 
149         ret = drm_atomic_helper_prepare_planes(dev, state);
150         if (ret)
151                 return ret;
152 
153         /* Allocate the commit object. */
154         commit = kzalloc(sizeof(*commit), GFP_KERNEL);
155         if (commit == NULL) {
156                 ret = -ENOMEM;
157                 goto error;
158         }
159 
160         INIT_WORK(&commit->work, omap_atomic_work);
161         commit->dev = dev;
162         commit->state = state;
163 
164         /* Wait until all affected CRTCs have completed previous commits and
165          * mark them as pending.
166          */
167         for_each_crtc_in_state(state, crtc, crtc_state, i)
168                 commit->crtcs |= drm_crtc_mask(crtc);
169 
170         wait_event(priv->commit.wait, !omap_atomic_is_pending(priv, commit));
171 
172         spin_lock(&priv->commit.lock);
173         priv->commit.pending |= commit->crtcs;
174         spin_unlock(&priv->commit.lock);
175 
176         /* Swap the state, this is the point of no return. */
177         drm_atomic_helper_swap_state(state, true);
178 
179         drm_atomic_state_get(state);
180         if (nonblock)
181                 schedule_work(&commit->work);
182         else
183                 omap_atomic_complete(commit);
184 
185         return 0;
186 
187 error:
188         drm_atomic_helper_cleanup_planes(dev, state);
189         return ret;
190 }
191 
192 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
193         .fb_create = omap_framebuffer_create,
194         .output_poll_changed = omap_fb_output_poll_changed,
195         .atomic_check = drm_atomic_helper_check,
196         .atomic_commit = omap_atomic_commit,
197 };
198 
199 static int get_connector_type(struct omap_dss_device *dssdev)
200 {
201         switch (dssdev->type) {
202         case OMAP_DISPLAY_TYPE_HDMI:
203                 return DRM_MODE_CONNECTOR_HDMIA;
204         case OMAP_DISPLAY_TYPE_DVI:
205                 return DRM_MODE_CONNECTOR_DVID;
206         case OMAP_DISPLAY_TYPE_DSI:
207                 return DRM_MODE_CONNECTOR_DSI;
208         default:
209                 return DRM_MODE_CONNECTOR_Unknown;
210         }
211 }
212 
213 static bool channel_used(struct drm_device *dev, enum omap_channel channel)
214 {
215         struct omap_drm_private *priv = dev->dev_private;
216         int i;
217 
218         for (i = 0; i < priv->num_crtcs; i++) {
219                 struct drm_crtc *crtc = priv->crtcs[i];
220 
221                 if (omap_crtc_channel(crtc) == channel)
222                         return true;
223         }
224 
225         return false;
226 }
227 static void omap_disconnect_dssdevs(void)
228 {
229         struct omap_dss_device *dssdev = NULL;
230 
231         for_each_dss_dev(dssdev)
232                 dssdev->driver->disconnect(dssdev);
233 }
234 
235 static int omap_connect_dssdevs(void)
236 {
237         int r;
238         struct omap_dss_device *dssdev = NULL;
239         bool no_displays = true;
240 
241         for_each_dss_dev(dssdev) {
242                 r = dssdev->driver->connect(dssdev);
243                 if (r == -EPROBE_DEFER) {
244                         omap_dss_put_device(dssdev);
245                         goto cleanup;
246                 } else if (r) {
247                         dev_warn(dssdev->dev, "could not connect display: %s\n",
248                                 dssdev->name);
249                 } else {
250                         no_displays = false;
251                 }
252         }
253 
254         if (no_displays)
255                 return -EPROBE_DEFER;
256 
257         return 0;
258 
259 cleanup:
260         /*
261          * if we are deferring probe, we disconnect the devices we previously
262          * connected
263          */
264         omap_disconnect_dssdevs();
265 
266         return r;
267 }
268 
269 static int omap_modeset_create_crtc(struct drm_device *dev, int id,
270                                     enum omap_channel channel,
271                                     u32 possible_crtcs)
272 {
273         struct omap_drm_private *priv = dev->dev_private;
274         struct drm_plane *plane;
275         struct drm_crtc *crtc;
276 
277         plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY,
278                 possible_crtcs);
279         if (IS_ERR(plane))
280                 return PTR_ERR(plane);
281 
282         crtc = omap_crtc_init(dev, plane, channel, id);
283 
284         BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
285         priv->crtcs[id] = crtc;
286         priv->num_crtcs++;
287 
288         priv->planes[id] = plane;
289         priv->num_planes++;
290 
291         return 0;
292 }
293 
294 static int omap_modeset_init_properties(struct drm_device *dev)
295 {
296         struct omap_drm_private *priv = dev->dev_private;
297 
298         priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
299         if (!priv->zorder_prop)
300                 return -ENOMEM;
301 
302         return 0;
303 }
304 
305 static int omap_modeset_init(struct drm_device *dev)
306 {
307         struct omap_drm_private *priv = dev->dev_private;
308         struct omap_dss_device *dssdev = NULL;
309         int num_ovls = dss_feat_get_num_ovls();
310         int num_mgrs = dss_feat_get_num_mgrs();
311         int num_crtcs;
312         int i, id = 0;
313         int ret;
314         u32 possible_crtcs;
315 
316         drm_mode_config_init(dev);
317 
318         omap_drm_irq_install(dev);
319 
320         ret = omap_modeset_init_properties(dev);
321         if (ret < 0)
322                 return ret;
323 
324         /*
325          * We usually don't want to create a CRTC for each manager, at least
326          * not until we have a way to expose private planes to userspace.
327          * Otherwise there would not be enough video pipes left for drm planes.
328          * We use the num_crtc argument to limit the number of crtcs we create.
329          */
330         num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
331         possible_crtcs = (1 << num_crtcs) - 1;
332 
333         dssdev = NULL;
334 
335         for_each_dss_dev(dssdev) {
336                 struct drm_connector *connector;
337                 struct drm_encoder *encoder;
338                 enum omap_channel channel;
339                 struct omap_dss_device *out;
340 
341                 if (!omapdss_device_is_connected(dssdev))
342                         continue;
343 
344                 encoder = omap_encoder_init(dev, dssdev);
345 
346                 if (!encoder) {
347                         dev_err(dev->dev, "could not create encoder: %s\n",
348                                         dssdev->name);
349                         return -ENOMEM;
350                 }
351 
352                 connector = omap_connector_init(dev,
353                                 get_connector_type(dssdev), dssdev, encoder);
354 
355                 if (!connector) {
356                         dev_err(dev->dev, "could not create connector: %s\n",
357                                         dssdev->name);
358                         return -ENOMEM;
359                 }
360 
361                 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
362                 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
363 
364                 priv->encoders[priv->num_encoders++] = encoder;
365                 priv->connectors[priv->num_connectors++] = connector;
366 
367                 drm_mode_connector_attach_encoder(connector, encoder);
368 
369                 /*
370                  * if we have reached the limit of the crtcs we are allowed to
371                  * create, let's not try to look for a crtc for this
372                  * panel/encoder and onwards, we will, of course, populate the
373                  * the possible_crtcs field for all the encoders with the final
374                  * set of crtcs we create
375                  */
376                 if (id == num_crtcs)
377                         continue;
378 
379                 /*
380                  * get the recommended DISPC channel for this encoder. For now,
381                  * we only try to get create a crtc out of the recommended, the
382                  * other possible channels to which the encoder can connect are
383                  * not considered.
384                  */
385 
386                 out = omapdss_find_output_from_display(dssdev);
387                 channel = out->dispc_channel;
388                 omap_dss_put_device(out);
389 
390                 /*
391                  * if this channel hasn't already been taken by a previously
392                  * allocated crtc, we create a new crtc for it
393                  */
394                 if (!channel_used(dev, channel)) {
395                         ret = omap_modeset_create_crtc(dev, id, channel,
396                                 possible_crtcs);
397                         if (ret < 0) {
398                                 dev_err(dev->dev,
399                                         "could not create CRTC (channel %u)\n",
400                                         channel);
401                                 return ret;
402                         }
403 
404                         id++;
405                 }
406         }
407 
408         /*
409          * we have allocated crtcs according to the need of the panels/encoders,
410          * adding more crtcs here if needed
411          */
412         for (; id < num_crtcs; id++) {
413 
414                 /* find a free manager for this crtc */
415                 for (i = 0; i < num_mgrs; i++) {
416                         if (!channel_used(dev, i))
417                                 break;
418                 }
419 
420                 if (i == num_mgrs) {
421                         /* this shouldn't really happen */
422                         dev_err(dev->dev, "no managers left for crtc\n");
423                         return -ENOMEM;
424                 }
425 
426                 ret = omap_modeset_create_crtc(dev, id, i,
427                         possible_crtcs);
428                 if (ret < 0) {
429                         dev_err(dev->dev,
430                                 "could not create CRTC (channel %u)\n", i);
431                         return ret;
432                 }
433         }
434 
435         /*
436          * Create normal planes for the remaining overlays:
437          */
438         for (; id < num_ovls; id++) {
439                 struct drm_plane *plane;
440 
441                 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY,
442                         possible_crtcs);
443                 if (IS_ERR(plane))
444                         return PTR_ERR(plane);
445 
446                 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
447                 priv->planes[priv->num_planes++] = plane;
448         }
449 
450         for (i = 0; i < priv->num_encoders; i++) {
451                 struct drm_encoder *encoder = priv->encoders[i];
452                 struct omap_dss_device *dssdev =
453                                         omap_encoder_get_dssdev(encoder);
454                 struct omap_dss_device *output;
455 
456                 output = omapdss_find_output_from_display(dssdev);
457 
458                 /* figure out which crtc's we can connect the encoder to: */
459                 encoder->possible_crtcs = 0;
460                 for (id = 0; id < priv->num_crtcs; id++) {
461                         struct drm_crtc *crtc = priv->crtcs[id];
462                         enum omap_channel crtc_channel;
463 
464                         crtc_channel = omap_crtc_channel(crtc);
465 
466                         if (output->dispc_channel == crtc_channel) {
467                                 encoder->possible_crtcs |= (1 << id);
468                                 break;
469                         }
470                 }
471 
472                 omap_dss_put_device(output);
473         }
474 
475         DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
476                 priv->num_planes, priv->num_crtcs, priv->num_encoders,
477                 priv->num_connectors);
478 
479         dev->mode_config.min_width = 32;
480         dev->mode_config.min_height = 32;
481 
482         /* note: eventually will need some cpu_is_omapXYZ() type stuff here
483          * to fill in these limits properly on different OMAP generations..
484          */
485         dev->mode_config.max_width = 2048;
486         dev->mode_config.max_height = 2048;
487 
488         dev->mode_config.funcs = &omap_mode_config_funcs;
489 
490         drm_mode_config_reset(dev);
491 
492         return 0;
493 }
494 
495 static void omap_modeset_free(struct drm_device *dev)
496 {
497         drm_mode_config_cleanup(dev);
498 }
499 
500 /*
501  * drm ioctl funcs
502  */
503 
504 
505 static int ioctl_get_param(struct drm_device *dev, void *data,
506                 struct drm_file *file_priv)
507 {
508         struct omap_drm_private *priv = dev->dev_private;
509         struct drm_omap_param *args = data;
510 
511         DBG("%p: param=%llu", dev, args->param);
512 
513         switch (args->param) {
514         case OMAP_PARAM_CHIPSET_ID:
515                 args->value = priv->omaprev;
516                 break;
517         default:
518                 DBG("unknown parameter %lld", args->param);
519                 return -EINVAL;
520         }
521 
522         return 0;
523 }
524 
525 static int ioctl_set_param(struct drm_device *dev, void *data,
526                 struct drm_file *file_priv)
527 {
528         struct drm_omap_param *args = data;
529 
530         switch (args->param) {
531         default:
532                 DBG("unknown parameter %lld", args->param);
533                 return -EINVAL;
534         }
535 
536         return 0;
537 }
538 
539 #define OMAP_BO_USER_MASK       0x00ffffff      /* flags settable by userspace */
540 
541 static int ioctl_gem_new(struct drm_device *dev, void *data,
542                 struct drm_file *file_priv)
543 {
544         struct drm_omap_gem_new *args = data;
545         u32 flags = args->flags & OMAP_BO_USER_MASK;
546 
547         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
548              args->size.bytes, flags);
549 
550         return omap_gem_new_handle(dev, file_priv, args->size, flags,
551                                    &args->handle);
552 }
553 
554 static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
555                 struct drm_file *file_priv)
556 {
557         struct drm_omap_gem_cpu_prep *args = data;
558         struct drm_gem_object *obj;
559         int ret;
560 
561         VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
562 
563         obj = drm_gem_object_lookup(file_priv, args->handle);
564         if (!obj)
565                 return -ENOENT;
566 
567         ret = omap_gem_op_sync(obj, args->op);
568 
569         if (!ret)
570                 ret = omap_gem_op_start(obj, args->op);
571 
572         drm_gem_object_unreference_unlocked(obj);
573 
574         return ret;
575 }
576 
577 static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
578                 struct drm_file *file_priv)
579 {
580         struct drm_omap_gem_cpu_fini *args = data;
581         struct drm_gem_object *obj;
582         int ret;
583 
584         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
585 
586         obj = drm_gem_object_lookup(file_priv, args->handle);
587         if (!obj)
588                 return -ENOENT;
589 
590         /* XXX flushy, flushy */
591         ret = 0;
592 
593         if (!ret)
594                 ret = omap_gem_op_finish(obj, args->op);
595 
596         drm_gem_object_unreference_unlocked(obj);
597 
598         return ret;
599 }
600 
601 static int ioctl_gem_info(struct drm_device *dev, void *data,
602                 struct drm_file *file_priv)
603 {
604         struct drm_omap_gem_info *args = data;
605         struct drm_gem_object *obj;
606         int ret = 0;
607 
608         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
609 
610         obj = drm_gem_object_lookup(file_priv, args->handle);
611         if (!obj)
612                 return -ENOENT;
613 
614         args->size = omap_gem_mmap_size(obj);
615         args->offset = omap_gem_mmap_offset(obj);
616 
617         drm_gem_object_unreference_unlocked(obj);
618 
619         return ret;
620 }
621 
622 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
623         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_AUTH),
624         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
625         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_AUTH),
626         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_AUTH),
627         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_AUTH),
628         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_AUTH),
629 };
630 
631 /*
632  * drm driver funcs
633  */
634 
635 /**
636  * load - setup chip and create an initial config
637  * @dev: DRM device
638  * @flags: startup flags
639  *
640  * The driver load routine has to do several things:
641  *   - initialize the memory manager
642  *   - allocate initial config memory
643  *   - setup the DRM framebuffer with the allocated memory
644  */
645 static int dev_load(struct drm_device *dev, unsigned long flags)
646 {
647         struct omap_drm_platform_data *pdata = dev->dev->platform_data;
648         struct omap_drm_private *priv;
649         unsigned int i;
650         int ret;
651 
652         DBG("load: dev=%p", dev);
653 
654         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
655         if (!priv)
656                 return -ENOMEM;
657 
658         priv->omaprev = pdata->omaprev;
659 
660         dev->dev_private = priv;
661 
662         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
663         init_waitqueue_head(&priv->commit.wait);
664         spin_lock_init(&priv->commit.lock);
665 
666         spin_lock_init(&priv->list_lock);
667         INIT_LIST_HEAD(&priv->obj_list);
668 
669         omap_gem_init(dev);
670 
671         ret = omap_modeset_init(dev);
672         if (ret) {
673                 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
674                 dev->dev_private = NULL;
675                 kfree(priv);
676                 return ret;
677         }
678 
679         /* Initialize vblank handling, start with all CRTCs disabled. */
680         ret = drm_vblank_init(dev, priv->num_crtcs);
681         if (ret)
682                 dev_warn(dev->dev, "could not init vblank\n");
683 
684         for (i = 0; i < priv->num_crtcs; i++)
685                 drm_crtc_vblank_off(priv->crtcs[i]);
686 
687         priv->fbdev = omap_fbdev_init(dev);
688 
689         /* store off drm_device for use in pm ops */
690         dev_set_drvdata(dev->dev, dev);
691 
692         drm_kms_helper_poll_init(dev);
693 
694         return 0;
695 }
696 
697 static int dev_unload(struct drm_device *dev)
698 {
699         struct omap_drm_private *priv = dev->dev_private;
700 
701         DBG("unload: dev=%p", dev);
702 
703         drm_kms_helper_poll_fini(dev);
704 
705         if (priv->fbdev)
706                 omap_fbdev_free(dev);
707 
708         omap_modeset_free(dev);
709         omap_gem_deinit(dev);
710 
711         destroy_workqueue(priv->wq);
712 
713         drm_vblank_cleanup(dev);
714         omap_drm_irq_uninstall(dev);
715 
716         kfree(dev->dev_private);
717         dev->dev_private = NULL;
718 
719         dev_set_drvdata(dev->dev, NULL);
720 
721         return 0;
722 }
723 
724 static int dev_open(struct drm_device *dev, struct drm_file *file)
725 {
726         file->driver_priv = NULL;
727 
728         DBG("open: dev=%p, file=%p", dev, file);
729 
730         return 0;
731 }
732 
733 /**
734  * lastclose - clean up after all DRM clients have exited
735  * @dev: DRM device
736  *
737  * Take care of cleaning up after all DRM clients have exited.  In the
738  * mode setting case, we want to restore the kernel's initial mode (just
739  * in case the last client left us in a bad state).
740  */
741 static void dev_lastclose(struct drm_device *dev)
742 {
743         int i;
744 
745         /* we don't support vga_switcheroo.. so just make sure the fbdev
746          * mode is active
747          */
748         struct omap_drm_private *priv = dev->dev_private;
749         int ret;
750 
751         DBG("lastclose: dev=%p", dev);
752 
753         /* need to restore default rotation state.. not sure
754          * if there is a cleaner way to restore properties to
755          * default state?  Maybe a flag that properties should
756          * automatically be restored to default state on
757          * lastclose?
758          */
759         for (i = 0; i < priv->num_crtcs; i++) {
760                 struct drm_crtc *crtc = priv->crtcs[i];
761 
762                 if (!crtc->primary->rotation_property)
763                         continue;
764 
765                 drm_object_property_set_value(&crtc->base,
766                                               crtc->primary->rotation_property,
767                                               DRM_ROTATE_0);
768         }
769 
770         for (i = 0; i < priv->num_planes; i++) {
771                 struct drm_plane *plane = priv->planes[i];
772 
773                 if (!plane->rotation_property)
774                         continue;
775 
776                 drm_object_property_set_value(&plane->base,
777                                               plane->rotation_property,
778                                               DRM_ROTATE_0);
779         }
780 
781         if (priv->fbdev) {
782                 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
783                 if (ret)
784                         DBG("failed to restore crtc mode");
785         }
786 }
787 
788 static const struct vm_operations_struct omap_gem_vm_ops = {
789         .fault = omap_gem_fault,
790         .open = drm_gem_vm_open,
791         .close = drm_gem_vm_close,
792 };
793 
794 static const struct file_operations omapdriver_fops = {
795         .owner = THIS_MODULE,
796         .open = drm_open,
797         .unlocked_ioctl = drm_ioctl,
798         .release = drm_release,
799         .mmap = omap_gem_mmap,
800         .poll = drm_poll,
801         .read = drm_read,
802         .llseek = noop_llseek,
803 };
804 
805 static struct drm_driver omap_drm_driver = {
806         .driver_features = DRIVER_MODESET | DRIVER_GEM  | DRIVER_PRIME |
807                 DRIVER_ATOMIC,
808         .load = dev_load,
809         .unload = dev_unload,
810         .open = dev_open,
811         .lastclose = dev_lastclose,
812         .get_vblank_counter = drm_vblank_no_hw_counter,
813         .enable_vblank = omap_irq_enable_vblank,
814         .disable_vblank = omap_irq_disable_vblank,
815 #ifdef CONFIG_DEBUG_FS
816         .debugfs_init = omap_debugfs_init,
817         .debugfs_cleanup = omap_debugfs_cleanup,
818 #endif
819         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
820         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
821         .gem_prime_export = omap_gem_prime_export,
822         .gem_prime_import = omap_gem_prime_import,
823         .gem_free_object = omap_gem_free_object,
824         .gem_vm_ops = &omap_gem_vm_ops,
825         .dumb_create = omap_gem_dumb_create,
826         .dumb_map_offset = omap_gem_dumb_map_offset,
827         .dumb_destroy = drm_gem_dumb_destroy,
828         .ioctls = ioctls,
829         .num_ioctls = DRM_OMAP_NUM_IOCTLS,
830         .fops = &omapdriver_fops,
831         .name = DRIVER_NAME,
832         .desc = DRIVER_DESC,
833         .date = DRIVER_DATE,
834         .major = DRIVER_MAJOR,
835         .minor = DRIVER_MINOR,
836         .patchlevel = DRIVER_PATCHLEVEL,
837 };
838 
839 static int pdev_probe(struct platform_device *device)
840 {
841         int r;
842 
843         if (omapdss_is_initialized() == false)
844                 return -EPROBE_DEFER;
845 
846         omap_crtc_pre_init();
847 
848         r = omap_connect_dssdevs();
849         if (r) {
850                 omap_crtc_pre_uninit();
851                 return r;
852         }
853 
854         DBG("%s", device->name);
855         return drm_platform_init(&omap_drm_driver, device);
856 }
857 
858 static int pdev_remove(struct platform_device *device)
859 {
860         DBG("");
861 
862         drm_put_dev(platform_get_drvdata(device));
863 
864         omap_disconnect_dssdevs();
865         omap_crtc_pre_uninit();
866 
867         return 0;
868 }
869 
870 #ifdef CONFIG_PM_SLEEP
871 static int omap_drm_suspend_all_displays(void)
872 {
873         struct omap_dss_device *dssdev = NULL;
874 
875         for_each_dss_dev(dssdev) {
876                 if (!dssdev->driver)
877                         continue;
878 
879                 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
880                         dssdev->driver->disable(dssdev);
881                         dssdev->activate_after_resume = true;
882                 } else {
883                         dssdev->activate_after_resume = false;
884                 }
885         }
886 
887         return 0;
888 }
889 
890 static int omap_drm_resume_all_displays(void)
891 {
892         struct omap_dss_device *dssdev = NULL;
893 
894         for_each_dss_dev(dssdev) {
895                 if (!dssdev->driver)
896                         continue;
897 
898                 if (dssdev->activate_after_resume) {
899                         dssdev->driver->enable(dssdev);
900                         dssdev->activate_after_resume = false;
901                 }
902         }
903 
904         return 0;
905 }
906 
907 static int omap_drm_suspend(struct device *dev)
908 {
909         struct drm_device *drm_dev = dev_get_drvdata(dev);
910 
911         drm_kms_helper_poll_disable(drm_dev);
912 
913         drm_modeset_lock_all(drm_dev);
914         omap_drm_suspend_all_displays();
915         drm_modeset_unlock_all(drm_dev);
916 
917         return 0;
918 }
919 
920 static int omap_drm_resume(struct device *dev)
921 {
922         struct drm_device *drm_dev = dev_get_drvdata(dev);
923 
924         drm_modeset_lock_all(drm_dev);
925         omap_drm_resume_all_displays();
926         drm_modeset_unlock_all(drm_dev);
927 
928         drm_kms_helper_poll_enable(drm_dev);
929 
930         return omap_gem_resume(dev);
931 }
932 #endif
933 
934 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
935 
936 static struct platform_driver pdev = {
937         .driver = {
938                 .name = DRIVER_NAME,
939                 .pm = &omapdrm_pm_ops,
940         },
941         .probe = pdev_probe,
942         .remove = pdev_remove,
943 };
944 
945 static struct platform_driver * const drivers[] = {
946         &omap_dmm_driver,
947         &pdev,
948 };
949 
950 static int __init omap_drm_init(void)
951 {
952         DBG("init");
953 
954         return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
955 }
956 
957 static void __exit omap_drm_fini(void)
958 {
959         DBG("fini");
960 
961         platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
962 }
963 
964 /* need late_initcall() so we load after dss_driver's are loaded */
965 late_initcall(omap_drm_init);
966 module_exit(omap_drm_fini);
967 
968 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
969 MODULE_DESCRIPTION("OMAP DRM Display Driver");
970 MODULE_ALIAS("platform:" DRIVER_NAME);
971 MODULE_LICENSE("GPL v2");
972 

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