Version:  2.0.40 2.2.26 2.4.37 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0

Linux/drivers/gpu/drm/drm_edid.c

  1 /*
  2  * Copyright (c) 2006 Luc Verhaegen (quirks list)
  3  * Copyright (c) 2007-2008 Intel Corporation
  4  *   Jesse Barnes <jesse.barnes@intel.com>
  5  * Copyright 2010 Red Hat, Inc.
  6  *
  7  * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
  8  * FB layer.
  9  *   Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
 10  *
 11  * Permission is hereby granted, free of charge, to any person obtaining a
 12  * copy of this software and associated documentation files (the "Software"),
 13  * to deal in the Software without restriction, including without limitation
 14  * the rights to use, copy, modify, merge, publish, distribute, sub license,
 15  * and/or sell copies of the Software, and to permit persons to whom the
 16  * Software is furnished to do so, subject to the following conditions:
 17  *
 18  * The above copyright notice and this permission notice (including the
 19  * next paragraph) shall be included in all copies or substantial portions
 20  * of the Software.
 21  *
 22  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 23  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 24  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 25  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 26  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 27  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 28  * DEALINGS IN THE SOFTWARE.
 29  */
 30 #include <linux/kernel.h>
 31 #include <linux/slab.h>
 32 #include <linux/hdmi.h>
 33 #include <linux/i2c.h>
 34 #include <linux/module.h>
 35 #include <drm/drmP.h>
 36 #include <drm/drm_edid.h>
 37 #include <drm/drm_displayid.h>
 38 
 39 #define version_greater(edid, maj, min) \
 40         (((edid)->version > (maj)) || \
 41          ((edid)->version == (maj) && (edid)->revision > (min)))
 42 
 43 #define EDID_EST_TIMINGS 16
 44 #define EDID_STD_TIMINGS 8
 45 #define EDID_DETAILED_TIMINGS 4
 46 
 47 /*
 48  * EDID blocks out in the wild have a variety of bugs, try to collect
 49  * them here (note that userspace may work around broken monitors first,
 50  * but fixes should make their way here so that the kernel "just works"
 51  * on as many displays as possible).
 52  */
 53 
 54 /* First detailed mode wrong, use largest 60Hz mode */
 55 #define EDID_QUIRK_PREFER_LARGE_60              (1 << 0)
 56 /* Reported 135MHz pixel clock is too high, needs adjustment */
 57 #define EDID_QUIRK_135_CLOCK_TOO_HIGH           (1 << 1)
 58 /* Prefer the largest mode at 75 Hz */
 59 #define EDID_QUIRK_PREFER_LARGE_75              (1 << 2)
 60 /* Detail timing is in cm not mm */
 61 #define EDID_QUIRK_DETAILED_IN_CM               (1 << 3)
 62 /* Detailed timing descriptors have bogus size values, so just take the
 63  * maximum size and use that.
 64  */
 65 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE    (1 << 4)
 66 /* Monitor forgot to set the first detailed is preferred bit. */
 67 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED     (1 << 5)
 68 /* use +hsync +vsync for detailed mode */
 69 #define EDID_QUIRK_DETAILED_SYNC_PP             (1 << 6)
 70 /* Force reduced-blanking timings for detailed modes */
 71 #define EDID_QUIRK_FORCE_REDUCED_BLANKING       (1 << 7)
 72 /* Force 8bpc */
 73 #define EDID_QUIRK_FORCE_8BPC                   (1 << 8)
 74 /* Force 12bpc */
 75 #define EDID_QUIRK_FORCE_12BPC                  (1 << 9)
 76 
 77 struct detailed_mode_closure {
 78         struct drm_connector *connector;
 79         struct edid *edid;
 80         bool preferred;
 81         u32 quirks;
 82         int modes;
 83 };
 84 
 85 #define LEVEL_DMT       0
 86 #define LEVEL_GTF       1
 87 #define LEVEL_GTF2      2
 88 #define LEVEL_CVT       3
 89 
 90 static struct edid_quirk {
 91         char vendor[4];
 92         int product_id;
 93         u32 quirks;
 94 } edid_quirk_list[] = {
 95         /* Acer AL1706 */
 96         { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
 97         /* Acer F51 */
 98         { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
 99         /* Unknown Acer */
100         { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
101 
102         /* Belinea 10 15 55 */
103         { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
104         { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
105 
106         /* Envision Peripherals, Inc. EN-7100e */
107         { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
108         /* Envision EN2028 */
109         { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
110 
111         /* Funai Electronics PM36B */
112         { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
113           EDID_QUIRK_DETAILED_IN_CM },
114 
115         /* LG Philips LCD LP154W01-A5 */
116         { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
117         { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
118 
119         /* Philips 107p5 CRT */
120         { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
121 
122         /* Proview AY765C */
123         { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
124 
125         /* Samsung SyncMaster 205BW.  Note: irony */
126         { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
127         /* Samsung SyncMaster 22[5-6]BW */
128         { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
129         { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
130 
131         /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
132         { "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
133 
134         /* ViewSonic VA2026w */
135         { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
136 
137         /* Medion MD 30217 PG */
138         { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
139 
140         /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
141         { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
142 };
143 
144 /*
145  * Autogenerated from the DMT spec.
146  * This table is copied from xfree86/modes/xf86EdidModes.c.
147  */
148 static const struct drm_display_mode drm_dmt_modes[] = {
149         /* 640x350@85Hz */
150         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
151                    736, 832, 0, 350, 382, 385, 445, 0,
152                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
153         /* 640x400@85Hz */
154         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
155                    736, 832, 0, 400, 401, 404, 445, 0,
156                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
157         /* 720x400@85Hz */
158         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
159                    828, 936, 0, 400, 401, 404, 446, 0,
160                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
161         /* 640x480@60Hz */
162         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
163                    752, 800, 0, 480, 489, 492, 525, 0,
164                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
165         /* 640x480@72Hz */
166         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
167                    704, 832, 0, 480, 489, 492, 520, 0,
168                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
169         /* 640x480@75Hz */
170         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
171                    720, 840, 0, 480, 481, 484, 500, 0,
172                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
173         /* 640x480@85Hz */
174         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
175                    752, 832, 0, 480, 481, 484, 509, 0,
176                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
177         /* 800x600@56Hz */
178         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
179                    896, 1024, 0, 600, 601, 603, 625, 0,
180                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
181         /* 800x600@60Hz */
182         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
183                    968, 1056, 0, 600, 601, 605, 628, 0,
184                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
185         /* 800x600@72Hz */
186         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
187                    976, 1040, 0, 600, 637, 643, 666, 0,
188                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
189         /* 800x600@75Hz */
190         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
191                    896, 1056, 0, 600, 601, 604, 625, 0,
192                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
193         /* 800x600@85Hz */
194         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
195                    896, 1048, 0, 600, 601, 604, 631, 0,
196                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
197         /* 800x600@120Hz RB */
198         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
199                    880, 960, 0, 600, 603, 607, 636, 0,
200                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
201         /* 848x480@60Hz */
202         { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
203                    976, 1088, 0, 480, 486, 494, 517, 0,
204                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
205         /* 1024x768@43Hz, interlace */
206         { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
207                    1208, 1264, 0, 768, 768, 772, 817, 0,
208                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
209                         DRM_MODE_FLAG_INTERLACE) },
210         /* 1024x768@60Hz */
211         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
212                    1184, 1344, 0, 768, 771, 777, 806, 0,
213                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
214         /* 1024x768@70Hz */
215         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
216                    1184, 1328, 0, 768, 771, 777, 806, 0,
217                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
218         /* 1024x768@75Hz */
219         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
220                    1136, 1312, 0, 768, 769, 772, 800, 0,
221                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
222         /* 1024x768@85Hz */
223         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
224                    1168, 1376, 0, 768, 769, 772, 808, 0,
225                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
226         /* 1024x768@120Hz RB */
227         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
228                    1104, 1184, 0, 768, 771, 775, 813, 0,
229                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
230         /* 1152x864@75Hz */
231         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
232                    1344, 1600, 0, 864, 865, 868, 900, 0,
233                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
234         /* 1280x768@60Hz RB */
235         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
236                    1360, 1440, 0, 768, 771, 778, 790, 0,
237                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
238         /* 1280x768@60Hz */
239         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
240                    1472, 1664, 0, 768, 771, 778, 798, 0,
241                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
242         /* 1280x768@75Hz */
243         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
244                    1488, 1696, 0, 768, 771, 778, 805, 0,
245                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
246         /* 1280x768@85Hz */
247         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
248                    1496, 1712, 0, 768, 771, 778, 809, 0,
249                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
250         /* 1280x768@120Hz RB */
251         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
252                    1360, 1440, 0, 768, 771, 778, 813, 0,
253                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
254         /* 1280x800@60Hz RB */
255         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
256                    1360, 1440, 0, 800, 803, 809, 823, 0,
257                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
258         /* 1280x800@60Hz */
259         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
260                    1480, 1680, 0, 800, 803, 809, 831, 0,
261                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
262         /* 1280x800@75Hz */
263         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
264                    1488, 1696, 0, 800, 803, 809, 838, 0,
265                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
266         /* 1280x800@85Hz */
267         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
268                    1496, 1712, 0, 800, 803, 809, 843, 0,
269                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
270         /* 1280x800@120Hz RB */
271         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
272                    1360, 1440, 0, 800, 803, 809, 847, 0,
273                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
274         /* 1280x960@60Hz */
275         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
276                    1488, 1800, 0, 960, 961, 964, 1000, 0,
277                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
278         /* 1280x960@85Hz */
279         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
280                    1504, 1728, 0, 960, 961, 964, 1011, 0,
281                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
282         /* 1280x960@120Hz RB */
283         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
284                    1360, 1440, 0, 960, 963, 967, 1017, 0,
285                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
286         /* 1280x1024@60Hz */
287         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
288                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
289                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
290         /* 1280x1024@75Hz */
291         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
292                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
293                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
294         /* 1280x1024@85Hz */
295         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
296                    1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
297                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
298         /* 1280x1024@120Hz RB */
299         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
300                    1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
301                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
302         /* 1360x768@60Hz */
303         { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
304                    1536, 1792, 0, 768, 771, 777, 795, 0,
305                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
306         /* 1360x768@120Hz RB */
307         { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
308                    1440, 1520, 0, 768, 771, 776, 813, 0,
309                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
310         /* 1400x1050@60Hz RB */
311         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
312                    1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
313                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
314         /* 1400x1050@60Hz */
315         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
316                    1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
317                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
318         /* 1400x1050@75Hz */
319         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
320                    1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
321                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
322         /* 1400x1050@85Hz */
323         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
324                    1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
325                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
326         /* 1400x1050@120Hz RB */
327         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
328                    1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
329                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
330         /* 1440x900@60Hz RB */
331         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
332                    1520, 1600, 0, 900, 903, 909, 926, 0,
333                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
334         /* 1440x900@60Hz */
335         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
336                    1672, 1904, 0, 900, 903, 909, 934, 0,
337                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
338         /* 1440x900@75Hz */
339         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
340                    1688, 1936, 0, 900, 903, 909, 942, 0,
341                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
342         /* 1440x900@85Hz */
343         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
344                    1696, 1952, 0, 900, 903, 909, 948, 0,
345                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
346         /* 1440x900@120Hz RB */
347         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
348                    1520, 1600, 0, 900, 903, 909, 953, 0,
349                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
350         /* 1600x1200@60Hz */
351         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
352                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
353                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
354         /* 1600x1200@65Hz */
355         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
356                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
357                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
358         /* 1600x1200@70Hz */
359         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
360                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
361                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
362         /* 1600x1200@75Hz */
363         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
364                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
365                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
366         /* 1600x1200@85Hz */
367         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
368                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
369                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
370         /* 1600x1200@120Hz RB */
371         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
372                    1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
373                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
374         /* 1680x1050@60Hz RB */
375         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
376                    1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
377                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
378         /* 1680x1050@60Hz */
379         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
380                    1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
381                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
382         /* 1680x1050@75Hz */
383         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
384                    1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
385                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
386         /* 1680x1050@85Hz */
387         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
388                    1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
389                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
390         /* 1680x1050@120Hz RB */
391         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
392                    1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
393                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
394         /* 1792x1344@60Hz */
395         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
396                    2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
397                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
398         /* 1792x1344@75Hz */
399         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
400                    2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
401                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
402         /* 1792x1344@120Hz RB */
403         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
404                    1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
405                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
406         /* 1856x1392@60Hz */
407         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
408                    2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
409                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
410         /* 1856x1392@75Hz */
411         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
412                    2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
413                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
414         /* 1856x1392@120Hz RB */
415         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
416                    1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
417                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
418         /* 1920x1200@60Hz RB */
419         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
420                    2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
421                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
422         /* 1920x1200@60Hz */
423         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
424                    2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
425                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
426         /* 1920x1200@75Hz */
427         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
428                    2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
429                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
430         /* 1920x1200@85Hz */
431         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
432                    2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
433                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
434         /* 1920x1200@120Hz RB */
435         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
436                    2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
437                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
438         /* 1920x1440@60Hz */
439         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
440                    2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
441                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
442         /* 1920x1440@75Hz */
443         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
444                    2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
445                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
446         /* 1920x1440@120Hz RB */
447         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
448                    2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
449                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
450         /* 2560x1600@60Hz RB */
451         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
452                    2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
453                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
454         /* 2560x1600@60Hz */
455         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
456                    3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
457                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
458         /* 2560x1600@75HZ */
459         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
460                    3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
461                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
462         /* 2560x1600@85HZ */
463         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
464                    3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
465                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
466         /* 2560x1600@120Hz RB */
467         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
468                    2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
469                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
470 };
471 
472 /*
473  * These more or less come from the DMT spec.  The 720x400 modes are
474  * inferred from historical 80x25 practice.  The 640x480@67 and 832x624@75
475  * modes are old-school Mac modes.  The EDID spec says the 1152x864@75 mode
476  * should be 1152x870, again for the Mac, but instead we use the x864 DMT
477  * mode.
478  *
479  * The DMT modes have been fact-checked; the rest are mild guesses.
480  */
481 static const struct drm_display_mode edid_est_modes[] = {
482         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
483                    968, 1056, 0, 600, 601, 605, 628, 0,
484                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
485         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
486                    896, 1024, 0, 600, 601, 603,  625, 0,
487                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
488         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
489                    720, 840, 0, 480, 481, 484, 500, 0,
490                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
491         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
492                    704,  832, 0, 480, 489, 491, 520, 0,
493                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
494         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
495                    768,  864, 0, 480, 483, 486, 525, 0,
496                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
497         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
498                    752, 800, 0, 480, 490, 492, 525, 0,
499                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
500         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
501                    846, 900, 0, 400, 421, 423,  449, 0,
502                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
503         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
504                    846,  900, 0, 400, 412, 414, 449, 0,
505                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
506         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
507                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
508                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
509         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
510                    1136, 1312, 0,  768, 769, 772, 800, 0,
511                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
512         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
513                    1184, 1328, 0,  768, 771, 777, 806, 0,
514                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
515         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
516                    1184, 1344, 0,  768, 771, 777, 806, 0,
517                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
518         { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
519                    1208, 1264, 0, 768, 768, 776, 817, 0,
520                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
521         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
522                    928, 1152, 0, 624, 625, 628, 667, 0,
523                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
524         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
525                    896, 1056, 0, 600, 601, 604,  625, 0,
526                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
527         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
528                    976, 1040, 0, 600, 637, 643, 666, 0,
529                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
530         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
531                    1344, 1600, 0,  864, 865, 868, 900, 0,
532                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
533 };
534 
535 struct minimode {
536         short w;
537         short h;
538         short r;
539         short rb;
540 };
541 
542 static const struct minimode est3_modes[] = {
543         /* byte 6 */
544         { 640, 350, 85, 0 },
545         { 640, 400, 85, 0 },
546         { 720, 400, 85, 0 },
547         { 640, 480, 85, 0 },
548         { 848, 480, 60, 0 },
549         { 800, 600, 85, 0 },
550         { 1024, 768, 85, 0 },
551         { 1152, 864, 75, 0 },
552         /* byte 7 */
553         { 1280, 768, 60, 1 },
554         { 1280, 768, 60, 0 },
555         { 1280, 768, 75, 0 },
556         { 1280, 768, 85, 0 },
557         { 1280, 960, 60, 0 },
558         { 1280, 960, 85, 0 },
559         { 1280, 1024, 60, 0 },
560         { 1280, 1024, 85, 0 },
561         /* byte 8 */
562         { 1360, 768, 60, 0 },
563         { 1440, 900, 60, 1 },
564         { 1440, 900, 60, 0 },
565         { 1440, 900, 75, 0 },
566         { 1440, 900, 85, 0 },
567         { 1400, 1050, 60, 1 },
568         { 1400, 1050, 60, 0 },
569         { 1400, 1050, 75, 0 },
570         /* byte 9 */
571         { 1400, 1050, 85, 0 },
572         { 1680, 1050, 60, 1 },
573         { 1680, 1050, 60, 0 },
574         { 1680, 1050, 75, 0 },
575         { 1680, 1050, 85, 0 },
576         { 1600, 1200, 60, 0 },
577         { 1600, 1200, 65, 0 },
578         { 1600, 1200, 70, 0 },
579         /* byte 10 */
580         { 1600, 1200, 75, 0 },
581         { 1600, 1200, 85, 0 },
582         { 1792, 1344, 60, 0 },
583         { 1792, 1344, 75, 0 },
584         { 1856, 1392, 60, 0 },
585         { 1856, 1392, 75, 0 },
586         { 1920, 1200, 60, 1 },
587         { 1920, 1200, 60, 0 },
588         /* byte 11 */
589         { 1920, 1200, 75, 0 },
590         { 1920, 1200, 85, 0 },
591         { 1920, 1440, 60, 0 },
592         { 1920, 1440, 75, 0 },
593 };
594 
595 static const struct minimode extra_modes[] = {
596         { 1024, 576,  60, 0 },
597         { 1366, 768,  60, 0 },
598         { 1600, 900,  60, 0 },
599         { 1680, 945,  60, 0 },
600         { 1920, 1080, 60, 0 },
601         { 2048, 1152, 60, 0 },
602         { 2048, 1536, 60, 0 },
603 };
604 
605 /*
606  * Probably taken from CEA-861 spec.
607  * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
608  */
609 static const struct drm_display_mode edid_cea_modes[] = {
610         /* 1 - 640x480@60Hz */
611         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
612                    752, 800, 0, 480, 490, 492, 525, 0,
613                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
614           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
615         /* 2 - 720x480@60Hz */
616         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
617                    798, 858, 0, 480, 489, 495, 525, 0,
618                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
619           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
620         /* 3 - 720x480@60Hz */
621         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
622                    798, 858, 0, 480, 489, 495, 525, 0,
623                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
624           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
625         /* 4 - 1280x720@60Hz */
626         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
627                    1430, 1650, 0, 720, 725, 730, 750, 0,
628                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
629           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
630         /* 5 - 1920x1080i@60Hz */
631         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
632                    2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
633                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
634                         DRM_MODE_FLAG_INTERLACE),
635           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
636         /* 6 - 720(1440)x480i@60Hz */
637         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
638                    801, 858, 0, 480, 488, 494, 525, 0,
639                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
640                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
641           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
642         /* 7 - 720(1440)x480i@60Hz */
643         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
644                    801, 858, 0, 480, 488, 494, 525, 0,
645                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
646                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
647           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
648         /* 8 - 720(1440)x240@60Hz */
649         { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
650                    801, 858, 0, 240, 244, 247, 262, 0,
651                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
652                         DRM_MODE_FLAG_DBLCLK),
653           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
654         /* 9 - 720(1440)x240@60Hz */
655         { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
656                    801, 858, 0, 240, 244, 247, 262, 0,
657                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
658                         DRM_MODE_FLAG_DBLCLK),
659           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
660         /* 10 - 2880x480i@60Hz */
661         { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
662                    3204, 3432, 0, 480, 488, 494, 525, 0,
663                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
664                         DRM_MODE_FLAG_INTERLACE),
665           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
666         /* 11 - 2880x480i@60Hz */
667         { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
668                    3204, 3432, 0, 480, 488, 494, 525, 0,
669                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
670                         DRM_MODE_FLAG_INTERLACE),
671           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
672         /* 12 - 2880x240@60Hz */
673         { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
674                    3204, 3432, 0, 240, 244, 247, 262, 0,
675                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
676           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
677         /* 13 - 2880x240@60Hz */
678         { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
679                    3204, 3432, 0, 240, 244, 247, 262, 0,
680                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
681           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
682         /* 14 - 1440x480@60Hz */
683         { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
684                    1596, 1716, 0, 480, 489, 495, 525, 0,
685                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
686           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
687         /* 15 - 1440x480@60Hz */
688         { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
689                    1596, 1716, 0, 480, 489, 495, 525, 0,
690                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
691           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
692         /* 16 - 1920x1080@60Hz */
693         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
694                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
695                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
696           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
697         /* 17 - 720x576@50Hz */
698         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
699                    796, 864, 0, 576, 581, 586, 625, 0,
700                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
701           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
702         /* 18 - 720x576@50Hz */
703         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
704                    796, 864, 0, 576, 581, 586, 625, 0,
705                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
706           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
707         /* 19 - 1280x720@50Hz */
708         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
709                    1760, 1980, 0, 720, 725, 730, 750, 0,
710                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
711           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
712         /* 20 - 1920x1080i@50Hz */
713         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
714                    2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
715                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
716                         DRM_MODE_FLAG_INTERLACE),
717           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
718         /* 21 - 720(1440)x576i@50Hz */
719         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
720                    795, 864, 0, 576, 580, 586, 625, 0,
721                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
722                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
723           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
724         /* 22 - 720(1440)x576i@50Hz */
725         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
726                    795, 864, 0, 576, 580, 586, 625, 0,
727                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
728                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
729           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
730         /* 23 - 720(1440)x288@50Hz */
731         { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
732                    795, 864, 0, 288, 290, 293, 312, 0,
733                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
734                         DRM_MODE_FLAG_DBLCLK),
735           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
736         /* 24 - 720(1440)x288@50Hz */
737         { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
738                    795, 864, 0, 288, 290, 293, 312, 0,
739                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
740                         DRM_MODE_FLAG_DBLCLK),
741           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
742         /* 25 - 2880x576i@50Hz */
743         { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
744                    3180, 3456, 0, 576, 580, 586, 625, 0,
745                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
746                         DRM_MODE_FLAG_INTERLACE),
747           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
748         /* 26 - 2880x576i@50Hz */
749         { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
750                    3180, 3456, 0, 576, 580, 586, 625, 0,
751                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
752                         DRM_MODE_FLAG_INTERLACE),
753           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
754         /* 27 - 2880x288@50Hz */
755         { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
756                    3180, 3456, 0, 288, 290, 293, 312, 0,
757                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
758           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
759         /* 28 - 2880x288@50Hz */
760         { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
761                    3180, 3456, 0, 288, 290, 293, 312, 0,
762                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
763           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
764         /* 29 - 1440x576@50Hz */
765         { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
766                    1592, 1728, 0, 576, 581, 586, 625, 0,
767                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
768           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
769         /* 30 - 1440x576@50Hz */
770         { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
771                    1592, 1728, 0, 576, 581, 586, 625, 0,
772                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
773           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
774         /* 31 - 1920x1080@50Hz */
775         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
776                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
777                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
778           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
779         /* 32 - 1920x1080@24Hz */
780         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
781                    2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
782                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
783           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
784         /* 33 - 1920x1080@25Hz */
785         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
786                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
787                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
788           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
789         /* 34 - 1920x1080@30Hz */
790         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
791                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
792                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
793           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
794         /* 35 - 2880x480@60Hz */
795         { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
796                    3192, 3432, 0, 480, 489, 495, 525, 0,
797                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
798           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
799         /* 36 - 2880x480@60Hz */
800         { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
801                    3192, 3432, 0, 480, 489, 495, 525, 0,
802                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
803           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
804         /* 37 - 2880x576@50Hz */
805         { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
806                    3184, 3456, 0, 576, 581, 586, 625, 0,
807                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
808           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
809         /* 38 - 2880x576@50Hz */
810         { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
811                    3184, 3456, 0, 576, 581, 586, 625, 0,
812                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
813           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
814         /* 39 - 1920x1080i@50Hz */
815         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
816                    2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
817                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
818                         DRM_MODE_FLAG_INTERLACE),
819           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
820         /* 40 - 1920x1080i@100Hz */
821         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
822                    2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
823                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
824                         DRM_MODE_FLAG_INTERLACE),
825           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
826         /* 41 - 1280x720@100Hz */
827         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
828                    1760, 1980, 0, 720, 725, 730, 750, 0,
829                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
830           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
831         /* 42 - 720x576@100Hz */
832         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
833                    796, 864, 0, 576, 581, 586, 625, 0,
834                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
835           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
836         /* 43 - 720x576@100Hz */
837         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
838                    796, 864, 0, 576, 581, 586, 625, 0,
839                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
840           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
841         /* 44 - 720(1440)x576i@100Hz */
842         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
843                    795, 864, 0, 576, 580, 586, 625, 0,
844                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
845                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
846           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
847         /* 45 - 720(1440)x576i@100Hz */
848         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
849                    795, 864, 0, 576, 580, 586, 625, 0,
850                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
851                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
852           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
853         /* 46 - 1920x1080i@120Hz */
854         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
855                    2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
856                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
857                         DRM_MODE_FLAG_INTERLACE),
858           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
859         /* 47 - 1280x720@120Hz */
860         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
861                    1430, 1650, 0, 720, 725, 730, 750, 0,
862                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
863           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
864         /* 48 - 720x480@120Hz */
865         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
866                    798, 858, 0, 480, 489, 495, 525, 0,
867                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
868           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
869         /* 49 - 720x480@120Hz */
870         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
871                    798, 858, 0, 480, 489, 495, 525, 0,
872                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
873           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
874         /* 50 - 720(1440)x480i@120Hz */
875         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
876                    801, 858, 0, 480, 488, 494, 525, 0,
877                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
878                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
879           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
880         /* 51 - 720(1440)x480i@120Hz */
881         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
882                    801, 858, 0, 480, 488, 494, 525, 0,
883                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
884                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
885           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
886         /* 52 - 720x576@200Hz */
887         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
888                    796, 864, 0, 576, 581, 586, 625, 0,
889                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
890           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
891         /* 53 - 720x576@200Hz */
892         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
893                    796, 864, 0, 576, 581, 586, 625, 0,
894                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
895           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
896         /* 54 - 720(1440)x576i@200Hz */
897         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
898                    795, 864, 0, 576, 580, 586, 625, 0,
899                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
900                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
901           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
902         /* 55 - 720(1440)x576i@200Hz */
903         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
904                    795, 864, 0, 576, 580, 586, 625, 0,
905                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
906                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
907           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
908         /* 56 - 720x480@240Hz */
909         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
910                    798, 858, 0, 480, 489, 495, 525, 0,
911                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
912           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
913         /* 57 - 720x480@240Hz */
914         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
915                    798, 858, 0, 480, 489, 495, 525, 0,
916                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
917           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
918         /* 58 - 720(1440)x480i@240 */
919         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
920                    801, 858, 0, 480, 488, 494, 525, 0,
921                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
922                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
923           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
924         /* 59 - 720(1440)x480i@240 */
925         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
926                    801, 858, 0, 480, 488, 494, 525, 0,
927                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
928                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
929           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
930         /* 60 - 1280x720@24Hz */
931         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
932                    3080, 3300, 0, 720, 725, 730, 750, 0,
933                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
934           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
935         /* 61 - 1280x720@25Hz */
936         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
937                    3740, 3960, 0, 720, 725, 730, 750, 0,
938                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
939           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
940         /* 62 - 1280x720@30Hz */
941         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
942                    3080, 3300, 0, 720, 725, 730, 750, 0,
943                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
944           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
945         /* 63 - 1920x1080@120Hz */
946         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
947                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
948                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
949          .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
950         /* 64 - 1920x1080@100Hz */
951         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
952                    2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
953                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
954          .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
955 };
956 
957 /*
958  * HDMI 1.4 4k modes.
959  */
960 static const struct drm_display_mode edid_4k_modes[] = {
961         /* 1 - 3840x2160@30Hz */
962         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
963                    3840, 4016, 4104, 4400, 0,
964                    2160, 2168, 2178, 2250, 0,
965                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
966           .vrefresh = 30, },
967         /* 2 - 3840x2160@25Hz */
968         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
969                    3840, 4896, 4984, 5280, 0,
970                    2160, 2168, 2178, 2250, 0,
971                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
972           .vrefresh = 25, },
973         /* 3 - 3840x2160@24Hz */
974         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
975                    3840, 5116, 5204, 5500, 0,
976                    2160, 2168, 2178, 2250, 0,
977                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
978           .vrefresh = 24, },
979         /* 4 - 4096x2160@24Hz (SMPTE) */
980         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
981                    4096, 5116, 5204, 5500, 0,
982                    2160, 2168, 2178, 2250, 0,
983                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
984           .vrefresh = 24, },
985 };
986 
987 /*** DDC fetch and block validation ***/
988 
989 static const u8 edid_header[] = {
990         0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
991 };
992 
993 /**
994  * drm_edid_header_is_valid - sanity check the header of the base EDID block
995  * @raw_edid: pointer to raw base EDID block
996  *
997  * Sanity check the header of the base EDID block.
998  *
999  * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
1000  */
1001 int drm_edid_header_is_valid(const u8 *raw_edid)
1002 {
1003         int i, score = 0;
1004 
1005         for (i = 0; i < sizeof(edid_header); i++)
1006                 if (raw_edid[i] == edid_header[i])
1007                         score++;
1008 
1009         return score;
1010 }
1011 EXPORT_SYMBOL(drm_edid_header_is_valid);
1012 
1013 static int edid_fixup __read_mostly = 6;
1014 module_param_named(edid_fixup, edid_fixup, int, 0400);
1015 MODULE_PARM_DESC(edid_fixup,
1016                  "Minimum number of valid EDID header bytes (0-8, default 6)");
1017 
1018 static void drm_get_displayid(struct drm_connector *connector,
1019                               struct edid *edid);
1020 
1021 static int drm_edid_block_checksum(const u8 *raw_edid)
1022 {
1023         int i;
1024         u8 csum = 0;
1025         for (i = 0; i < EDID_LENGTH; i++)
1026                 csum += raw_edid[i];
1027 
1028         return csum;
1029 }
1030 
1031 static bool drm_edid_is_zero(const u8 *in_edid, int length)
1032 {
1033         if (memchr_inv(in_edid, 0, length))
1034                 return false;
1035 
1036         return true;
1037 }
1038 
1039 /**
1040  * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1041  * @raw_edid: pointer to raw EDID block
1042  * @block: type of block to validate (0 for base, extension otherwise)
1043  * @print_bad_edid: if true, dump bad EDID blocks to the console
1044  *
1045  * Validate a base or extension EDID block and optionally dump bad blocks to
1046  * the console.
1047  *
1048  * Return: True if the block is valid, false otherwise.
1049  */
1050 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
1051 {
1052         u8 csum;
1053         struct edid *edid = (struct edid *)raw_edid;
1054 
1055         if (WARN_ON(!raw_edid))
1056                 return false;
1057 
1058         if (edid_fixup > 8 || edid_fixup < 0)
1059                 edid_fixup = 6;
1060 
1061         if (block == 0) {
1062                 int score = drm_edid_header_is_valid(raw_edid);
1063                 if (score == 8) ;
1064                 else if (score >= edid_fixup) {
1065                         DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1066                         memcpy(raw_edid, edid_header, sizeof(edid_header));
1067                 } else {
1068                         goto bad;
1069                 }
1070         }
1071 
1072         csum = drm_edid_block_checksum(raw_edid);
1073         if (csum) {
1074                 if (print_bad_edid) {
1075                         DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
1076                 }
1077 
1078                 /* allow CEA to slide through, switches mangle this */
1079                 if (raw_edid[0] != 0x02)
1080                         goto bad;
1081         }
1082 
1083         /* per-block-type checks */
1084         switch (raw_edid[0]) {
1085         case 0: /* base */
1086                 if (edid->version != 1) {
1087                         DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1088                         goto bad;
1089                 }
1090 
1091                 if (edid->revision > 4)
1092                         DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1093                 break;
1094 
1095         default:
1096                 break;
1097         }
1098 
1099         return true;
1100 
1101 bad:
1102         if (print_bad_edid) {
1103                 if (drm_edid_is_zero(raw_edid, EDID_LENGTH)) {
1104                         printk(KERN_ERR "EDID block is all zeroes\n");
1105                 } else {
1106                         printk(KERN_ERR "Raw EDID:\n");
1107                         print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
1108                                raw_edid, EDID_LENGTH, false);
1109                 }
1110         }
1111         return false;
1112 }
1113 EXPORT_SYMBOL(drm_edid_block_valid);
1114 
1115 /**
1116  * drm_edid_is_valid - sanity check EDID data
1117  * @edid: EDID data
1118  *
1119  * Sanity-check an entire EDID record (including extensions)
1120  *
1121  * Return: True if the EDID data is valid, false otherwise.
1122  */
1123 bool drm_edid_is_valid(struct edid *edid)
1124 {
1125         int i;
1126         u8 *raw = (u8 *)edid;
1127 
1128         if (!edid)
1129                 return false;
1130 
1131         for (i = 0; i <= edid->extensions; i++)
1132                 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
1133                         return false;
1134 
1135         return true;
1136 }
1137 EXPORT_SYMBOL(drm_edid_is_valid);
1138 
1139 #define DDC_SEGMENT_ADDR 0x30
1140 /**
1141  * drm_do_probe_ddc_edid() - get EDID information via I2C
1142  * @data: I2C device adapter
1143  * @buf: EDID data buffer to be filled
1144  * @block: 128 byte EDID block to start fetching from
1145  * @len: EDID data buffer length to fetch
1146  *
1147  * Try to fetch EDID information by calling I2C driver functions.
1148  *
1149  * Return: 0 on success or -1 on failure.
1150  */
1151 static int
1152 drm_do_probe_ddc_edid(void *data, u8 *buf, unsigned int block, size_t len)
1153 {
1154         struct i2c_adapter *adapter = data;
1155         unsigned char start = block * EDID_LENGTH;
1156         unsigned char segment = block >> 1;
1157         unsigned char xfers = segment ? 3 : 2;
1158         int ret, retries = 5;
1159 
1160         /*
1161          * The core I2C driver will automatically retry the transfer if the
1162          * adapter reports EAGAIN. However, we find that bit-banging transfers
1163          * are susceptible to errors under a heavily loaded machine and
1164          * generate spurious NAKs and timeouts. Retrying the transfer
1165          * of the individual block a few times seems to overcome this.
1166          */
1167         do {
1168                 struct i2c_msg msgs[] = {
1169                         {
1170                                 .addr   = DDC_SEGMENT_ADDR,
1171                                 .flags  = 0,
1172                                 .len    = 1,
1173                                 .buf    = &segment,
1174                         }, {
1175                                 .addr   = DDC_ADDR,
1176                                 .flags  = 0,
1177                                 .len    = 1,
1178                                 .buf    = &start,
1179                         }, {
1180                                 .addr   = DDC_ADDR,
1181                                 .flags  = I2C_M_RD,
1182                                 .len    = len,
1183                                 .buf    = buf,
1184                         }
1185                 };
1186 
1187                 /*
1188                  * Avoid sending the segment addr to not upset non-compliant
1189                  * DDC monitors.
1190                  */
1191                 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1192 
1193                 if (ret == -ENXIO) {
1194                         DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1195                                         adapter->name);
1196                         break;
1197                 }
1198         } while (ret != xfers && --retries);
1199 
1200         return ret == xfers ? 0 : -1;
1201 }
1202 
1203 /**
1204  * drm_do_get_edid - get EDID data using a custom EDID block read function
1205  * @connector: connector we're probing
1206  * @get_edid_block: EDID block read function
1207  * @data: private data passed to the block read function
1208  *
1209  * When the I2C adapter connected to the DDC bus is hidden behind a device that
1210  * exposes a different interface to read EDID blocks this function can be used
1211  * to get EDID data using a custom block read function.
1212  *
1213  * As in the general case the DDC bus is accessible by the kernel at the I2C
1214  * level, drivers must make all reasonable efforts to expose it as an I2C
1215  * adapter and use drm_get_edid() instead of abusing this function.
1216  *
1217  * Return: Pointer to valid EDID or NULL if we couldn't find any.
1218  */
1219 struct edid *drm_do_get_edid(struct drm_connector *connector,
1220         int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
1221                               size_t len),
1222         void *data)
1223 {
1224         int i, j = 0, valid_extensions = 0;
1225         u8 *block, *new;
1226         bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
1227 
1228         if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1229                 return NULL;
1230 
1231         /* base block fetch */
1232         for (i = 0; i < 4; i++) {
1233                 if (get_edid_block(data, block, 0, EDID_LENGTH))
1234                         goto out;
1235                 if (drm_edid_block_valid(block, 0, print_bad_edid))
1236                         break;
1237                 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1238                         connector->null_edid_counter++;
1239                         goto carp;
1240                 }
1241         }
1242         if (i == 4)
1243                 goto carp;
1244 
1245         /* if there's no extensions, we're done */
1246         if (block[0x7e] == 0)
1247                 return (struct edid *)block;
1248 
1249         new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
1250         if (!new)
1251                 goto out;
1252         block = new;
1253 
1254         for (j = 1; j <= block[0x7e]; j++) {
1255                 for (i = 0; i < 4; i++) {
1256                         if (get_edid_block(data,
1257                                   block + (valid_extensions + 1) * EDID_LENGTH,
1258                                   j, EDID_LENGTH))
1259                                 goto out;
1260                         if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) {
1261                                 valid_extensions++;
1262                                 break;
1263                         }
1264                 }
1265 
1266                 if (i == 4 && print_bad_edid) {
1267                         dev_warn(connector->dev->dev,
1268                          "%s: Ignoring invalid EDID block %d.\n",
1269                          connector->name, j);
1270 
1271                         connector->bad_edid_counter++;
1272                 }
1273         }
1274 
1275         if (valid_extensions != block[0x7e]) {
1276                 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1277                 block[0x7e] = valid_extensions;
1278                 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1279                 if (!new)
1280                         goto out;
1281                 block = new;
1282         }
1283 
1284         return (struct edid *)block;
1285 
1286 carp:
1287         if (print_bad_edid) {
1288                 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
1289                          connector->name, j);
1290         }
1291         connector->bad_edid_counter++;
1292 
1293 out:
1294         kfree(block);
1295         return NULL;
1296 }
1297 EXPORT_SYMBOL_GPL(drm_do_get_edid);
1298 
1299 /**
1300  * drm_probe_ddc() - probe DDC presence
1301  * @adapter: I2C adapter to probe
1302  *
1303  * Return: True on success, false on failure.
1304  */
1305 bool
1306 drm_probe_ddc(struct i2c_adapter *adapter)
1307 {
1308         unsigned char out;
1309 
1310         return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1311 }
1312 EXPORT_SYMBOL(drm_probe_ddc);
1313 
1314 /**
1315  * drm_get_edid - get EDID data, if available
1316  * @connector: connector we're probing
1317  * @adapter: I2C adapter to use for DDC
1318  *
1319  * Poke the given I2C channel to grab EDID data if possible.  If found,
1320  * attach it to the connector.
1321  *
1322  * Return: Pointer to valid EDID or NULL if we couldn't find any.
1323  */
1324 struct edid *drm_get_edid(struct drm_connector *connector,
1325                           struct i2c_adapter *adapter)
1326 {
1327         struct edid *edid;
1328 
1329         if (!drm_probe_ddc(adapter))
1330                 return NULL;
1331 
1332         edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter);
1333         if (edid)
1334                 drm_get_displayid(connector, edid);
1335         return edid;
1336 }
1337 EXPORT_SYMBOL(drm_get_edid);
1338 
1339 /**
1340  * drm_edid_duplicate - duplicate an EDID and the extensions
1341  * @edid: EDID to duplicate
1342  *
1343  * Return: Pointer to duplicated EDID or NULL on allocation failure.
1344  */
1345 struct edid *drm_edid_duplicate(const struct edid *edid)
1346 {
1347         return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1348 }
1349 EXPORT_SYMBOL(drm_edid_duplicate);
1350 
1351 /*** EDID parsing ***/
1352 
1353 /**
1354  * edid_vendor - match a string against EDID's obfuscated vendor field
1355  * @edid: EDID to match
1356  * @vendor: vendor string
1357  *
1358  * Returns true if @vendor is in @edid, false otherwise
1359  */
1360 static bool edid_vendor(struct edid *edid, char *vendor)
1361 {
1362         char edid_vendor[3];
1363 
1364         edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1365         edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1366                           ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1367         edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1368 
1369         return !strncmp(edid_vendor, vendor, 3);
1370 }
1371 
1372 /**
1373  * edid_get_quirks - return quirk flags for a given EDID
1374  * @edid: EDID to process
1375  *
1376  * This tells subsequent routines what fixes they need to apply.
1377  */
1378 static u32 edid_get_quirks(struct edid *edid)
1379 {
1380         struct edid_quirk *quirk;
1381         int i;
1382 
1383         for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1384                 quirk = &edid_quirk_list[i];
1385 
1386                 if (edid_vendor(edid, quirk->vendor) &&
1387                     (EDID_PRODUCT_ID(edid) == quirk->product_id))
1388                         return quirk->quirks;
1389         }
1390 
1391         return 0;
1392 }
1393 
1394 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1395 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1396 
1397 /**
1398  * edid_fixup_preferred - set preferred modes based on quirk list
1399  * @connector: has mode list to fix up
1400  * @quirks: quirks list
1401  *
1402  * Walk the mode list for @connector, clearing the preferred status
1403  * on existing modes and setting it anew for the right mode ala @quirks.
1404  */
1405 static void edid_fixup_preferred(struct drm_connector *connector,
1406                                  u32 quirks)
1407 {
1408         struct drm_display_mode *t, *cur_mode, *preferred_mode;
1409         int target_refresh = 0;
1410         int cur_vrefresh, preferred_vrefresh;
1411 
1412         if (list_empty(&connector->probed_modes))
1413                 return;
1414 
1415         if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1416                 target_refresh = 60;
1417         if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1418                 target_refresh = 75;
1419 
1420         preferred_mode = list_first_entry(&connector->probed_modes,
1421                                           struct drm_display_mode, head);
1422 
1423         list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1424                 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1425 
1426                 if (cur_mode == preferred_mode)
1427                         continue;
1428 
1429                 /* Largest mode is preferred */
1430                 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1431                         preferred_mode = cur_mode;
1432 
1433                 cur_vrefresh = cur_mode->vrefresh ?
1434                         cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
1435                 preferred_vrefresh = preferred_mode->vrefresh ?
1436                         preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
1437                 /* At a given size, try to get closest to target refresh */
1438                 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1439                     MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
1440                     MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
1441                         preferred_mode = cur_mode;
1442                 }
1443         }
1444 
1445         preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1446 }
1447 
1448 static bool
1449 mode_is_rb(const struct drm_display_mode *mode)
1450 {
1451         return (mode->htotal - mode->hdisplay == 160) &&
1452                (mode->hsync_end - mode->hdisplay == 80) &&
1453                (mode->hsync_end - mode->hsync_start == 32) &&
1454                (mode->vsync_start - mode->vdisplay == 3);
1455 }
1456 
1457 /*
1458  * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1459  * @dev: Device to duplicate against
1460  * @hsize: Mode width
1461  * @vsize: Mode height
1462  * @fresh: Mode refresh rate
1463  * @rb: Mode reduced-blanking-ness
1464  *
1465  * Walk the DMT mode list looking for a match for the given parameters.
1466  *
1467  * Return: A newly allocated copy of the mode, or NULL if not found.
1468  */
1469 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1470                                            int hsize, int vsize, int fresh,
1471                                            bool rb)
1472 {
1473         int i;
1474 
1475         for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1476                 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1477                 if (hsize != ptr->hdisplay)
1478                         continue;
1479                 if (vsize != ptr->vdisplay)
1480                         continue;
1481                 if (fresh != drm_mode_vrefresh(ptr))
1482                         continue;
1483                 if (rb != mode_is_rb(ptr))
1484                         continue;
1485 
1486                 return drm_mode_duplicate(dev, ptr);
1487         }
1488 
1489         return NULL;
1490 }
1491 EXPORT_SYMBOL(drm_mode_find_dmt);
1492 
1493 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1494 
1495 static void
1496 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1497 {
1498         int i, n = 0;
1499         u8 d = ext[0x02];
1500         u8 *det_base = ext + d;
1501 
1502         n = (127 - d) / 18;
1503         for (i = 0; i < n; i++)
1504                 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1505 }
1506 
1507 static void
1508 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1509 {
1510         unsigned int i, n = min((int)ext[0x02], 6);
1511         u8 *det_base = ext + 5;
1512 
1513         if (ext[0x01] != 1)
1514                 return; /* unknown version */
1515 
1516         for (i = 0; i < n; i++)
1517                 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1518 }
1519 
1520 static void
1521 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1522 {
1523         int i;
1524         struct edid *edid = (struct edid *)raw_edid;
1525 
1526         if (edid == NULL)
1527                 return;
1528 
1529         for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1530                 cb(&(edid->detailed_timings[i]), closure);
1531 
1532         for (i = 1; i <= raw_edid[0x7e]; i++) {
1533                 u8 *ext = raw_edid + (i * EDID_LENGTH);
1534                 switch (*ext) {
1535                 case CEA_EXT:
1536                         cea_for_each_detailed_block(ext, cb, closure);
1537                         break;
1538                 case VTB_EXT:
1539                         vtb_for_each_detailed_block(ext, cb, closure);
1540                         break;
1541                 default:
1542                         break;
1543                 }
1544         }
1545 }
1546 
1547 static void
1548 is_rb(struct detailed_timing *t, void *data)
1549 {
1550         u8 *r = (u8 *)t;
1551         if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1552                 if (r[15] & 0x10)
1553                         *(bool *)data = true;
1554 }
1555 
1556 /* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
1557 static bool
1558 drm_monitor_supports_rb(struct edid *edid)
1559 {
1560         if (edid->revision >= 4) {
1561                 bool ret = false;
1562                 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1563                 return ret;
1564         }
1565 
1566         return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1567 }
1568 
1569 static void
1570 find_gtf2(struct detailed_timing *t, void *data)
1571 {
1572         u8 *r = (u8 *)t;
1573         if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1574                 *(u8 **)data = r;
1575 }
1576 
1577 /* Secondary GTF curve kicks in above some break frequency */
1578 static int
1579 drm_gtf2_hbreak(struct edid *edid)
1580 {
1581         u8 *r = NULL;
1582         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1583         return r ? (r[12] * 2) : 0;
1584 }
1585 
1586 static int
1587 drm_gtf2_2c(struct edid *edid)
1588 {
1589         u8 *r = NULL;
1590         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1591         return r ? r[13] : 0;
1592 }
1593 
1594 static int
1595 drm_gtf2_m(struct edid *edid)
1596 {
1597         u8 *r = NULL;
1598         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1599         return r ? (r[15] << 8) + r[14] : 0;
1600 }
1601 
1602 static int
1603 drm_gtf2_k(struct edid *edid)
1604 {
1605         u8 *r = NULL;
1606         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1607         return r ? r[16] : 0;
1608 }
1609 
1610 static int
1611 drm_gtf2_2j(struct edid *edid)
1612 {
1613         u8 *r = NULL;
1614         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1615         return r ? r[17] : 0;
1616 }
1617 
1618 /**
1619  * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1620  * @edid: EDID block to scan
1621  */
1622 static int standard_timing_level(struct edid *edid)
1623 {
1624         if (edid->revision >= 2) {
1625                 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1626                         return LEVEL_CVT;
1627                 if (drm_gtf2_hbreak(edid))
1628                         return LEVEL_GTF2;
1629                 return LEVEL_GTF;
1630         }
1631         return LEVEL_DMT;
1632 }
1633 
1634 /*
1635  * 0 is reserved.  The spec says 0x01 fill for unused timings.  Some old
1636  * monitors fill with ascii space (0x20) instead.
1637  */
1638 static int
1639 bad_std_timing(u8 a, u8 b)
1640 {
1641         return (a == 0x00 && b == 0x00) ||
1642                (a == 0x01 && b == 0x01) ||
1643                (a == 0x20 && b == 0x20);
1644 }
1645 
1646 /**
1647  * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1648  * @connector: connector of for the EDID block
1649  * @edid: EDID block to scan
1650  * @t: standard timing params
1651  *
1652  * Take the standard timing params (in this case width, aspect, and refresh)
1653  * and convert them into a real mode using CVT/GTF/DMT.
1654  */
1655 static struct drm_display_mode *
1656 drm_mode_std(struct drm_connector *connector, struct edid *edid,
1657              struct std_timing *t)
1658 {
1659         struct drm_device *dev = connector->dev;
1660         struct drm_display_mode *m, *mode = NULL;
1661         int hsize, vsize;
1662         int vrefresh_rate;
1663         unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1664                 >> EDID_TIMING_ASPECT_SHIFT;
1665         unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1666                 >> EDID_TIMING_VFREQ_SHIFT;
1667         int timing_level = standard_timing_level(edid);
1668 
1669         if (bad_std_timing(t->hsize, t->vfreq_aspect))
1670                 return NULL;
1671 
1672         /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1673         hsize = t->hsize * 8 + 248;
1674         /* vrefresh_rate = vfreq + 60 */
1675         vrefresh_rate = vfreq + 60;
1676         /* the vdisplay is calculated based on the aspect ratio */
1677         if (aspect_ratio == 0) {
1678                 if (edid->revision < 3)
1679                         vsize = hsize;
1680                 else
1681                         vsize = (hsize * 10) / 16;
1682         } else if (aspect_ratio == 1)
1683                 vsize = (hsize * 3) / 4;
1684         else if (aspect_ratio == 2)
1685                 vsize = (hsize * 4) / 5;
1686         else
1687                 vsize = (hsize * 9) / 16;
1688 
1689         /* HDTV hack, part 1 */
1690         if (vrefresh_rate == 60 &&
1691             ((hsize == 1360 && vsize == 765) ||
1692              (hsize == 1368 && vsize == 769))) {
1693                 hsize = 1366;
1694                 vsize = 768;
1695         }
1696 
1697         /*
1698          * If this connector already has a mode for this size and refresh
1699          * rate (because it came from detailed or CVT info), use that
1700          * instead.  This way we don't have to guess at interlace or
1701          * reduced blanking.
1702          */
1703         list_for_each_entry(m, &connector->probed_modes, head)
1704                 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1705                     drm_mode_vrefresh(m) == vrefresh_rate)
1706                         return NULL;
1707 
1708         /* HDTV hack, part 2 */
1709         if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1710                 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1711                                     false);
1712                 mode->hdisplay = 1366;
1713                 mode->hsync_start = mode->hsync_start - 1;
1714                 mode->hsync_end = mode->hsync_end - 1;
1715                 return mode;
1716         }
1717 
1718         /* check whether it can be found in default mode table */
1719         if (drm_monitor_supports_rb(edid)) {
1720                 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1721                                          true);
1722                 if (mode)
1723                         return mode;
1724         }
1725         mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1726         if (mode)
1727                 return mode;
1728 
1729         /* okay, generate it */
1730         switch (timing_level) {
1731         case LEVEL_DMT:
1732                 break;
1733         case LEVEL_GTF:
1734                 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1735                 break;
1736         case LEVEL_GTF2:
1737                 /*
1738                  * This is potentially wrong if there's ever a monitor with
1739                  * more than one ranges section, each claiming a different
1740                  * secondary GTF curve.  Please don't do that.
1741                  */
1742                 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1743                 if (!mode)
1744                         return NULL;
1745                 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1746                         drm_mode_destroy(dev, mode);
1747                         mode = drm_gtf_mode_complex(dev, hsize, vsize,
1748                                                     vrefresh_rate, 0, 0,
1749                                                     drm_gtf2_m(edid),
1750                                                     drm_gtf2_2c(edid),
1751                                                     drm_gtf2_k(edid),
1752                                                     drm_gtf2_2j(edid));
1753                 }
1754                 break;
1755         case LEVEL_CVT:
1756                 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1757                                     false);
1758                 break;
1759         }
1760         return mode;
1761 }
1762 
1763 /*
1764  * EDID is delightfully ambiguous about how interlaced modes are to be
1765  * encoded.  Our internal representation is of frame height, but some
1766  * HDTV detailed timings are encoded as field height.
1767  *
1768  * The format list here is from CEA, in frame size.  Technically we
1769  * should be checking refresh rate too.  Whatever.
1770  */
1771 static void
1772 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1773                             struct detailed_pixel_timing *pt)
1774 {
1775         int i;
1776         static const struct {
1777                 int w, h;
1778         } cea_interlaced[] = {
1779                 { 1920, 1080 },
1780                 {  720,  480 },
1781                 { 1440,  480 },
1782                 { 2880,  480 },
1783                 {  720,  576 },
1784                 { 1440,  576 },
1785                 { 2880,  576 },
1786         };
1787 
1788         if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1789                 return;
1790 
1791         for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1792                 if ((mode->hdisplay == cea_interlaced[i].w) &&
1793                     (mode->vdisplay == cea_interlaced[i].h / 2)) {
1794                         mode->vdisplay *= 2;
1795                         mode->vsync_start *= 2;
1796                         mode->vsync_end *= 2;
1797                         mode->vtotal *= 2;
1798                         mode->vtotal |= 1;
1799                 }
1800         }
1801 
1802         mode->flags |= DRM_MODE_FLAG_INTERLACE;
1803 }
1804 
1805 /**
1806  * drm_mode_detailed - create a new mode from an EDID detailed timing section
1807  * @dev: DRM device (needed to create new mode)
1808  * @edid: EDID block
1809  * @timing: EDID detailed timing info
1810  * @quirks: quirks to apply
1811  *
1812  * An EDID detailed timing block contains enough info for us to create and
1813  * return a new struct drm_display_mode.
1814  */
1815 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1816                                                   struct edid *edid,
1817                                                   struct detailed_timing *timing,
1818                                                   u32 quirks)
1819 {
1820         struct drm_display_mode *mode;
1821         struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1822         unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1823         unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1824         unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1825         unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1826         unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1827         unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1828         unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
1829         unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1830 
1831         /* ignore tiny modes */
1832         if (hactive < 64 || vactive < 64)
1833                 return NULL;
1834 
1835         if (pt->misc & DRM_EDID_PT_STEREO) {
1836                 DRM_DEBUG_KMS("stereo mode not supported\n");
1837                 return NULL;
1838         }
1839         if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1840                 DRM_DEBUG_KMS("composite sync not supported\n");
1841         }
1842 
1843         /* it is incorrect if hsync/vsync width is zero */
1844         if (!hsync_pulse_width || !vsync_pulse_width) {
1845                 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1846                                 "Wrong Hsync/Vsync pulse width\n");
1847                 return NULL;
1848         }
1849 
1850         if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1851                 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1852                 if (!mode)
1853                         return NULL;
1854 
1855                 goto set_size;
1856         }
1857 
1858         mode = drm_mode_create(dev);
1859         if (!mode)
1860                 return NULL;
1861 
1862         if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1863                 timing->pixel_clock = cpu_to_le16(1088);
1864 
1865         mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1866 
1867         mode->hdisplay = hactive;
1868         mode->hsync_start = mode->hdisplay + hsync_offset;
1869         mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1870         mode->htotal = mode->hdisplay + hblank;
1871 
1872         mode->vdisplay = vactive;
1873         mode->vsync_start = mode->vdisplay + vsync_offset;
1874         mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1875         mode->vtotal = mode->vdisplay + vblank;
1876 
1877         /* Some EDIDs have bogus h/vtotal values */
1878         if (mode->hsync_end > mode->htotal)
1879                 mode->htotal = mode->hsync_end + 1;
1880         if (mode->vsync_end > mode->vtotal)
1881                 mode->vtotal = mode->vsync_end + 1;
1882 
1883         drm_mode_do_interlace_quirk(mode, pt);
1884 
1885         if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1886                 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1887         }
1888 
1889         mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1890                 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1891         mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1892                 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1893 
1894 set_size:
1895         mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1896         mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1897 
1898         if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1899                 mode->width_mm *= 10;
1900                 mode->height_mm *= 10;
1901         }
1902 
1903         if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1904                 mode->width_mm = edid->width_cm * 10;
1905                 mode->height_mm = edid->height_cm * 10;
1906         }
1907 
1908         mode->type = DRM_MODE_TYPE_DRIVER;
1909         mode->vrefresh = drm_mode_vrefresh(mode);
1910         drm_mode_set_name(mode);
1911 
1912         return mode;
1913 }
1914 
1915 static bool
1916 mode_in_hsync_range(const struct drm_display_mode *mode,
1917                     struct edid *edid, u8 *t)
1918 {
1919         int hsync, hmin, hmax;
1920 
1921         hmin = t[7];
1922         if (edid->revision >= 4)
1923             hmin += ((t[4] & 0x04) ? 255 : 0);
1924         hmax = t[8];
1925         if (edid->revision >= 4)
1926             hmax += ((t[4] & 0x08) ? 255 : 0);
1927         hsync = drm_mode_hsync(mode);
1928 
1929         return (hsync <= hmax && hsync >= hmin);
1930 }
1931 
1932 static bool
1933 mode_in_vsync_range(const struct drm_display_mode *mode,
1934                     struct edid *edid, u8 *t)
1935 {
1936         int vsync, vmin, vmax;
1937 
1938         vmin = t[5];
1939         if (edid->revision >= 4)
1940             vmin += ((t[4] & 0x01) ? 255 : 0);
1941         vmax = t[6];
1942         if (edid->revision >= 4)
1943             vmax += ((t[4] & 0x02) ? 255 : 0);
1944         vsync = drm_mode_vrefresh(mode);
1945 
1946         return (vsync <= vmax && vsync >= vmin);
1947 }
1948 
1949 static u32
1950 range_pixel_clock(struct edid *edid, u8 *t)
1951 {
1952         /* unspecified */
1953         if (t[9] == 0 || t[9] == 255)
1954                 return 0;
1955 
1956         /* 1.4 with CVT support gives us real precision, yay */
1957         if (edid->revision >= 4 && t[10] == 0x04)
1958                 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1959 
1960         /* 1.3 is pathetic, so fuzz up a bit */
1961         return t[9] * 10000 + 5001;
1962 }
1963 
1964 static bool
1965 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
1966               struct detailed_timing *timing)
1967 {
1968         u32 max_clock;
1969         u8 *t = (u8 *)timing;
1970 
1971         if (!mode_in_hsync_range(mode, edid, t))
1972                 return false;
1973 
1974         if (!mode_in_vsync_range(mode, edid, t))
1975                 return false;
1976 
1977         if ((max_clock = range_pixel_clock(edid, t)))
1978                 if (mode->clock > max_clock)
1979                         return false;
1980 
1981         /* 1.4 max horizontal check */
1982         if (edid->revision >= 4 && t[10] == 0x04)
1983                 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1984                         return false;
1985 
1986         if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1987                 return false;
1988 
1989         return true;
1990 }
1991 
1992 static bool valid_inferred_mode(const struct drm_connector *connector,
1993                                 const struct drm_display_mode *mode)
1994 {
1995         struct drm_display_mode *m;
1996         bool ok = false;
1997 
1998         list_for_each_entry(m, &connector->probed_modes, head) {
1999                 if (mode->hdisplay == m->hdisplay &&
2000                     mode->vdisplay == m->vdisplay &&
2001                     drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
2002                         return false; /* duplicated */
2003                 if (mode->hdisplay <= m->hdisplay &&
2004                     mode->vdisplay <= m->vdisplay)
2005                         ok = true;
2006         }
2007         return ok;
2008 }
2009 
2010 static int
2011 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2012                         struct detailed_timing *timing)
2013 {
2014         int i, modes = 0;
2015         struct drm_display_mode *newmode;
2016         struct drm_device *dev = connector->dev;
2017 
2018         for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
2019                 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
2020                     valid_inferred_mode(connector, drm_dmt_modes + i)) {
2021                         newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
2022                         if (newmode) {
2023                                 drm_mode_probed_add(connector, newmode);
2024                                 modes++;
2025                         }
2026                 }
2027         }
2028 
2029         return modes;
2030 }
2031 
2032 /* fix up 1366x768 mode from 1368x768;
2033  * GFT/CVT can't express 1366 width which isn't dividable by 8
2034  */
2035 static void fixup_mode_1366x768(struct drm_display_mode *mode)
2036 {
2037         if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
2038                 mode->hdisplay = 1366;
2039                 mode->hsync_start--;
2040                 mode->hsync_end--;
2041                 drm_mode_set_name(mode);
2042         }
2043 }
2044 
2045 static int
2046 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
2047                         struct detailed_timing *timing)
2048 {
2049         int i, modes = 0;
2050         struct drm_display_mode *newmode;
2051         struct drm_device *dev = connector->dev;
2052 
2053         for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2054                 const struct minimode *m = &extra_modes[i];
2055                 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
2056                 if (!newmode)
2057                         return modes;
2058 
2059                 fixup_mode_1366x768(newmode);
2060                 if (!mode_in_range(newmode, edid, timing) ||
2061                     !valid_inferred_mode(connector, newmode)) {
2062                         drm_mode_destroy(dev, newmode);
2063                         continue;
2064                 }
2065 
2066                 drm_mode_probed_add(connector, newmode);
2067                 modes++;
2068         }
2069 
2070         return modes;
2071 }
2072 
2073 static int
2074 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2075                         struct detailed_timing *timing)
2076 {
2077         int i, modes = 0;
2078         struct drm_display_mode *newmode;
2079         struct drm_device *dev = connector->dev;
2080         bool rb = drm_monitor_supports_rb(edid);
2081 
2082         for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2083                 const struct minimode *m = &extra_modes[i];
2084                 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
2085                 if (!newmode)
2086                         return modes;
2087 
2088                 fixup_mode_1366x768(newmode);
2089                 if (!mode_in_range(newmode, edid, timing) ||
2090                     !valid_inferred_mode(connector, newmode)) {
2091                         drm_mode_destroy(dev, newmode);
2092                         continue;
2093                 }
2094 
2095                 drm_mode_probed_add(connector, newmode);
2096                 modes++;
2097         }
2098 
2099         return modes;
2100 }
2101 
2102 static void
2103 do_inferred_modes(struct detailed_timing *timing, void *c)
2104 {
2105         struct detailed_mode_closure *closure = c;
2106         struct detailed_non_pixel *data = &timing->data.other_data;
2107         struct detailed_data_monitor_range *range = &data->data.range;
2108 
2109         if (data->type != EDID_DETAIL_MONITOR_RANGE)
2110                 return;
2111 
2112         closure->modes += drm_dmt_modes_for_range(closure->connector,
2113                                                   closure->edid,
2114                                                   timing);
2115         
2116         if (!version_greater(closure->edid, 1, 1))
2117                 return; /* GTF not defined yet */
2118 
2119         switch (range->flags) {
2120         case 0x02: /* secondary gtf, XXX could do more */
2121         case 0x00: /* default gtf */
2122                 closure->modes += drm_gtf_modes_for_range(closure->connector,
2123                                                           closure->edid,
2124                                                           timing);
2125                 break;
2126         case 0x04: /* cvt, only in 1.4+ */
2127                 if (!version_greater(closure->edid, 1, 3))
2128                         break;
2129 
2130                 closure->modes += drm_cvt_modes_for_range(closure->connector,
2131                                                           closure->edid,
2132                                                           timing);
2133                 break;
2134         case 0x01: /* just the ranges, no formula */
2135         default:
2136                 break;
2137         }
2138 }
2139 
2140 static int
2141 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2142 {
2143         struct detailed_mode_closure closure = {
2144                 .connector = connector,
2145                 .edid = edid,
2146         };
2147 
2148         if (version_greater(edid, 1, 0))
2149                 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2150                                             &closure);
2151 
2152         return closure.modes;
2153 }
2154 
2155 static int
2156 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2157 {
2158         int i, j, m, modes = 0;
2159         struct drm_display_mode *mode;
2160         u8 *est = ((u8 *)timing) + 5;
2161 
2162         for (i = 0; i < 6; i++) {
2163                 for (j = 7; j >= 0; j--) {
2164                         m = (i * 8) + (7 - j);
2165                         if (m >= ARRAY_SIZE(est3_modes))
2166                                 break;
2167                         if (est[i] & (1 << j)) {
2168                                 mode = drm_mode_find_dmt(connector->dev,
2169                                                          est3_modes[m].w,
2170                                                          est3_modes[m].h,
2171                                                          est3_modes[m].r,
2172                                                          est3_modes[m].rb);
2173                                 if (mode) {
2174                                         drm_mode_probed_add(connector, mode);
2175                                         modes++;
2176                                 }
2177                         }
2178                 }
2179         }
2180 
2181         return modes;
2182 }
2183 
2184 static void
2185 do_established_modes(struct detailed_timing *timing, void *c)
2186 {
2187         struct detailed_mode_closure *closure = c;
2188         struct detailed_non_pixel *data = &timing->data.other_data;
2189 
2190         if (data->type == EDID_DETAIL_EST_TIMINGS)
2191                 closure->modes += drm_est3_modes(closure->connector, timing);
2192 }
2193 
2194 /**
2195  * add_established_modes - get est. modes from EDID and add them
2196  * @connector: connector to add mode(s) to
2197  * @edid: EDID block to scan
2198  *
2199  * Each EDID block contains a bitmap of the supported "established modes" list
2200  * (defined above).  Tease them out and add them to the global modes list.
2201  */
2202 static int
2203 add_established_modes(struct drm_connector *connector, struct edid *edid)
2204 {
2205         struct drm_device *dev = connector->dev;
2206         unsigned long est_bits = edid->established_timings.t1 |
2207                 (edid->established_timings.t2 << 8) |
2208                 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2209         int i, modes = 0;
2210         struct detailed_mode_closure closure = {
2211                 .connector = connector,
2212                 .edid = edid,
2213         };
2214 
2215         for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2216                 if (est_bits & (1<<i)) {
2217                         struct drm_display_mode *newmode;
2218                         newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2219                         if (newmode) {
2220                                 drm_mode_probed_add(connector, newmode);
2221                                 modes++;
2222                         }
2223                 }
2224         }
2225 
2226         if (version_greater(edid, 1, 0))
2227                     drm_for_each_detailed_block((u8 *)edid,
2228                                                 do_established_modes, &closure);
2229 
2230         return modes + closure.modes;
2231 }
2232 
2233 static void
2234 do_standard_modes(struct detailed_timing *timing, void *c)
2235 {
2236         struct detailed_mode_closure *closure = c;
2237         struct detailed_non_pixel *data = &timing->data.other_data;
2238         struct drm_connector *connector = closure->connector;
2239         struct edid *edid = closure->edid;
2240 
2241         if (data->type == EDID_DETAIL_STD_MODES) {
2242                 int i;
2243                 for (i = 0; i < 6; i++) {
2244                         struct std_timing *std;
2245                         struct drm_display_mode *newmode;
2246 
2247                         std = &data->data.timings[i];
2248                         newmode = drm_mode_std(connector, edid, std);
2249                         if (newmode) {
2250                                 drm_mode_probed_add(connector, newmode);
2251                                 closure->modes++;
2252                         }
2253                 }
2254         }
2255 }
2256 
2257 /**
2258  * add_standard_modes - get std. modes from EDID and add them
2259  * @connector: connector to add mode(s) to
2260  * @edid: EDID block to scan
2261  *
2262  * Standard modes can be calculated using the appropriate standard (DMT,
2263  * GTF or CVT. Grab them from @edid and add them to the list.
2264  */
2265 static int
2266 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2267 {
2268         int i, modes = 0;
2269         struct detailed_mode_closure closure = {
2270                 .connector = connector,
2271                 .edid = edid,
2272         };
2273 
2274         for (i = 0; i < EDID_STD_TIMINGS; i++) {
2275                 struct drm_display_mode *newmode;
2276 
2277                 newmode = drm_mode_std(connector, edid,
2278                                        &edid->standard_timings[i]);
2279                 if (newmode) {
2280                         drm_mode_probed_add(connector, newmode);
2281                         modes++;
2282                 }
2283         }
2284 
2285         if (version_greater(edid, 1, 0))
2286                 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2287                                             &closure);
2288 
2289         /* XXX should also look for standard codes in VTB blocks */
2290 
2291         return modes + closure.modes;
2292 }
2293 
2294 static int drm_cvt_modes(struct drm_connector *connector,
2295                          struct detailed_timing *timing)
2296 {
2297         int i, j, modes = 0;
2298         struct drm_display_mode *newmode;
2299         struct drm_device *dev = connector->dev;
2300         struct cvt_timing *cvt;
2301         const int rates[] = { 60, 85, 75, 60, 50 };
2302         const u8 empty[3] = { 0, 0, 0 };
2303 
2304         for (i = 0; i < 4; i++) {
2305                 int uninitialized_var(width), height;
2306                 cvt = &(timing->data.other_data.data.cvt[i]);
2307 
2308                 if (!memcmp(cvt->code, empty, 3))
2309                         continue;
2310 
2311                 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2312                 switch (cvt->code[1] & 0x0c) {
2313                 case 0x00:
2314                         width = height * 4 / 3;
2315                         break;
2316                 case 0x04:
2317                         width = height * 16 / 9;
2318                         break;
2319                 case 0x08:
2320                         width = height * 16 / 10;
2321                         break;
2322                 case 0x0c:
2323                         width = height * 15 / 9;
2324                         break;
2325                 }
2326 
2327                 for (j = 1; j < 5; j++) {
2328                         if (cvt->code[2] & (1 << j)) {
2329                                 newmode = drm_cvt_mode(dev, width, height,
2330                                                        rates[j], j == 0,
2331                                                        false, false);
2332                                 if (newmode) {
2333                                         drm_mode_probed_add(connector, newmode);
2334                                         modes++;
2335                                 }
2336                         }
2337                 }
2338         }
2339 
2340         return modes;
2341 }
2342 
2343 static void
2344 do_cvt_mode(struct detailed_timing *timing, void *c)
2345 {
2346         struct detailed_mode_closure *closure = c;
2347         struct detailed_non_pixel *data = &timing->data.other_data;
2348 
2349         if (data->type == EDID_DETAIL_CVT_3BYTE)
2350                 closure->modes += drm_cvt_modes(closure->connector, timing);
2351 }
2352 
2353 static int
2354 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2355 {       
2356         struct detailed_mode_closure closure = {
2357                 .connector = connector,
2358                 .edid = edid,
2359         };
2360 
2361         if (version_greater(edid, 1, 2))
2362                 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2363 
2364         /* XXX should also look for CVT codes in VTB blocks */
2365 
2366         return closure.modes;
2367 }
2368 
2369 static void
2370 do_detailed_mode(struct detailed_timing *timing, void *c)
2371 {
2372         struct detailed_mode_closure *closure = c;
2373         struct drm_display_mode *newmode;
2374 
2375         if (timing->pixel_clock) {
2376                 newmode = drm_mode_detailed(closure->connector->dev,
2377                                             closure->edid, timing,
2378                                             closure->quirks);
2379                 if (!newmode)
2380                         return;
2381 
2382                 if (closure->preferred)
2383                         newmode->type |= DRM_MODE_TYPE_PREFERRED;
2384 
2385                 drm_mode_probed_add(closure->connector, newmode);
2386                 closure->modes++;
2387                 closure->preferred = 0;
2388         }
2389 }
2390 
2391 /*
2392  * add_detailed_modes - Add modes from detailed timings
2393  * @connector: attached connector
2394  * @edid: EDID block to scan
2395  * @quirks: quirks to apply
2396  */
2397 static int
2398 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2399                    u32 quirks)
2400 {
2401         struct detailed_mode_closure closure = {
2402                 .connector = connector,
2403                 .edid = edid,
2404                 .preferred = 1,
2405                 .quirks = quirks,
2406         };
2407 
2408         if (closure.preferred && !version_greater(edid, 1, 3))
2409                 closure.preferred =
2410                     (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2411 
2412         drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2413 
2414         return closure.modes;
2415 }
2416 
2417 #define AUDIO_BLOCK     0x01
2418 #define VIDEO_BLOCK     0x02
2419 #define VENDOR_BLOCK    0x03
2420 #define SPEAKER_BLOCK   0x04
2421 #define VIDEO_CAPABILITY_BLOCK  0x07
2422 #define EDID_BASIC_AUDIO        (1 << 6)
2423 #define EDID_CEA_YCRCB444       (1 << 5)
2424 #define EDID_CEA_YCRCB422       (1 << 4)
2425 #define EDID_CEA_VCDB_QS        (1 << 6)
2426 
2427 /*
2428  * Search EDID for CEA extension block.
2429  */
2430 static u8 *drm_find_edid_extension(struct edid *edid, int ext_id)
2431 {
2432         u8 *edid_ext = NULL;
2433         int i;
2434 
2435         /* No EDID or EDID extensions */
2436         if (edid == NULL || edid->extensions == 0)
2437                 return NULL;
2438 
2439         /* Find CEA extension */
2440         for (i = 0; i < edid->extensions; i++) {
2441                 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2442                 if (edid_ext[0] == ext_id)
2443                         break;
2444         }
2445 
2446         if (i == edid->extensions)
2447                 return NULL;
2448 
2449         return edid_ext;
2450 }
2451 
2452 static u8 *drm_find_cea_extension(struct edid *edid)
2453 {
2454         return drm_find_edid_extension(edid, CEA_EXT);
2455 }
2456 
2457 static u8 *drm_find_displayid_extension(struct edid *edid)
2458 {
2459         return drm_find_edid_extension(edid, DISPLAYID_EXT);
2460 }
2461 
2462 /*
2463  * Calculate the alternate clock for the CEA mode
2464  * (60Hz vs. 59.94Hz etc.)
2465  */
2466 static unsigned int
2467 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2468 {
2469         unsigned int clock = cea_mode->clock;
2470 
2471         if (cea_mode->vrefresh % 6 != 0)
2472                 return clock;
2473 
2474         /*
2475          * edid_cea_modes contains the 59.94Hz
2476          * variant for 240 and 480 line modes,
2477          * and the 60Hz variant otherwise.
2478          */
2479         if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
2480                 clock = clock * 1001 / 1000;
2481         else
2482                 clock = DIV_ROUND_UP(clock * 1000, 1001);
2483 
2484         return clock;
2485 }
2486 
2487 /**
2488  * drm_match_cea_mode - look for a CEA mode matching given mode
2489  * @to_match: display mode
2490  *
2491  * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2492  * mode.
2493  */
2494 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2495 {
2496         u8 mode;
2497 
2498         if (!to_match->clock)
2499                 return 0;
2500 
2501         for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
2502                 const struct drm_display_mode *cea_mode = &edid_cea_modes[mode];
2503                 unsigned int clock1, clock2;
2504 
2505                 /* Check both 60Hz and 59.94Hz */
2506                 clock1 = cea_mode->clock;
2507                 clock2 = cea_mode_alternate_clock(cea_mode);
2508 
2509                 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2510                      KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2511                     drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode))
2512                         return mode + 1;
2513         }
2514         return 0;
2515 }
2516 EXPORT_SYMBOL(drm_match_cea_mode);
2517 
2518 /**
2519  * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
2520  * the input VIC from the CEA mode list
2521  * @video_code: ID given to each of the CEA modes
2522  *
2523  * Returns picture aspect ratio
2524  */
2525 enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
2526 {
2527         /* return picture aspect ratio for video_code - 1 to access the
2528          * right array element
2529         */
2530         return edid_cea_modes[video_code-1].picture_aspect_ratio;
2531 }
2532 EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
2533 
2534 /*
2535  * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2536  * specific block).
2537  *
2538  * It's almost like cea_mode_alternate_clock(), we just need to add an
2539  * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2540  * one.
2541  */
2542 static unsigned int
2543 hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
2544 {
2545         if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
2546                 return hdmi_mode->clock;
2547 
2548         return cea_mode_alternate_clock(hdmi_mode);
2549 }
2550 
2551 /*
2552  * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2553  * @to_match: display mode
2554  *
2555  * An HDMI mode is one defined in the HDMI vendor specific block.
2556  *
2557  * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2558  */
2559 static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
2560 {
2561         u8 mode;
2562 
2563         if (!to_match->clock)
2564                 return 0;
2565 
2566         for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) {
2567                 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode];
2568                 unsigned int clock1, clock2;
2569 
2570                 /* Make sure to also match alternate clocks */
2571                 clock1 = hdmi_mode->clock;
2572                 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2573 
2574                 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2575                      KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2576                     drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
2577                         return mode + 1;
2578         }
2579         return 0;
2580 }
2581 
2582 static int
2583 add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
2584 {
2585         struct drm_device *dev = connector->dev;
2586         struct drm_display_mode *mode, *tmp;
2587         LIST_HEAD(list);
2588         int modes = 0;
2589 
2590         /* Don't add CEA modes if the CEA extension block is missing */
2591         if (!drm_find_cea_extension(edid))
2592                 return 0;
2593 
2594         /*
2595          * Go through all probed modes and create a new mode
2596          * with the alternate clock for certain CEA modes.
2597          */
2598         list_for_each_entry(mode, &connector->probed_modes, head) {
2599                 const struct drm_display_mode *cea_mode = NULL;
2600                 struct drm_display_mode *newmode;
2601                 u8 mode_idx = drm_match_cea_mode(mode) - 1;
2602                 unsigned int clock1, clock2;
2603 
2604                 if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
2605                         cea_mode = &edid_cea_modes[mode_idx];
2606                         clock2 = cea_mode_alternate_clock(cea_mode);
2607                 } else {
2608                         mode_idx = drm_match_hdmi_mode(mode) - 1;
2609                         if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
2610                                 cea_mode = &edid_4k_modes[mode_idx];
2611                                 clock2 = hdmi_mode_alternate_clock(cea_mode);
2612                         }
2613                 }
2614 
2615                 if (!cea_mode)
2616                         continue;
2617 
2618                 clock1 = cea_mode->clock;
2619 
2620                 if (clock1 == clock2)
2621                         continue;
2622 
2623                 if (mode->clock != clock1 && mode->clock != clock2)
2624                         continue;
2625 
2626                 newmode = drm_mode_duplicate(dev, cea_mode);
2627                 if (!newmode)
2628                         continue;
2629 
2630                 /* Carry over the stereo flags */
2631                 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
2632 
2633                 /*
2634                  * The current mode could be either variant. Make
2635                  * sure to pick the "other" clock for the new mode.
2636                  */
2637                 if (mode->clock != clock1)
2638                         newmode->clock = clock1;
2639                 else
2640                         newmode->clock = clock2;
2641 
2642                 list_add_tail(&newmode->head, &list);
2643         }
2644 
2645         list_for_each_entry_safe(mode, tmp, &list, head) {
2646                 list_del(&mode->head);
2647                 drm_mode_probed_add(connector, mode);
2648                 modes++;
2649         }
2650 
2651         return modes;
2652 }
2653 
2654 static struct drm_display_mode *
2655 drm_display_mode_from_vic_index(struct drm_connector *connector,
2656                                 const u8 *video_db, u8 video_len,
2657                                 u8 video_index)
2658 {
2659         struct drm_device *dev = connector->dev;
2660         struct drm_display_mode *newmode;
2661         u8 cea_mode;
2662 
2663         if (video_db == NULL || video_index >= video_len)
2664                 return NULL;
2665 
2666         /* CEA modes are numbered 1..127 */
2667         cea_mode = (video_db[video_index] & 127) - 1;
2668         if (cea_mode >= ARRAY_SIZE(edid_cea_modes))
2669                 return NULL;
2670 
2671         newmode = drm_mode_duplicate(dev, &edid_cea_modes[cea_mode]);
2672         if (!newmode)
2673                 return NULL;
2674 
2675         newmode->vrefresh = 0;
2676 
2677         return newmode;
2678 }
2679 
2680 static int
2681 do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len)
2682 {
2683         int i, modes = 0;
2684 
2685         for (i = 0; i < len; i++) {
2686                 struct drm_display_mode *mode;
2687                 mode = drm_display_mode_from_vic_index(connector, db, len, i);
2688                 if (mode) {
2689                         drm_mode_probed_add(connector, mode);
2690                         modes++;
2691                 }
2692         }
2693 
2694         return modes;
2695 }
2696 
2697 struct stereo_mandatory_mode {
2698         int width, height, vrefresh;
2699         unsigned int flags;
2700 };
2701 
2702 static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
2703         { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2704         { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
2705         { 1920, 1080, 50,
2706           DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2707         { 1920, 1080, 60,
2708           DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2709         { 1280, 720,  50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2710         { 1280, 720,  50, DRM_MODE_FLAG_3D_FRAME_PACKING },
2711         { 1280, 720,  60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2712         { 1280, 720,  60, DRM_MODE_FLAG_3D_FRAME_PACKING }
2713 };
2714 
2715 static bool
2716 stereo_match_mandatory(const struct drm_display_mode *mode,
2717                        const struct stereo_mandatory_mode *stereo_mode)
2718 {
2719         unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
2720 
2721         return mode->hdisplay == stereo_mode->width &&
2722                mode->vdisplay == stereo_mode->height &&
2723                interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
2724                drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
2725 }
2726 
2727 static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector)
2728 {
2729         struct drm_device *dev = connector->dev;
2730         const struct drm_display_mode *mode;
2731         struct list_head stereo_modes;
2732         int modes = 0, i;
2733 
2734         INIT_LIST_HEAD(&stereo_modes);
2735 
2736         list_for_each_entry(mode, &connector->probed_modes, head) {
2737                 for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
2738                         const struct stereo_mandatory_mode *mandatory;
2739                         struct drm_display_mode *new_mode;
2740 
2741                         if (!stereo_match_mandatory(mode,
2742                                                     &stereo_mandatory_modes[i]))
2743                                 continue;
2744 
2745                         mandatory = &stereo_mandatory_modes[i];
2746                         new_mode = drm_mode_duplicate(dev, mode);
2747                         if (!new_mode)
2748                                 continue;
2749 
2750                         new_mode->flags |= mandatory->flags;
2751                         list_add_tail(&new_mode->head, &stereo_modes);
2752                         modes++;
2753                 }
2754         }
2755 
2756         list_splice_tail(&stereo_modes, &connector->probed_modes);
2757 
2758         return modes;
2759 }
2760 
2761 static int add_hdmi_mode(struct drm_connector *connector, u8 vic)
2762 {
2763         struct drm_device *dev = connector->dev;
2764         struct drm_display_mode *newmode;
2765 
2766         vic--; /* VICs start at 1 */
2767         if (vic >= ARRAY_SIZE(edid_4k_modes)) {
2768                 DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
2769                 return 0;
2770         }
2771 
2772         newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
2773         if (!newmode)
2774                 return 0;
2775 
2776         drm_mode_probed_add(connector, newmode);
2777 
2778         return 1;
2779 }
2780 
2781 static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,
2782                                const u8 *video_db, u8 video_len, u8 video_index)
2783 {
2784         struct drm_display_mode *newmode;
2785         int modes = 0;
2786 
2787         if (structure & (1 << 0)) {
2788                 newmode = drm_display_mode_from_vic_index(connector, video_db,
2789                                                           video_len,
2790                                                           video_index);
2791                 if (newmode) {
2792                         newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING;
2793                         drm_mode_probed_add(connector, newmode);
2794                         modes++;
2795                 }
2796         }
2797         if (structure & (1 << 6)) {
2798                 newmode = drm_display_mode_from_vic_index(connector, video_db,
2799                                                           video_len,
2800                                                           video_index);
2801                 if (newmode) {
2802                         newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
2803                         drm_mode_probed_add(connector, newmode);
2804                         modes++;
2805                 }
2806         }
2807         if (structure & (1 << 8)) {
2808                 newmode = drm_display_mode_from_vic_index(connector, video_db,
2809                                                           video_len,
2810                                                           video_index);
2811                 if (newmode) {
2812                         newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
2813                         drm_mode_probed_add(connector, newmode);
2814                         modes++;
2815                 }
2816         }
2817 
2818         return modes;
2819 }
2820 
2821 /*
2822  * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
2823  * @connector: connector corresponding to the HDMI sink
2824  * @db: start of the CEA vendor specific block
2825  * @len: length of the CEA block payload, ie. one can access up to db[len]
2826  *
2827  * Parses the HDMI VSDB looking for modes to add to @connector. This function
2828  * also adds the stereo 3d modes when applicable.
2829  */
2830 static int
2831 do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len,
2832                    const u8 *video_db, u8 video_len)
2833 {
2834         int modes = 0, offset = 0, i, multi_present = 0, multi_len;
2835         u8 vic_len, hdmi_3d_len = 0;
2836         u16 mask;
2837         u16 structure_all;
2838 
2839         if (len < 8)
2840                 goto out;
2841 
2842         /* no HDMI_Video_Present */
2843         if (!(db[8] & (1 << 5)))
2844                 goto out;
2845 
2846         /* Latency_Fields_Present */
2847         if (db[8] & (1 << 7))
2848                 offset += 2;
2849 
2850         /* I_Latency_Fields_Present */
2851         if (db[8] & (1 << 6))
2852                 offset += 2;
2853 
2854         /* the declared length is not long enough for the 2 first bytes
2855          * of additional video format capabilities */
2856         if (len < (8 + offset + 2))
2857                 goto out;
2858 
2859         /* 3D_Present */
2860         offset++;
2861         if (db[8 + offset] & (1 << 7)) {
2862                 modes += add_hdmi_mandatory_stereo_modes(connector);
2863 
2864                 /* 3D_Multi_present */
2865                 multi_present = (db[8 + offset] & 0x60) >> 5;
2866         }
2867 
2868         offset++;
2869         vic_len = db[8 + offset] >> 5;
2870         hdmi_3d_len = db[8 + offset] & 0x1f;
2871 
2872         for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
2873                 u8 vic;
2874 
2875                 vic = db[9 + offset + i];
2876                 modes += add_hdmi_mode(connector, vic);
2877         }
2878         offset += 1 + vic_len;
2879 
2880         if (multi_present == 1)
2881                 multi_len = 2;
2882         else if (multi_present == 2)
2883                 multi_len = 4;
2884         else
2885                 multi_len = 0;
2886 
2887         if (len < (8 + offset + hdmi_3d_len - 1))
2888                 goto out;
2889 
2890         if (hdmi_3d_len < multi_len)
2891                 goto out;
2892 
2893         if (multi_present == 1 || multi_present == 2) {
2894                 /* 3D_Structure_ALL */
2895                 structure_all = (db[8 + offset] << 8) | db[9 + offset];
2896 
2897                 /* check if 3D_MASK is present */
2898                 if (multi_present == 2)
2899                         mask = (db[10 + offset] << 8) | db[11 + offset];
2900                 else
2901                         mask = 0xffff;
2902 
2903                 for (i = 0; i < 16; i++) {
2904                         if (mask & (1 << i))
2905                                 modes += add_3d_struct_modes(connector,
2906                                                 structure_all,
2907                                                 video_db,
2908                                                 video_len, i);
2909                 }
2910         }
2911 
2912         offset += multi_len;
2913 
2914         for (i = 0; i < (hdmi_3d_len - multi_len); i++) {
2915                 int vic_index;
2916                 struct drm_display_mode *newmode = NULL;
2917                 unsigned int newflag = 0;
2918                 bool detail_present;
2919 
2920                 detail_present = ((db[8 + offset + i] & 0x0f) > 7);
2921 
2922                 if (detail_present && (i + 1 == hdmi_3d_len - multi_len))
2923                         break;
2924 
2925                 /* 2D_VIC_order_X */
2926                 vic_index = db[8 + offset + i] >> 4;
2927 
2928                 /* 3D_Structure_X */
2929                 switch (db[8 + offset + i] & 0x0f) {
2930                 case 0:
2931                         newflag = DRM_MODE_FLAG_3D_FRAME_PACKING;
2932                         break;
2933                 case 6:
2934                         newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
2935                         break;
2936                 case 8:
2937                         /* 3D_Detail_X */
2938                         if ((db[9 + offset + i] >> 4) == 1)
2939                                 newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
2940                         break;
2941                 }
2942 
2943                 if (newflag != 0) {
2944                         newmode = drm_display_mode_from_vic_index(connector,
2945                                                                   video_db,
2946                                                                   video_len,
2947                                                                   vic_index);
2948 
2949                         if (newmode) {
2950                                 newmode->flags |= newflag;
2951                                 drm_mode_probed_add(connector, newmode);
2952                                 modes++;
2953                         }
2954                 }
2955 
2956                 if (detail_present)
2957                         i++;
2958         }
2959 
2960 out:
2961         return modes;
2962 }
2963 
2964 static int
2965 cea_db_payload_len(const u8 *db)
2966 {
2967         return db[0] & 0x1f;
2968 }
2969 
2970 static int
2971 cea_db_tag(const u8 *db)
2972 {
2973         return db[0] >> 5;
2974 }
2975 
2976 static int
2977 cea_revision(const u8 *cea)
2978 {
2979         return cea[1];
2980 }
2981 
2982 static int
2983 cea_db_offsets(const u8 *cea, int *start, int *end)
2984 {
2985         /* Data block offset in CEA extension block */
2986         *start = 4;
2987         *end = cea[2];
2988         if (*end == 0)
2989                 *end = 127;
2990         if (*end < 4 || *end > 127)
2991                 return -ERANGE;
2992         return 0;
2993 }
2994 
2995 static bool cea_db_is_hdmi_vsdb(const u8 *db)
2996 {
2997         int hdmi_id;
2998 
2999         if (cea_db_tag(db) != VENDOR_BLOCK)
3000                 return false;
3001 
3002         if (cea_db_payload_len(db) < 5)
3003                 return false;
3004 
3005         hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
3006 
3007         return hdmi_id == HDMI_IEEE_OUI;
3008 }
3009 
3010 #define for_each_cea_db(cea, i, start, end) \
3011         for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
3012 
3013 static int
3014 add_cea_modes(struct drm_connector *connector, struct edid *edid)
3015 {
3016         const u8 *cea = drm_find_cea_extension(edid);
3017         const u8 *db, *hdmi = NULL, *video = NULL;
3018         u8 dbl, hdmi_len, video_len = 0;
3019         int modes = 0;
3020 
3021         if (cea && cea_revision(cea) >= 3) {
3022                 int i, start, end;
3023 
3024                 if (cea_db_offsets(cea, &start, &end))
3025                         return 0;
3026 
3027                 for_each_cea_db(cea, i, start, end) {
3028                         db = &cea[i];
3029                         dbl = cea_db_payload_len(db);
3030 
3031                         if (cea_db_tag(db) == VIDEO_BLOCK) {
3032                                 video = db + 1;
3033                                 video_len = dbl;
3034                                 modes += do_cea_modes(connector, video, dbl);
3035                         }
3036                         else if (cea_db_is_hdmi_vsdb(db)) {
3037                                 hdmi = db;
3038                                 hdmi_len = dbl;
3039                         }
3040                 }
3041         }
3042 
3043         /*
3044          * We parse the HDMI VSDB after having added the cea modes as we will
3045          * be patching their flags when the sink supports stereo 3D.
3046          */
3047         if (hdmi)
3048                 modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video,
3049                                             video_len);
3050 
3051         return modes;
3052 }
3053 
3054 static void
3055 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
3056 {
3057         u8 len = cea_db_payload_len(db);
3058 
3059         if (len >= 6) {
3060                 connector->eld[5] |= (db[6] >> 7) << 1;  /* Supports_AI */
3061                 connector->dvi_dual = db[6] & 1;
3062         }
3063         if (len >= 7)
3064                 connector->max_tmds_clock = db[7] * 5;
3065         if (len >= 8) {
3066                 connector->latency_present[0] = db[8] >> 7;
3067                 connector->latency_present[1] = (db[8] >> 6) & 1;
3068         }
3069         if (len >= 9)
3070                 connector->video_latency[0] = db[9];
3071         if (len >= 10)
3072                 connector->audio_latency[0] = db[10];
3073         if (len >= 11)
3074                 connector->video_latency[1] = db[11];
3075         if (len >= 12)
3076                 connector->audio_latency[1] = db[12];
3077 
3078         DRM_DEBUG_KMS("HDMI: DVI dual %d, "
3079                     "max TMDS clock %d, "
3080                     "latency present %d %d, "
3081                     "video latency %d %d, "
3082                     "audio latency %d %d\n",
3083                     connector->dvi_dual,
3084                     connector->max_tmds_clock,
3085               (int) connector->latency_present[0],
3086               (int) connector->latency_present[1],
3087                     connector->video_latency[0],
3088                     connector->video_latency[1],
3089                     connector->audio_latency[0],
3090                     connector->audio_latency[1]);
3091 }
3092 
3093 static void
3094 monitor_name(struct detailed_timing *t, void *data)
3095 {
3096         if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
3097                 *(u8 **)data = t->data.other_data.data.str.str;
3098 }
3099 
3100 /**
3101  * drm_edid_to_eld - build ELD from EDID
3102  * @connector: connector corresponding to the HDMI/DP sink
3103  * @edid: EDID to parse
3104  *
3105  * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
3106  * Conn_Type, HDCP and Port_ID ELD fields are left for the graphics driver to
3107  * fill in.
3108  */
3109 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
3110 {
3111         uint8_t *eld = connector->eld;
3112         u8 *cea;
3113         u8 *name;
3114         u8 *db;
3115         int sad_count = 0;
3116         int mnl;
3117         int dbl;
3118 
3119         memset(eld, 0, sizeof(connector->eld));
3120 
3121         cea = drm_find_cea_extension(edid);
3122         if (!cea) {
3123                 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
3124                 return;
3125         }
3126 
3127         name = NULL;
3128         drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
3129         for (mnl = 0; name && mnl < 13; mnl++) {
3130                 if (name[mnl] == 0x0a)
3131                         break;
3132                 eld[20 + mnl] = name[mnl];
3133         }
3134         eld[4] = (cea[1] << 5) | mnl;
3135         DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
3136 
3137         eld[0] = 2 << 3;                /* ELD version: 2 */
3138 
3139         eld[16] = edid->mfg_id[0];
3140         eld[17] = edid->mfg_id[1];
3141         eld[18] = edid->prod_code[0];
3142         eld[19] = edid->prod_code[1];
3143 
3144         if (cea_revision(cea) >= 3) {
3145                 int i, start, end;
3146 
3147                 if (cea_db_offsets(cea, &start, &end)) {
3148                         start = 0;
3149                         end = 0;
3150                 }
3151 
3152                 for_each_cea_db(cea, i, start, end) {
3153                         db = &cea[i];
3154                         dbl = cea_db_payload_len(db);
3155 
3156                         switch (cea_db_tag(db)) {
3157                         case AUDIO_BLOCK:
3158                                 /* Audio Data Block, contains SADs */
3159                                 sad_count = dbl / 3;
3160                                 if (dbl >= 1)
3161                                         memcpy(eld + 20 + mnl, &db[1], dbl);
3162                                 break;
3163                         case SPEAKER_BLOCK:
3164                                 /* Speaker Allocation Data Block */
3165                                 if (dbl >= 1)
3166                                         eld[7] = db[1];
3167                                 break;
3168                         case VENDOR_BLOCK:
3169                                 /* HDMI Vendor-Specific Data Block */
3170                                 if (cea_db_is_hdmi_vsdb(db))
3171                                         parse_hdmi_vsdb(connector, db);
3172                                 break;
3173                         default:
3174                                 break;
3175                         }
3176                 }
3177         }
3178         eld[5] |= sad_count << 4;
3179 
3180         eld[DRM_ELD_BASELINE_ELD_LEN] =
3181                 DIV_ROUND_UP(drm_eld_calc_baseline_block_size(eld), 4);
3182 
3183         DRM_DEBUG_KMS("ELD size %d, SAD count %d\n",
3184                       drm_eld_size(eld), sad_count);
3185 }
3186 EXPORT_SYMBOL(drm_edid_to_eld);
3187 
3188 /**
3189  * drm_edid_to_sad - extracts SADs from EDID
3190  * @edid: EDID to parse
3191  * @sads: pointer that will be set to the extracted SADs
3192  *
3193  * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
3194  *
3195  * Note: The returned pointer needs to be freed using kfree().
3196  *
3197  * Return: The number of found SADs or negative number on error.
3198  */
3199 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
3200 {
3201         int count = 0;
3202         int i, start, end, dbl;
3203         u8 *cea;
3204 
3205         cea = drm_find_cea_extension(edid);
3206         if (!cea) {
3207                 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3208                 return -ENOENT;
3209         }
3210 
3211         if (cea_revision(cea) < 3) {
3212                 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3213                 return -ENOTSUPP;
3214         }
3215 
3216         if (cea_db_offsets(cea, &start, &end)) {
3217                 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3218                 return -EPROTO;
3219         }
3220 
3221         for_each_cea_db(cea, i, start, end) {
3222                 u8 *db = &cea[i];
3223 
3224                 if (cea_db_tag(db) == AUDIO_BLOCK) {
3225                         int j;
3226                         dbl = cea_db_payload_len(db);
3227 
3228                         count = dbl / 3; /* SAD is 3B */
3229                         *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
3230                         if (!*sads)
3231                                 return -ENOMEM;
3232                         for (j = 0; j < count; j++) {
3233                                 u8 *sad = &db[1 + j * 3];
3234 
3235                                 (*sads)[j].format = (sad[0] & 0x78) >> 3;
3236                                 (*sads)[j].channels = sad[0] & 0x7;
3237                                 (*sads)[j].freq = sad[1] & 0x7F;
3238                                 (*sads)[j].byte2 = sad[2];
3239                         }
3240                         break;
3241                 }
3242         }
3243 
3244         return count;
3245 }
3246 EXPORT_SYMBOL(drm_edid_to_sad);
3247 
3248 /**
3249  * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
3250  * @edid: EDID to parse
3251  * @sadb: pointer to the speaker block
3252  *
3253  * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
3254  *
3255  * Note: The returned pointer needs to be freed using kfree().
3256  *
3257  * Return: The number of found Speaker Allocation Blocks or negative number on
3258  * error.
3259  */
3260 int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
3261 {
3262         int count = 0;
3263         int i, start, end, dbl;
3264         const u8 *cea;
3265 
3266         cea = drm_find_cea_extension(edid);
3267         if (!cea) {
3268                 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3269                 return -ENOENT;
3270         }
3271 
3272         if (cea_revision(cea) < 3) {
3273                 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3274                 return -ENOTSUPP;
3275         }
3276 
3277         if (cea_db_offsets(cea, &start, &end)) {
3278                 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3279                 return -EPROTO;
3280         }
3281 
3282         for_each_cea_db(cea, i, start, end) {
3283                 const u8 *db = &cea[i];
3284 
3285                 if (cea_db_tag(db) == SPEAKER_BLOCK) {
3286                         dbl = cea_db_payload_len(db);
3287 
3288                         /* Speaker Allocation Data Block */
3289                         if (dbl == 3) {
3290                                 *sadb = kmemdup(&db[1], dbl, GFP_KERNEL);
3291                                 if (!*sadb)
3292                                         return -ENOMEM;
3293                                 count = dbl;
3294                                 break;
3295                         }
3296                 }
3297         }
3298 
3299         return count;
3300 }
3301 EXPORT_SYMBOL(drm_edid_to_speaker_allocation);
3302 
3303 /**
3304  * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
3305  * @connector: connector associated with the HDMI/DP sink
3306  * @mode: the display mode
3307  *
3308  * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
3309  * the sink doesn't support audio or video.
3310  */
3311 int drm_av_sync_delay(struct drm_connector *connector,
3312                       struct drm_display_mode *mode)
3313 {
3314         int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
3315         int a, v;
3316 
3317         if (!connector->latency_present[0])
3318                 return 0;
3319         if (!connector->latency_present[1])
3320                 i = 0;
3321 
3322         a = connector->audio_latency[i];
3323         v = connector->video_latency[i];
3324 
3325         /*
3326          * HDMI/DP sink doesn't support audio or video?
3327          */
3328         if (a == 255 || v == 255)
3329                 return 0;
3330 
3331         /*
3332          * Convert raw EDID values to millisecond.
3333          * Treat unknown latency as 0ms.
3334          */
3335         if (a)
3336                 a = min(2 * (a - 1), 500);
3337         if (v)
3338                 v = min(2 * (v - 1), 500);
3339 
3340         return max(v - a, 0);
3341 }
3342 EXPORT_SYMBOL(drm_av_sync_delay);
3343 
3344 /**
3345  * drm_select_eld - select one ELD from multiple HDMI/DP sinks
3346  * @encoder: the encoder just changed display mode
3347  * @mode: the adjusted display mode
3348  *
3349  * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
3350  * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
3351  *
3352  * Return: The connector associated with the first HDMI/DP sink that has ELD
3353  * attached to it.
3354  */
3355 struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
3356                                      struct drm_display_mode *mode)
3357 {
3358         struct drm_connector *connector;
3359         struct drm_device *dev = encoder->dev;
3360 
3361         WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
3362         WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
3363 
3364         list_for_each_entry(connector, &dev->mode_config.connector_list, head)
3365                 if (connector->encoder == encoder && connector->eld[0])
3366                         return connector;
3367 
3368         return NULL;
3369 }
3370 EXPORT_SYMBOL(drm_select_eld);
3371 
3372 /**
3373  * drm_detect_hdmi_monitor - detect whether monitor is HDMI
3374  * @edid: monitor EDID information
3375  *
3376  * Parse the CEA extension according to CEA-861-B.
3377  *
3378  * Return: True if the monitor is HDMI, false if not or unknown.
3379  */
3380 bool drm_detect_hdmi_monitor(struct edid *edid)
3381 {
3382         u8 *edid_ext;
3383         int i;
3384         int start_offset, end_offset;
3385 
3386         edid_ext = drm_find_cea_extension(edid);
3387         if (!edid_ext)
3388                 return false;
3389 
3390         if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3391                 return false;
3392 
3393         /*
3394          * Because HDMI identifier is in Vendor Specific Block,
3395          * search it from all data blocks of CEA extension.
3396          */
3397         for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3398                 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
3399                         return true;
3400         }
3401 
3402         return false;
3403 }
3404 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
3405 
3406 /**
3407  * drm_detect_monitor_audio - check monitor audio capability
3408  * @edid: EDID block to scan
3409  *
3410  * Monitor should have CEA extension block.
3411  * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
3412  * audio' only. If there is any audio extension block and supported
3413  * audio format, assume at least 'basic audio' support, even if 'basic
3414  * audio' is not defined in EDID.
3415  *
3416  * Return: True if the monitor supports audio, false otherwise.
3417  */
3418 bool drm_detect_monitor_audio(struct edid *edid)
3419 {
3420         u8 *edid_ext;
3421         int i, j;
3422         bool has_audio = false;
3423         int start_offset, end_offset;
3424 
3425         edid_ext = drm_find_cea_extension(edid);
3426         if (!edid_ext)
3427                 goto end;
3428 
3429         has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
3430 
3431         if (has_audio) {
3432                 DRM_DEBUG_KMS("Monitor has basic audio support\n");
3433                 goto end;
3434         }
3435 
3436         if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3437                 goto end;
3438 
3439         for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3440                 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
3441                         has_audio = true;
3442                         for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
3443                                 DRM_DEBUG_KMS("CEA audio format %d\n",
3444                                               (edid_ext[i + j] >> 3) & 0xf);
3445                         goto end;
3446                 }
3447         }
3448 end:
3449         return has_audio;
3450 }
3451 EXPORT_SYMBOL(drm_detect_monitor_audio);
3452 
3453 /**
3454  * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
3455  * @edid: EDID block to scan
3456  *
3457  * Check whether the monitor reports the RGB quantization range selection
3458  * as supported. The AVI infoframe can then be used to inform the monitor
3459  * which quantization range (full or limited) is used.
3460  *
3461  * Return: True if the RGB quantization range is selectable, false otherwise.
3462  */
3463 bool drm_rgb_quant_range_selectable(struct edid *edid)
3464 {
3465         u8 *edid_ext;
3466         int i, start, end;
3467 
3468         edid_ext = drm_find_cea_extension(edid);
3469         if (!edid_ext)
3470                 return false;
3471 
3472         if (cea_db_offsets(edid_ext, &start, &end))
3473                 return false;
3474 
3475         for_each_cea_db(edid_ext, i, start, end) {
3476                 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
3477                     cea_db_payload_len(&edid_ext[i]) == 2) {
3478                         DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
3479                         return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
3480                 }
3481         }
3482 
3483         return false;
3484 }
3485 EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
3486 
3487 /**
3488  * drm_assign_hdmi_deep_color_info - detect whether monitor supports
3489  * hdmi deep color modes and update drm_display_info if so.
3490  * @edid: monitor EDID information
3491  * @info: Updated with maximum supported deep color bpc and color format
3492  *        if deep color supported.
3493  * @connector: DRM connector, used only for debug output
3494  *
3495  * Parse the CEA extension according to CEA-861-B.
3496  * Return true if HDMI deep color supported, false if not or unknown.
3497  */
3498 static bool drm_assign_hdmi_deep_color_info(struct edid *edid,
3499                                             struct drm_display_info *info,
3500                                             struct drm_connector *connector)
3501 {
3502         u8 *edid_ext, *hdmi;
3503         int i;
3504         int start_offset, end_offset;
3505         unsigned int dc_bpc = 0;
3506 
3507         edid_ext = drm_find_cea_extension(edid);
3508         if (!edid_ext)
3509                 return false;
3510 
3511         if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3512                 return false;
3513 
3514         /*
3515          * Because HDMI identifier is in Vendor Specific Block,
3516          * search it from all data blocks of CEA extension.
3517          */
3518         for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3519                 if (cea_db_is_hdmi_vsdb(&edid_ext[i])) {
3520                         /* HDMI supports at least 8 bpc */
3521                         info->bpc = 8;
3522 
3523                         hdmi = &edid_ext[i];
3524                         if (cea_db_payload_len(hdmi) < 6)
3525                                 return false;
3526 
3527                         if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
3528                                 dc_bpc = 10;
3529                                 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30;
3530                                 DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
3531                                                   connector->name);
3532                         }
3533 
3534                         if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
3535                                 dc_bpc = 12;
3536                                 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36;
3537                                 DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
3538                                                   connector->name);
3539                         }
3540 
3541                         if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
3542                                 dc_bpc = 16;
3543                                 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48;
3544                                 DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
3545                                                   connector->name);
3546                         }
3547 
3548                         if (dc_bpc > 0) {
3549                                 DRM_DEBUG("%s: Assigning HDMI sink color depth as %d bpc.\n",
3550                                                   connector->name, dc_bpc);
3551                                 info->bpc = dc_bpc;
3552 
3553                                 /*
3554                                  * Deep color support mandates RGB444 support for all video
3555                                  * modes and forbids YCRCB422 support for all video modes per
3556                                  * HDMI 1.3 spec.
3557                                  */
3558                                 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3559 
3560                                 /* YCRCB444 is optional according to spec. */
3561                                 if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
3562                                         info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3563                                         DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
3564                                                           connector->name);
3565                                 }
3566 
3567                                 /*
3568                                  * Spec says that if any deep color mode is supported at all,
3569                                  * then deep color 36 bit must be supported.
3570                                  */
3571                                 if (!(hdmi[6] & DRM_EDID_HDMI_DC_36)) {
3572                                         DRM_DEBUG("%s: HDMI sink should do DC_36, but does not!\n",
3573                                                           connector->name);
3574                                 }
3575 
3576                                 return true;
3577                         }
3578                         else {
3579                                 DRM_DEBUG("%s: No deep color support on this HDMI sink.\n",
3580                                                   connector->name);
3581                         }
3582                 }
3583         }
3584 
3585         return false;
3586 }
3587 
3588 /**
3589  * drm_add_display_info - pull display info out if present
3590  * @edid: EDID data
3591  * @info: display info (attached to connector)
3592  * @connector: connector whose edid is used to build display info
3593  *
3594  * Grab any available display info and stuff it into the drm_display_info
3595  * structure that's part of the connector.  Useful for tracking bpp and
3596  * color spaces.
3597  */
3598 static void drm_add_display_info(struct edid *edid,
3599                                  struct drm_display_info *info,
3600                                  struct drm_connector *connector)
3601 {
3602         u8 *edid_ext;
3603 
3604         info->width_mm = edid->width_cm * 10;
3605         info->height_mm = edid->height_cm * 10;
3606 
3607         /* driver figures it out in this case */
3608         info->bpc = 0;
3609         info->color_formats = 0;
3610 
3611         if (edid->revision < 3)
3612                 return;
3613 
3614         if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
3615                 return;
3616 
3617         /* Get data from CEA blocks if present */
3618         edid_ext = drm_find_cea_extension(edid);
3619         if (edid_ext) {
3620                 info->cea_rev = edid_ext[1];
3621 
3622                 /* The existence of a CEA block should imply RGB support */
3623                 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3624                 if (edid_ext[3] & EDID_CEA_YCRCB444)
3625                         info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3626                 if (edid_ext[3] & EDID_CEA_YCRCB422)
3627                         info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3628         }
3629 
3630         /* HDMI deep color modes supported? Assign to info, if so */
3631         drm_assign_hdmi_deep_color_info(edid, info, connector);
3632 
3633         /* Only defined for 1.4 with digital displays */
3634         if (edid->revision < 4)
3635                 return;
3636 
3637         switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
3638         case DRM_EDID_DIGITAL_DEPTH_6:
3639                 info->bpc = 6;
3640                 break;
3641         case DRM_EDID_DIGITAL_DEPTH_8:
3642                 info->bpc = 8;
3643                 break;
3644         case DRM_EDID_DIGITAL_DEPTH_10:
3645                 info->bpc = 10;
3646                 break;
3647         case DRM_EDID_DIGITAL_DEPTH_12:
3648                 info->bpc = 12;
3649                 break;
3650         case DRM_EDID_DIGITAL_DEPTH_14:
3651                 info->bpc = 14;
3652                 break;
3653         case DRM_EDID_DIGITAL_DEPTH_16:
3654                 info->bpc = 16;
3655                 break;
3656         case DRM_EDID_DIGITAL_DEPTH_UNDEF:
3657         default:
3658                 info->bpc = 0;
3659                 break;
3660         }
3661 
3662         DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
3663                           connector->name, info->bpc);
3664 
3665         info->color_formats |= DRM_COLOR_FORMAT_RGB444;
3666         if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
3667                 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3668         if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
3669                 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3670 }
3671 
3672 /**
3673  * drm_add_edid_modes - add modes from EDID data, if available
3674  * @connector: connector we're probing
3675  * @edid: EDID data
3676  *
3677  * Add the specified modes to the connector's mode list.
3678  *
3679  * Return: The number of modes added or 0 if we couldn't find any.
3680  */
3681 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
3682 {
3683         int num_modes = 0;
3684         u32 quirks;
3685 
3686         if (edid == NULL) {
3687                 return 0;
3688         }
3689         if (!drm_edid_is_valid(edid)) {
3690                 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
3691                          connector->name);
3692                 return 0;
3693         }
3694 
3695         quirks = edid_get_quirks(edid);
3696 
3697         /*
3698          * EDID spec says modes should be preferred in this order:
3699          * - preferred detailed mode
3700          * - other detailed modes from base block
3701          * - detailed modes from extension blocks
3702          * - CVT 3-byte code modes
3703          * - standard timing codes
3704          * - established timing codes
3705          * - modes inferred from GTF or CVT range information
3706          *
3707          * We get this pretty much right.
3708          *
3709          * XXX order for additional mode types in extension blocks?
3710          */
3711         num_modes += add_detailed_modes(connector, edid, quirks);
3712         num_modes += add_cvt_modes(connector, edid);
3713         num_modes += add_standard_modes(connector, edid);
3714         num_modes += add_established_modes(connector, edid);
3715         if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
3716                 num_modes += add_inferred_modes(connector, edid);
3717         num_modes += add_cea_modes(connector, edid);
3718         num_modes += add_alternate_cea_modes(connector, edid);
3719 
3720         if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
3721                 edid_fixup_preferred(connector, quirks);
3722 
3723         drm_add_display_info(edid, &connector->display_info, connector);
3724 
3725         if (quirks & EDID_QUIRK_FORCE_8BPC)
3726                 connector->display_info.bpc = 8;
3727 
3728         if (quirks & EDID_QUIRK_FORCE_12BPC)
3729                 connector->display_info.bpc = 12;
3730 
3731         return num_modes;
3732 }
3733 EXPORT_SYMBOL(drm_add_edid_modes);
3734 
3735 /**
3736  * drm_add_modes_noedid - add modes for the connectors without EDID
3737  * @connector: connector we're probing
3738  * @hdisplay: the horizontal display limit
3739  * @vdisplay: the vertical display limit
3740  *
3741  * Add the specified modes to the connector's mode list. Only when the
3742  * hdisplay/vdisplay is not beyond the given limit, it will be added.
3743  *
3744  * Return: The number of modes added or 0 if we couldn't find any.
3745  */
3746 int drm_add_modes_noedid(struct drm_connector *connector,
3747                         int hdisplay, int vdisplay)
3748 {
3749         int i, count, num_modes = 0;
3750         struct drm_display_mode *mode;
3751         struct drm_device *dev = connector->dev;
3752 
3753         count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
3754         if (hdisplay < 0)
3755                 hdisplay = 0;
3756         if (vdisplay < 0)
3757                 vdisplay = 0;
3758 
3759         for (i = 0; i < count; i++) {
3760                 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
3761                 if (hdisplay && vdisplay) {
3762                         /*
3763                          * Only when two are valid, they will be used to check
3764                          * whether the mode should be added to the mode list of
3765                          * the connector.
3766                          */
3767                         if (ptr->hdisplay > hdisplay ||
3768                                         ptr->vdisplay > vdisplay)
3769                                 continue;
3770                 }
3771                 if (drm_mode_vrefresh(ptr) > 61)
3772                         continue;
3773                 mode = drm_mode_duplicate(dev, ptr);
3774                 if (mode) {
3775                         drm_mode_probed_add(connector, mode);
3776                         num_modes++;
3777                 }
3778         }
3779         return num_modes;
3780 }
3781 EXPORT_SYMBOL(drm_add_modes_noedid);
3782 
3783 /**
3784  * drm_set_preferred_mode - Sets the preferred mode of a connector
3785  * @connector: connector whose mode list should be processed
3786  * @hpref: horizontal resolution of preferred mode
3787  * @vpref: vertical resolution of preferred mode
3788  *
3789  * Marks a mode as preferred if it matches the resolution specified by @hpref
3790  * and @vpref.
3791  */
3792 void drm_set_preferred_mode(struct drm_connector *connector,
3793                            int hpref, int vpref)
3794 {
3795         struct drm_display_mode *mode;
3796 
3797         list_for_each_entry(mode, &connector->probed_modes, head) {
3798                 if (mode->hdisplay == hpref &&
3799                     mode->vdisplay == vpref)
3800                         mode->type |= DRM_MODE_TYPE_PREFERRED;
3801         }
3802 }
3803 EXPORT_SYMBOL(drm_set_preferred_mode);
3804 
3805 /**
3806  * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
3807  *                                              data from a DRM display mode
3808  * @frame: HDMI AVI infoframe
3809  * @mode: DRM display mode
3810  *
3811  * Return: 0 on success or a negative error code on failure.
3812  */
3813 int
3814 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
3815                                          const struct drm_display_mode *mode)
3816 {
3817         int err;
3818 
3819         if (!frame || !mode)
3820                 return -EINVAL;
3821 
3822         err = hdmi_avi_infoframe_init(frame);
3823         if (err < 0)
3824                 return err;
3825 
3826         if (mode->flags & DRM_MODE_FLAG_DBLCLK)
3827                 frame->pixel_repeat = 1;
3828 
3829         frame->video_code = drm_match_cea_mode(mode);
3830 
3831         frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
3832 
3833         /*
3834          * Populate picture aspect ratio from either
3835          * user input (if specified) or from the CEA mode list.
3836          */
3837         if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 ||
3838                 mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9)
3839                 frame->picture_aspect = mode->picture_aspect_ratio;
3840         else if (frame->video_code > 0)
3841                 frame->picture_aspect = drm_get_cea_aspect_ratio(
3842                                                 frame->video_code);
3843 
3844         frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
3845         frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
3846 
3847         return 0;
3848 }
3849 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
3850 
3851 static enum hdmi_3d_structure
3852 s3d_structure_from_display_mode(const struct drm_display_mode *mode)
3853 {
3854         u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
3855 
3856         switch (layout) {
3857         case DRM_MODE_FLAG_3D_FRAME_PACKING:
3858                 return HDMI_3D_STRUCTURE_FRAME_PACKING;
3859         case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
3860                 return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
3861         case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
3862                 return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
3863         case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
3864                 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
3865         case DRM_MODE_FLAG_3D_L_DEPTH:
3866                 return HDMI_3D_STRUCTURE_L_DEPTH;
3867         case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
3868                 return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
3869         case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
3870                 return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
3871         case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
3872                 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
3873         default:
3874                 return HDMI_3D_STRUCTURE_INVALID;
3875         }
3876 }
3877 
3878 /**
3879  * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
3880  * data from a DRM display mode
3881  * @frame: HDMI vendor infoframe
3882  * @mode: DRM display mode
3883  *
3884  * Note that there's is a need to send HDMI vendor infoframes only when using a
3885  * 4k or stereoscopic 3D mode. So when giving any other mode as input this
3886  * function will return -EINVAL, error that can be safely ignored.
3887  *
3888  * Return: 0 on success or a negative error code on failure.
3889  */
3890 int
3891 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
3892                                             const struct drm_display_mode *mode)
3893 {
3894         int err;
3895         u32 s3d_flags;
3896         u8 vic;
3897 
3898         if (!frame || !mode)
3899                 return -EINVAL;
3900 
3901         vic = drm_match_hdmi_mode(mode);
3902         s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
3903 
3904         if (!vic && !s3d_flags)
3905                 return -EINVAL;
3906 
3907         if (vic && s3d_flags)
3908                 return -EINVAL;
3909 
3910         err = hdmi_vendor_infoframe_init(frame);
3911         if (err < 0)
3912                 return err;
3913 
3914         if (vic)
3915                 frame->vic = vic;
3916         else
3917                 frame->s3d_struct = s3d_structure_from_display_mode(mode);
3918 
3919         return 0;
3920 }
3921 EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);
3922 
3923 static int drm_parse_display_id(struct drm_connector *connector,
3924                                 u8 *displayid, int length,
3925                                 bool is_edid_extension)
3926 {
3927         /* if this is an EDID extension the first byte will be 0x70 */
3928         int idx = 0;
3929         struct displayid_hdr *base;
3930         struct displayid_block *block;
3931         u8 csum = 0;
3932         int i;
3933 
3934         if (is_edid_extension)
3935                 idx = 1;
3936 
3937         base = (struct displayid_hdr *)&displayid[idx];
3938 
3939         DRM_DEBUG_KMS("base revision 0x%x, length %d, %d %d\n",
3940                       base->rev, base->bytes, base->prod_id, base->ext_count);
3941 
3942         if (base->bytes + 5 > length - idx)
3943                 return -EINVAL;
3944 
3945         for (i = idx; i <= base->bytes + 5; i++) {
3946                 csum += displayid[i];
3947         }
3948         if (csum) {
3949                 DRM_ERROR("DisplayID checksum invalid, remainder is %d\n", csum);
3950                 return -EINVAL;
3951         }
3952 
3953         block = (struct displayid_block *)&displayid[idx + 4];
3954         DRM_DEBUG_KMS("block id %d, rev %d, len %d\n",
3955                       block->tag, block->rev, block->num_bytes);
3956 
3957         switch (block->tag) {
3958         case DATA_BLOCK_TILED_DISPLAY: {
3959                 struct displayid_tiled_block *tile = (struct displayid_tiled_block *)block;
3960 
3961                 u16 w, h;
3962                 u8 tile_v_loc, tile_h_loc;
3963                 u8 num_v_tile, num_h_tile;
3964                 struct drm_tile_group *tg;
3965 
3966                 w = tile->tile_size[0] | tile->tile_size[1] << 8;
3967                 h = tile->tile_size[2] | tile->tile_size[3] << 8;
3968 
3969                 num_v_tile = (tile->topo[0] & 0xf) | (tile->topo[2] & 0x30);
3970                 num_h_tile = (tile->topo[0] >> 4) | ((tile->topo[2] >> 2) & 0x30);
3971                 tile_v_loc = (tile->topo[1] & 0xf) | ((tile->topo[2] & 0x3) << 4);
3972                 tile_h_loc = (tile->topo[1] >> 4) | (((tile->topo[2] >> 2) & 0x3) << 4);
3973 
3974                 connector->has_tile = true;
3975                 if (tile->tile_cap & 0x80)
3976                         connector->tile_is_single_monitor = true;
3977 
3978                 connector->num_h_tile = num_h_tile + 1;
3979                 connector->num_v_tile = num_v_tile + 1;
3980                 connector->tile_h_loc = tile_h_loc;
3981                 connector->tile_v_loc = tile_v_loc;
3982                 connector->tile_h_size = w + 1;
3983                 connector->tile_v_size = h + 1;
3984 
3985                 DRM_DEBUG_KMS("tile cap 0x%x\n", tile->tile_cap);
3986                 DRM_DEBUG_KMS("tile_size %d x %d\n", w + 1, h + 1);
3987                 DRM_DEBUG_KMS("topo num tiles %dx%d, location %dx%d\n",
3988                        num_h_tile + 1, num_v_tile + 1, tile_h_loc, tile_v_loc);
3989                 DRM_DEBUG_KMS("vend %c%c%c\n", tile->topology_id[0], tile->topology_id[1], tile->topology_id[2]);
3990 
3991                 tg = drm_mode_get_tile_group(connector->dev, tile->topology_id);
3992                 if (!tg) {
3993                         tg = drm_mode_create_tile_group(connector->dev, tile->topology_id);
3994                 }
3995                 if (!tg)
3996                         return -ENOMEM;
3997 
3998                 if (connector->tile_group != tg) {
3999                         /* if we haven't got a pointer,
4000                            take the reference, drop ref to old tile group */
4001                         if (connector->tile_group) {
4002                                 drm_mode_put_tile_group(connector->dev, connector->tile_group);
4003                         }
4004                         connector->tile_group = tg;
4005                 } else
4006                         /* if same tile group, then release the ref we just took. */
4007                         drm_mode_put_tile_group(connector->dev, tg);
4008         }
4009                 break;
4010         default:
4011                 printk("unknown displayid tag %d\n", block->tag);
4012                 break;
4013         }
4014         return 0;
4015 }
4016 
4017 static void drm_get_displayid(struct drm_connector *connector,
4018                               struct edid *edid)
4019 {
4020         void *displayid = NULL;
4021         int ret;
4022         connector->has_tile = false;
4023         displayid = drm_find_displayid_extension(edid);
4024         if (!displayid) {
4025                 /* drop reference to any tile group we had */
4026                 goto out_drop_ref;
4027         }
4028 
4029         ret = drm_parse_display_id(connector, displayid, EDID_LENGTH, true);
4030         if (ret < 0)
4031                 goto out_drop_ref;
4032         if (!connector->has_tile)
4033                 goto out_drop_ref;
4034         return;
4035 out_drop_ref:
4036         if (connector->tile_group) {
4037                 drm_mode_put_tile_group(connector->dev, connector->tile_group);
4038                 connector->tile_group = NULL;
4039         }
4040         return;
4041 }
4042 

This page was automatically generated by LXR 0.3.1 (source).  •  Linux is a registered trademark of Linus Torvalds  •  Contact us