Version:  2.0.40 2.2.26 2.4.37 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2 4.3 4.4

Linux/drivers/gpu/drm/drm_edid.c

  1 /*
  2  * Copyright (c) 2006 Luc Verhaegen (quirks list)
  3  * Copyright (c) 2007-2008 Intel Corporation
  4  *   Jesse Barnes <jesse.barnes@intel.com>
  5  * Copyright 2010 Red Hat, Inc.
  6  *
  7  * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
  8  * FB layer.
  9  *   Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
 10  *
 11  * Permission is hereby granted, free of charge, to any person obtaining a
 12  * copy of this software and associated documentation files (the "Software"),
 13  * to deal in the Software without restriction, including without limitation
 14  * the rights to use, copy, modify, merge, publish, distribute, sub license,
 15  * and/or sell copies of the Software, and to permit persons to whom the
 16  * Software is furnished to do so, subject to the following conditions:
 17  *
 18  * The above copyright notice and this permission notice (including the
 19  * next paragraph) shall be included in all copies or substantial portions
 20  * of the Software.
 21  *
 22  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 23  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 24  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 25  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 26  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 27  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 28  * DEALINGS IN THE SOFTWARE.
 29  */
 30 #include <linux/kernel.h>
 31 #include <linux/slab.h>
 32 #include <linux/hdmi.h>
 33 #include <linux/i2c.h>
 34 #include <linux/module.h>
 35 #include <drm/drmP.h>
 36 #include <drm/drm_edid.h>
 37 #include <drm/drm_displayid.h>
 38 
 39 #define version_greater(edid, maj, min) \
 40         (((edid)->version > (maj)) || \
 41          ((edid)->version == (maj) && (edid)->revision > (min)))
 42 
 43 #define EDID_EST_TIMINGS 16
 44 #define EDID_STD_TIMINGS 8
 45 #define EDID_DETAILED_TIMINGS 4
 46 
 47 /*
 48  * EDID blocks out in the wild have a variety of bugs, try to collect
 49  * them here (note that userspace may work around broken monitors first,
 50  * but fixes should make their way here so that the kernel "just works"
 51  * on as many displays as possible).
 52  */
 53 
 54 /* First detailed mode wrong, use largest 60Hz mode */
 55 #define EDID_QUIRK_PREFER_LARGE_60              (1 << 0)
 56 /* Reported 135MHz pixel clock is too high, needs adjustment */
 57 #define EDID_QUIRK_135_CLOCK_TOO_HIGH           (1 << 1)
 58 /* Prefer the largest mode at 75 Hz */
 59 #define EDID_QUIRK_PREFER_LARGE_75              (1 << 2)
 60 /* Detail timing is in cm not mm */
 61 #define EDID_QUIRK_DETAILED_IN_CM               (1 << 3)
 62 /* Detailed timing descriptors have bogus size values, so just take the
 63  * maximum size and use that.
 64  */
 65 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE    (1 << 4)
 66 /* Monitor forgot to set the first detailed is preferred bit. */
 67 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED     (1 << 5)
 68 /* use +hsync +vsync for detailed mode */
 69 #define EDID_QUIRK_DETAILED_SYNC_PP             (1 << 6)
 70 /* Force reduced-blanking timings for detailed modes */
 71 #define EDID_QUIRK_FORCE_REDUCED_BLANKING       (1 << 7)
 72 /* Force 8bpc */
 73 #define EDID_QUIRK_FORCE_8BPC                   (1 << 8)
 74 /* Force 12bpc */
 75 #define EDID_QUIRK_FORCE_12BPC                  (1 << 9)
 76 
 77 struct detailed_mode_closure {
 78         struct drm_connector *connector;
 79         struct edid *edid;
 80         bool preferred;
 81         u32 quirks;
 82         int modes;
 83 };
 84 
 85 #define LEVEL_DMT       0
 86 #define LEVEL_GTF       1
 87 #define LEVEL_GTF2      2
 88 #define LEVEL_CVT       3
 89 
 90 static struct edid_quirk {
 91         char vendor[4];
 92         int product_id;
 93         u32 quirks;
 94 } edid_quirk_list[] = {
 95         /* Acer AL1706 */
 96         { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
 97         /* Acer F51 */
 98         { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
 99         /* Unknown Acer */
100         { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
101 
102         /* Belinea 10 15 55 */
103         { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
104         { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
105 
106         /* Envision Peripherals, Inc. EN-7100e */
107         { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
108         /* Envision EN2028 */
109         { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
110 
111         /* Funai Electronics PM36B */
112         { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
113           EDID_QUIRK_DETAILED_IN_CM },
114 
115         /* LG Philips LCD LP154W01-A5 */
116         { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
117         { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
118 
119         /* Philips 107p5 CRT */
120         { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
121 
122         /* Proview AY765C */
123         { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
124 
125         /* Samsung SyncMaster 205BW.  Note: irony */
126         { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
127         /* Samsung SyncMaster 22[5-6]BW */
128         { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
129         { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
130 
131         /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
132         { "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
133 
134         /* ViewSonic VA2026w */
135         { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
136 
137         /* Medion MD 30217 PG */
138         { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
139 
140         /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
141         { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
142 };
143 
144 /*
145  * Autogenerated from the DMT spec.
146  * This table is copied from xfree86/modes/xf86EdidModes.c.
147  */
148 static const struct drm_display_mode drm_dmt_modes[] = {
149         /* 0x01 - 640x350@85Hz */
150         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
151                    736, 832, 0, 350, 382, 385, 445, 0,
152                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
153         /* 0x02 - 640x400@85Hz */
154         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
155                    736, 832, 0, 400, 401, 404, 445, 0,
156                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
157         /* 0x03 - 720x400@85Hz */
158         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
159                    828, 936, 0, 400, 401, 404, 446, 0,
160                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
161         /* 0x04 - 640x480@60Hz */
162         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
163                    752, 800, 0, 480, 490, 492, 525, 0,
164                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
165         /* 0x05 - 640x480@72Hz */
166         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
167                    704, 832, 0, 480, 489, 492, 520, 0,
168                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
169         /* 0x06 - 640x480@75Hz */
170         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
171                    720, 840, 0, 480, 481, 484, 500, 0,
172                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
173         /* 0x07 - 640x480@85Hz */
174         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
175                    752, 832, 0, 480, 481, 484, 509, 0,
176                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
177         /* 0x08 - 800x600@56Hz */
178         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
179                    896, 1024, 0, 600, 601, 603, 625, 0,
180                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
181         /* 0x09 - 800x600@60Hz */
182         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
183                    968, 1056, 0, 600, 601, 605, 628, 0,
184                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
185         /* 0x0a - 800x600@72Hz */
186         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
187                    976, 1040, 0, 600, 637, 643, 666, 0,
188                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
189         /* 0x0b - 800x600@75Hz */
190         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
191                    896, 1056, 0, 600, 601, 604, 625, 0,
192                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
193         /* 0x0c - 800x600@85Hz */
194         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
195                    896, 1048, 0, 600, 601, 604, 631, 0,
196                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
197         /* 0x0d - 800x600@120Hz RB */
198         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
199                    880, 960, 0, 600, 603, 607, 636, 0,
200                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
201         /* 0x0e - 848x480@60Hz */
202         { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
203                    976, 1088, 0, 480, 486, 494, 517, 0,
204                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
205         /* 0x0f - 1024x768@43Hz, interlace */
206         { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
207                    1208, 1264, 0, 768, 768, 772, 817, 0,
208                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
209                    DRM_MODE_FLAG_INTERLACE) },
210         /* 0x10 - 1024x768@60Hz */
211         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
212                    1184, 1344, 0, 768, 771, 777, 806, 0,
213                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
214         /* 0x11 - 1024x768@70Hz */
215         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
216                    1184, 1328, 0, 768, 771, 777, 806, 0,
217                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
218         /* 0x12 - 1024x768@75Hz */
219         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
220                    1136, 1312, 0, 768, 769, 772, 800, 0,
221                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
222         /* 0x13 - 1024x768@85Hz */
223         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
224                    1168, 1376, 0, 768, 769, 772, 808, 0,
225                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
226         /* 0x14 - 1024x768@120Hz RB */
227         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
228                    1104, 1184, 0, 768, 771, 775, 813, 0,
229                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
230         /* 0x15 - 1152x864@75Hz */
231         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
232                    1344, 1600, 0, 864, 865, 868, 900, 0,
233                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
234         /* 0x55 - 1280x720@60Hz */
235         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
236                    1430, 1650, 0, 720, 725, 730, 750, 0,
237                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
238         /* 0x16 - 1280x768@60Hz RB */
239         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
240                    1360, 1440, 0, 768, 771, 778, 790, 0,
241                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
242         /* 0x17 - 1280x768@60Hz */
243         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
244                    1472, 1664, 0, 768, 771, 778, 798, 0,
245                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
246         /* 0x18 - 1280x768@75Hz */
247         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
248                    1488, 1696, 0, 768, 771, 778, 805, 0,
249                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
250         /* 0x19 - 1280x768@85Hz */
251         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
252                    1496, 1712, 0, 768, 771, 778, 809, 0,
253                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
254         /* 0x1a - 1280x768@120Hz RB */
255         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
256                    1360, 1440, 0, 768, 771, 778, 813, 0,
257                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
258         /* 0x1b - 1280x800@60Hz RB */
259         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
260                    1360, 1440, 0, 800, 803, 809, 823, 0,
261                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
262         /* 0x1c - 1280x800@60Hz */
263         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
264                    1480, 1680, 0, 800, 803, 809, 831, 0,
265                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
266         /* 0x1d - 1280x800@75Hz */
267         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
268                    1488, 1696, 0, 800, 803, 809, 838, 0,
269                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
270         /* 0x1e - 1280x800@85Hz */
271         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
272                    1496, 1712, 0, 800, 803, 809, 843, 0,
273                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
274         /* 0x1f - 1280x800@120Hz RB */
275         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
276                    1360, 1440, 0, 800, 803, 809, 847, 0,
277                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
278         /* 0x20 - 1280x960@60Hz */
279         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
280                    1488, 1800, 0, 960, 961, 964, 1000, 0,
281                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
282         /* 0x21 - 1280x960@85Hz */
283         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
284                    1504, 1728, 0, 960, 961, 964, 1011, 0,
285                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
286         /* 0x22 - 1280x960@120Hz RB */
287         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
288                    1360, 1440, 0, 960, 963, 967, 1017, 0,
289                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
290         /* 0x23 - 1280x1024@60Hz */
291         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
292                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
293                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
294         /* 0x24 - 1280x1024@75Hz */
295         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
296                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
297                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
298         /* 0x25 - 1280x1024@85Hz */
299         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
300                    1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
301                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
302         /* 0x26 - 1280x1024@120Hz RB */
303         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
304                    1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
305                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
306         /* 0x27 - 1360x768@60Hz */
307         { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
308                    1536, 1792, 0, 768, 771, 777, 795, 0,
309                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
310         /* 0x28 - 1360x768@120Hz RB */
311         { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
312                    1440, 1520, 0, 768, 771, 776, 813, 0,
313                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
314         /* 0x51 - 1366x768@60Hz */
315         { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 85500, 1366, 1436,
316                    1579, 1792, 0, 768, 771, 774, 798, 0,
317                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
318         /* 0x56 - 1366x768@60Hz */
319         { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 72000, 1366, 1380,
320                    1436, 1500, 0, 768, 769, 772, 800, 0,
321                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
322         /* 0x29 - 1400x1050@60Hz RB */
323         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
324                    1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
325                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
326         /* 0x2a - 1400x1050@60Hz */
327         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
328                    1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
329                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
330         /* 0x2b - 1400x1050@75Hz */
331         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
332                    1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
333                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
334         /* 0x2c - 1400x1050@85Hz */
335         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
336                    1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
337                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
338         /* 0x2d - 1400x1050@120Hz RB */
339         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
340                    1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
341                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
342         /* 0x2e - 1440x900@60Hz RB */
343         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
344                    1520, 1600, 0, 900, 903, 909, 926, 0,
345                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
346         /* 0x2f - 1440x900@60Hz */
347         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
348                    1672, 1904, 0, 900, 903, 909, 934, 0,
349                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
350         /* 0x30 - 1440x900@75Hz */
351         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
352                    1688, 1936, 0, 900, 903, 909, 942, 0,
353                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
354         /* 0x31 - 1440x900@85Hz */
355         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
356                    1696, 1952, 0, 900, 903, 909, 948, 0,
357                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
358         /* 0x32 - 1440x900@120Hz RB */
359         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
360                    1520, 1600, 0, 900, 903, 909, 953, 0,
361                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
362         /* 0x53 - 1600x900@60Hz */
363         { DRM_MODE("1600x900", DRM_MODE_TYPE_DRIVER, 108000, 1600, 1624,
364                    1704, 1800, 0, 900, 901, 904, 1000, 0,
365                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
366         /* 0x33 - 1600x1200@60Hz */
367         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
368                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
369                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
370         /* 0x34 - 1600x1200@65Hz */
371         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
372                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
373                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
374         /* 0x35 - 1600x1200@70Hz */
375         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
376                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
377                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
378         /* 0x36 - 1600x1200@75Hz */
379         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
380                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
381                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
382         /* 0x37 - 1600x1200@85Hz */
383         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
384                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
385                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
386         /* 0x38 - 1600x1200@120Hz RB */
387         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
388                    1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
389                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
390         /* 0x39 - 1680x1050@60Hz RB */
391         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
392                    1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
393                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
394         /* 0x3a - 1680x1050@60Hz */
395         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
396                    1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
397                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
398         /* 0x3b - 1680x1050@75Hz */
399         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
400                    1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
401                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
402         /* 0x3c - 1680x1050@85Hz */
403         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
404                    1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
405                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
406         /* 0x3d - 1680x1050@120Hz RB */
407         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
408                    1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
409                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
410         /* 0x3e - 1792x1344@60Hz */
411         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
412                    2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
413                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
414         /* 0x3f - 1792x1344@75Hz */
415         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
416                    2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
417                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
418         /* 0x40 - 1792x1344@120Hz RB */
419         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
420                    1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
421                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
422         /* 0x41 - 1856x1392@60Hz */
423         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
424                    2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
425                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
426         /* 0x42 - 1856x1392@75Hz */
427         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
428                    2208, 2560, 0, 1392, 1393, 1396, 1500, 0,
429                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
430         /* 0x43 - 1856x1392@120Hz RB */
431         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
432                    1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
433                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
434         /* 0x52 - 1920x1080@60Hz */
435         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
436                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
437                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
438         /* 0x44 - 1920x1200@60Hz RB */
439         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
440                    2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
441                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
442         /* 0x45 - 1920x1200@60Hz */
443         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
444                    2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
445                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
446         /* 0x46 - 1920x1200@75Hz */
447         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
448                    2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
449                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
450         /* 0x47 - 1920x1200@85Hz */
451         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
452                    2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
453                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
454         /* 0x48 - 1920x1200@120Hz RB */
455         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
456                    2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
457                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
458         /* 0x49 - 1920x1440@60Hz */
459         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
460                    2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
461                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
462         /* 0x4a - 1920x1440@75Hz */
463         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
464                    2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
465                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
466         /* 0x4b - 1920x1440@120Hz RB */
467         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
468                    2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
469                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
470         /* 0x54 - 2048x1152@60Hz */
471         { DRM_MODE("2048x1152", DRM_MODE_TYPE_DRIVER, 162000, 2048, 2074,
472                    2154, 2250, 0, 1152, 1153, 1156, 1200, 0,
473                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
474         /* 0x4c - 2560x1600@60Hz RB */
475         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
476                    2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
477                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
478         /* 0x4d - 2560x1600@60Hz */
479         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
480                    3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
481                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
482         /* 0x4e - 2560x1600@75Hz */
483         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
484                    3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
485                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
486         /* 0x4f - 2560x1600@85Hz */
487         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
488                    3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
489                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
490         /* 0x50 - 2560x1600@120Hz RB */
491         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
492                    2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
493                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
494         /* 0x57 - 4096x2160@60Hz RB */
495         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556744, 4096, 4104,
496                    4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
497                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
498         /* 0x58 - 4096x2160@59.94Hz RB */
499         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556188, 4096, 4104,
500                    4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
501                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
502 };
503 
504 /*
505  * These more or less come from the DMT spec.  The 720x400 modes are
506  * inferred from historical 80x25 practice.  The 640x480@67 and 832x624@75
507  * modes are old-school Mac modes.  The EDID spec says the 1152x864@75 mode
508  * should be 1152x870, again for the Mac, but instead we use the x864 DMT
509  * mode.
510  *
511  * The DMT modes have been fact-checked; the rest are mild guesses.
512  */
513 static const struct drm_display_mode edid_est_modes[] = {
514         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
515                    968, 1056, 0, 600, 601, 605, 628, 0,
516                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
517         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
518                    896, 1024, 0, 600, 601, 603,  625, 0,
519                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
520         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
521                    720, 840, 0, 480, 481, 484, 500, 0,
522                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
523         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
524                    704,  832, 0, 480, 489, 491, 520, 0,
525                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
526         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
527                    768,  864, 0, 480, 483, 486, 525, 0,
528                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
529         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
530                    752, 800, 0, 480, 490, 492, 525, 0,
531                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
532         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
533                    846, 900, 0, 400, 421, 423,  449, 0,
534                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
535         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
536                    846,  900, 0, 400, 412, 414, 449, 0,
537                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
538         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
539                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
540                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
541         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
542                    1136, 1312, 0,  768, 769, 772, 800, 0,
543                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
544         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
545                    1184, 1328, 0,  768, 771, 777, 806, 0,
546                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
547         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
548                    1184, 1344, 0,  768, 771, 777, 806, 0,
549                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
550         { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
551                    1208, 1264, 0, 768, 768, 776, 817, 0,
552                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
553         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
554                    928, 1152, 0, 624, 625, 628, 667, 0,
555                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
556         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
557                    896, 1056, 0, 600, 601, 604,  625, 0,
558                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
559         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
560                    976, 1040, 0, 600, 637, 643, 666, 0,
561                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
562         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
563                    1344, 1600, 0,  864, 865, 868, 900, 0,
564                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
565 };
566 
567 struct minimode {
568         short w;
569         short h;
570         short r;
571         short rb;
572 };
573 
574 static const struct minimode est3_modes[] = {
575         /* byte 6 */
576         { 640, 350, 85, 0 },
577         { 640, 400, 85, 0 },
578         { 720, 400, 85, 0 },
579         { 640, 480, 85, 0 },
580         { 848, 480, 60, 0 },
581         { 800, 600, 85, 0 },
582         { 1024, 768, 85, 0 },
583         { 1152, 864, 75, 0 },
584         /* byte 7 */
585         { 1280, 768, 60, 1 },
586         { 1280, 768, 60, 0 },
587         { 1280, 768, 75, 0 },
588         { 1280, 768, 85, 0 },
589         { 1280, 960, 60, 0 },
590         { 1280, 960, 85, 0 },
591         { 1280, 1024, 60, 0 },
592         { 1280, 1024, 85, 0 },
593         /* byte 8 */
594         { 1360, 768, 60, 0 },
595         { 1440, 900, 60, 1 },
596         { 1440, 900, 60, 0 },
597         { 1440, 900, 75, 0 },
598         { 1440, 900, 85, 0 },
599         { 1400, 1050, 60, 1 },
600         { 1400, 1050, 60, 0 },
601         { 1400, 1050, 75, 0 },
602         /* byte 9 */
603         { 1400, 1050, 85, 0 },
604         { 1680, 1050, 60, 1 },
605         { 1680, 1050, 60, 0 },
606         { 1680, 1050, 75, 0 },
607         { 1680, 1050, 85, 0 },
608         { 1600, 1200, 60, 0 },
609         { 1600, 1200, 65, 0 },
610         { 1600, 1200, 70, 0 },
611         /* byte 10 */
612         { 1600, 1200, 75, 0 },
613         { 1600, 1200, 85, 0 },
614         { 1792, 1344, 60, 0 },
615         { 1792, 1344, 75, 0 },
616         { 1856, 1392, 60, 0 },
617         { 1856, 1392, 75, 0 },
618         { 1920, 1200, 60, 1 },
619         { 1920, 1200, 60, 0 },
620         /* byte 11 */
621         { 1920, 1200, 75, 0 },
622         { 1920, 1200, 85, 0 },
623         { 1920, 1440, 60, 0 },
624         { 1920, 1440, 75, 0 },
625 };
626 
627 static const struct minimode extra_modes[] = {
628         { 1024, 576,  60, 0 },
629         { 1366, 768,  60, 0 },
630         { 1600, 900,  60, 0 },
631         { 1680, 945,  60, 0 },
632         { 1920, 1080, 60, 0 },
633         { 2048, 1152, 60, 0 },
634         { 2048, 1536, 60, 0 },
635 };
636 
637 /*
638  * Probably taken from CEA-861 spec.
639  * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
640  */
641 static const struct drm_display_mode edid_cea_modes[] = {
642         /* 1 - 640x480@60Hz */
643         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
644                    752, 800, 0, 480, 490, 492, 525, 0,
645                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
646           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
647         /* 2 - 720x480@60Hz */
648         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
649                    798, 858, 0, 480, 489, 495, 525, 0,
650                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
651           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
652         /* 3 - 720x480@60Hz */
653         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
654                    798, 858, 0, 480, 489, 495, 525, 0,
655                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
656           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
657         /* 4 - 1280x720@60Hz */
658         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
659                    1430, 1650, 0, 720, 725, 730, 750, 0,
660                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
661           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
662         /* 5 - 1920x1080i@60Hz */
663         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
664                    2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
665                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
666                         DRM_MODE_FLAG_INTERLACE),
667           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
668         /* 6 - 720(1440)x480i@60Hz */
669         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
670                    801, 858, 0, 480, 488, 494, 525, 0,
671                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
672                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
673           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
674         /* 7 - 720(1440)x480i@60Hz */
675         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
676                    801, 858, 0, 480, 488, 494, 525, 0,
677                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
678                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
679           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
680         /* 8 - 720(1440)x240@60Hz */
681         { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
682                    801, 858, 0, 240, 244, 247, 262, 0,
683                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
684                         DRM_MODE_FLAG_DBLCLK),
685           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
686         /* 9 - 720(1440)x240@60Hz */
687         { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
688                    801, 858, 0, 240, 244, 247, 262, 0,
689                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
690                         DRM_MODE_FLAG_DBLCLK),
691           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
692         /* 10 - 2880x480i@60Hz */
693         { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
694                    3204, 3432, 0, 480, 488, 494, 525, 0,
695                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
696                         DRM_MODE_FLAG_INTERLACE),
697           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
698         /* 11 - 2880x480i@60Hz */
699         { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
700                    3204, 3432, 0, 480, 488, 494, 525, 0,
701                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
702                         DRM_MODE_FLAG_INTERLACE),
703           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
704         /* 12 - 2880x240@60Hz */
705         { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
706                    3204, 3432, 0, 240, 244, 247, 262, 0,
707                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
708           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
709         /* 13 - 2880x240@60Hz */
710         { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
711                    3204, 3432, 0, 240, 244, 247, 262, 0,
712                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
713           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
714         /* 14 - 1440x480@60Hz */
715         { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
716                    1596, 1716, 0, 480, 489, 495, 525, 0,
717                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
718           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
719         /* 15 - 1440x480@60Hz */
720         { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
721                    1596, 1716, 0, 480, 489, 495, 525, 0,
722                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
723           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
724         /* 16 - 1920x1080@60Hz */
725         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
726                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
727                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
728           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
729         /* 17 - 720x576@50Hz */
730         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
731                    796, 864, 0, 576, 581, 586, 625, 0,
732                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
733           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
734         /* 18 - 720x576@50Hz */
735         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
736                    796, 864, 0, 576, 581, 586, 625, 0,
737                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
738           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
739         /* 19 - 1280x720@50Hz */
740         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
741                    1760, 1980, 0, 720, 725, 730, 750, 0,
742                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
743           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
744         /* 20 - 1920x1080i@50Hz */
745         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
746                    2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
747                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
748                         DRM_MODE_FLAG_INTERLACE),
749           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
750         /* 21 - 720(1440)x576i@50Hz */
751         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
752                    795, 864, 0, 576, 580, 586, 625, 0,
753                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
754                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
755           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
756         /* 22 - 720(1440)x576i@50Hz */
757         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
758                    795, 864, 0, 576, 580, 586, 625, 0,
759                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
760                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
761           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
762         /* 23 - 720(1440)x288@50Hz */
763         { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
764                    795, 864, 0, 288, 290, 293, 312, 0,
765                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
766                         DRM_MODE_FLAG_DBLCLK),
767           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
768         /* 24 - 720(1440)x288@50Hz */
769         { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
770                    795, 864, 0, 288, 290, 293, 312, 0,
771                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
772                         DRM_MODE_FLAG_DBLCLK),
773           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
774         /* 25 - 2880x576i@50Hz */
775         { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
776                    3180, 3456, 0, 576, 580, 586, 625, 0,
777                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
778                         DRM_MODE_FLAG_INTERLACE),
779           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
780         /* 26 - 2880x576i@50Hz */
781         { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
782                    3180, 3456, 0, 576, 580, 586, 625, 0,
783                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
784                         DRM_MODE_FLAG_INTERLACE),
785           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
786         /* 27 - 2880x288@50Hz */
787         { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
788                    3180, 3456, 0, 288, 290, 293, 312, 0,
789                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
790           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
791         /* 28 - 2880x288@50Hz */
792         { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
793                    3180, 3456, 0, 288, 290, 293, 312, 0,
794                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
795           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
796         /* 29 - 1440x576@50Hz */
797         { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
798                    1592, 1728, 0, 576, 581, 586, 625, 0,
799                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
800           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
801         /* 30 - 1440x576@50Hz */
802         { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
803                    1592, 1728, 0, 576, 581, 586, 625, 0,
804                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
805           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
806         /* 31 - 1920x1080@50Hz */
807         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
808                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
809                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
810           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
811         /* 32 - 1920x1080@24Hz */
812         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
813                    2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
814                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
815           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
816         /* 33 - 1920x1080@25Hz */
817         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
818                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
819                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
820           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
821         /* 34 - 1920x1080@30Hz */
822         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
823                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
824                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
825           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
826         /* 35 - 2880x480@60Hz */
827         { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
828                    3192, 3432, 0, 480, 489, 495, 525, 0,
829                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
830           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
831         /* 36 - 2880x480@60Hz */
832         { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
833                    3192, 3432, 0, 480, 489, 495, 525, 0,
834                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
835           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
836         /* 37 - 2880x576@50Hz */
837         { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
838                    3184, 3456, 0, 576, 581, 586, 625, 0,
839                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
840           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
841         /* 38 - 2880x576@50Hz */
842         { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
843                    3184, 3456, 0, 576, 581, 586, 625, 0,
844                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
845           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
846         /* 39 - 1920x1080i@50Hz */
847         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
848                    2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
849                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
850                         DRM_MODE_FLAG_INTERLACE),
851           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
852         /* 40 - 1920x1080i@100Hz */
853         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
854                    2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
855                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
856                         DRM_MODE_FLAG_INTERLACE),
857           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
858         /* 41 - 1280x720@100Hz */
859         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
860                    1760, 1980, 0, 720, 725, 730, 750, 0,
861                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
862           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
863         /* 42 - 720x576@100Hz */
864         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
865                    796, 864, 0, 576, 581, 586, 625, 0,
866                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
867           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
868         /* 43 - 720x576@100Hz */
869         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
870                    796, 864, 0, 576, 581, 586, 625, 0,
871                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
872           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
873         /* 44 - 720(1440)x576i@100Hz */
874         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
875                    795, 864, 0, 576, 580, 586, 625, 0,
876                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
877                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
878           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
879         /* 45 - 720(1440)x576i@100Hz */
880         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
881                    795, 864, 0, 576, 580, 586, 625, 0,
882                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
883                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
884           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
885         /* 46 - 1920x1080i@120Hz */
886         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
887                    2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
888                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
889                         DRM_MODE_FLAG_INTERLACE),
890           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
891         /* 47 - 1280x720@120Hz */
892         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
893                    1430, 1650, 0, 720, 725, 730, 750, 0,
894                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
895           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
896         /* 48 - 720x480@120Hz */
897         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
898                    798, 858, 0, 480, 489, 495, 525, 0,
899                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
900           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
901         /* 49 - 720x480@120Hz */
902         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
903                    798, 858, 0, 480, 489, 495, 525, 0,
904                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
905           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
906         /* 50 - 720(1440)x480i@120Hz */
907         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
908                    801, 858, 0, 480, 488, 494, 525, 0,
909                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
910                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
911           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
912         /* 51 - 720(1440)x480i@120Hz */
913         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
914                    801, 858, 0, 480, 488, 494, 525, 0,
915                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
916                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
917           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
918         /* 52 - 720x576@200Hz */
919         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
920                    796, 864, 0, 576, 581, 586, 625, 0,
921                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
922           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
923         /* 53 - 720x576@200Hz */
924         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
925                    796, 864, 0, 576, 581, 586, 625, 0,
926                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
927           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
928         /* 54 - 720(1440)x576i@200Hz */
929         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
930                    795, 864, 0, 576, 580, 586, 625, 0,
931                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
932                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
933           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
934         /* 55 - 720(1440)x576i@200Hz */
935         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
936                    795, 864, 0, 576, 580, 586, 625, 0,
937                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
938                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
939           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
940         /* 56 - 720x480@240Hz */
941         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
942                    798, 858, 0, 480, 489, 495, 525, 0,
943                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
944           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
945         /* 57 - 720x480@240Hz */
946         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
947                    798, 858, 0, 480, 489, 495, 525, 0,
948                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
949           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
950         /* 58 - 720(1440)x480i@240 */
951         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
952                    801, 858, 0, 480, 488, 494, 525, 0,
953                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
954                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
955           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
956         /* 59 - 720(1440)x480i@240 */
957         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
958                    801, 858, 0, 480, 488, 494, 525, 0,
959                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
960                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
961           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
962         /* 60 - 1280x720@24Hz */
963         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
964                    3080, 3300, 0, 720, 725, 730, 750, 0,
965                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
966           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
967         /* 61 - 1280x720@25Hz */
968         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
969                    3740, 3960, 0, 720, 725, 730, 750, 0,
970                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
971           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
972         /* 62 - 1280x720@30Hz */
973         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
974                    3080, 3300, 0, 720, 725, 730, 750, 0,
975                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
976           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
977         /* 63 - 1920x1080@120Hz */
978         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
979                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
980                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
981          .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
982         /* 64 - 1920x1080@100Hz */
983         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
984                    2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
985                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
986          .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
987 };
988 
989 /*
990  * HDMI 1.4 4k modes.
991  */
992 static const struct drm_display_mode edid_4k_modes[] = {
993         /* 1 - 3840x2160@30Hz */
994         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
995                    3840, 4016, 4104, 4400, 0,
996                    2160, 2168, 2178, 2250, 0,
997                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
998           .vrefresh = 30, },
999         /* 2 - 3840x2160@25Hz */
1000         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1001                    3840, 4896, 4984, 5280, 0,
1002                    2160, 2168, 2178, 2250, 0,
1003                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1004           .vrefresh = 25, },
1005         /* 3 - 3840x2160@24Hz */
1006         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1007                    3840, 5116, 5204, 5500, 0,
1008                    2160, 2168, 2178, 2250, 0,
1009                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1010           .vrefresh = 24, },
1011         /* 4 - 4096x2160@24Hz (SMPTE) */
1012         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
1013                    4096, 5116, 5204, 5500, 0,
1014                    2160, 2168, 2178, 2250, 0,
1015                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1016           .vrefresh = 24, },
1017 };
1018 
1019 /*** DDC fetch and block validation ***/
1020 
1021 static const u8 edid_header[] = {
1022         0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1023 };
1024 
1025 /**
1026  * drm_edid_header_is_valid - sanity check the header of the base EDID block
1027  * @raw_edid: pointer to raw base EDID block
1028  *
1029  * Sanity check the header of the base EDID block.
1030  *
1031  * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
1032  */
1033 int drm_edid_header_is_valid(const u8 *raw_edid)
1034 {
1035         int i, score = 0;
1036 
1037         for (i = 0; i < sizeof(edid_header); i++)
1038                 if (raw_edid[i] == edid_header[i])
1039                         score++;
1040 
1041         return score;
1042 }
1043 EXPORT_SYMBOL(drm_edid_header_is_valid);
1044 
1045 static int edid_fixup __read_mostly = 6;
1046 module_param_named(edid_fixup, edid_fixup, int, 0400);
1047 MODULE_PARM_DESC(edid_fixup,
1048                  "Minimum number of valid EDID header bytes (0-8, default 6)");
1049 
1050 static void drm_get_displayid(struct drm_connector *connector,
1051                               struct edid *edid);
1052 
1053 static int drm_edid_block_checksum(const u8 *raw_edid)
1054 {
1055         int i;
1056         u8 csum = 0;
1057         for (i = 0; i < EDID_LENGTH; i++)
1058                 csum += raw_edid[i];
1059 
1060         return csum;
1061 }
1062 
1063 static bool drm_edid_is_zero(const u8 *in_edid, int length)
1064 {
1065         if (memchr_inv(in_edid, 0, length))
1066                 return false;
1067 
1068         return true;
1069 }
1070 
1071 /**
1072  * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1073  * @raw_edid: pointer to raw EDID block
1074  * @block: type of block to validate (0 for base, extension otherwise)
1075  * @print_bad_edid: if true, dump bad EDID blocks to the console
1076  * @edid_corrupt: if true, the header or checksum is invalid
1077  *
1078  * Validate a base or extension EDID block and optionally dump bad blocks to
1079  * the console.
1080  *
1081  * Return: True if the block is valid, false otherwise.
1082  */
1083 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
1084                           bool *edid_corrupt)
1085 {
1086         u8 csum;
1087         struct edid *edid = (struct edid *)raw_edid;
1088 
1089         if (WARN_ON(!raw_edid))
1090                 return false;
1091 
1092         if (edid_fixup > 8 || edid_fixup < 0)
1093                 edid_fixup = 6;
1094 
1095         if (block == 0) {
1096                 int score = drm_edid_header_is_valid(raw_edid);
1097                 if (score == 8) {
1098                         if (edid_corrupt)
1099                                 *edid_corrupt = false;
1100                 } else if (score >= edid_fixup) {
1101                         /* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
1102                          * The corrupt flag needs to be set here otherwise, the
1103                          * fix-up code here will correct the problem, the
1104                          * checksum is correct and the test fails
1105                          */
1106                         if (edid_corrupt)
1107                                 *edid_corrupt = true;
1108                         DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1109                         memcpy(raw_edid, edid_header, sizeof(edid_header));
1110                 } else {
1111                         if (edid_corrupt)
1112                                 *edid_corrupt = true;
1113                         goto bad;
1114                 }
1115         }
1116 
1117         csum = drm_edid_block_checksum(raw_edid);
1118         if (csum) {
1119                 if (print_bad_edid) {
1120                         DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
1121                 }
1122 
1123                 if (edid_corrupt)
1124                         *edid_corrupt = true;
1125 
1126                 /* allow CEA to slide through, switches mangle this */
1127                 if (raw_edid[0] != 0x02)
1128                         goto bad;
1129         }
1130 
1131         /* per-block-type checks */
1132         switch (raw_edid[0]) {
1133         case 0: /* base */
1134                 if (edid->version != 1) {
1135                         DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1136                         goto bad;
1137                 }
1138 
1139                 if (edid->revision > 4)
1140                         DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1141                 break;
1142 
1143         default:
1144                 break;
1145         }
1146 
1147         return true;
1148 
1149 bad:
1150         if (print_bad_edid) {
1151                 if (drm_edid_is_zero(raw_edid, EDID_LENGTH)) {
1152                         printk(KERN_ERR "EDID block is all zeroes\n");
1153                 } else {
1154                         printk(KERN_ERR "Raw EDID:\n");
1155                         print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
1156                                raw_edid, EDID_LENGTH, false);
1157                 }
1158         }
1159         return false;
1160 }
1161 EXPORT_SYMBOL(drm_edid_block_valid);
1162 
1163 /**
1164  * drm_edid_is_valid - sanity check EDID data
1165  * @edid: EDID data
1166  *
1167  * Sanity-check an entire EDID record (including extensions)
1168  *
1169  * Return: True if the EDID data is valid, false otherwise.
1170  */
1171 bool drm_edid_is_valid(struct edid *edid)
1172 {
1173         int i;
1174         u8 *raw = (u8 *)edid;
1175 
1176         if (!edid)
1177                 return false;
1178 
1179         for (i = 0; i <= edid->extensions; i++)
1180                 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true, NULL))
1181                         return false;
1182 
1183         return true;
1184 }
1185 EXPORT_SYMBOL(drm_edid_is_valid);
1186 
1187 #define DDC_SEGMENT_ADDR 0x30
1188 /**
1189  * drm_do_probe_ddc_edid() - get EDID information via I2C
1190  * @data: I2C device adapter
1191  * @buf: EDID data buffer to be filled
1192  * @block: 128 byte EDID block to start fetching from
1193  * @len: EDID data buffer length to fetch
1194  *
1195  * Try to fetch EDID information by calling I2C driver functions.
1196  *
1197  * Return: 0 on success or -1 on failure.
1198  */
1199 static int
1200 drm_do_probe_ddc_edid(void *data, u8 *buf, unsigned int block, size_t len)
1201 {
1202         struct i2c_adapter *adapter = data;
1203         unsigned char start = block * EDID_LENGTH;
1204         unsigned char segment = block >> 1;
1205         unsigned char xfers = segment ? 3 : 2;
1206         int ret, retries = 5;
1207 
1208         /*
1209          * The core I2C driver will automatically retry the transfer if the
1210          * adapter reports EAGAIN. However, we find that bit-banging transfers
1211          * are susceptible to errors under a heavily loaded machine and
1212          * generate spurious NAKs and timeouts. Retrying the transfer
1213          * of the individual block a few times seems to overcome this.
1214          */
1215         do {
1216                 struct i2c_msg msgs[] = {
1217                         {
1218                                 .addr   = DDC_SEGMENT_ADDR,
1219                                 .flags  = 0,
1220                                 .len    = 1,
1221                                 .buf    = &segment,
1222                         }, {
1223                                 .addr   = DDC_ADDR,
1224                                 .flags  = 0,
1225                                 .len    = 1,
1226                                 .buf    = &start,
1227                         }, {
1228                                 .addr   = DDC_ADDR,
1229                                 .flags  = I2C_M_RD,
1230                                 .len    = len,
1231                                 .buf    = buf,
1232                         }
1233                 };
1234 
1235                 /*
1236                  * Avoid sending the segment addr to not upset non-compliant
1237                  * DDC monitors.
1238                  */
1239                 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1240 
1241                 if (ret == -ENXIO) {
1242                         DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1243                                         adapter->name);
1244                         break;
1245                 }
1246         } while (ret != xfers && --retries);
1247 
1248         return ret == xfers ? 0 : -1;
1249 }
1250 
1251 /**
1252  * drm_do_get_edid - get EDID data using a custom EDID block read function
1253  * @connector: connector we're probing
1254  * @get_edid_block: EDID block read function
1255  * @data: private data passed to the block read function
1256  *
1257  * When the I2C adapter connected to the DDC bus is hidden behind a device that
1258  * exposes a different interface to read EDID blocks this function can be used
1259  * to get EDID data using a custom block read function.
1260  *
1261  * As in the general case the DDC bus is accessible by the kernel at the I2C
1262  * level, drivers must make all reasonable efforts to expose it as an I2C
1263  * adapter and use drm_get_edid() instead of abusing this function.
1264  *
1265  * Return: Pointer to valid EDID or NULL if we couldn't find any.
1266  */
1267 struct edid *drm_do_get_edid(struct drm_connector *connector,
1268         int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
1269                               size_t len),
1270         void *data)
1271 {
1272         int i, j = 0, valid_extensions = 0;
1273         u8 *block, *new;
1274         bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
1275 
1276         if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1277                 return NULL;
1278 
1279         /* base block fetch */
1280         for (i = 0; i < 4; i++) {
1281                 if (get_edid_block(data, block, 0, EDID_LENGTH))
1282                         goto out;
1283                 if (drm_edid_block_valid(block, 0, print_bad_edid,
1284                                          &connector->edid_corrupt))
1285                         break;
1286                 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1287                         connector->null_edid_counter++;
1288                         goto carp;
1289                 }
1290         }
1291         if (i == 4)
1292                 goto carp;
1293 
1294         /* if there's no extensions, we're done */
1295         if (block[0x7e] == 0)
1296                 return (struct edid *)block;
1297 
1298         new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
1299         if (!new)
1300                 goto out;
1301         block = new;
1302 
1303         for (j = 1; j <= block[0x7e]; j++) {
1304                 for (i = 0; i < 4; i++) {
1305                         if (get_edid_block(data,
1306                                   block + (valid_extensions + 1) * EDID_LENGTH,
1307                                   j, EDID_LENGTH))
1308                                 goto out;
1309                         if (drm_edid_block_valid(block + (valid_extensions + 1)
1310                                                  * EDID_LENGTH, j,
1311                                                  print_bad_edid,
1312                                                  NULL)) {
1313                                 valid_extensions++;
1314                                 break;
1315                         }
1316                 }
1317 
1318                 if (i == 4 && print_bad_edid) {
1319                         dev_warn(connector->dev->dev,
1320                          "%s: Ignoring invalid EDID block %d.\n",
1321                          connector->name, j);
1322 
1323                         connector->bad_edid_counter++;
1324                 }
1325         }
1326 
1327         if (valid_extensions != block[0x7e]) {
1328                 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1329                 block[0x7e] = valid_extensions;
1330                 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1331                 if (!new)
1332                         goto out;
1333                 block = new;
1334         }
1335 
1336         return (struct edid *)block;
1337 
1338 carp:
1339         if (print_bad_edid) {
1340                 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
1341                          connector->name, j);
1342         }
1343         connector->bad_edid_counter++;
1344 
1345 out:
1346         kfree(block);
1347         return NULL;
1348 }
1349 EXPORT_SYMBOL_GPL(drm_do_get_edid);
1350 
1351 /**
1352  * drm_probe_ddc() - probe DDC presence
1353  * @adapter: I2C adapter to probe
1354  *
1355  * Return: True on success, false on failure.
1356  */
1357 bool
1358 drm_probe_ddc(struct i2c_adapter *adapter)
1359 {
1360         unsigned char out;
1361 
1362         return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1363 }
1364 EXPORT_SYMBOL(drm_probe_ddc);
1365 
1366 /**
1367  * drm_get_edid - get EDID data, if available
1368  * @connector: connector we're probing
1369  * @adapter: I2C adapter to use for DDC
1370  *
1371  * Poke the given I2C channel to grab EDID data if possible.  If found,
1372  * attach it to the connector.
1373  *
1374  * Return: Pointer to valid EDID or NULL if we couldn't find any.
1375  */
1376 struct edid *drm_get_edid(struct drm_connector *connector,
1377                           struct i2c_adapter *adapter)
1378 {
1379         struct edid *edid;
1380 
1381         if (!drm_probe_ddc(adapter))
1382                 return NULL;
1383 
1384         edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter);
1385         if (edid)
1386                 drm_get_displayid(connector, edid);
1387         return edid;
1388 }
1389 EXPORT_SYMBOL(drm_get_edid);
1390 
1391 /**
1392  * drm_edid_duplicate - duplicate an EDID and the extensions
1393  * @edid: EDID to duplicate
1394  *
1395  * Return: Pointer to duplicated EDID or NULL on allocation failure.
1396  */
1397 struct edid *drm_edid_duplicate(const struct edid *edid)
1398 {
1399         return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1400 }
1401 EXPORT_SYMBOL(drm_edid_duplicate);
1402 
1403 /*** EDID parsing ***/
1404 
1405 /**
1406  * edid_vendor - match a string against EDID's obfuscated vendor field
1407  * @edid: EDID to match
1408  * @vendor: vendor string
1409  *
1410  * Returns true if @vendor is in @edid, false otherwise
1411  */
1412 static bool edid_vendor(struct edid *edid, char *vendor)
1413 {
1414         char edid_vendor[3];
1415 
1416         edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1417         edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1418                           ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1419         edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1420 
1421         return !strncmp(edid_vendor, vendor, 3);
1422 }
1423 
1424 /**
1425  * edid_get_quirks - return quirk flags for a given EDID
1426  * @edid: EDID to process
1427  *
1428  * This tells subsequent routines what fixes they need to apply.
1429  */
1430 static u32 edid_get_quirks(struct edid *edid)
1431 {
1432         struct edid_quirk *quirk;
1433         int i;
1434 
1435         for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1436                 quirk = &edid_quirk_list[i];
1437 
1438                 if (edid_vendor(edid, quirk->vendor) &&
1439                     (EDID_PRODUCT_ID(edid) == quirk->product_id))
1440                         return quirk->quirks;
1441         }
1442 
1443         return 0;
1444 }
1445 
1446 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1447 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1448 
1449 /**
1450  * edid_fixup_preferred - set preferred modes based on quirk list
1451  * @connector: has mode list to fix up
1452  * @quirks: quirks list
1453  *
1454  * Walk the mode list for @connector, clearing the preferred status
1455  * on existing modes and setting it anew for the right mode ala @quirks.
1456  */
1457 static void edid_fixup_preferred(struct drm_connector *connector,
1458                                  u32 quirks)
1459 {
1460         struct drm_display_mode *t, *cur_mode, *preferred_mode;
1461         int target_refresh = 0;
1462         int cur_vrefresh, preferred_vrefresh;
1463 
1464         if (list_empty(&connector->probed_modes))
1465                 return;
1466 
1467         if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1468                 target_refresh = 60;
1469         if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1470                 target_refresh = 75;
1471 
1472         preferred_mode = list_first_entry(&connector->probed_modes,
1473                                           struct drm_display_mode, head);
1474 
1475         list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1476                 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1477 
1478                 if (cur_mode == preferred_mode)
1479                         continue;
1480 
1481                 /* Largest mode is preferred */
1482                 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1483                         preferred_mode = cur_mode;
1484 
1485                 cur_vrefresh = cur_mode->vrefresh ?
1486                         cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
1487                 preferred_vrefresh = preferred_mode->vrefresh ?
1488                         preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
1489                 /* At a given size, try to get closest to target refresh */
1490                 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1491                     MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
1492                     MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
1493                         preferred_mode = cur_mode;
1494                 }
1495         }
1496 
1497         preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1498 }
1499 
1500 static bool
1501 mode_is_rb(const struct drm_display_mode *mode)
1502 {
1503         return (mode->htotal - mode->hdisplay == 160) &&
1504                (mode->hsync_end - mode->hdisplay == 80) &&
1505                (mode->hsync_end - mode->hsync_start == 32) &&
1506                (mode->vsync_start - mode->vdisplay == 3);
1507 }
1508 
1509 /*
1510  * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1511  * @dev: Device to duplicate against
1512  * @hsize: Mode width
1513  * @vsize: Mode height
1514  * @fresh: Mode refresh rate
1515  * @rb: Mode reduced-blanking-ness
1516  *
1517  * Walk the DMT mode list looking for a match for the given parameters.
1518  *
1519  * Return: A newly allocated copy of the mode, or NULL if not found.
1520  */
1521 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1522                                            int hsize, int vsize, int fresh,
1523                                            bool rb)
1524 {
1525         int i;
1526 
1527         for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1528                 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1529                 if (hsize != ptr->hdisplay)
1530                         continue;
1531                 if (vsize != ptr->vdisplay)
1532                         continue;
1533                 if (fresh != drm_mode_vrefresh(ptr))
1534                         continue;
1535                 if (rb != mode_is_rb(ptr))
1536                         continue;
1537 
1538                 return drm_mode_duplicate(dev, ptr);
1539         }
1540 
1541         return NULL;
1542 }
1543 EXPORT_SYMBOL(drm_mode_find_dmt);
1544 
1545 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1546 
1547 static void
1548 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1549 {
1550         int i, n = 0;
1551         u8 d = ext[0x02];
1552         u8 *det_base = ext + d;
1553 
1554         n = (127 - d) / 18;
1555         for (i = 0; i < n; i++)
1556                 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1557 }
1558 
1559 static void
1560 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1561 {
1562         unsigned int i, n = min((int)ext[0x02], 6);
1563         u8 *det_base = ext + 5;
1564 
1565         if (ext[0x01] != 1)
1566                 return; /* unknown version */
1567 
1568         for (i = 0; i < n; i++)
1569                 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1570 }
1571 
1572 static void
1573 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1574 {
1575         int i;
1576         struct edid *edid = (struct edid *)raw_edid;
1577 
1578         if (edid == NULL)
1579                 return;
1580 
1581         for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1582                 cb(&(edid->detailed_timings[i]), closure);
1583 
1584         for (i = 1; i <= raw_edid[0x7e]; i++) {
1585                 u8 *ext = raw_edid + (i * EDID_LENGTH);
1586                 switch (*ext) {
1587                 case CEA_EXT:
1588                         cea_for_each_detailed_block(ext, cb, closure);
1589                         break;
1590                 case VTB_EXT:
1591                         vtb_for_each_detailed_block(ext, cb, closure);
1592                         break;
1593                 default:
1594                         break;
1595                 }
1596         }
1597 }
1598 
1599 static void
1600 is_rb(struct detailed_timing *t, void *data)
1601 {
1602         u8 *r = (u8 *)t;
1603         if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1604                 if (r[15] & 0x10)
1605                         *(bool *)data = true;
1606 }
1607 
1608 /* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
1609 static bool
1610 drm_monitor_supports_rb(struct edid *edid)
1611 {
1612         if (edid->revision >= 4) {
1613                 bool ret = false;
1614                 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1615                 return ret;
1616         }
1617 
1618         return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1619 }
1620 
1621 static void
1622 find_gtf2(struct detailed_timing *t, void *data)
1623 {
1624         u8 *r = (u8 *)t;
1625         if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1626                 *(u8 **)data = r;
1627 }
1628 
1629 /* Secondary GTF curve kicks in above some break frequency */
1630 static int
1631 drm_gtf2_hbreak(struct edid *edid)
1632 {
1633         u8 *r = NULL;
1634         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1635         return r ? (r[12] * 2) : 0;
1636 }
1637 
1638 static int
1639 drm_gtf2_2c(struct edid *edid)
1640 {
1641         u8 *r = NULL;
1642         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1643         return r ? r[13] : 0;
1644 }
1645 
1646 static int
1647 drm_gtf2_m(struct edid *edid)
1648 {
1649         u8 *r = NULL;
1650         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1651         return r ? (r[15] << 8) + r[14] : 0;
1652 }
1653 
1654 static int
1655 drm_gtf2_k(struct edid *edid)
1656 {
1657         u8 *r = NULL;
1658         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1659         return r ? r[16] : 0;
1660 }
1661 
1662 static int
1663 drm_gtf2_2j(struct edid *edid)
1664 {
1665         u8 *r = NULL;
1666         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1667         return r ? r[17] : 0;
1668 }
1669 
1670 /**
1671  * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1672  * @edid: EDID block to scan
1673  */
1674 static int standard_timing_level(struct edid *edid)
1675 {
1676         if (edid->revision >= 2) {
1677                 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1678                         return LEVEL_CVT;
1679                 if (drm_gtf2_hbreak(edid))
1680                         return LEVEL_GTF2;
1681                 return LEVEL_GTF;
1682         }
1683         return LEVEL_DMT;
1684 }
1685 
1686 /*
1687  * 0 is reserved.  The spec says 0x01 fill for unused timings.  Some old
1688  * monitors fill with ascii space (0x20) instead.
1689  */
1690 static int
1691 bad_std_timing(u8 a, u8 b)
1692 {
1693         return (a == 0x00 && b == 0x00) ||
1694                (a == 0x01 && b == 0x01) ||
1695                (a == 0x20 && b == 0x20);
1696 }
1697 
1698 /**
1699  * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1700  * @connector: connector of for the EDID block
1701  * @edid: EDID block to scan
1702  * @t: standard timing params
1703  *
1704  * Take the standard timing params (in this case width, aspect, and refresh)
1705  * and convert them into a real mode using CVT/GTF/DMT.
1706  */
1707 static struct drm_display_mode *
1708 drm_mode_std(struct drm_connector *connector, struct edid *edid,
1709              struct std_timing *t)
1710 {
1711         struct drm_device *dev = connector->dev;
1712         struct drm_display_mode *m, *mode = NULL;
1713         int hsize, vsize;
1714         int vrefresh_rate;
1715         unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1716                 >> EDID_TIMING_ASPECT_SHIFT;
1717         unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1718                 >> EDID_TIMING_VFREQ_SHIFT;
1719         int timing_level = standard_timing_level(edid);
1720 
1721         if (bad_std_timing(t->hsize, t->vfreq_aspect))
1722                 return NULL;
1723 
1724         /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1725         hsize = t->hsize * 8 + 248;
1726         /* vrefresh_rate = vfreq + 60 */
1727         vrefresh_rate = vfreq + 60;
1728         /* the vdisplay is calculated based on the aspect ratio */
1729         if (aspect_ratio == 0) {
1730                 if (edid->revision < 3)
1731                         vsize = hsize;
1732                 else
1733                         vsize = (hsize * 10) / 16;
1734         } else if (aspect_ratio == 1)
1735                 vsize = (hsize * 3) / 4;
1736         else if (aspect_ratio == 2)
1737                 vsize = (hsize * 4) / 5;
1738         else
1739                 vsize = (hsize * 9) / 16;
1740 
1741         /* HDTV hack, part 1 */
1742         if (vrefresh_rate == 60 &&
1743             ((hsize == 1360 && vsize == 765) ||
1744              (hsize == 1368 && vsize == 769))) {
1745                 hsize = 1366;
1746                 vsize = 768;
1747         }
1748 
1749         /*
1750          * If this connector already has a mode for this size and refresh
1751          * rate (because it came from detailed or CVT info), use that
1752          * instead.  This way we don't have to guess at interlace or
1753          * reduced blanking.
1754          */
1755         list_for_each_entry(m, &connector->probed_modes, head)
1756                 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1757                     drm_mode_vrefresh(m) == vrefresh_rate)
1758                         return NULL;
1759 
1760         /* HDTV hack, part 2 */
1761         if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1762                 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1763                                     false);
1764                 mode->hdisplay = 1366;
1765                 mode->hsync_start = mode->hsync_start - 1;
1766                 mode->hsync_end = mode->hsync_end - 1;
1767                 return mode;
1768         }
1769 
1770         /* check whether it can be found in default mode table */
1771         if (drm_monitor_supports_rb(edid)) {
1772                 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1773                                          true);
1774                 if (mode)
1775                         return mode;
1776         }
1777         mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1778         if (mode)
1779                 return mode;
1780 
1781         /* okay, generate it */
1782         switch (timing_level) {
1783         case LEVEL_DMT:
1784                 break;
1785         case LEVEL_GTF:
1786                 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1787                 break;
1788         case LEVEL_GTF2:
1789                 /*
1790                  * This is potentially wrong if there's ever a monitor with
1791                  * more than one ranges section, each claiming a different
1792                  * secondary GTF curve.  Please don't do that.
1793                  */
1794                 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1795                 if (!mode)
1796                         return NULL;
1797                 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1798                         drm_mode_destroy(dev, mode);
1799                         mode = drm_gtf_mode_complex(dev, hsize, vsize,
1800                                                     vrefresh_rate, 0, 0,
1801                                                     drm_gtf2_m(edid),
1802                                                     drm_gtf2_2c(edid),
1803                                                     drm_gtf2_k(edid),
1804                                                     drm_gtf2_2j(edid));
1805                 }
1806                 break;
1807         case LEVEL_CVT:
1808                 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1809                                     false);
1810                 break;
1811         }
1812         return mode;
1813 }
1814 
1815 /*
1816  * EDID is delightfully ambiguous about how interlaced modes are to be
1817  * encoded.  Our internal representation is of frame height, but some
1818  * HDTV detailed timings are encoded as field height.
1819  *
1820  * The format list here is from CEA, in frame size.  Technically we
1821  * should be checking refresh rate too.  Whatever.
1822  */
1823 static void
1824 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1825                             struct detailed_pixel_timing *pt)
1826 {
1827         int i;
1828         static const struct {
1829                 int w, h;
1830         } cea_interlaced[] = {
1831                 { 1920, 1080 },
1832                 {  720,  480 },
1833                 { 1440,  480 },
1834                 { 2880,  480 },
1835                 {  720,  576 },
1836                 { 1440,  576 },
1837                 { 2880,  576 },
1838         };
1839 
1840         if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1841                 return;
1842 
1843         for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1844                 if ((mode->hdisplay == cea_interlaced[i].w) &&
1845                     (mode->vdisplay == cea_interlaced[i].h / 2)) {
1846                         mode->vdisplay *= 2;
1847                         mode->vsync_start *= 2;
1848                         mode->vsync_end *= 2;
1849                         mode->vtotal *= 2;
1850                         mode->vtotal |= 1;
1851                 }
1852         }
1853 
1854         mode->flags |= DRM_MODE_FLAG_INTERLACE;
1855 }
1856 
1857 /**
1858  * drm_mode_detailed - create a new mode from an EDID detailed timing section
1859  * @dev: DRM device (needed to create new mode)
1860  * @edid: EDID block
1861  * @timing: EDID detailed timing info
1862  * @quirks: quirks to apply
1863  *
1864  * An EDID detailed timing block contains enough info for us to create and
1865  * return a new struct drm_display_mode.
1866  */
1867 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1868                                                   struct edid *edid,
1869                                                   struct detailed_timing *timing,
1870                                                   u32 quirks)
1871 {
1872         struct drm_display_mode *mode;
1873         struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1874         unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1875         unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1876         unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1877         unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1878         unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1879         unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1880         unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
1881         unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1882 
1883         /* ignore tiny modes */
1884         if (hactive < 64 || vactive < 64)
1885                 return NULL;
1886 
1887         if (pt->misc & DRM_EDID_PT_STEREO) {
1888                 DRM_DEBUG_KMS("stereo mode not supported\n");
1889                 return NULL;
1890         }
1891         if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1892                 DRM_DEBUG_KMS("composite sync not supported\n");
1893         }
1894 
1895         /* it is incorrect if hsync/vsync width is zero */
1896         if (!hsync_pulse_width || !vsync_pulse_width) {
1897                 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1898                                 "Wrong Hsync/Vsync pulse width\n");
1899                 return NULL;
1900         }
1901 
1902         if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1903                 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1904                 if (!mode)
1905                         return NULL;
1906 
1907                 goto set_size;
1908         }
1909 
1910         mode = drm_mode_create(dev);
1911         if (!mode)
1912                 return NULL;
1913 
1914         if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1915                 timing->pixel_clock = cpu_to_le16(1088);
1916 
1917         mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1918 
1919         mode->hdisplay = hactive;
1920         mode->hsync_start = mode->hdisplay + hsync_offset;
1921         mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1922         mode->htotal = mode->hdisplay + hblank;
1923 
1924         mode->vdisplay = vactive;
1925         mode->vsync_start = mode->vdisplay + vsync_offset;
1926         mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1927         mode->vtotal = mode->vdisplay + vblank;
1928 
1929         /* Some EDIDs have bogus h/vtotal values */
1930         if (mode->hsync_end > mode->htotal)
1931                 mode->htotal = mode->hsync_end + 1;
1932         if (mode->vsync_end > mode->vtotal)
1933                 mode->vtotal = mode->vsync_end + 1;
1934 
1935         drm_mode_do_interlace_quirk(mode, pt);
1936 
1937         if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1938                 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1939         }
1940 
1941         mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1942                 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1943         mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1944                 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1945 
1946 set_size:
1947         mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1948         mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1949 
1950         if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1951                 mode->width_mm *= 10;
1952                 mode->height_mm *= 10;
1953         }
1954 
1955         if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1956                 mode->width_mm = edid->width_cm * 10;
1957                 mode->height_mm = edid->height_cm * 10;
1958         }
1959 
1960         mode->type = DRM_MODE_TYPE_DRIVER;
1961         mode->vrefresh = drm_mode_vrefresh(mode);
1962         drm_mode_set_name(mode);
1963 
1964         return mode;
1965 }
1966 
1967 static bool
1968 mode_in_hsync_range(const struct drm_display_mode *mode,
1969                     struct edid *edid, u8 *t)
1970 {
1971         int hsync, hmin, hmax;
1972 
1973         hmin = t[7];
1974         if (edid->revision >= 4)
1975             hmin += ((t[4] & 0x04) ? 255 : 0);
1976         hmax = t[8];
1977         if (edid->revision >= 4)
1978             hmax += ((t[4] & 0x08) ? 255 : 0);
1979         hsync = drm_mode_hsync(mode);
1980 
1981         return (hsync <= hmax && hsync >= hmin);
1982 }
1983 
1984 static bool
1985 mode_in_vsync_range(const struct drm_display_mode *mode,
1986                     struct edid *edid, u8 *t)
1987 {
1988         int vsync, vmin, vmax;
1989 
1990         vmin = t[5];
1991         if (edid->revision >= 4)
1992             vmin += ((t[4] & 0x01) ? 255 : 0);
1993         vmax = t[6];
1994         if (edid->revision >= 4)
1995             vmax += ((t[4] & 0x02) ? 255 : 0);
1996         vsync = drm_mode_vrefresh(mode);
1997 
1998         return (vsync <= vmax && vsync >= vmin);
1999 }
2000 
2001 static u32
2002 range_pixel_clock(struct edid *edid, u8 *t)
2003 {
2004         /* unspecified */
2005         if (t[9] == 0 || t[9] == 255)
2006                 return 0;
2007 
2008         /* 1.4 with CVT support gives us real precision, yay */
2009         if (edid->revision >= 4 && t[10] == 0x04)
2010                 return (t[9] * 10000) - ((t[12] >> 2) * 250);
2011 
2012         /* 1.3 is pathetic, so fuzz up a bit */
2013         return t[9] * 10000 + 5001;
2014 }
2015 
2016 static bool
2017 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
2018               struct detailed_timing *timing)
2019 {
2020         u32 max_clock;
2021         u8 *t = (u8 *)timing;
2022 
2023         if (!mode_in_hsync_range(mode, edid, t))
2024                 return false;
2025 
2026         if (!mode_in_vsync_range(mode, edid, t))
2027                 return false;
2028 
2029         if ((max_clock = range_pixel_clock(edid, t)))
2030                 if (mode->clock > max_clock)
2031                         return false;
2032 
2033         /* 1.4 max horizontal check */
2034         if (edid->revision >= 4 && t[10] == 0x04)
2035                 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
2036                         return false;
2037 
2038         if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
2039                 return false;
2040 
2041         return true;
2042 }
2043 
2044 static bool valid_inferred_mode(const struct drm_connector *connector,
2045                                 const struct drm_display_mode *mode)
2046 {
2047         const struct drm_display_mode *m;
2048         bool ok = false;
2049 
2050         list_for_each_entry(m, &connector->probed_modes, head) {
2051                 if (mode->hdisplay == m->hdisplay &&
2052                     mode->vdisplay == m->vdisplay &&
2053                     drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
2054                         return false; /* duplicated */
2055                 if (mode->hdisplay <= m->hdisplay &&
2056                     mode->vdisplay <= m->vdisplay)
2057                         ok = true;
2058         }
2059         return ok;
2060 }
2061 
2062 static int
2063 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2064                         struct detailed_timing *timing)
2065 {
2066         int i, modes = 0;
2067         struct drm_display_mode *newmode;
2068         struct drm_device *dev = connector->dev;
2069 
2070         for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
2071                 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
2072                     valid_inferred_mode(connector, drm_dmt_modes + i)) {
2073                         newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
2074                         if (newmode) {
2075                                 drm_mode_probed_add(connector, newmode);
2076                                 modes++;
2077                         }
2078                 }
2079         }
2080 
2081         return modes;
2082 }
2083 
2084 /* fix up 1366x768 mode from 1368x768;
2085  * GFT/CVT can't express 1366 width which isn't dividable by 8
2086  */
2087 static void fixup_mode_1366x768(struct drm_display_mode *mode)
2088 {
2089         if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
2090                 mode->hdisplay = 1366;
2091                 mode->hsync_start--;
2092                 mode->hsync_end--;
2093                 drm_mode_set_name(mode);
2094         }
2095 }
2096 
2097 static int
2098 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
2099                         struct detailed_timing *timing)
2100 {
2101         int i, modes = 0;
2102         struct drm_display_mode *newmode;
2103         struct drm_device *dev = connector->dev;
2104 
2105         for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2106                 const struct minimode *m = &extra_modes[i];
2107                 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
2108                 if (!newmode)
2109                         return modes;
2110 
2111                 fixup_mode_1366x768(newmode);
2112                 if (!mode_in_range(newmode, edid, timing) ||
2113                     !valid_inferred_mode(connector, newmode)) {
2114                         drm_mode_destroy(dev, newmode);
2115                         continue;
2116                 }
2117 
2118                 drm_mode_probed_add(connector, newmode);
2119                 modes++;
2120         }
2121 
2122         return modes;
2123 }
2124 
2125 static int
2126 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2127                         struct detailed_timing *timing)
2128 {
2129         int i, modes = 0;
2130         struct drm_display_mode *newmode;
2131         struct drm_device *dev = connector->dev;
2132         bool rb = drm_monitor_supports_rb(edid);
2133 
2134         for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2135                 const struct minimode *m = &extra_modes[i];
2136                 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
2137                 if (!newmode)
2138                         return modes;
2139 
2140                 fixup_mode_1366x768(newmode);
2141                 if (!mode_in_range(newmode, edid, timing) ||
2142                     !valid_inferred_mode(connector, newmode)) {
2143                         drm_mode_destroy(dev, newmode);
2144                         continue;
2145                 }
2146 
2147                 drm_mode_probed_add(connector, newmode);
2148                 modes++;
2149         }
2150 
2151         return modes;
2152 }
2153 
2154 static void
2155 do_inferred_modes(struct detailed_timing *timing, void *c)
2156 {
2157         struct detailed_mode_closure *closure = c;
2158         struct detailed_non_pixel *data = &timing->data.other_data;
2159         struct detailed_data_monitor_range *range = &data->data.range;
2160 
2161         if (data->type != EDID_DETAIL_MONITOR_RANGE)
2162                 return;
2163 
2164         closure->modes += drm_dmt_modes_for_range(closure->connector,
2165                                                   closure->edid,
2166                                                   timing);
2167         
2168         if (!version_greater(closure->edid, 1, 1))
2169                 return; /* GTF not defined yet */
2170 
2171         switch (range->flags) {
2172         case 0x02: /* secondary gtf, XXX could do more */
2173         case 0x00: /* default gtf */
2174                 closure->modes += drm_gtf_modes_for_range(closure->connector,
2175                                                           closure->edid,
2176                                                           timing);
2177                 break;
2178         case 0x04: /* cvt, only in 1.4+ */
2179                 if (!version_greater(closure->edid, 1, 3))
2180                         break;
2181 
2182                 closure->modes += drm_cvt_modes_for_range(closure->connector,
2183                                                           closure->edid,
2184                                                           timing);
2185                 break;
2186         case 0x01: /* just the ranges, no formula */
2187         default:
2188                 break;
2189         }
2190 }
2191 
2192 static int
2193 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2194 {
2195         struct detailed_mode_closure closure = {
2196                 .connector = connector,
2197                 .edid = edid,
2198         };
2199 
2200         if (version_greater(edid, 1, 0))
2201                 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2202                                             &closure);
2203 
2204         return closure.modes;
2205 }
2206 
2207 static int
2208 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2209 {
2210         int i, j, m, modes = 0;
2211         struct drm_display_mode *mode;
2212         u8 *est = ((u8 *)timing) + 5;
2213 
2214         for (i = 0; i < 6; i++) {
2215                 for (j = 7; j >= 0; j--) {
2216                         m = (i * 8) + (7 - j);
2217                         if (m >= ARRAY_SIZE(est3_modes))
2218                                 break;
2219                         if (est[i] & (1 << j)) {
2220                                 mode = drm_mode_find_dmt(connector->dev,
2221                                                          est3_modes[m].w,
2222                                                          est3_modes[m].h,
2223                                                          est3_modes[m].r,
2224                                                          est3_modes[m].rb);
2225                                 if (mode) {
2226                                         drm_mode_probed_add(connector, mode);
2227                                         modes++;
2228                                 }
2229                         }
2230                 }
2231         }
2232 
2233         return modes;
2234 }
2235 
2236 static void
2237 do_established_modes(struct detailed_timing *timing, void *c)
2238 {
2239         struct detailed_mode_closure *closure = c;
2240         struct detailed_non_pixel *data = &timing->data.other_data;
2241 
2242         if (data->type == EDID_DETAIL_EST_TIMINGS)
2243                 closure->modes += drm_est3_modes(closure->connector, timing);
2244 }
2245 
2246 /**
2247  * add_established_modes - get est. modes from EDID and add them
2248  * @connector: connector to add mode(s) to
2249  * @edid: EDID block to scan
2250  *
2251  * Each EDID block contains a bitmap of the supported "established modes" list
2252  * (defined above).  Tease them out and add them to the global modes list.
2253  */
2254 static int
2255 add_established_modes(struct drm_connector *connector, struct edid *edid)
2256 {
2257         struct drm_device *dev = connector->dev;
2258         unsigned long est_bits = edid->established_timings.t1 |
2259                 (edid->established_timings.t2 << 8) |
2260                 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2261         int i, modes = 0;
2262         struct detailed_mode_closure closure = {
2263                 .connector = connector,
2264                 .edid = edid,
2265         };
2266 
2267         for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2268                 if (est_bits & (1<<i)) {
2269                         struct drm_display_mode *newmode;
2270                         newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2271                         if (newmode) {
2272                                 drm_mode_probed_add(connector, newmode);
2273                                 modes++;
2274                         }
2275                 }
2276         }
2277 
2278         if (version_greater(edid, 1, 0))
2279                     drm_for_each_detailed_block((u8 *)edid,
2280                                                 do_established_modes, &closure);
2281 
2282         return modes + closure.modes;
2283 }
2284 
2285 static void
2286 do_standard_modes(struct detailed_timing *timing, void *c)
2287 {
2288         struct detailed_mode_closure *closure = c;
2289         struct detailed_non_pixel *data = &timing->data.other_data;
2290         struct drm_connector *connector = closure->connector;
2291         struct edid *edid = closure->edid;
2292 
2293         if (data->type == EDID_DETAIL_STD_MODES) {
2294                 int i;
2295                 for (i = 0; i < 6; i++) {
2296                         struct std_timing *std;
2297                         struct drm_display_mode *newmode;
2298 
2299                         std = &data->data.timings[i];
2300                         newmode = drm_mode_std(connector, edid, std);
2301                         if (newmode) {
2302                                 drm_mode_probed_add(connector, newmode);
2303                                 closure->modes++;
2304                         }
2305                 }
2306         }
2307 }
2308 
2309 /**
2310  * add_standard_modes - get std. modes from EDID and add them
2311  * @connector: connector to add mode(s) to
2312  * @edid: EDID block to scan
2313  *
2314  * Standard modes can be calculated using the appropriate standard (DMT,
2315  * GTF or CVT. Grab them from @edid and add them to the list.
2316  */
2317 static int
2318 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2319 {
2320         int i, modes = 0;
2321         struct detailed_mode_closure closure = {
2322                 .connector = connector,
2323                 .edid = edid,
2324         };
2325 
2326         for (i = 0; i < EDID_STD_TIMINGS; i++) {
2327                 struct drm_display_mode *newmode;
2328 
2329                 newmode = drm_mode_std(connector, edid,
2330                                        &edid->standard_timings[i]);
2331                 if (newmode) {
2332                         drm_mode_probed_add(connector, newmode);
2333                         modes++;
2334                 }
2335         }
2336 
2337         if (version_greater(edid, 1, 0))
2338                 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2339                                             &closure);
2340 
2341         /* XXX should also look for standard codes in VTB blocks */
2342 
2343         return modes + closure.modes;
2344 }
2345 
2346 static int drm_cvt_modes(struct drm_connector *connector,
2347                          struct detailed_timing *timing)
2348 {
2349         int i, j, modes = 0;
2350         struct drm_display_mode *newmode;
2351         struct drm_device *dev = connector->dev;
2352         struct cvt_timing *cvt;
2353         const int rates[] = { 60, 85, 75, 60, 50 };
2354         const u8 empty[3] = { 0, 0, 0 };
2355 
2356         for (i = 0; i < 4; i++) {
2357                 int uninitialized_var(width), height;
2358                 cvt = &(timing->data.other_data.data.cvt[i]);
2359 
2360                 if (!memcmp(cvt->code, empty, 3))
2361                         continue;
2362 
2363                 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2364                 switch (cvt->code[1] & 0x0c) {
2365                 case 0x00:
2366                         width = height * 4 / 3;
2367                         break;
2368                 case 0x04:
2369                         width = height * 16 / 9;
2370                         break;
2371                 case 0x08:
2372                         width = height * 16 / 10;
2373                         break;
2374                 case 0x0c:
2375                         width = height * 15 / 9;
2376                         break;
2377                 }
2378 
2379                 for (j = 1; j < 5; j++) {
2380                         if (cvt->code[2] & (1 << j)) {
2381                                 newmode = drm_cvt_mode(dev, width, height,
2382                                                        rates[j], j == 0,
2383                                                        false, false);
2384                                 if (newmode) {
2385                                         drm_mode_probed_add(connector, newmode);
2386                                         modes++;
2387                                 }
2388                         }
2389                 }
2390         }
2391 
2392         return modes;
2393 }
2394 
2395 static void
2396 do_cvt_mode(struct detailed_timing *timing, void *c)
2397 {
2398         struct detailed_mode_closure *closure = c;
2399         struct detailed_non_pixel *data = &timing->data.other_data;
2400 
2401         if (data->type == EDID_DETAIL_CVT_3BYTE)
2402                 closure->modes += drm_cvt_modes(closure->connector, timing);
2403 }
2404 
2405 static int
2406 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2407 {       
2408         struct detailed_mode_closure closure = {
2409                 .connector = connector,
2410                 .edid = edid,
2411         };
2412 
2413         if (version_greater(edid, 1, 2))
2414                 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2415 
2416         /* XXX should also look for CVT codes in VTB blocks */
2417 
2418         return closure.modes;
2419 }
2420 
2421 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode);
2422 
2423 static void
2424 do_detailed_mode(struct detailed_timing *timing, void *c)
2425 {
2426         struct detailed_mode_closure *closure = c;
2427         struct drm_display_mode *newmode;
2428 
2429         if (timing->pixel_clock) {
2430                 newmode = drm_mode_detailed(closure->connector->dev,
2431                                             closure->edid, timing,
2432                                             closure->quirks);
2433                 if (!newmode)
2434                         return;
2435 
2436                 if (closure->preferred)
2437                         newmode->type |= DRM_MODE_TYPE_PREFERRED;
2438 
2439                 /*
2440                  * Detailed modes are limited to 10kHz pixel clock resolution,
2441                  * so fix up anything that looks like CEA/HDMI mode, but the clock
2442                  * is just slightly off.
2443                  */
2444                 fixup_detailed_cea_mode_clock(newmode);
2445 
2446                 drm_mode_probed_add(closure->connector, newmode);
2447                 closure->modes++;
2448                 closure->preferred = 0;
2449         }
2450 }
2451 
2452 /*
2453  * add_detailed_modes - Add modes from detailed timings
2454  * @connector: attached connector
2455  * @edid: EDID block to scan
2456  * @quirks: quirks to apply
2457  */
2458 static int
2459 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2460                    u32 quirks)
2461 {
2462         struct detailed_mode_closure closure = {
2463                 .connector = connector,
2464                 .edid = edid,
2465                 .preferred = 1,
2466                 .quirks = quirks,
2467         };
2468 
2469         if (closure.preferred && !version_greater(edid, 1, 3))
2470                 closure.preferred =
2471                     (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2472 
2473         drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2474 
2475         return closure.modes;
2476 }
2477 
2478 #define AUDIO_BLOCK     0x01
2479 #define VIDEO_BLOCK     0x02
2480 #define VENDOR_BLOCK    0x03
2481 #define SPEAKER_BLOCK   0x04
2482 #define VIDEO_CAPABILITY_BLOCK  0x07
2483 #define EDID_BASIC_AUDIO        (1 << 6)
2484 #define EDID_CEA_YCRCB444       (1 << 5)
2485 #define EDID_CEA_YCRCB422       (1 << 4)
2486 #define EDID_CEA_VCDB_QS        (1 << 6)
2487 
2488 /*
2489  * Search EDID for CEA extension block.
2490  */
2491 static u8 *drm_find_edid_extension(struct edid *edid, int ext_id)
2492 {
2493         u8 *edid_ext = NULL;
2494         int i;
2495 
2496         /* No EDID or EDID extensions */
2497         if (edid == NULL || edid->extensions == 0)
2498                 return NULL;
2499 
2500         /* Find CEA extension */
2501         for (i = 0; i < edid->extensions; i++) {
2502                 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2503                 if (edid_ext[0] == ext_id)
2504                         break;
2505         }
2506 
2507         if (i == edid->extensions)
2508                 return NULL;
2509 
2510         return edid_ext;
2511 }
2512 
2513 static u8 *drm_find_cea_extension(struct edid *edid)
2514 {
2515         return drm_find_edid_extension(edid, CEA_EXT);
2516 }
2517 
2518 static u8 *drm_find_displayid_extension(struct edid *edid)
2519 {
2520         return drm_find_edid_extension(edid, DISPLAYID_EXT);
2521 }
2522 
2523 /*
2524  * Calculate the alternate clock for the CEA mode
2525  * (60Hz vs. 59.94Hz etc.)
2526  */
2527 static unsigned int
2528 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2529 {
2530         unsigned int clock = cea_mode->clock;
2531 
2532         if (cea_mode->vrefresh % 6 != 0)
2533                 return clock;
2534 
2535         /*
2536          * edid_cea_modes contains the 59.94Hz
2537          * variant for 240 and 480 line modes,
2538          * and the 60Hz variant otherwise.
2539          */
2540         if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
2541                 clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);
2542         else
2543                 clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);
2544 
2545         return clock;
2546 }
2547 
2548 /**
2549  * drm_match_cea_mode - look for a CEA mode matching given mode
2550  * @to_match: display mode
2551  *
2552  * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2553  * mode.
2554  */
2555 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2556 {
2557         u8 mode;
2558 
2559         if (!to_match->clock)
2560                 return 0;
2561 
2562         for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
2563                 const struct drm_display_mode *cea_mode = &edid_cea_modes[mode];
2564                 unsigned int clock1, clock2;
2565 
2566                 /* Check both 60Hz and 59.94Hz */
2567                 clock1 = cea_mode->clock;
2568                 clock2 = cea_mode_alternate_clock(cea_mode);
2569 
2570                 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2571                      KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2572                     drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode))
2573                         return mode + 1;
2574         }
2575         return 0;
2576 }
2577 EXPORT_SYMBOL(drm_match_cea_mode);
2578 
2579 /**
2580  * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
2581  * the input VIC from the CEA mode list
2582  * @video_code: ID given to each of the CEA modes
2583  *
2584  * Returns picture aspect ratio
2585  */
2586 enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
2587 {
2588         /* return picture aspect ratio for video_code - 1 to access the
2589          * right array element
2590         */
2591         return edid_cea_modes[video_code-1].picture_aspect_ratio;
2592 }
2593 EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
2594 
2595 /*
2596  * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2597  * specific block).
2598  *
2599  * It's almost like cea_mode_alternate_clock(), we just need to add an
2600  * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2601  * one.
2602  */
2603 static unsigned int
2604 hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
2605 {
2606         if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
2607                 return hdmi_mode->clock;
2608 
2609         return cea_mode_alternate_clock(hdmi_mode);
2610 }
2611 
2612 /*
2613  * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2614  * @to_match: display mode
2615  *
2616  * An HDMI mode is one defined in the HDMI vendor specific block.
2617  *
2618  * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2619  */
2620 static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
2621 {
2622         u8 mode;
2623 
2624         if (!to_match->clock)
2625                 return 0;
2626 
2627         for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) {
2628                 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode];
2629                 unsigned int clock1, clock2;
2630 
2631                 /* Make sure to also match alternate clocks */
2632                 clock1 = hdmi_mode->clock;
2633                 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2634 
2635                 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2636                      KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2637                     drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
2638                         return mode + 1;
2639         }
2640         return 0;
2641 }
2642 
2643 static int
2644 add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
2645 {
2646         struct drm_device *dev = connector->dev;
2647         struct drm_display_mode *mode, *tmp;
2648         LIST_HEAD(list);
2649         int modes = 0;
2650 
2651         /* Don't add CEA modes if the CEA extension block is missing */
2652         if (!drm_find_cea_extension(edid))
2653                 return 0;
2654 
2655         /*
2656          * Go through all probed modes and create a new mode
2657          * with the alternate clock for certain CEA modes.
2658          */
2659         list_for_each_entry(mode, &connector->probed_modes, head) {
2660                 const struct drm_display_mode *cea_mode = NULL;
2661                 struct drm_display_mode *newmode;
2662                 u8 mode_idx = drm_match_cea_mode(mode) - 1;
2663                 unsigned int clock1, clock2;
2664 
2665                 if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
2666                         cea_mode = &edid_cea_modes[mode_idx];
2667                         clock2 = cea_mode_alternate_clock(cea_mode);
2668                 } else {
2669                         mode_idx = drm_match_hdmi_mode(mode) - 1;
2670                         if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
2671                                 cea_mode = &edid_4k_modes[mode_idx];
2672                                 clock2 = hdmi_mode_alternate_clock(cea_mode);
2673                         }
2674                 }
2675 
2676                 if (!cea_mode)
2677                         continue;
2678 
2679                 clock1 = cea_mode->clock;
2680 
2681                 if (clock1 == clock2)
2682                         continue;
2683 
2684                 if (mode->clock != clock1 && mode->clock != clock2)
2685                         continue;
2686 
2687                 newmode = drm_mode_duplicate(dev, cea_mode);
2688                 if (!newmode)
2689                         continue;
2690 
2691                 /* Carry over the stereo flags */
2692                 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
2693 
2694                 /*
2695                  * The current mode could be either variant. Make
2696                  * sure to pick the "other" clock for the new mode.
2697                  */
2698                 if (mode->clock != clock1)
2699                         newmode->clock = clock1;
2700                 else
2701                         newmode->clock = clock2;
2702 
2703                 list_add_tail(&newmode->head, &list);
2704         }
2705 
2706         list_for_each_entry_safe(mode, tmp, &list, head) {
2707                 list_del(&mode->head);
2708                 drm_mode_probed_add(connector, mode);
2709                 modes++;
2710         }
2711 
2712         return modes;
2713 }
2714 
2715 static struct drm_display_mode *
2716 drm_display_mode_from_vic_index(struct drm_connector *connector,
2717                                 const u8 *video_db, u8 video_len,
2718                                 u8 video_index)
2719 {
2720         struct drm_device *dev = connector->dev;
2721         struct drm_display_mode *newmode;
2722         u8 cea_mode;
2723 
2724         if (video_db == NULL || video_index >= video_len)
2725                 return NULL;
2726 
2727         /* CEA modes are numbered 1..127 */
2728         cea_mode = (video_db[video_index] & 127) - 1;
2729         if (cea_mode >= ARRAY_SIZE(edid_cea_modes))
2730                 return NULL;
2731 
2732         newmode = drm_mode_duplicate(dev, &edid_cea_modes[cea_mode]);
2733         if (!newmode)
2734                 return NULL;
2735 
2736         newmode->vrefresh = 0;
2737 
2738         return newmode;
2739 }
2740 
2741 static int
2742 do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len)
2743 {
2744         int i, modes = 0;
2745 
2746         for (i = 0; i < len; i++) {
2747                 struct drm_display_mode *mode;
2748                 mode = drm_display_mode_from_vic_index(connector, db, len, i);
2749                 if (mode) {
2750                         drm_mode_probed_add(connector, mode);
2751                         modes++;
2752                 }
2753         }
2754 
2755         return modes;
2756 }
2757 
2758 struct stereo_mandatory_mode {
2759         int width, height, vrefresh;
2760         unsigned int flags;
2761 };
2762 
2763 static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
2764         { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2765         { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
2766         { 1920, 1080, 50,
2767           DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2768         { 1920, 1080, 60,
2769           DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2770         { 1280, 720,  50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2771         { 1280, 720,  50, DRM_MODE_FLAG_3D_FRAME_PACKING },
2772         { 1280, 720,  60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2773         { 1280, 720,  60, DRM_MODE_FLAG_3D_FRAME_PACKING }
2774 };
2775 
2776 static bool
2777 stereo_match_mandatory(const struct drm_display_mode *mode,
2778                        const struct stereo_mandatory_mode *stereo_mode)
2779 {
2780         unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
2781 
2782         return mode->hdisplay == stereo_mode->width &&
2783                mode->vdisplay == stereo_mode->height &&
2784                interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
2785                drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
2786 }
2787 
2788 static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector)
2789 {
2790         struct drm_device *dev = connector->dev;
2791         const struct drm_display_mode *mode;
2792         struct list_head stereo_modes;
2793         int modes = 0, i;
2794 
2795         INIT_LIST_HEAD(&stereo_modes);
2796 
2797         list_for_each_entry(mode, &connector->probed_modes, head) {
2798                 for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
2799                         const struct stereo_mandatory_mode *mandatory;
2800                         struct drm_display_mode *new_mode;
2801 
2802                         if (!stereo_match_mandatory(mode,
2803                                                     &stereo_mandatory_modes[i]))
2804                                 continue;
2805 
2806                         mandatory = &stereo_mandatory_modes[i];
2807                         new_mode = drm_mode_duplicate(dev, mode);
2808                         if (!new_mode)
2809                                 continue;
2810 
2811                         new_mode->flags |= mandatory->flags;
2812                         list_add_tail(&new_mode->head, &stereo_modes);
2813                         modes++;
2814                 }
2815         }
2816 
2817         list_splice_tail(&stereo_modes, &connector->probed_modes);
2818 
2819         return modes;
2820 }
2821 
2822 static int add_hdmi_mode(struct drm_connector *connector, u8 vic)
2823 {
2824         struct drm_device *dev = connector->dev;
2825         struct drm_display_mode *newmode;
2826 
2827         vic--; /* VICs start at 1 */
2828         if (vic >= ARRAY_SIZE(edid_4k_modes)) {
2829                 DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
2830                 return 0;
2831         }
2832 
2833         newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
2834         if (!newmode)
2835                 return 0;
2836 
2837         drm_mode_probed_add(connector, newmode);
2838 
2839         return 1;
2840 }
2841 
2842 static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,
2843                                const u8 *video_db, u8 video_len, u8 video_index)
2844 {
2845         struct drm_display_mode *newmode;
2846         int modes = 0;
2847 
2848         if (structure & (1 << 0)) {
2849                 newmode = drm_display_mode_from_vic_index(connector, video_db,
2850                                                           video_len,
2851                                                           video_index);
2852                 if (newmode) {
2853                         newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING;
2854                         drm_mode_probed_add(connector, newmode);
2855                         modes++;
2856                 }
2857         }
2858         if (structure & (1 << 6)) {
2859                 newmode = drm_display_mode_from_vic_index(connector, video_db,
2860                                                           video_len,
2861                                                           video_index);
2862                 if (newmode) {
2863                         newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
2864                         drm_mode_probed_add(connector, newmode);
2865                         modes++;
2866                 }
2867         }
2868         if (structure & (1 << 8)) {
2869                 newmode = drm_display_mode_from_vic_index(connector, video_db,
2870                                                           video_len,
2871                                                           video_index);
2872                 if (newmode) {
2873                         newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
2874                         drm_mode_probed_add(connector, newmode);
2875                         modes++;
2876                 }
2877         }
2878 
2879         return modes;
2880 }
2881 
2882 /*
2883  * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
2884  * @connector: connector corresponding to the HDMI sink
2885  * @db: start of the CEA vendor specific block
2886  * @len: length of the CEA block payload, ie. one can access up to db[len]
2887  *
2888  * Parses the HDMI VSDB looking for modes to add to @connector. This function
2889  * also adds the stereo 3d modes when applicable.
2890  */
2891 static int
2892 do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len,
2893                    const u8 *video_db, u8 video_len)
2894 {
2895         int modes = 0, offset = 0, i, multi_present = 0, multi_len;
2896         u8 vic_len, hdmi_3d_len = 0;
2897         u16 mask;
2898         u16 structure_all;
2899 
2900         if (len < 8)
2901                 goto out;
2902 
2903         /* no HDMI_Video_Present */
2904         if (!(db[8] & (1 << 5)))
2905                 goto out;
2906 
2907         /* Latency_Fields_Present */
2908         if (db[8] & (1 << 7))
2909                 offset += 2;
2910 
2911         /* I_Latency_Fields_Present */
2912         if (db[8] & (1 << 6))
2913                 offset += 2;
2914 
2915         /* the declared length is not long enough for the 2 first bytes
2916          * of additional video format capabilities */
2917         if (len < (8 + offset + 2))
2918                 goto out;
2919 
2920         /* 3D_Present */
2921         offset++;
2922         if (db[8 + offset] & (1 << 7)) {
2923                 modes += add_hdmi_mandatory_stereo_modes(connector);
2924 
2925                 /* 3D_Multi_present */
2926                 multi_present = (db[8 + offset] & 0x60) >> 5;
2927         }
2928 
2929         offset++;
2930         vic_len = db[8 + offset] >> 5;
2931         hdmi_3d_len = db[8 + offset] & 0x1f;
2932 
2933         for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
2934                 u8 vic;
2935 
2936                 vic = db[9 + offset + i];
2937                 modes += add_hdmi_mode(connector, vic);
2938         }
2939         offset += 1 + vic_len;
2940 
2941         if (multi_present == 1)
2942                 multi_len = 2;
2943         else if (multi_present == 2)
2944                 multi_len = 4;
2945         else
2946                 multi_len = 0;
2947 
2948         if (len < (8 + offset + hdmi_3d_len - 1))
2949                 goto out;
2950 
2951         if (hdmi_3d_len < multi_len)
2952                 goto out;
2953 
2954         if (multi_present == 1 || multi_present == 2) {
2955                 /* 3D_Structure_ALL */
2956                 structure_all = (db[8 + offset] << 8) | db[9 + offset];
2957 
2958                 /* check if 3D_MASK is present */
2959                 if (multi_present == 2)
2960                         mask = (db[10 + offset] << 8) | db[11 + offset];
2961                 else
2962                         mask = 0xffff;
2963 
2964                 for (i = 0; i < 16; i++) {
2965                         if (mask & (1 << i))
2966                                 modes += add_3d_struct_modes(connector,
2967                                                 structure_all,
2968                                                 video_db,
2969                                                 video_len, i);
2970                 }
2971         }
2972 
2973         offset += multi_len;
2974 
2975         for (i = 0; i < (hdmi_3d_len - multi_len); i++) {
2976                 int vic_index;
2977                 struct drm_display_mode *newmode = NULL;
2978                 unsigned int newflag = 0;
2979                 bool detail_present;
2980 
2981                 detail_present = ((db[8 + offset + i] & 0x0f) > 7);
2982 
2983                 if (detail_present && (i + 1 == hdmi_3d_len - multi_len))
2984                         break;
2985 
2986                 /* 2D_VIC_order_X */
2987                 vic_index = db[8 + offset + i] >> 4;
2988 
2989                 /* 3D_Structure_X */
2990                 switch (db[8 + offset + i] & 0x0f) {
2991                 case 0:
2992                         newflag = DRM_MODE_FLAG_3D_FRAME_PACKING;
2993                         break;
2994                 case 6:
2995                         newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
2996                         break;
2997                 case 8:
2998                         /* 3D_Detail_X */
2999                         if ((db[9 + offset + i] >> 4) == 1)
3000                                 newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
3001                         break;
3002                 }
3003 
3004                 if (newflag != 0) {
3005                         newmode = drm_display_mode_from_vic_index(connector,
3006                                                                   video_db,
3007                                                                   video_len,
3008                                                                   vic_index);
3009 
3010                         if (newmode) {
3011                                 newmode->flags |= newflag;
3012                                 drm_mode_probed_add(connector, newmode);
3013                                 modes++;
3014                         }
3015                 }
3016 
3017                 if (detail_present)
3018                         i++;
3019         }
3020 
3021 out:
3022         return modes;
3023 }
3024 
3025 static int
3026 cea_db_payload_len(const u8 *db)
3027 {
3028         return db[0] & 0x1f;
3029 }
3030 
3031 static int
3032 cea_db_tag(const u8 *db)
3033 {
3034         return db[0] >> 5;
3035 }
3036 
3037 static int
3038 cea_revision(const u8 *cea)
3039 {
3040         return cea[1];
3041 }
3042 
3043 static int
3044 cea_db_offsets(const u8 *cea, int *start, int *end)
3045 {
3046         /* Data block offset in CEA extension block */
3047         *start = 4;
3048         *end = cea[2];
3049         if (*end == 0)
3050                 *end = 127;
3051         if (*end < 4 || *end > 127)
3052                 return -ERANGE;
3053         return 0;
3054 }
3055 
3056 static bool cea_db_is_hdmi_vsdb(const u8 *db)
3057 {
3058         int hdmi_id;
3059 
3060         if (cea_db_tag(db) != VENDOR_BLOCK)
3061                 return false;
3062 
3063         if (cea_db_payload_len(db) < 5)
3064                 return false;
3065 
3066         hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
3067 
3068         return hdmi_id == HDMI_IEEE_OUI;
3069 }
3070 
3071 #define for_each_cea_db(cea, i, start, end) \
3072         for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
3073 
3074 static int
3075 add_cea_modes(struct drm_connector *connector, struct edid *edid)
3076 {
3077         const u8 *cea = drm_find_cea_extension(edid);
3078         const u8 *db, *hdmi = NULL, *video = NULL;
3079         u8 dbl, hdmi_len, video_len = 0;
3080         int modes = 0;
3081 
3082         if (cea && cea_revision(cea) >= 3) {
3083                 int i, start, end;
3084 
3085                 if (cea_db_offsets(cea, &start, &end))
3086                         return 0;
3087 
3088                 for_each_cea_db(cea, i, start, end) {
3089                         db = &cea[i];
3090                         dbl = cea_db_payload_len(db);
3091 
3092                         if (cea_db_tag(db) == VIDEO_BLOCK) {
3093                                 video = db + 1;
3094                                 video_len = dbl;
3095                                 modes += do_cea_modes(connector, video, dbl);
3096                         }
3097                         else if (cea_db_is_hdmi_vsdb(db)) {
3098                                 hdmi = db;
3099                                 hdmi_len = dbl;
3100                         }
3101                 }
3102         }
3103 
3104         /*
3105          * We parse the HDMI VSDB after having added the cea modes as we will
3106          * be patching their flags when the sink supports stereo 3D.
3107          */
3108         if (hdmi)
3109                 modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video,
3110                                             video_len);
3111 
3112         return modes;
3113 }
3114 
3115 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
3116 {
3117         const struct drm_display_mode *cea_mode;
3118         int clock1, clock2, clock;
3119         u8 mode_idx;
3120         const char *type;
3121 
3122         mode_idx = drm_match_cea_mode(mode) - 1;
3123         if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
3124                 type = "CEA";
3125                 cea_mode = &edid_cea_modes[mode_idx];
3126                 clock1 = cea_mode->clock;
3127                 clock2 = cea_mode_alternate_clock(cea_mode);
3128         } else {
3129                 mode_idx = drm_match_hdmi_mode(mode) - 1;
3130                 if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
3131                         type = "HDMI";
3132                         cea_mode = &edid_4k_modes[mode_idx];
3133                         clock1 = cea_mode->clock;
3134                         clock2 = hdmi_mode_alternate_clock(cea_mode);
3135                 } else {
3136                         return;
3137                 }
3138         }
3139 
3140         /* pick whichever is closest */
3141         if (abs(mode->clock - clock1) < abs(mode->clock - clock2))
3142                 clock = clock1;
3143         else
3144                 clock = clock2;
3145 
3146         if (mode->clock == clock)
3147                 return;
3148 
3149         DRM_DEBUG("detailed mode matches %s VIC %d, adjusting clock %d -> %d\n",
3150                   type, mode_idx + 1, mode->clock, clock);
3151         mode->clock = clock;
3152 }
3153 
3154 static void
3155 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
3156 {
3157         u8 len = cea_db_payload_len(db);
3158 
3159         if (len >= 6) {
3160                 connector->eld[5] |= (db[6] >> 7) << 1;  /* Supports_AI */
3161                 connector->dvi_dual = db[6] & 1;
3162         }
3163         if (len >= 7)
3164                 connector->max_tmds_clock = db[7] * 5;
3165         if (len >= 8) {
3166                 connector->latency_present[0] = db[8] >> 7;
3167                 connector->latency_present[1] = (db[8] >> 6) & 1;
3168         }
3169         if (len >= 9)
3170                 connector->video_latency[0] = db[9];
3171         if (len >= 10)
3172                 connector->audio_latency[0] = db[10];
3173         if (len >= 11)
3174                 connector->video_latency[1] = db[11];
3175         if (len >= 12)
3176                 connector->audio_latency[1] = db[12];
3177 
3178         DRM_DEBUG_KMS("HDMI: DVI dual %d, "
3179                     "max TMDS clock %d, "
3180                     "latency present %d %d, "
3181                     "video latency %d %d, "
3182                     "audio latency %d %d\n",
3183                     connector->dvi_dual,
3184                     connector->max_tmds_clock,
3185               (int) connector->latency_present[0],
3186               (int) connector->latency_present[1],
3187                     connector->video_latency[0],
3188                     connector->video_latency[1],
3189                     connector->audio_latency[0],
3190                     connector->audio_latency[1]);
3191 }
3192 
3193 static void
3194 monitor_name(struct detailed_timing *t, void *data)
3195 {
3196         if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
3197                 *(u8 **)data = t->data.other_data.data.str.str;
3198 }
3199 
3200 /**
3201  * drm_edid_to_eld - build ELD from EDID
3202  * @connector: connector corresponding to the HDMI/DP sink
3203  * @edid: EDID to parse
3204  *
3205  * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
3206  * Conn_Type, HDCP and Port_ID ELD fields are left for the graphics driver to
3207  * fill in.
3208  */
3209 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
3210 {
3211         uint8_t *eld = connector->eld;
3212         u8 *cea;
3213         u8 *name;
3214         u8 *db;
3215         int sad_count = 0;
3216         int mnl;
3217         int dbl;
3218 
3219         memset(eld, 0, sizeof(connector->eld));
3220 
3221         cea = drm_find_cea_extension(edid);
3222         if (!cea) {
3223                 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
3224                 return;
3225         }
3226 
3227         name = NULL;
3228         drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
3229         for (mnl = 0; name && mnl < 13; mnl++) {
3230                 if (name[mnl] == 0x0a)
3231                         break;
3232                 eld[20 + mnl] = name[mnl];
3233         }
3234         eld[4] = (cea[1] << 5) | mnl;
3235         DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
3236 
3237         eld[0] = 2 << 3;                /* ELD version: 2 */
3238 
3239         eld[16] = edid->mfg_id[0];
3240         eld[17] = edid->mfg_id[1];
3241         eld[18] = edid->prod_code[0];
3242         eld[19] = edid->prod_code[1];
3243 
3244         if (cea_revision(cea) >= 3) {
3245                 int i, start, end;
3246 
3247                 if (cea_db_offsets(cea, &start, &end)) {
3248                         start = 0;
3249                         end = 0;
3250                 }
3251 
3252                 for_each_cea_db(cea, i, start, end) {
3253                         db = &cea[i];
3254                         dbl = cea_db_payload_len(db);
3255 
3256                         switch (cea_db_tag(db)) {
3257                         case AUDIO_BLOCK:
3258                                 /* Audio Data Block, contains SADs */
3259                                 sad_count = dbl / 3;
3260                                 if (dbl >= 1)
3261                                         memcpy(eld + 20 + mnl, &db[1], dbl);
3262                                 break;
3263                         case SPEAKER_BLOCK:
3264                                 /* Speaker Allocation Data Block */
3265                                 if (dbl >= 1)
3266                                         eld[7] = db[1];
3267                                 break;
3268                         case VENDOR_BLOCK:
3269                                 /* HDMI Vendor-Specific Data Block */
3270                                 if (cea_db_is_hdmi_vsdb(db))
3271                                         parse_hdmi_vsdb(connector, db);
3272                                 break;
3273                         default:
3274                                 break;
3275                         }
3276                 }
3277         }
3278         eld[5] |= sad_count << 4;
3279 
3280         eld[DRM_ELD_BASELINE_ELD_LEN] =
3281                 DIV_ROUND_UP(drm_eld_calc_baseline_block_size(eld), 4);
3282 
3283         DRM_DEBUG_KMS("ELD size %d, SAD count %d\n",
3284                       drm_eld_size(eld), sad_count);
3285 }
3286 EXPORT_SYMBOL(drm_edid_to_eld);
3287 
3288 /**
3289  * drm_edid_to_sad - extracts SADs from EDID
3290  * @edid: EDID to parse
3291  * @sads: pointer that will be set to the extracted SADs
3292  *
3293  * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
3294  *
3295  * Note: The returned pointer needs to be freed using kfree().
3296  *
3297  * Return: The number of found SADs or negative number on error.
3298  */
3299 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
3300 {
3301         int count = 0;
3302         int i, start, end, dbl;
3303         u8 *cea;
3304 
3305         cea = drm_find_cea_extension(edid);
3306         if (!cea) {
3307                 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3308                 return -ENOENT;
3309         }
3310 
3311         if (cea_revision(cea) < 3) {
3312                 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3313                 return -ENOTSUPP;
3314         }
3315 
3316         if (cea_db_offsets(cea, &start, &end)) {
3317                 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3318                 return -EPROTO;
3319         }
3320 
3321         for_each_cea_db(cea, i, start, end) {
3322                 u8 *db = &cea[i];
3323 
3324                 if (cea_db_tag(db) == AUDIO_BLOCK) {
3325                         int j;
3326                         dbl = cea_db_payload_len(db);
3327 
3328                         count = dbl / 3; /* SAD is 3B */
3329                         *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
3330                         if (!*sads)
3331                                 return -ENOMEM;
3332                         for (j = 0; j < count; j++) {
3333                                 u8 *sad = &db[1 + j * 3];
3334 
3335                                 (*sads)[j].format = (sad[0] & 0x78) >> 3;
3336                                 (*sads)[j].channels = sad[0] & 0x7;
3337                                 (*sads)[j].freq = sad[1] & 0x7F;
3338                                 (*sads)[j].byte2 = sad[2];
3339                         }
3340                         break;
3341                 }
3342         }
3343 
3344         return count;
3345 }
3346 EXPORT_SYMBOL(drm_edid_to_sad);
3347 
3348 /**
3349  * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
3350  * @edid: EDID to parse
3351  * @sadb: pointer to the speaker block
3352  *
3353  * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
3354  *
3355  * Note: The returned pointer needs to be freed using kfree().
3356  *
3357  * Return: The number of found Speaker Allocation Blocks or negative number on
3358  * error.
3359  */
3360 int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
3361 {
3362         int count = 0;
3363         int i, start, end, dbl;
3364         const u8 *cea;
3365 
3366         cea = drm_find_cea_extension(edid);
3367         if (!cea) {
3368                 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3369                 return -ENOENT;
3370         }
3371 
3372         if (cea_revision(cea) < 3) {
3373                 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3374                 return -ENOTSUPP;
3375         }
3376 
3377         if (cea_db_offsets(cea, &start, &end)) {
3378                 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3379                 return -EPROTO;
3380         }
3381 
3382         for_each_cea_db(cea, i, start, end) {
3383                 const u8 *db = &cea[i];
3384 
3385                 if (cea_db_tag(db) == SPEAKER_BLOCK) {
3386                         dbl = cea_db_payload_len(db);
3387 
3388                         /* Speaker Allocation Data Block */
3389                         if (dbl == 3) {
3390                                 *sadb = kmemdup(&db[1], dbl, GFP_KERNEL);
3391                                 if (!*sadb)
3392                                         return -ENOMEM;
3393                                 count = dbl;
3394                                 break;
3395                         }
3396                 }
3397         }
3398 
3399         return count;
3400 }
3401 EXPORT_SYMBOL(drm_edid_to_speaker_allocation);
3402 
3403 /**
3404  * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
3405  * @connector: connector associated with the HDMI/DP sink
3406  * @mode: the display mode
3407  *
3408  * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
3409  * the sink doesn't support audio or video.
3410  */
3411 int drm_av_sync_delay(struct drm_connector *connector,
3412                       const struct drm_display_mode *mode)
3413 {
3414         int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
3415         int a, v;
3416 
3417         if (!connector->latency_present[0])
3418                 return 0;
3419         if (!connector->latency_present[1])
3420                 i = 0;
3421 
3422         a = connector->audio_latency[i];
3423         v = connector->video_latency[i];
3424 
3425         /*
3426          * HDMI/DP sink doesn't support audio or video?
3427          */
3428         if (a == 255 || v == 255)
3429                 return 0;
3430 
3431         /*
3432          * Convert raw EDID values to millisecond.
3433          * Treat unknown latency as 0ms.
3434          */
3435         if (a)
3436                 a = min(2 * (a - 1), 500);
3437         if (v)
3438                 v = min(2 * (v - 1), 500);
3439 
3440         return max(v - a, 0);
3441 }
3442 EXPORT_SYMBOL(drm_av_sync_delay);
3443 
3444 /**
3445  * drm_select_eld - select one ELD from multiple HDMI/DP sinks
3446  * @encoder: the encoder just changed display mode
3447  *
3448  * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
3449  * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
3450  *
3451  * Return: The connector associated with the first HDMI/DP sink that has ELD
3452  * attached to it.
3453  */
3454 struct drm_connector *drm_select_eld(struct drm_encoder *encoder)
3455 {
3456         struct drm_connector *connector;
3457         struct drm_device *dev = encoder->dev;
3458 
3459         WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
3460         WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
3461 
3462         drm_for_each_connector(connector, dev)
3463                 if (connector->encoder == encoder && connector->eld[0])
3464                         return connector;
3465 
3466         return NULL;
3467 }
3468 EXPORT_SYMBOL(drm_select_eld);
3469 
3470 /**
3471  * drm_detect_hdmi_monitor - detect whether monitor is HDMI
3472  * @edid: monitor EDID information
3473  *
3474  * Parse the CEA extension according to CEA-861-B.
3475  *
3476  * Return: True if the monitor is HDMI, false if not or unknown.
3477  */
3478 bool drm_detect_hdmi_monitor(struct edid *edid)
3479 {
3480         u8 *edid_ext;
3481         int i;
3482         int start_offset, end_offset;
3483 
3484         edid_ext = drm_find_cea_extension(edid);
3485         if (!edid_ext)
3486                 return false;
3487 
3488         if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3489                 return false;
3490 
3491         /*
3492          * Because HDMI identifier is in Vendor Specific Block,
3493          * search it from all data blocks of CEA extension.
3494          */
3495         for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3496                 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
3497                         return true;
3498         }
3499 
3500         return false;
3501 }
3502 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
3503 
3504 /**
3505  * drm_detect_monitor_audio - check monitor audio capability
3506  * @edid: EDID block to scan
3507  *
3508  * Monitor should have CEA extension block.
3509  * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
3510  * audio' only. If there is any audio extension block and supported
3511  * audio format, assume at least 'basic audio' support, even if 'basic
3512  * audio' is not defined in EDID.
3513  *
3514  * Return: True if the monitor supports audio, false otherwise.
3515  */
3516 bool drm_detect_monitor_audio(struct edid *edid)
3517 {
3518         u8 *edid_ext;
3519         int i, j;
3520         bool has_audio = false;
3521         int start_offset, end_offset;
3522 
3523         edid_ext = drm_find_cea_extension(edid);
3524         if (!edid_ext)
3525                 goto end;
3526 
3527         has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
3528 
3529         if (has_audio) {
3530                 DRM_DEBUG_KMS("Monitor has basic audio support\n");
3531                 goto end;
3532         }
3533 
3534         if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3535                 goto end;
3536 
3537         for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3538                 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
3539                         has_audio = true;
3540                         for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
3541                                 DRM_DEBUG_KMS("CEA audio format %d\n",
3542                                               (edid_ext[i + j] >> 3) & 0xf);
3543                         goto end;
3544                 }
3545         }
3546 end:
3547         return has_audio;
3548 }
3549 EXPORT_SYMBOL(drm_detect_monitor_audio);
3550 
3551 /**
3552  * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
3553  * @edid: EDID block to scan
3554  *
3555  * Check whether the monitor reports the RGB quantization range selection
3556  * as supported. The AVI infoframe can then be used to inform the monitor
3557  * which quantization range (full or limited) is used.
3558  *
3559  * Return: True if the RGB quantization range is selectable, false otherwise.
3560  */
3561 bool drm_rgb_quant_range_selectable(struct edid *edid)
3562 {
3563         u8 *edid_ext;
3564         int i, start, end;
3565 
3566         edid_ext = drm_find_cea_extension(edid);
3567         if (!edid_ext)
3568                 return false;
3569 
3570         if (cea_db_offsets(edid_ext, &start, &end))
3571                 return false;
3572 
3573         for_each_cea_db(edid_ext, i, start, end) {
3574                 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
3575                     cea_db_payload_len(&edid_ext[i]) == 2) {
3576                         DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
3577                         return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
3578                 }
3579         }
3580 
3581         return false;
3582 }
3583 EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
3584 
3585 /**
3586  * drm_assign_hdmi_deep_color_info - detect whether monitor supports
3587  * hdmi deep color modes and update drm_display_info if so.
3588  * @edid: monitor EDID information
3589  * @info: Updated with maximum supported deep color bpc and color format
3590  *        if deep color supported.
3591  * @connector: DRM connector, used only for debug output
3592  *
3593  * Parse the CEA extension according to CEA-861-B.
3594  * Return true if HDMI deep color supported, false if not or unknown.
3595  */
3596 static bool drm_assign_hdmi_deep_color_info(struct edid *edid,
3597                                             struct drm_display_info *info,
3598                                             struct drm_connector *connector)
3599 {
3600         u8 *edid_ext, *hdmi;
3601         int i;
3602         int start_offset, end_offset;
3603         unsigned int dc_bpc = 0;
3604 
3605         edid_ext = drm_find_cea_extension(edid);
3606         if (!edid_ext)
3607                 return false;
3608 
3609         if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3610                 return false;
3611 
3612         /*
3613          * Because HDMI identifier is in Vendor Specific Block,
3614          * search it from all data blocks of CEA extension.
3615          */
3616         for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3617                 if (cea_db_is_hdmi_vsdb(&edid_ext[i])) {
3618                         /* HDMI supports at least 8 bpc */
3619                         info->bpc = 8;
3620 
3621                         hdmi = &edid_ext[i];
3622                         if (cea_db_payload_len(hdmi) < 6)
3623                                 return false;
3624 
3625                         if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
3626                                 dc_bpc = 10;
3627                                 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30;
3628                                 DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
3629                                                   connector->name);
3630                         }
3631 
3632                         if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
3633                                 dc_bpc = 12;
3634                                 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36;
3635                                 DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
3636                                                   connector->name);
3637                         }
3638 
3639                         if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
3640                                 dc_bpc = 16;
3641                                 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48;
3642                                 DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
3643                                                   connector->name);
3644                         }
3645 
3646                         if (dc_bpc > 0) {
3647                                 DRM_DEBUG("%s: Assigning HDMI sink color depth as %d bpc.\n",
3648                                                   connector->name, dc_bpc);
3649                                 info->bpc = dc_bpc;
3650 
3651                                 /*
3652                                  * Deep color support mandates RGB444 support for all video
3653                                  * modes and forbids YCRCB422 support for all video modes per
3654                                  * HDMI 1.3 spec.
3655                                  */
3656                                 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3657 
3658                                 /* YCRCB444 is optional according to spec. */
3659                                 if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
3660                                         info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3661                                         DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
3662                                                           connector->name);
3663                                 }
3664 
3665                                 /*
3666                                  * Spec says that if any deep color mode is supported at all,
3667                                  * then deep color 36 bit must be supported.
3668                                  */
3669                                 if (!(hdmi[6] & DRM_EDID_HDMI_DC_36)) {
3670                                         DRM_DEBUG("%s: HDMI sink should do DC_36, but does not!\n",
3671                                                           connector->name);
3672                                 }
3673 
3674                                 return true;
3675                         }
3676                         else {
3677                                 DRM_DEBUG("%s: No deep color support on this HDMI sink.\n",
3678                                                   connector->name);
3679                         }
3680                 }
3681         }
3682 
3683         return false;
3684 }
3685 
3686 /**
3687  * drm_add_display_info - pull display info out if present
3688  * @edid: EDID data
3689  * @info: display info (attached to connector)
3690  * @connector: connector whose edid is used to build display info
3691  *
3692  * Grab any available display info and stuff it into the drm_display_info
3693  * structure that's part of the connector.  Useful for tracking bpp and
3694  * color spaces.
3695  */
3696 static void drm_add_display_info(struct edid *edid,
3697                                  struct drm_display_info *info,
3698                                  struct drm_connector *connector)
3699 {
3700         u8 *edid_ext;
3701 
3702         info->width_mm = edid->width_cm * 10;
3703         info->height_mm = edid->height_cm * 10;
3704 
3705         /* driver figures it out in this case */
3706         info->bpc = 0;
3707         info->color_formats = 0;
3708 
3709         if (edid->revision < 3)
3710                 return;
3711 
3712         if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
3713                 return;
3714 
3715         /* Get data from CEA blocks if present */
3716         edid_ext = drm_find_cea_extension(edid);
3717         if (edid_ext) {
3718                 info->cea_rev = edid_ext[1];
3719 
3720                 /* The existence of a CEA block should imply RGB support */
3721                 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3722                 if (edid_ext[3] & EDID_CEA_YCRCB444)
3723                         info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3724                 if (edid_ext[3] & EDID_CEA_YCRCB422)
3725                         info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3726         }
3727 
3728         /* HDMI deep color modes supported? Assign to info, if so */
3729         drm_assign_hdmi_deep_color_info(edid, info, connector);
3730 
3731         /* Only defined for 1.4 with digital displays */
3732         if (edid->revision < 4)
3733                 return;
3734 
3735         switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
3736         case DRM_EDID_DIGITAL_DEPTH_6:
3737                 info->bpc = 6;
3738                 break;
3739         case DRM_EDID_DIGITAL_DEPTH_8:
3740                 info->bpc = 8;
3741                 break;
3742         case DRM_EDID_DIGITAL_DEPTH_10:
3743                 info->bpc = 10;
3744                 break;
3745         case DRM_EDID_DIGITAL_DEPTH_12:
3746                 info->bpc = 12;
3747                 break;
3748         case DRM_EDID_DIGITAL_DEPTH_14:
3749                 info->bpc = 14;
3750                 break;
3751         case DRM_EDID_DIGITAL_DEPTH_16:
3752                 info->bpc = 16;
3753                 break;
3754         case DRM_EDID_DIGITAL_DEPTH_UNDEF:
3755         default:
3756                 info->bpc = 0;
3757                 break;
3758         }
3759 
3760         DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
3761                           connector->name, info->bpc);
3762 
3763         info->color_formats |= DRM_COLOR_FORMAT_RGB444;
3764         if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
3765                 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3766         if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
3767                 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3768 }
3769 
3770 /**
3771  * drm_add_edid_modes - add modes from EDID data, if available
3772  * @connector: connector we're probing
3773  * @edid: EDID data
3774  *
3775  * Add the specified modes to the connector's mode list.
3776  *
3777  * Return: The number of modes added or 0 if we couldn't find any.
3778  */
3779 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
3780 {
3781         int num_modes = 0;
3782         u32 quirks;
3783 
3784         if (edid == NULL) {
3785                 return 0;
3786         }
3787         if (!drm_edid_is_valid(edid)) {
3788                 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
3789                          connector->name);
3790                 return 0;
3791         }
3792 
3793         quirks = edid_get_quirks(edid);
3794 
3795         /*
3796          * EDID spec says modes should be preferred in this order:
3797          * - preferred detailed mode
3798          * - other detailed modes from base block
3799          * - detailed modes from extension blocks
3800          * - CVT 3-byte code modes
3801          * - standard timing codes
3802          * - established timing codes
3803          * - modes inferred from GTF or CVT range information
3804          *
3805          * We get this pretty much right.
3806          *
3807          * XXX order for additional mode types in extension blocks?
3808          */
3809         num_modes += add_detailed_modes(connector, edid, quirks);
3810         num_modes += add_cvt_modes(connector, edid);
3811         num_modes += add_standard_modes(connector, edid);
3812         num_modes += add_established_modes(connector, edid);
3813         num_modes += add_cea_modes(connector, edid);
3814         num_modes += add_alternate_cea_modes(connector, edid);
3815         if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
3816                 num_modes += add_inferred_modes(connector, edid);
3817 
3818         if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
3819                 edid_fixup_preferred(connector, quirks);
3820 
3821         drm_add_display_info(edid, &connector->display_info, connector);
3822 
3823         if (quirks & EDID_QUIRK_FORCE_8BPC)
3824                 connector->display_info.bpc = 8;
3825 
3826         if (quirks & EDID_QUIRK_FORCE_12BPC)
3827                 connector->display_info.bpc = 12;
3828 
3829         return num_modes;
3830 }
3831 EXPORT_SYMBOL(drm_add_edid_modes);
3832 
3833 /**
3834  * drm_add_modes_noedid - add modes for the connectors without EDID
3835  * @connector: connector we're probing
3836  * @hdisplay: the horizontal display limit
3837  * @vdisplay: the vertical display limit
3838  *
3839  * Add the specified modes to the connector's mode list. Only when the
3840  * hdisplay/vdisplay is not beyond the given limit, it will be added.
3841  *
3842  * Return: The number of modes added or 0 if we couldn't find any.
3843  */
3844 int drm_add_modes_noedid(struct drm_connector *connector,
3845                         int hdisplay, int vdisplay)
3846 {
3847         int i, count, num_modes = 0;
3848         struct drm_display_mode *mode;
3849         struct drm_device *dev = connector->dev;
3850 
3851         count = ARRAY_SIZE(drm_dmt_modes);
3852         if (hdisplay < 0)
3853                 hdisplay = 0;
3854         if (vdisplay < 0)
3855                 vdisplay = 0;
3856 
3857         for (i = 0; i < count; i++) {
3858                 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
3859                 if (hdisplay && vdisplay) {
3860                         /*
3861                          * Only when two are valid, they will be used to check
3862                          * whether the mode should be added to the mode list of
3863                          * the connector.
3864                          */
3865                         if (ptr->hdisplay > hdisplay ||
3866                                         ptr->vdisplay > vdisplay)
3867                                 continue;
3868                 }
3869                 if (drm_mode_vrefresh(ptr) > 61)
3870                         continue;
3871                 mode = drm_mode_duplicate(dev, ptr);
3872                 if (mode) {
3873                         drm_mode_probed_add(connector, mode);
3874                         num_modes++;
3875                 }
3876         }
3877         return num_modes;
3878 }
3879 EXPORT_SYMBOL(drm_add_modes_noedid);
3880 
3881 /**
3882  * drm_set_preferred_mode - Sets the preferred mode of a connector
3883  * @connector: connector whose mode list should be processed
3884  * @hpref: horizontal resolution of preferred mode
3885  * @vpref: vertical resolution of preferred mode
3886  *
3887  * Marks a mode as preferred if it matches the resolution specified by @hpref
3888  * and @vpref.
3889  */
3890 void drm_set_preferred_mode(struct drm_connector *connector,
3891                            int hpref, int vpref)
3892 {
3893         struct drm_display_mode *mode;
3894 
3895         list_for_each_entry(mode, &connector->probed_modes, head) {
3896                 if (mode->hdisplay == hpref &&
3897                     mode->vdisplay == vpref)
3898                         mode->type |= DRM_MODE_TYPE_PREFERRED;
3899         }
3900 }
3901 EXPORT_SYMBOL(drm_set_preferred_mode);
3902 
3903 /**
3904  * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
3905  *                                              data from a DRM display mode
3906  * @frame: HDMI AVI infoframe
3907  * @mode: DRM display mode
3908  *
3909  * Return: 0 on success or a negative error code on failure.
3910  */
3911 int
3912 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
3913                                          const struct drm_display_mode *mode)
3914 {
3915         int err;
3916 
3917         if (!frame || !mode)
3918                 return -EINVAL;
3919 
3920         err = hdmi_avi_infoframe_init(frame);
3921         if (err < 0)
3922                 return err;
3923 
3924         if (mode->flags & DRM_MODE_FLAG_DBLCLK)
3925                 frame->pixel_repeat = 1;
3926 
3927         frame->video_code = drm_match_cea_mode(mode);
3928 
3929         frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
3930 
3931         /*
3932          * Populate picture aspect ratio from either
3933          * user input (if specified) or from the CEA mode list.
3934          */
3935         if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 ||
3936                 mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9)
3937                 frame->picture_aspect = mode->picture_aspect_ratio;
3938         else if (frame->video_code > 0)
3939                 frame->picture_aspect = drm_get_cea_aspect_ratio(
3940                                                 frame->video_code);
3941 
3942         frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
3943         frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
3944 
3945         return 0;
3946 }
3947 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
3948 
3949 static enum hdmi_3d_structure
3950 s3d_structure_from_display_mode(const struct drm_display_mode *mode)
3951 {
3952         u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
3953 
3954         switch (layout) {
3955         case DRM_MODE_FLAG_3D_FRAME_PACKING:
3956                 return HDMI_3D_STRUCTURE_FRAME_PACKING;
3957         case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
3958                 return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
3959         case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
3960                 return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
3961         case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
3962                 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
3963         case DRM_MODE_FLAG_3D_L_DEPTH:
3964                 return HDMI_3D_STRUCTURE_L_DEPTH;
3965         case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
3966                 return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
3967         case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
3968                 return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
3969         case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
3970                 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
3971         default:
3972                 return HDMI_3D_STRUCTURE_INVALID;
3973         }
3974 }
3975 
3976 /**
3977  * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
3978  * data from a DRM display mode
3979  * @frame: HDMI vendor infoframe
3980  * @mode: DRM display mode
3981  *
3982  * Note that there's is a need to send HDMI vendor infoframes only when using a
3983  * 4k or stereoscopic 3D mode. So when giving any other mode as input this
3984  * function will return -EINVAL, error that can be safely ignored.
3985  *
3986  * Return: 0 on success or a negative error code on failure.
3987  */
3988 int
3989 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
3990                                             const struct drm_display_mode *mode)
3991 {
3992         int err;
3993         u32 s3d_flags;
3994         u8 vic;
3995 
3996         if (!frame || !mode)
3997                 return -EINVAL;
3998 
3999         vic = drm_match_hdmi_mode(mode);
4000         s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
4001 
4002         if (!vic && !s3d_flags)
4003                 return -EINVAL;
4004 
4005         if (vic && s3d_flags)
4006                 return -EINVAL;
4007 
4008         err = hdmi_vendor_infoframe_init(frame);
4009         if (err < 0)
4010                 return err;
4011 
4012         if (vic)
4013                 frame->vic = vic;
4014         else
4015                 frame->s3d_struct = s3d_structure_from_display_mode(mode);
4016 
4017         return 0;
4018 }
4019 EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);
4020 
4021 static int drm_parse_display_id(struct drm_connector *connector,
4022                                 u8 *displayid, int length,
4023                                 bool is_edid_extension)
4024 {
4025         /* if this is an EDID extension the first byte will be 0x70 */
4026         int idx = 0;
4027         struct displayid_hdr *base;
4028         struct displayid_block *block;
4029         u8 csum = 0;
4030         int i;
4031 
4032         if (is_edid_extension)
4033                 idx = 1;
4034 
4035         base = (struct displayid_hdr *)&displayid[idx];
4036 
4037         DRM_DEBUG_KMS("base revision 0x%x, length %d, %d %d\n",
4038                       base->rev, base->bytes, base->prod_id, base->ext_count);
4039 
4040         if (base->bytes + 5 > length - idx)
4041                 return -EINVAL;
4042 
4043         for (i = idx; i <= base->bytes + 5; i++) {
4044                 csum += displayid[i];
4045         }
4046         if (csum) {
4047                 DRM_ERROR("DisplayID checksum invalid, remainder is %d\n", csum);
4048                 return -EINVAL;
4049         }
4050 
4051         block = (struct displayid_block *)&displayid[idx + 4];
4052         DRM_DEBUG_KMS("block id %d, rev %d, len %d\n",
4053                       block->tag, block->rev, block->num_bytes);
4054 
4055         switch (block->tag) {
4056         case DATA_BLOCK_TILED_DISPLAY: {
4057                 struct displayid_tiled_block *tile = (struct displayid_tiled_block *)block;
4058 
4059                 u16 w, h;
4060                 u8 tile_v_loc, tile_h_loc;
4061                 u8 num_v_tile, num_h_tile;
4062                 struct drm_tile_group *tg;
4063 
4064                 w = tile->tile_size[0] | tile->tile_size[1] << 8;
4065                 h = tile->tile_size[2] | tile->tile_size[3] << 8;
4066 
4067                 num_v_tile = (tile->topo[0] & 0xf) | (tile->topo[2] & 0x30);
4068                 num_h_tile = (tile->topo[0] >> 4) | ((tile->topo[2] >> 2) & 0x30);
4069                 tile_v_loc = (tile->topo[1] & 0xf) | ((tile->topo[2] & 0x3) << 4);
4070                 tile_h_loc = (tile->topo[1] >> 4) | (((tile->topo[2] >> 2) & 0x3) << 4);
4071 
4072                 connector->has_tile = true;
4073                 if (tile->tile_cap & 0x80)
4074                         connector->tile_is_single_monitor = true;
4075 
4076                 connector->num_h_tile = num_h_tile + 1;
4077                 connector->num_v_tile = num_v_tile + 1;
4078                 connector->tile_h_loc = tile_h_loc;
4079                 connector->tile_v_loc = tile_v_loc;
4080                 connector->tile_h_size = w + 1;
4081                 connector->tile_v_size = h + 1;
4082 
4083                 DRM_DEBUG_KMS("tile cap 0x%x\n", tile->tile_cap);
4084                 DRM_DEBUG_KMS("tile_size %d x %d\n", w + 1, h + 1);
4085                 DRM_DEBUG_KMS("topo num tiles %dx%d, location %dx%d\n",
4086                        num_h_tile + 1, num_v_tile + 1, tile_h_loc, tile_v_loc);
4087                 DRM_DEBUG_KMS("vend %c%c%c\n", tile->topology_id[0], tile->topology_id[1], tile->topology_id[2]);
4088 
4089                 tg = drm_mode_get_tile_group(connector->dev, tile->topology_id);
4090                 if (!tg) {
4091                         tg = drm_mode_create_tile_group(connector->dev, tile->topology_id);
4092                 }
4093                 if (!tg)
4094                         return -ENOMEM;
4095 
4096                 if (connector->tile_group != tg) {
4097                         /* if we haven't got a pointer,
4098                            take the reference, drop ref to old tile group */
4099                         if (connector->tile_group) {
4100                                 drm_mode_put_tile_group(connector->dev, connector->tile_group);
4101                         }
4102                         connector->tile_group = tg;
4103                 } else
4104                         /* if same tile group, then release the ref we just took. */
4105                         drm_mode_put_tile_group(connector->dev, tg);
4106         }
4107                 break;
4108         default:
4109                 printk("unknown displayid tag %d\n", block->tag);
4110                 break;
4111         }
4112         return 0;
4113 }
4114 
4115 static void drm_get_displayid(struct drm_connector *connector,
4116                               struct edid *edid)
4117 {
4118         void *displayid = NULL;
4119         int ret;
4120         connector->has_tile = false;
4121         displayid = drm_find_displayid_extension(edid);
4122         if (!displayid) {
4123                 /* drop reference to any tile group we had */
4124                 goto out_drop_ref;
4125         }
4126 
4127         ret = drm_parse_display_id(connector, displayid, EDID_LENGTH, true);
4128         if (ret < 0)
4129                 goto out_drop_ref;
4130         if (!connector->has_tile)
4131                 goto out_drop_ref;
4132         return;
4133 out_drop_ref:
4134         if (connector->tile_group) {
4135                 drm_mode_put_tile_group(connector->dev, connector->tile_group);
4136                 connector->tile_group = NULL;
4137         }
4138         return;
4139 }
4140 

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