Version:  2.0.40 2.2.26 2.4.37 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2

Linux/drivers/crypto/nx/nx.c

  1 /**
  2  * Routines supporting the Power 7+ Nest Accelerators driver
  3  *
  4  * Copyright (C) 2011-2012 International Business Machines Inc.
  5  *
  6  * This program is free software; you can redistribute it and/or modify
  7  * it under the terms of the GNU General Public License as published by
  8  * the Free Software Foundation; version 2 only.
  9  *
 10  * This program is distributed in the hope that it will be useful,
 11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 13  * GNU General Public License for more details.
 14  *
 15  * You should have received a copy of the GNU General Public License
 16  * along with this program; if not, write to the Free Software
 17  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 18  *
 19  * Author: Kent Yoder <yoder1@us.ibm.com>
 20  */
 21 
 22 #include <crypto/internal/aead.h>
 23 #include <crypto/internal/hash.h>
 24 #include <crypto/aes.h>
 25 #include <crypto/sha.h>
 26 #include <crypto/algapi.h>
 27 #include <crypto/scatterwalk.h>
 28 #include <linux/module.h>
 29 #include <linux/moduleparam.h>
 30 #include <linux/types.h>
 31 #include <linux/mm.h>
 32 #include <linux/scatterlist.h>
 33 #include <linux/device.h>
 34 #include <linux/of.h>
 35 #include <linux/types.h>
 36 #include <asm/hvcall.h>
 37 #include <asm/vio.h>
 38 
 39 #include "nx_csbcpb.h"
 40 #include "nx.h"
 41 
 42 
 43 /**
 44  * nx_hcall_sync - make an H_COP_OP hcall for the passed in op structure
 45  *
 46  * @nx_ctx: the crypto context handle
 47  * @op: PFO operation struct to pass in
 48  * @may_sleep: flag indicating the request can sleep
 49  *
 50  * Make the hcall, retrying while the hardware is busy. If we cannot yield
 51  * the thread, limit the number of retries to 10 here.
 52  */
 53 int nx_hcall_sync(struct nx_crypto_ctx *nx_ctx,
 54                   struct vio_pfo_op    *op,
 55                   u32                   may_sleep)
 56 {
 57         int rc, retries = 10;
 58         struct vio_dev *viodev = nx_driver.viodev;
 59 
 60         atomic_inc(&(nx_ctx->stats->sync_ops));
 61 
 62         do {
 63                 rc = vio_h_cop_sync(viodev, op);
 64         } while (rc == -EBUSY && !may_sleep && retries--);
 65 
 66         if (rc) {
 67                 dev_dbg(&viodev->dev, "vio_h_cop_sync failed: rc: %d "
 68                         "hcall rc: %ld\n", rc, op->hcall_err);
 69                 atomic_inc(&(nx_ctx->stats->errors));
 70                 atomic_set(&(nx_ctx->stats->last_error), op->hcall_err);
 71                 atomic_set(&(nx_ctx->stats->last_error_pid), current->pid);
 72         }
 73 
 74         return rc;
 75 }
 76 
 77 /**
 78  * nx_build_sg_list - build an NX scatter list describing a single  buffer
 79  *
 80  * @sg_head: pointer to the first scatter list element to build
 81  * @start_addr: pointer to the linear buffer
 82  * @len: length of the data at @start_addr
 83  * @sgmax: the largest number of scatter list elements we're allowed to create
 84  *
 85  * This function will start writing nx_sg elements at @sg_head and keep
 86  * writing them until all of the data from @start_addr is described or
 87  * until sgmax elements have been written. Scatter list elements will be
 88  * created such that none of the elements describes a buffer that crosses a 4K
 89  * boundary.
 90  */
 91 struct nx_sg *nx_build_sg_list(struct nx_sg *sg_head,
 92                                u8           *start_addr,
 93                                unsigned int *len,
 94                                u32           sgmax)
 95 {
 96         unsigned int sg_len = 0;
 97         struct nx_sg *sg;
 98         u64 sg_addr = (u64)start_addr;
 99         u64 end_addr;
100 
101         /* determine the start and end for this address range - slightly
102          * different if this is in VMALLOC_REGION */
103         if (is_vmalloc_addr(start_addr))
104                 sg_addr = page_to_phys(vmalloc_to_page(start_addr))
105                           + offset_in_page(sg_addr);
106         else
107                 sg_addr = __pa(sg_addr);
108 
109         end_addr = sg_addr + *len;
110 
111         /* each iteration will write one struct nx_sg element and add the
112          * length of data described by that element to sg_len. Once @len bytes
113          * have been described (or @sgmax elements have been written), the
114          * loop ends. min_t is used to ensure @end_addr falls on the same page
115          * as sg_addr, if not, we need to create another nx_sg element for the
116          * data on the next page.
117          *
118          * Also when using vmalloc'ed data, every time that a system page
119          * boundary is crossed the physical address needs to be re-calculated.
120          */
121         for (sg = sg_head; sg_len < *len; sg++) {
122                 u64 next_page;
123 
124                 sg->addr = sg_addr;
125                 sg_addr = min_t(u64, NX_PAGE_NUM(sg_addr + NX_PAGE_SIZE),
126                                 end_addr);
127 
128                 next_page = (sg->addr & PAGE_MASK) + PAGE_SIZE;
129                 sg->len = min_t(u64, sg_addr, next_page) - sg->addr;
130                 sg_len += sg->len;
131 
132                 if (sg_addr >= next_page &&
133                                 is_vmalloc_addr(start_addr + sg_len)) {
134                         sg_addr = page_to_phys(vmalloc_to_page(
135                                                 start_addr + sg_len));
136                         end_addr = sg_addr + *len - sg_len;
137                 }
138 
139                 if ((sg - sg_head) == sgmax) {
140                         pr_err("nx: scatter/gather list overflow, pid: %d\n",
141                                current->pid);
142                         sg++;
143                         break;
144                 }
145         }
146         *len = sg_len;
147 
148         /* return the moved sg_head pointer */
149         return sg;
150 }
151 
152 /**
153  * nx_walk_and_build - walk a linux scatterlist and build an nx scatterlist
154  *
155  * @nx_dst: pointer to the first nx_sg element to write
156  * @sglen: max number of nx_sg entries we're allowed to write
157  * @sg_src: pointer to the source linux scatterlist to walk
158  * @start: number of bytes to fast-forward past at the beginning of @sg_src
159  * @src_len: number of bytes to walk in @sg_src
160  */
161 struct nx_sg *nx_walk_and_build(struct nx_sg       *nx_dst,
162                                 unsigned int        sglen,
163                                 struct scatterlist *sg_src,
164                                 unsigned int        start,
165                                 unsigned int       *src_len)
166 {
167         struct scatter_walk walk;
168         struct nx_sg *nx_sg = nx_dst;
169         unsigned int n, offset = 0, len = *src_len;
170         char *dst;
171 
172         /* we need to fast forward through @start bytes first */
173         for (;;) {
174                 scatterwalk_start(&walk, sg_src);
175 
176                 if (start < offset + sg_src->length)
177                         break;
178 
179                 offset += sg_src->length;
180                 sg_src = sg_next(sg_src);
181         }
182 
183         /* start - offset is the number of bytes to advance in the scatterlist
184          * element we're currently looking at */
185         scatterwalk_advance(&walk, start - offset);
186 
187         while (len && (nx_sg - nx_dst) < sglen) {
188                 n = scatterwalk_clamp(&walk, len);
189                 if (!n) {
190                         /* In cases where we have scatterlist chain sg_next
191                          * handles with it properly */
192                         scatterwalk_start(&walk, sg_next(walk.sg));
193                         n = scatterwalk_clamp(&walk, len);
194                 }
195                 dst = scatterwalk_map(&walk);
196 
197                 nx_sg = nx_build_sg_list(nx_sg, dst, &n, sglen - (nx_sg - nx_dst));
198                 len -= n;
199 
200                 scatterwalk_unmap(dst);
201                 scatterwalk_advance(&walk, n);
202                 scatterwalk_done(&walk, SCATTERWALK_FROM_SG, len);
203         }
204         /* update to_process */
205         *src_len -= len;
206 
207         /* return the moved destination pointer */
208         return nx_sg;
209 }
210 
211 /**
212  * trim_sg_list - ensures the bound in sg list.
213  * @sg: sg list head
214  * @end: sg lisg end
215  * @delta:  is the amount we need to crop in order to bound the list.
216  *
217  */
218 static long int trim_sg_list(struct nx_sg *sg,
219                              struct nx_sg *end,
220                              unsigned int delta,
221                              unsigned int *nbytes)
222 {
223         long int oplen;
224         long int data_back;
225         unsigned int is_delta = delta;
226 
227         while (delta && end > sg) {
228                 struct nx_sg *last = end - 1;
229 
230                 if (last->len > delta) {
231                         last->len -= delta;
232                         delta = 0;
233                 } else {
234                         end--;
235                         delta -= last->len;
236                 }
237         }
238 
239         /* There are cases where we need to crop list in order to make it
240          * a block size multiple, but we also need to align data. In order to
241          * that we need to calculate how much we need to put back to be
242          * processed
243          */
244         oplen = (sg - end) * sizeof(struct nx_sg);
245         if (is_delta) {
246                 data_back = (abs(oplen) / AES_BLOCK_SIZE) *  sg->len;
247                 data_back = *nbytes - (data_back & ~(AES_BLOCK_SIZE - 1));
248                 *nbytes -= data_back;
249         }
250 
251         return oplen;
252 }
253 
254 /**
255  * nx_build_sg_lists - walk the input scatterlists and build arrays of NX
256  *                     scatterlists based on them.
257  *
258  * @nx_ctx: NX crypto context for the lists we're building
259  * @desc: the block cipher descriptor for the operation
260  * @dst: destination scatterlist
261  * @src: source scatterlist
262  * @nbytes: length of data described in the scatterlists
263  * @offset: number of bytes to fast-forward past at the beginning of
264  *          scatterlists.
265  * @iv: destination for the iv data, if the algorithm requires it
266  *
267  * This is common code shared by all the AES algorithms. It uses the block
268  * cipher walk routines to traverse input and output scatterlists, building
269  * corresponding NX scatterlists
270  */
271 int nx_build_sg_lists(struct nx_crypto_ctx  *nx_ctx,
272                       struct blkcipher_desc *desc,
273                       struct scatterlist    *dst,
274                       struct scatterlist    *src,
275                       unsigned int          *nbytes,
276                       unsigned int           offset,
277                       u8                    *iv)
278 {
279         unsigned int delta = 0;
280         unsigned int total = *nbytes;
281         struct nx_sg *nx_insg = nx_ctx->in_sg;
282         struct nx_sg *nx_outsg = nx_ctx->out_sg;
283         unsigned int max_sg_len;
284 
285         max_sg_len = min_t(u64, nx_ctx->ap->sglen,
286                         nx_driver.of.max_sg_len/sizeof(struct nx_sg));
287         max_sg_len = min_t(u64, max_sg_len,
288                         nx_ctx->ap->databytelen/NX_PAGE_SIZE);
289 
290         if (iv)
291                 memcpy(iv, desc->info, AES_BLOCK_SIZE);
292 
293         *nbytes = min_t(u64, *nbytes, nx_ctx->ap->databytelen);
294 
295         nx_outsg = nx_walk_and_build(nx_outsg, max_sg_len, dst,
296                                         offset, nbytes);
297         nx_insg = nx_walk_and_build(nx_insg, max_sg_len, src,
298                                         offset, nbytes);
299 
300         if (*nbytes < total)
301                 delta = *nbytes - (*nbytes & ~(AES_BLOCK_SIZE - 1));
302 
303         /* these lengths should be negative, which will indicate to phyp that
304          * the input and output parameters are scatterlists, not linear
305          * buffers */
306         nx_ctx->op.inlen = trim_sg_list(nx_ctx->in_sg, nx_insg, delta, nbytes);
307         nx_ctx->op.outlen = trim_sg_list(nx_ctx->out_sg, nx_outsg, delta, nbytes);
308 
309         return 0;
310 }
311 
312 /**
313  * nx_ctx_init - initialize an nx_ctx's vio_pfo_op struct
314  *
315  * @nx_ctx: the nx context to initialize
316  * @function: the function code for the op
317  */
318 void nx_ctx_init(struct nx_crypto_ctx *nx_ctx, unsigned int function)
319 {
320         spin_lock_init(&nx_ctx->lock);
321         memset(nx_ctx->kmem, 0, nx_ctx->kmem_len);
322         nx_ctx->csbcpb->csb.valid |= NX_CSB_VALID_BIT;
323 
324         nx_ctx->op.flags = function;
325         nx_ctx->op.csbcpb = __pa(nx_ctx->csbcpb);
326         nx_ctx->op.in = __pa(nx_ctx->in_sg);
327         nx_ctx->op.out = __pa(nx_ctx->out_sg);
328 
329         if (nx_ctx->csbcpb_aead) {
330                 nx_ctx->csbcpb_aead->csb.valid |= NX_CSB_VALID_BIT;
331 
332                 nx_ctx->op_aead.flags = function;
333                 nx_ctx->op_aead.csbcpb = __pa(nx_ctx->csbcpb_aead);
334                 nx_ctx->op_aead.in = __pa(nx_ctx->in_sg);
335                 nx_ctx->op_aead.out = __pa(nx_ctx->out_sg);
336         }
337 }
338 
339 static void nx_of_update_status(struct device   *dev,
340                                struct property *p,
341                                struct nx_of    *props)
342 {
343         if (!strncmp(p->value, "okay", p->length)) {
344                 props->status = NX_WAITING;
345                 props->flags |= NX_OF_FLAG_STATUS_SET;
346         } else {
347                 dev_info(dev, "%s: status '%s' is not 'okay'\n", __func__,
348                          (char *)p->value);
349         }
350 }
351 
352 static void nx_of_update_sglen(struct device   *dev,
353                                struct property *p,
354                                struct nx_of    *props)
355 {
356         if (p->length != sizeof(props->max_sg_len)) {
357                 dev_err(dev, "%s: unexpected format for "
358                         "ibm,max-sg-len property\n", __func__);
359                 dev_dbg(dev, "%s: ibm,max-sg-len is %d bytes "
360                         "long, expected %zd bytes\n", __func__,
361                         p->length, sizeof(props->max_sg_len));
362                 return;
363         }
364 
365         props->max_sg_len = *(u32 *)p->value;
366         props->flags |= NX_OF_FLAG_MAXSGLEN_SET;
367 }
368 
369 static void nx_of_update_msc(struct device   *dev,
370                              struct property *p,
371                              struct nx_of    *props)
372 {
373         struct msc_triplet *trip;
374         struct max_sync_cop *msc;
375         unsigned int bytes_so_far, i, lenp;
376 
377         msc = (struct max_sync_cop *)p->value;
378         lenp = p->length;
379 
380         /* You can't tell if the data read in for this property is sane by its
381          * size alone. This is because there are sizes embedded in the data
382          * structure. The best we can do is check lengths as we parse and bail
383          * as soon as a length error is detected. */
384         bytes_so_far = 0;
385 
386         while ((bytes_so_far + sizeof(struct max_sync_cop)) <= lenp) {
387                 bytes_so_far += sizeof(struct max_sync_cop);
388 
389                 trip = msc->trip;
390 
391                 for (i = 0;
392                      ((bytes_so_far + sizeof(struct msc_triplet)) <= lenp) &&
393                      i < msc->triplets;
394                      i++) {
395                         if (msc->fc > NX_MAX_FC || msc->mode > NX_MAX_MODE) {
396                                 dev_err(dev, "unknown function code/mode "
397                                         "combo: %d/%d (ignored)\n", msc->fc,
398                                         msc->mode);
399                                 goto next_loop;
400                         }
401 
402                         if (!trip->sglen || trip->databytelen < NX_PAGE_SIZE) {
403                                 dev_warn(dev, "bogus sglen/databytelen: "
404                                          "%u/%u (ignored)\n", trip->sglen,
405                                          trip->databytelen);
406                                 goto next_loop;
407                         }
408 
409                         switch (trip->keybitlen) {
410                         case 128:
411                         case 160:
412                                 props->ap[msc->fc][msc->mode][0].databytelen =
413                                         trip->databytelen;
414                                 props->ap[msc->fc][msc->mode][0].sglen =
415                                         trip->sglen;
416                                 break;
417                         case 192:
418                                 props->ap[msc->fc][msc->mode][1].databytelen =
419                                         trip->databytelen;
420                                 props->ap[msc->fc][msc->mode][1].sglen =
421                                         trip->sglen;
422                                 break;
423                         case 256:
424                                 if (msc->fc == NX_FC_AES) {
425                                         props->ap[msc->fc][msc->mode][2].
426                                                 databytelen = trip->databytelen;
427                                         props->ap[msc->fc][msc->mode][2].sglen =
428                                                 trip->sglen;
429                                 } else if (msc->fc == NX_FC_AES_HMAC ||
430                                            msc->fc == NX_FC_SHA) {
431                                         props->ap[msc->fc][msc->mode][1].
432                                                 databytelen = trip->databytelen;
433                                         props->ap[msc->fc][msc->mode][1].sglen =
434                                                 trip->sglen;
435                                 } else {
436                                         dev_warn(dev, "unknown function "
437                                                 "code/key bit len combo"
438                                                 ": (%u/256)\n", msc->fc);
439                                 }
440                                 break;
441                         case 512:
442                                 props->ap[msc->fc][msc->mode][2].databytelen =
443                                         trip->databytelen;
444                                 props->ap[msc->fc][msc->mode][2].sglen =
445                                         trip->sglen;
446                                 break;
447                         default:
448                                 dev_warn(dev, "unknown function code/key bit "
449                                          "len combo: (%u/%u)\n", msc->fc,
450                                          trip->keybitlen);
451                                 break;
452                         }
453 next_loop:
454                         bytes_so_far += sizeof(struct msc_triplet);
455                         trip++;
456                 }
457 
458                 msc = (struct max_sync_cop *)trip;
459         }
460 
461         props->flags |= NX_OF_FLAG_MAXSYNCCOP_SET;
462 }
463 
464 /**
465  * nx_of_init - read openFirmware values from the device tree
466  *
467  * @dev: device handle
468  * @props: pointer to struct to hold the properties values
469  *
470  * Called once at driver probe time, this function will read out the
471  * openFirmware properties we use at runtime. If all the OF properties are
472  * acceptable, when we exit this function props->flags will indicate that
473  * we're ready to register our crypto algorithms.
474  */
475 static void nx_of_init(struct device *dev, struct nx_of *props)
476 {
477         struct device_node *base_node = dev->of_node;
478         struct property *p;
479 
480         p = of_find_property(base_node, "status", NULL);
481         if (!p)
482                 dev_info(dev, "%s: property 'status' not found\n", __func__);
483         else
484                 nx_of_update_status(dev, p, props);
485 
486         p = of_find_property(base_node, "ibm,max-sg-len", NULL);
487         if (!p)
488                 dev_info(dev, "%s: property 'ibm,max-sg-len' not found\n",
489                          __func__);
490         else
491                 nx_of_update_sglen(dev, p, props);
492 
493         p = of_find_property(base_node, "ibm,max-sync-cop", NULL);
494         if (!p)
495                 dev_info(dev, "%s: property 'ibm,max-sync-cop' not found\n",
496                          __func__);
497         else
498                 nx_of_update_msc(dev, p, props);
499 }
500 
501 static bool nx_check_prop(struct device *dev, u32 fc, u32 mode, int slot)
502 {
503         struct alg_props *props = &nx_driver.of.ap[fc][mode][slot];
504 
505         if (!props->sglen || props->databytelen < NX_PAGE_SIZE) {
506                 if (dev)
507                         dev_warn(dev, "bogus sglen/databytelen for %u/%u/%u: "
508                                  "%u/%u (ignored)\n", fc, mode, slot,
509                                  props->sglen, props->databytelen);
510                 return false;
511         }
512 
513         return true;
514 }
515 
516 static bool nx_check_props(struct device *dev, u32 fc, u32 mode)
517 {
518         int i;
519 
520         for (i = 0; i < 3; i++)
521                 if (!nx_check_prop(dev, fc, mode, i))
522                         return false;
523 
524         return true;
525 }
526 
527 static int nx_register_alg(struct crypto_alg *alg, u32 fc, u32 mode)
528 {
529         return nx_check_props(&nx_driver.viodev->dev, fc, mode) ?
530                crypto_register_alg(alg) : 0;
531 }
532 
533 static int nx_register_aead(struct aead_alg *alg, u32 fc, u32 mode)
534 {
535         return nx_check_props(&nx_driver.viodev->dev, fc, mode) ?
536                crypto_register_aead(alg) : 0;
537 }
538 
539 static int nx_register_shash(struct shash_alg *alg, u32 fc, u32 mode, int slot)
540 {
541         return (slot >= 0 ? nx_check_prop(&nx_driver.viodev->dev,
542                                           fc, mode, slot) :
543                             nx_check_props(&nx_driver.viodev->dev, fc, mode)) ?
544                crypto_register_shash(alg) : 0;
545 }
546 
547 static void nx_unregister_alg(struct crypto_alg *alg, u32 fc, u32 mode)
548 {
549         if (nx_check_props(NULL, fc, mode))
550                 crypto_unregister_alg(alg);
551 }
552 
553 static void nx_unregister_aead(struct aead_alg *alg, u32 fc, u32 mode)
554 {
555         if (nx_check_props(NULL, fc, mode))
556                 crypto_unregister_aead(alg);
557 }
558 
559 static void nx_unregister_shash(struct shash_alg *alg, u32 fc, u32 mode,
560                                 int slot)
561 {
562         if (slot >= 0 ? nx_check_prop(NULL, fc, mode, slot) :
563                         nx_check_props(NULL, fc, mode))
564                 crypto_unregister_shash(alg);
565 }
566 
567 /**
568  * nx_register_algs - register algorithms with the crypto API
569  *
570  * Called from nx_probe()
571  *
572  * If all OF properties are in an acceptable state, the driver flags will
573  * indicate that we're ready and we'll create our debugfs files and register
574  * out crypto algorithms.
575  */
576 static int nx_register_algs(void)
577 {
578         int rc = -1;
579 
580         if (nx_driver.of.flags != NX_OF_FLAG_MASK_READY)
581                 goto out;
582 
583         memset(&nx_driver.stats, 0, sizeof(struct nx_stats));
584 
585         rc = NX_DEBUGFS_INIT(&nx_driver);
586         if (rc)
587                 goto out;
588 
589         nx_driver.of.status = NX_OKAY;
590 
591         rc = nx_register_alg(&nx_ecb_aes_alg, NX_FC_AES, NX_MODE_AES_ECB);
592         if (rc)
593                 goto out;
594 
595         rc = nx_register_alg(&nx_cbc_aes_alg, NX_FC_AES, NX_MODE_AES_CBC);
596         if (rc)
597                 goto out_unreg_ecb;
598 
599         rc = nx_register_alg(&nx_ctr_aes_alg, NX_FC_AES, NX_MODE_AES_CTR);
600         if (rc)
601                 goto out_unreg_cbc;
602 
603         rc = nx_register_alg(&nx_ctr3686_aes_alg, NX_FC_AES, NX_MODE_AES_CTR);
604         if (rc)
605                 goto out_unreg_ctr;
606 
607         rc = nx_register_aead(&nx_gcm_aes_alg, NX_FC_AES, NX_MODE_AES_GCM);
608         if (rc)
609                 goto out_unreg_ctr3686;
610 
611         rc = nx_register_aead(&nx_gcm4106_aes_alg, NX_FC_AES, NX_MODE_AES_GCM);
612         if (rc)
613                 goto out_unreg_gcm;
614 
615         rc = nx_register_alg(&nx_ccm_aes_alg, NX_FC_AES, NX_MODE_AES_CCM);
616         if (rc)
617                 goto out_unreg_gcm4106;
618 
619         rc = nx_register_alg(&nx_ccm4309_aes_alg, NX_FC_AES, NX_MODE_AES_CCM);
620         if (rc)
621                 goto out_unreg_ccm;
622 
623         rc = nx_register_shash(&nx_shash_sha256_alg, NX_FC_SHA, NX_MODE_SHA,
624                                NX_PROPS_SHA256);
625         if (rc)
626                 goto out_unreg_ccm4309;
627 
628         rc = nx_register_shash(&nx_shash_sha512_alg, NX_FC_SHA, NX_MODE_SHA,
629                                NX_PROPS_SHA512);
630         if (rc)
631                 goto out_unreg_s256;
632 
633         rc = nx_register_shash(&nx_shash_aes_xcbc_alg,
634                                NX_FC_AES, NX_MODE_AES_XCBC_MAC, -1);
635         if (rc)
636                 goto out_unreg_s512;
637 
638         goto out;
639 
640 out_unreg_s512:
641         nx_unregister_shash(&nx_shash_sha512_alg, NX_FC_SHA, NX_MODE_SHA,
642                             NX_PROPS_SHA512);
643 out_unreg_s256:
644         nx_unregister_shash(&nx_shash_sha256_alg, NX_FC_SHA, NX_MODE_SHA,
645                             NX_PROPS_SHA256);
646 out_unreg_ccm4309:
647         nx_unregister_alg(&nx_ccm4309_aes_alg, NX_FC_AES, NX_MODE_AES_CCM);
648 out_unreg_ccm:
649         nx_unregister_alg(&nx_ccm_aes_alg, NX_FC_AES, NX_MODE_AES_CCM);
650 out_unreg_gcm4106:
651         nx_unregister_aead(&nx_gcm4106_aes_alg, NX_FC_AES, NX_MODE_AES_GCM);
652 out_unreg_gcm:
653         nx_unregister_aead(&nx_gcm_aes_alg, NX_FC_AES, NX_MODE_AES_GCM);
654 out_unreg_ctr3686:
655         nx_unregister_alg(&nx_ctr3686_aes_alg, NX_FC_AES, NX_MODE_AES_CTR);
656 out_unreg_ctr:
657         nx_unregister_alg(&nx_ctr_aes_alg, NX_FC_AES, NX_MODE_AES_CTR);
658 out_unreg_cbc:
659         nx_unregister_alg(&nx_cbc_aes_alg, NX_FC_AES, NX_MODE_AES_CBC);
660 out_unreg_ecb:
661         nx_unregister_alg(&nx_ecb_aes_alg, NX_FC_AES, NX_MODE_AES_ECB);
662 out:
663         return rc;
664 }
665 
666 /**
667  * nx_crypto_ctx_init - create and initialize a crypto api context
668  *
669  * @nx_ctx: the crypto api context
670  * @fc: function code for the context
671  * @mode: the function code specific mode for this context
672  */
673 static int nx_crypto_ctx_init(struct nx_crypto_ctx *nx_ctx, u32 fc, u32 mode)
674 {
675         if (nx_driver.of.status != NX_OKAY) {
676                 pr_err("Attempt to initialize NX crypto context while device "
677                        "is not available!\n");
678                 return -ENODEV;
679         }
680 
681         /* we need an extra page for csbcpb_aead for these modes */
682         if (mode == NX_MODE_AES_GCM || mode == NX_MODE_AES_CCM)
683                 nx_ctx->kmem_len = (5 * NX_PAGE_SIZE) +
684                                    sizeof(struct nx_csbcpb);
685         else
686                 nx_ctx->kmem_len = (4 * NX_PAGE_SIZE) +
687                                    sizeof(struct nx_csbcpb);
688 
689         nx_ctx->kmem = kmalloc(nx_ctx->kmem_len, GFP_KERNEL);
690         if (!nx_ctx->kmem)
691                 return -ENOMEM;
692 
693         /* the csbcpb and scatterlists must be 4K aligned pages */
694         nx_ctx->csbcpb = (struct nx_csbcpb *)(round_up((u64)nx_ctx->kmem,
695                                                        (u64)NX_PAGE_SIZE));
696         nx_ctx->in_sg = (struct nx_sg *)((u8 *)nx_ctx->csbcpb + NX_PAGE_SIZE);
697         nx_ctx->out_sg = (struct nx_sg *)((u8 *)nx_ctx->in_sg + NX_PAGE_SIZE);
698 
699         if (mode == NX_MODE_AES_GCM || mode == NX_MODE_AES_CCM)
700                 nx_ctx->csbcpb_aead =
701                         (struct nx_csbcpb *)((u8 *)nx_ctx->out_sg +
702                                              NX_PAGE_SIZE);
703 
704         /* give each context a pointer to global stats and their OF
705          * properties */
706         nx_ctx->stats = &nx_driver.stats;
707         memcpy(nx_ctx->props, nx_driver.of.ap[fc][mode],
708                sizeof(struct alg_props) * 3);
709 
710         return 0;
711 }
712 
713 /* entry points from the crypto tfm initializers */
714 int nx_crypto_ctx_aes_ccm_init(struct crypto_tfm *tfm)
715 {
716         crypto_aead_set_reqsize(__crypto_aead_cast(tfm),
717                                 sizeof(struct nx_ccm_rctx));
718         return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
719                                   NX_MODE_AES_CCM);
720 }
721 
722 int nx_crypto_ctx_aes_gcm_init(struct crypto_aead *tfm)
723 {
724         crypto_aead_set_reqsize(tfm, sizeof(struct nx_gcm_rctx));
725         return nx_crypto_ctx_init(crypto_aead_ctx(tfm), NX_FC_AES,
726                                   NX_MODE_AES_GCM);
727 }
728 
729 int nx_crypto_ctx_aes_ctr_init(struct crypto_tfm *tfm)
730 {
731         return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
732                                   NX_MODE_AES_CTR);
733 }
734 
735 int nx_crypto_ctx_aes_cbc_init(struct crypto_tfm *tfm)
736 {
737         return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
738                                   NX_MODE_AES_CBC);
739 }
740 
741 int nx_crypto_ctx_aes_ecb_init(struct crypto_tfm *tfm)
742 {
743         return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
744                                   NX_MODE_AES_ECB);
745 }
746 
747 int nx_crypto_ctx_sha_init(struct crypto_tfm *tfm)
748 {
749         return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_SHA, NX_MODE_SHA);
750 }
751 
752 int nx_crypto_ctx_aes_xcbc_init(struct crypto_tfm *tfm)
753 {
754         return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
755                                   NX_MODE_AES_XCBC_MAC);
756 }
757 
758 /**
759  * nx_crypto_ctx_exit - destroy a crypto api context
760  *
761  * @tfm: the crypto transform pointer for the context
762  *
763  * As crypto API contexts are destroyed, this exit hook is called to free the
764  * memory associated with it.
765  */
766 void nx_crypto_ctx_exit(struct crypto_tfm *tfm)
767 {
768         struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm);
769 
770         kzfree(nx_ctx->kmem);
771         nx_ctx->csbcpb = NULL;
772         nx_ctx->csbcpb_aead = NULL;
773         nx_ctx->in_sg = NULL;
774         nx_ctx->out_sg = NULL;
775 }
776 
777 void nx_crypto_ctx_aead_exit(struct crypto_aead *tfm)
778 {
779         struct nx_crypto_ctx *nx_ctx = crypto_aead_ctx(tfm);
780 
781         kzfree(nx_ctx->kmem);
782 }
783 
784 static int nx_probe(struct vio_dev *viodev, const struct vio_device_id *id)
785 {
786         dev_dbg(&viodev->dev, "driver probed: %s resource id: 0x%x\n",
787                 viodev->name, viodev->resource_id);
788 
789         if (nx_driver.viodev) {
790                 dev_err(&viodev->dev, "%s: Attempt to register more than one "
791                         "instance of the hardware\n", __func__);
792                 return -EINVAL;
793         }
794 
795         nx_driver.viodev = viodev;
796 
797         nx_of_init(&viodev->dev, &nx_driver.of);
798 
799         return nx_register_algs();
800 }
801 
802 static int nx_remove(struct vio_dev *viodev)
803 {
804         dev_dbg(&viodev->dev, "entering nx_remove for UA 0x%x\n",
805                 viodev->unit_address);
806 
807         if (nx_driver.of.status == NX_OKAY) {
808                 NX_DEBUGFS_FINI(&nx_driver);
809 
810                 nx_unregister_shash(&nx_shash_aes_xcbc_alg,
811                                     NX_FC_AES, NX_MODE_AES_XCBC_MAC, -1);
812                 nx_unregister_shash(&nx_shash_sha512_alg,
813                                     NX_FC_SHA, NX_MODE_SHA, NX_PROPS_SHA256);
814                 nx_unregister_shash(&nx_shash_sha256_alg,
815                                     NX_FC_SHA, NX_MODE_SHA, NX_PROPS_SHA512);
816                 nx_unregister_alg(&nx_ccm4309_aes_alg,
817                                   NX_FC_AES, NX_MODE_AES_CCM);
818                 nx_unregister_alg(&nx_ccm_aes_alg, NX_FC_AES, NX_MODE_AES_CCM);
819                 nx_unregister_aead(&nx_gcm4106_aes_alg,
820                                    NX_FC_AES, NX_MODE_AES_GCM);
821                 nx_unregister_aead(&nx_gcm_aes_alg,
822                                    NX_FC_AES, NX_MODE_AES_GCM);
823                 nx_unregister_alg(&nx_ctr3686_aes_alg,
824                                   NX_FC_AES, NX_MODE_AES_CTR);
825                 nx_unregister_alg(&nx_ctr_aes_alg, NX_FC_AES, NX_MODE_AES_CTR);
826                 nx_unregister_alg(&nx_cbc_aes_alg, NX_FC_AES, NX_MODE_AES_CBC);
827                 nx_unregister_alg(&nx_ecb_aes_alg, NX_FC_AES, NX_MODE_AES_ECB);
828         }
829 
830         return 0;
831 }
832 
833 
834 /* module wide initialization/cleanup */
835 static int __init nx_init(void)
836 {
837         return vio_register_driver(&nx_driver.viodriver);
838 }
839 
840 static void __exit nx_fini(void)
841 {
842         vio_unregister_driver(&nx_driver.viodriver);
843 }
844 
845 static struct vio_device_id nx_crypto_driver_ids[] = {
846         { "ibm,sym-encryption-v1", "ibm,sym-encryption" },
847         { "", "" }
848 };
849 MODULE_DEVICE_TABLE(vio, nx_crypto_driver_ids);
850 
851 /* driver state structure */
852 struct nx_crypto_driver nx_driver = {
853         .viodriver = {
854                 .id_table = nx_crypto_driver_ids,
855                 .probe = nx_probe,
856                 .remove = nx_remove,
857                 .name  = NX_NAME,
858         },
859 };
860 
861 module_init(nx_init);
862 module_exit(nx_fini);
863 
864 MODULE_AUTHOR("Kent Yoder <yoder1@us.ibm.com>");
865 MODULE_DESCRIPTION(NX_STRING);
866 MODULE_LICENSE("GPL");
867 MODULE_VERSION(NX_VERSION);
868 

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