Version:  2.0.40 2.2.26 2.4.37 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18

Linux/drivers/crypto/nx/nx.c

  1 /**
  2  * Routines supporting the Power 7+ Nest Accelerators driver
  3  *
  4  * Copyright (C) 2011-2012 International Business Machines Inc.
  5  *
  6  * This program is free software; you can redistribute it and/or modify
  7  * it under the terms of the GNU General Public License as published by
  8  * the Free Software Foundation; version 2 only.
  9  *
 10  * This program is distributed in the hope that it will be useful,
 11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 13  * GNU General Public License for more details.
 14  *
 15  * You should have received a copy of the GNU General Public License
 16  * along with this program; if not, write to the Free Software
 17  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 18  *
 19  * Author: Kent Yoder <yoder1@us.ibm.com>
 20  */
 21 
 22 #include <crypto/internal/hash.h>
 23 #include <crypto/hash.h>
 24 #include <crypto/aes.h>
 25 #include <crypto/sha.h>
 26 #include <crypto/algapi.h>
 27 #include <crypto/scatterwalk.h>
 28 #include <linux/module.h>
 29 #include <linux/moduleparam.h>
 30 #include <linux/types.h>
 31 #include <linux/mm.h>
 32 #include <linux/crypto.h>
 33 #include <linux/scatterlist.h>
 34 #include <linux/device.h>
 35 #include <linux/of.h>
 36 #include <asm/hvcall.h>
 37 #include <asm/vio.h>
 38 
 39 #include "nx_csbcpb.h"
 40 #include "nx.h"
 41 
 42 
 43 /**
 44  * nx_hcall_sync - make an H_COP_OP hcall for the passed in op structure
 45  *
 46  * @nx_ctx: the crypto context handle
 47  * @op: PFO operation struct to pass in
 48  * @may_sleep: flag indicating the request can sleep
 49  *
 50  * Make the hcall, retrying while the hardware is busy. If we cannot yield
 51  * the thread, limit the number of retries to 10 here.
 52  */
 53 int nx_hcall_sync(struct nx_crypto_ctx *nx_ctx,
 54                   struct vio_pfo_op    *op,
 55                   u32                   may_sleep)
 56 {
 57         int rc, retries = 10;
 58         struct vio_dev *viodev = nx_driver.viodev;
 59 
 60         atomic_inc(&(nx_ctx->stats->sync_ops));
 61 
 62         do {
 63                 rc = vio_h_cop_sync(viodev, op);
 64         } while (rc == -EBUSY && !may_sleep && retries--);
 65 
 66         if (rc) {
 67                 dev_dbg(&viodev->dev, "vio_h_cop_sync failed: rc: %d "
 68                         "hcall rc: %ld\n", rc, op->hcall_err);
 69                 atomic_inc(&(nx_ctx->stats->errors));
 70                 atomic_set(&(nx_ctx->stats->last_error), op->hcall_err);
 71                 atomic_set(&(nx_ctx->stats->last_error_pid), current->pid);
 72         }
 73 
 74         return rc;
 75 }
 76 
 77 /**
 78  * nx_build_sg_list - build an NX scatter list describing a single  buffer
 79  *
 80  * @sg_head: pointer to the first scatter list element to build
 81  * @start_addr: pointer to the linear buffer
 82  * @len: length of the data at @start_addr
 83  * @sgmax: the largest number of scatter list elements we're allowed to create
 84  *
 85  * This function will start writing nx_sg elements at @sg_head and keep
 86  * writing them until all of the data from @start_addr is described or
 87  * until sgmax elements have been written. Scatter list elements will be
 88  * created such that none of the elements describes a buffer that crosses a 4K
 89  * boundary.
 90  */
 91 struct nx_sg *nx_build_sg_list(struct nx_sg *sg_head,
 92                                u8           *start_addr,
 93                                unsigned int  len,
 94                                u32           sgmax)
 95 {
 96         unsigned int sg_len = 0;
 97         struct nx_sg *sg;
 98         u64 sg_addr = (u64)start_addr;
 99         u64 end_addr;
100 
101         /* determine the start and end for this address range - slightly
102          * different if this is in VMALLOC_REGION */
103         if (is_vmalloc_addr(start_addr))
104                 sg_addr = page_to_phys(vmalloc_to_page(start_addr))
105                           + offset_in_page(sg_addr);
106         else
107                 sg_addr = __pa(sg_addr);
108 
109         end_addr = sg_addr + len;
110 
111         /* each iteration will write one struct nx_sg element and add the
112          * length of data described by that element to sg_len. Once @len bytes
113          * have been described (or @sgmax elements have been written), the
114          * loop ends. min_t is used to ensure @end_addr falls on the same page
115          * as sg_addr, if not, we need to create another nx_sg element for the
116          * data on the next page.
117          *
118          * Also when using vmalloc'ed data, every time that a system page
119          * boundary is crossed the physical address needs to be re-calculated.
120          */
121         for (sg = sg_head; sg_len < len; sg++) {
122                 u64 next_page;
123 
124                 sg->addr = sg_addr;
125                 sg_addr = min_t(u64, NX_PAGE_NUM(sg_addr + NX_PAGE_SIZE),
126                                 end_addr);
127 
128                 next_page = (sg->addr & PAGE_MASK) + PAGE_SIZE;
129                 sg->len = min_t(u64, sg_addr, next_page) - sg->addr;
130                 sg_len += sg->len;
131 
132                 if (sg_addr >= next_page &&
133                                 is_vmalloc_addr(start_addr + sg_len)) {
134                         sg_addr = page_to_phys(vmalloc_to_page(
135                                                 start_addr + sg_len));
136                         end_addr = sg_addr + len - sg_len;
137                 }
138 
139                 if ((sg - sg_head) == sgmax) {
140                         pr_err("nx: scatter/gather list overflow, pid: %d\n",
141                                current->pid);
142                         return NULL;
143                 }
144         }
145 
146         /* return the moved sg_head pointer */
147         return sg;
148 }
149 
150 /**
151  * nx_walk_and_build - walk a linux scatterlist and build an nx scatterlist
152  *
153  * @nx_dst: pointer to the first nx_sg element to write
154  * @sglen: max number of nx_sg entries we're allowed to write
155  * @sg_src: pointer to the source linux scatterlist to walk
156  * @start: number of bytes to fast-forward past at the beginning of @sg_src
157  * @src_len: number of bytes to walk in @sg_src
158  */
159 struct nx_sg *nx_walk_and_build(struct nx_sg       *nx_dst,
160                                 unsigned int        sglen,
161                                 struct scatterlist *sg_src,
162                                 unsigned int        start,
163                                 unsigned int        src_len)
164 {
165         struct scatter_walk walk;
166         struct nx_sg *nx_sg = nx_dst;
167         unsigned int n, offset = 0, len = src_len;
168         char *dst;
169 
170         /* we need to fast forward through @start bytes first */
171         for (;;) {
172                 scatterwalk_start(&walk, sg_src);
173 
174                 if (start < offset + sg_src->length)
175                         break;
176 
177                 offset += sg_src->length;
178                 sg_src = scatterwalk_sg_next(sg_src);
179         }
180 
181         /* start - offset is the number of bytes to advance in the scatterlist
182          * element we're currently looking at */
183         scatterwalk_advance(&walk, start - offset);
184 
185         while (len && nx_sg) {
186                 n = scatterwalk_clamp(&walk, len);
187                 if (!n) {
188                         scatterwalk_start(&walk, sg_next(walk.sg));
189                         n = scatterwalk_clamp(&walk, len);
190                 }
191                 dst = scatterwalk_map(&walk);
192 
193                 nx_sg = nx_build_sg_list(nx_sg, dst, n, sglen);
194                 len -= n;
195 
196                 scatterwalk_unmap(dst);
197                 scatterwalk_advance(&walk, n);
198                 scatterwalk_done(&walk, SCATTERWALK_FROM_SG, len);
199         }
200 
201         /* return the moved destination pointer */
202         return nx_sg;
203 }
204 
205 /**
206  * nx_build_sg_lists - walk the input scatterlists and build arrays of NX
207  *                     scatterlists based on them.
208  *
209  * @nx_ctx: NX crypto context for the lists we're building
210  * @desc: the block cipher descriptor for the operation
211  * @dst: destination scatterlist
212  * @src: source scatterlist
213  * @nbytes: length of data described in the scatterlists
214  * @offset: number of bytes to fast-forward past at the beginning of
215  *          scatterlists.
216  * @iv: destination for the iv data, if the algorithm requires it
217  *
218  * This is common code shared by all the AES algorithms. It uses the block
219  * cipher walk routines to traverse input and output scatterlists, building
220  * corresponding NX scatterlists
221  */
222 int nx_build_sg_lists(struct nx_crypto_ctx  *nx_ctx,
223                       struct blkcipher_desc *desc,
224                       struct scatterlist    *dst,
225                       struct scatterlist    *src,
226                       unsigned int           nbytes,
227                       unsigned int           offset,
228                       u8                    *iv)
229 {
230         struct nx_sg *nx_insg = nx_ctx->in_sg;
231         struct nx_sg *nx_outsg = nx_ctx->out_sg;
232 
233         if (iv)
234                 memcpy(iv, desc->info, AES_BLOCK_SIZE);
235 
236         nx_insg = nx_walk_and_build(nx_insg, nx_ctx->ap->sglen, src,
237                                     offset, nbytes);
238         nx_outsg = nx_walk_and_build(nx_outsg, nx_ctx->ap->sglen, dst,
239                                     offset, nbytes);
240 
241         /* these lengths should be negative, which will indicate to phyp that
242          * the input and output parameters are scatterlists, not linear
243          * buffers */
244         nx_ctx->op.inlen = (nx_ctx->in_sg - nx_insg) * sizeof(struct nx_sg);
245         nx_ctx->op.outlen = (nx_ctx->out_sg - nx_outsg) * sizeof(struct nx_sg);
246 
247         return 0;
248 }
249 
250 /**
251  * nx_ctx_init - initialize an nx_ctx's vio_pfo_op struct
252  *
253  * @nx_ctx: the nx context to initialize
254  * @function: the function code for the op
255  */
256 void nx_ctx_init(struct nx_crypto_ctx *nx_ctx, unsigned int function)
257 {
258         spin_lock_init(&nx_ctx->lock);
259         memset(nx_ctx->kmem, 0, nx_ctx->kmem_len);
260         nx_ctx->csbcpb->csb.valid |= NX_CSB_VALID_BIT;
261 
262         nx_ctx->op.flags = function;
263         nx_ctx->op.csbcpb = __pa(nx_ctx->csbcpb);
264         nx_ctx->op.in = __pa(nx_ctx->in_sg);
265         nx_ctx->op.out = __pa(nx_ctx->out_sg);
266 
267         if (nx_ctx->csbcpb_aead) {
268                 nx_ctx->csbcpb_aead->csb.valid |= NX_CSB_VALID_BIT;
269 
270                 nx_ctx->op_aead.flags = function;
271                 nx_ctx->op_aead.csbcpb = __pa(nx_ctx->csbcpb_aead);
272                 nx_ctx->op_aead.in = __pa(nx_ctx->in_sg);
273                 nx_ctx->op_aead.out = __pa(nx_ctx->out_sg);
274         }
275 }
276 
277 static void nx_of_update_status(struct device   *dev,
278                                struct property *p,
279                                struct nx_of    *props)
280 {
281         if (!strncmp(p->value, "okay", p->length)) {
282                 props->status = NX_WAITING;
283                 props->flags |= NX_OF_FLAG_STATUS_SET;
284         } else {
285                 dev_info(dev, "%s: status '%s' is not 'okay'\n", __func__,
286                          (char *)p->value);
287         }
288 }
289 
290 static void nx_of_update_sglen(struct device   *dev,
291                                struct property *p,
292                                struct nx_of    *props)
293 {
294         if (p->length != sizeof(props->max_sg_len)) {
295                 dev_err(dev, "%s: unexpected format for "
296                         "ibm,max-sg-len property\n", __func__);
297                 dev_dbg(dev, "%s: ibm,max-sg-len is %d bytes "
298                         "long, expected %zd bytes\n", __func__,
299                         p->length, sizeof(props->max_sg_len));
300                 return;
301         }
302 
303         props->max_sg_len = *(u32 *)p->value;
304         props->flags |= NX_OF_FLAG_MAXSGLEN_SET;
305 }
306 
307 static void nx_of_update_msc(struct device   *dev,
308                              struct property *p,
309                              struct nx_of    *props)
310 {
311         struct msc_triplet *trip;
312         struct max_sync_cop *msc;
313         unsigned int bytes_so_far, i, lenp;
314 
315         msc = (struct max_sync_cop *)p->value;
316         lenp = p->length;
317 
318         /* You can't tell if the data read in for this property is sane by its
319          * size alone. This is because there are sizes embedded in the data
320          * structure. The best we can do is check lengths as we parse and bail
321          * as soon as a length error is detected. */
322         bytes_so_far = 0;
323 
324         while ((bytes_so_far + sizeof(struct max_sync_cop)) <= lenp) {
325                 bytes_so_far += sizeof(struct max_sync_cop);
326 
327                 trip = msc->trip;
328 
329                 for (i = 0;
330                      ((bytes_so_far + sizeof(struct msc_triplet)) <= lenp) &&
331                      i < msc->triplets;
332                      i++) {
333                         if (msc->fc > NX_MAX_FC || msc->mode > NX_MAX_MODE) {
334                                 dev_err(dev, "unknown function code/mode "
335                                         "combo: %d/%d (ignored)\n", msc->fc,
336                                         msc->mode);
337                                 goto next_loop;
338                         }
339 
340                         switch (trip->keybitlen) {
341                         case 128:
342                         case 160:
343                                 props->ap[msc->fc][msc->mode][0].databytelen =
344                                         trip->databytelen;
345                                 props->ap[msc->fc][msc->mode][0].sglen =
346                                         trip->sglen;
347                                 break;
348                         case 192:
349                                 props->ap[msc->fc][msc->mode][1].databytelen =
350                                         trip->databytelen;
351                                 props->ap[msc->fc][msc->mode][1].sglen =
352                                         trip->sglen;
353                                 break;
354                         case 256:
355                                 if (msc->fc == NX_FC_AES) {
356                                         props->ap[msc->fc][msc->mode][2].
357                                                 databytelen = trip->databytelen;
358                                         props->ap[msc->fc][msc->mode][2].sglen =
359                                                 trip->sglen;
360                                 } else if (msc->fc == NX_FC_AES_HMAC ||
361                                            msc->fc == NX_FC_SHA) {
362                                         props->ap[msc->fc][msc->mode][1].
363                                                 databytelen = trip->databytelen;
364                                         props->ap[msc->fc][msc->mode][1].sglen =
365                                                 trip->sglen;
366                                 } else {
367                                         dev_warn(dev, "unknown function "
368                                                 "code/key bit len combo"
369                                                 ": (%u/256)\n", msc->fc);
370                                 }
371                                 break;
372                         case 512:
373                                 props->ap[msc->fc][msc->mode][2].databytelen =
374                                         trip->databytelen;
375                                 props->ap[msc->fc][msc->mode][2].sglen =
376                                         trip->sglen;
377                                 break;
378                         default:
379                                 dev_warn(dev, "unknown function code/key bit "
380                                          "len combo: (%u/%u)\n", msc->fc,
381                                          trip->keybitlen);
382                                 break;
383                         }
384 next_loop:
385                         bytes_so_far += sizeof(struct msc_triplet);
386                         trip++;
387                 }
388 
389                 msc = (struct max_sync_cop *)trip;
390         }
391 
392         props->flags |= NX_OF_FLAG_MAXSYNCCOP_SET;
393 }
394 
395 /**
396  * nx_of_init - read openFirmware values from the device tree
397  *
398  * @dev: device handle
399  * @props: pointer to struct to hold the properties values
400  *
401  * Called once at driver probe time, this function will read out the
402  * openFirmware properties we use at runtime. If all the OF properties are
403  * acceptable, when we exit this function props->flags will indicate that
404  * we're ready to register our crypto algorithms.
405  */
406 static void nx_of_init(struct device *dev, struct nx_of *props)
407 {
408         struct device_node *base_node = dev->of_node;
409         struct property *p;
410 
411         p = of_find_property(base_node, "status", NULL);
412         if (!p)
413                 dev_info(dev, "%s: property 'status' not found\n", __func__);
414         else
415                 nx_of_update_status(dev, p, props);
416 
417         p = of_find_property(base_node, "ibm,max-sg-len", NULL);
418         if (!p)
419                 dev_info(dev, "%s: property 'ibm,max-sg-len' not found\n",
420                          __func__);
421         else
422                 nx_of_update_sglen(dev, p, props);
423 
424         p = of_find_property(base_node, "ibm,max-sync-cop", NULL);
425         if (!p)
426                 dev_info(dev, "%s: property 'ibm,max-sync-cop' not found\n",
427                          __func__);
428         else
429                 nx_of_update_msc(dev, p, props);
430 }
431 
432 /**
433  * nx_register_algs - register algorithms with the crypto API
434  *
435  * Called from nx_probe()
436  *
437  * If all OF properties are in an acceptable state, the driver flags will
438  * indicate that we're ready and we'll create our debugfs files and register
439  * out crypto algorithms.
440  */
441 static int nx_register_algs(void)
442 {
443         int rc = -1;
444 
445         if (nx_driver.of.flags != NX_OF_FLAG_MASK_READY)
446                 goto out;
447 
448         memset(&nx_driver.stats, 0, sizeof(struct nx_stats));
449 
450         rc = NX_DEBUGFS_INIT(&nx_driver);
451         if (rc)
452                 goto out;
453 
454         nx_driver.of.status = NX_OKAY;
455 
456         rc = crypto_register_alg(&nx_ecb_aes_alg);
457         if (rc)
458                 goto out;
459 
460         rc = crypto_register_alg(&nx_cbc_aes_alg);
461         if (rc)
462                 goto out_unreg_ecb;
463 
464         rc = crypto_register_alg(&nx_ctr_aes_alg);
465         if (rc)
466                 goto out_unreg_cbc;
467 
468         rc = crypto_register_alg(&nx_ctr3686_aes_alg);
469         if (rc)
470                 goto out_unreg_ctr;
471 
472         rc = crypto_register_alg(&nx_gcm_aes_alg);
473         if (rc)
474                 goto out_unreg_ctr3686;
475 
476         rc = crypto_register_alg(&nx_gcm4106_aes_alg);
477         if (rc)
478                 goto out_unreg_gcm;
479 
480         rc = crypto_register_alg(&nx_ccm_aes_alg);
481         if (rc)
482                 goto out_unreg_gcm4106;
483 
484         rc = crypto_register_alg(&nx_ccm4309_aes_alg);
485         if (rc)
486                 goto out_unreg_ccm;
487 
488         rc = crypto_register_shash(&nx_shash_sha256_alg);
489         if (rc)
490                 goto out_unreg_ccm4309;
491 
492         rc = crypto_register_shash(&nx_shash_sha512_alg);
493         if (rc)
494                 goto out_unreg_s256;
495 
496         rc = crypto_register_shash(&nx_shash_aes_xcbc_alg);
497         if (rc)
498                 goto out_unreg_s512;
499 
500         goto out;
501 
502 out_unreg_s512:
503         crypto_unregister_shash(&nx_shash_sha512_alg);
504 out_unreg_s256:
505         crypto_unregister_shash(&nx_shash_sha256_alg);
506 out_unreg_ccm4309:
507         crypto_unregister_alg(&nx_ccm4309_aes_alg);
508 out_unreg_ccm:
509         crypto_unregister_alg(&nx_ccm_aes_alg);
510 out_unreg_gcm4106:
511         crypto_unregister_alg(&nx_gcm4106_aes_alg);
512 out_unreg_gcm:
513         crypto_unregister_alg(&nx_gcm_aes_alg);
514 out_unreg_ctr3686:
515         crypto_unregister_alg(&nx_ctr3686_aes_alg);
516 out_unreg_ctr:
517         crypto_unregister_alg(&nx_ctr_aes_alg);
518 out_unreg_cbc:
519         crypto_unregister_alg(&nx_cbc_aes_alg);
520 out_unreg_ecb:
521         crypto_unregister_alg(&nx_ecb_aes_alg);
522 out:
523         return rc;
524 }
525 
526 /**
527  * nx_crypto_ctx_init - create and initialize a crypto api context
528  *
529  * @nx_ctx: the crypto api context
530  * @fc: function code for the context
531  * @mode: the function code specific mode for this context
532  */
533 static int nx_crypto_ctx_init(struct nx_crypto_ctx *nx_ctx, u32 fc, u32 mode)
534 {
535         if (nx_driver.of.status != NX_OKAY) {
536                 pr_err("Attempt to initialize NX crypto context while device "
537                        "is not available!\n");
538                 return -ENODEV;
539         }
540 
541         /* we need an extra page for csbcpb_aead for these modes */
542         if (mode == NX_MODE_AES_GCM || mode == NX_MODE_AES_CCM)
543                 nx_ctx->kmem_len = (4 * NX_PAGE_SIZE) +
544                                    sizeof(struct nx_csbcpb);
545         else
546                 nx_ctx->kmem_len = (3 * NX_PAGE_SIZE) +
547                                    sizeof(struct nx_csbcpb);
548 
549         nx_ctx->kmem = kmalloc(nx_ctx->kmem_len, GFP_KERNEL);
550         if (!nx_ctx->kmem)
551                 return -ENOMEM;
552 
553         /* the csbcpb and scatterlists must be 4K aligned pages */
554         nx_ctx->csbcpb = (struct nx_csbcpb *)(round_up((u64)nx_ctx->kmem,
555                                                        (u64)NX_PAGE_SIZE));
556         nx_ctx->in_sg = (struct nx_sg *)((u8 *)nx_ctx->csbcpb + NX_PAGE_SIZE);
557         nx_ctx->out_sg = (struct nx_sg *)((u8 *)nx_ctx->in_sg + NX_PAGE_SIZE);
558 
559         if (mode == NX_MODE_AES_GCM || mode == NX_MODE_AES_CCM)
560                 nx_ctx->csbcpb_aead =
561                         (struct nx_csbcpb *)((u8 *)nx_ctx->out_sg +
562                                              NX_PAGE_SIZE);
563 
564         /* give each context a pointer to global stats and their OF
565          * properties */
566         nx_ctx->stats = &nx_driver.stats;
567         memcpy(nx_ctx->props, nx_driver.of.ap[fc][mode],
568                sizeof(struct alg_props) * 3);
569 
570         return 0;
571 }
572 
573 /* entry points from the crypto tfm initializers */
574 int nx_crypto_ctx_aes_ccm_init(struct crypto_tfm *tfm)
575 {
576         return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
577                                   NX_MODE_AES_CCM);
578 }
579 
580 int nx_crypto_ctx_aes_gcm_init(struct crypto_tfm *tfm)
581 {
582         return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
583                                   NX_MODE_AES_GCM);
584 }
585 
586 int nx_crypto_ctx_aes_ctr_init(struct crypto_tfm *tfm)
587 {
588         return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
589                                   NX_MODE_AES_CTR);
590 }
591 
592 int nx_crypto_ctx_aes_cbc_init(struct crypto_tfm *tfm)
593 {
594         return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
595                                   NX_MODE_AES_CBC);
596 }
597 
598 int nx_crypto_ctx_aes_ecb_init(struct crypto_tfm *tfm)
599 {
600         return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
601                                   NX_MODE_AES_ECB);
602 }
603 
604 int nx_crypto_ctx_sha_init(struct crypto_tfm *tfm)
605 {
606         return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_SHA, NX_MODE_SHA);
607 }
608 
609 int nx_crypto_ctx_aes_xcbc_init(struct crypto_tfm *tfm)
610 {
611         return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
612                                   NX_MODE_AES_XCBC_MAC);
613 }
614 
615 /**
616  * nx_crypto_ctx_exit - destroy a crypto api context
617  *
618  * @tfm: the crypto transform pointer for the context
619  *
620  * As crypto API contexts are destroyed, this exit hook is called to free the
621  * memory associated with it.
622  */
623 void nx_crypto_ctx_exit(struct crypto_tfm *tfm)
624 {
625         struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm);
626 
627         kzfree(nx_ctx->kmem);
628         nx_ctx->csbcpb = NULL;
629         nx_ctx->csbcpb_aead = NULL;
630         nx_ctx->in_sg = NULL;
631         nx_ctx->out_sg = NULL;
632 }
633 
634 static int nx_probe(struct vio_dev *viodev, const struct vio_device_id *id)
635 {
636         dev_dbg(&viodev->dev, "driver probed: %s resource id: 0x%x\n",
637                 viodev->name, viodev->resource_id);
638 
639         if (nx_driver.viodev) {
640                 dev_err(&viodev->dev, "%s: Attempt to register more than one "
641                         "instance of the hardware\n", __func__);
642                 return -EINVAL;
643         }
644 
645         nx_driver.viodev = viodev;
646 
647         nx_of_init(&viodev->dev, &nx_driver.of);
648 
649         return nx_register_algs();
650 }
651 
652 static int nx_remove(struct vio_dev *viodev)
653 {
654         dev_dbg(&viodev->dev, "entering nx_remove for UA 0x%x\n",
655                 viodev->unit_address);
656 
657         if (nx_driver.of.status == NX_OKAY) {
658                 NX_DEBUGFS_FINI(&nx_driver);
659 
660                 crypto_unregister_alg(&nx_ccm_aes_alg);
661                 crypto_unregister_alg(&nx_ccm4309_aes_alg);
662                 crypto_unregister_alg(&nx_gcm_aes_alg);
663                 crypto_unregister_alg(&nx_gcm4106_aes_alg);
664                 crypto_unregister_alg(&nx_ctr_aes_alg);
665                 crypto_unregister_alg(&nx_ctr3686_aes_alg);
666                 crypto_unregister_alg(&nx_cbc_aes_alg);
667                 crypto_unregister_alg(&nx_ecb_aes_alg);
668                 crypto_unregister_shash(&nx_shash_sha256_alg);
669                 crypto_unregister_shash(&nx_shash_sha512_alg);
670                 crypto_unregister_shash(&nx_shash_aes_xcbc_alg);
671         }
672 
673         return 0;
674 }
675 
676 
677 /* module wide initialization/cleanup */
678 static int __init nx_init(void)
679 {
680         return vio_register_driver(&nx_driver.viodriver);
681 }
682 
683 static void __exit nx_fini(void)
684 {
685         vio_unregister_driver(&nx_driver.viodriver);
686 }
687 
688 static struct vio_device_id nx_crypto_driver_ids[] = {
689         { "ibm,sym-encryption-v1", "ibm,sym-encryption" },
690         { "", "" }
691 };
692 MODULE_DEVICE_TABLE(vio, nx_crypto_driver_ids);
693 
694 /* driver state structure */
695 struct nx_crypto_driver nx_driver = {
696         .viodriver = {
697                 .id_table = nx_crypto_driver_ids,
698                 .probe = nx_probe,
699                 .remove = nx_remove,
700                 .name  = NX_NAME,
701         },
702 };
703 
704 module_init(nx_init);
705 module_exit(nx_fini);
706 
707 MODULE_AUTHOR("Kent Yoder <yoder1@us.ibm.com>");
708 MODULE_DESCRIPTION(NX_STRING);
709 MODULE_LICENSE("GPL");
710 MODULE_VERSION(NX_VERSION);
711 

This page was automatically generated by LXR 0.3.1 (source).  •  Linux is a registered trademark of Linus Torvalds  •  Contact us