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Linux/drivers/clocksource/bcm_kona_timer.c

  1 /*
  2  * Copyright (C) 2012 Broadcom Corporation
  3  *
  4  * This program is free software; you can redistribute it and/or
  5  * modify it under the terms of the GNU General Public License as
  6  * published by the Free Software Foundation version 2.
  7  *
  8  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  9  * kind, whether express or implied; without even the implied warranty
 10  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 11  * GNU General Public License for more details.
 12  */
 13 
 14 #include <linux/init.h>
 15 #include <linux/irq.h>
 16 #include <linux/interrupt.h>
 17 #include <linux/jiffies.h>
 18 #include <linux/clockchips.h>
 19 #include <linux/types.h>
 20 #include <linux/clk.h>
 21 
 22 #include <linux/io.h>
 23 #include <asm/mach/time.h>
 24 
 25 #include <linux/of.h>
 26 #include <linux/of_address.h>
 27 #include <linux/of_irq.h>
 28 
 29 
 30 #define KONA_GPTIMER_STCS_OFFSET                        0x00000000
 31 #define KONA_GPTIMER_STCLO_OFFSET                       0x00000004
 32 #define KONA_GPTIMER_STCHI_OFFSET                       0x00000008
 33 #define KONA_GPTIMER_STCM0_OFFSET                       0x0000000C
 34 
 35 #define KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT             0
 36 #define KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT          4
 37 
 38 struct kona_bcm_timers {
 39         int tmr_irq;
 40         void __iomem *tmr_regs;
 41 };
 42 
 43 static struct kona_bcm_timers timers;
 44 
 45 static u32 arch_timer_rate;
 46 
 47 /*
 48  * We use the peripheral timers for system tick, the cpu global timer for
 49  * profile tick
 50  */
 51 static void kona_timer_disable_and_clear(void __iomem *base)
 52 {
 53         uint32_t reg;
 54 
 55         /*
 56          * clear and disable interrupts
 57          * We are using compare/match register 0 for our system interrupts
 58          */
 59         reg = readl(base + KONA_GPTIMER_STCS_OFFSET);
 60 
 61         /* Clear compare (0) interrupt */
 62         reg |= 1 << KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT;
 63         /* disable compare */
 64         reg &= ~(1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
 65 
 66         writel(reg, base + KONA_GPTIMER_STCS_OFFSET);
 67 
 68 }
 69 
 70 static void
 71 kona_timer_get_counter(void *timer_base, uint32_t *msw, uint32_t *lsw)
 72 {
 73         void __iomem *base = IOMEM(timer_base);
 74         int loop_limit = 4;
 75 
 76         /*
 77          * Read 64-bit free running counter
 78          * 1. Read hi-word
 79          * 2. Read low-word
 80          * 3. Read hi-word again
 81          * 4.1
 82          *      if new hi-word is not equal to previously read hi-word, then
 83          *      start from #1
 84          * 4.2
 85          *      if new hi-word is equal to previously read hi-word then stop.
 86          */
 87 
 88         while (--loop_limit) {
 89                 *msw = readl(base + KONA_GPTIMER_STCHI_OFFSET);
 90                 *lsw = readl(base + KONA_GPTIMER_STCLO_OFFSET);
 91                 if (*msw == readl(base + KONA_GPTIMER_STCHI_OFFSET))
 92                         break;
 93         }
 94         if (!loop_limit) {
 95                 pr_err("bcm_kona_timer: getting counter failed.\n");
 96                 pr_err(" Timer will be impacted\n");
 97         }
 98 
 99         return;
100 }
101 
102 static int kona_timer_set_next_event(unsigned long clc,
103                                   struct clock_event_device *unused)
104 {
105         /*
106          * timer (0) is disabled by the timer interrupt already
107          * so, here we reload the next event value and re-enable
108          * the timer.
109          *
110          * This way, we are potentially losing the time between
111          * timer-interrupt->set_next_event. CPU local timers, when
112          * they come in should get rid of skew.
113          */
114 
115         uint32_t lsw, msw;
116         uint32_t reg;
117 
118         kona_timer_get_counter(timers.tmr_regs, &msw, &lsw);
119 
120         /* Load the "next" event tick value */
121         writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET);
122 
123         /* Enable compare */
124         reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
125         reg |= (1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
126         writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
127 
128         return 0;
129 }
130 
131 static void kona_timer_set_mode(enum clock_event_mode mode,
132                              struct clock_event_device *unused)
133 {
134         switch (mode) {
135         case CLOCK_EVT_MODE_ONESHOT:
136                 /* by default mode is one shot don't do any thing */
137                 break;
138         case CLOCK_EVT_MODE_UNUSED:
139         case CLOCK_EVT_MODE_SHUTDOWN:
140         default:
141                 kona_timer_disable_and_clear(timers.tmr_regs);
142         }
143 }
144 
145 static struct clock_event_device kona_clockevent_timer = {
146         .name = "timer 1",
147         .features = CLOCK_EVT_FEAT_ONESHOT,
148         .set_next_event = kona_timer_set_next_event,
149         .set_mode = kona_timer_set_mode
150 };
151 
152 static void __init kona_timer_clockevents_init(void)
153 {
154         kona_clockevent_timer.cpumask = cpumask_of(0);
155         clockevents_config_and_register(&kona_clockevent_timer,
156                 arch_timer_rate, 6, 0xffffffff);
157 }
158 
159 static irqreturn_t kona_timer_interrupt(int irq, void *dev_id)
160 {
161         struct clock_event_device *evt = &kona_clockevent_timer;
162 
163         kona_timer_disable_and_clear(timers.tmr_regs);
164         evt->event_handler(evt);
165         return IRQ_HANDLED;
166 }
167 
168 static struct irqaction kona_timer_irq = {
169         .name = "Kona Timer Tick",
170         .flags = IRQF_TIMER,
171         .handler = kona_timer_interrupt,
172 };
173 
174 static void __init kona_timer_init(struct device_node *node)
175 {
176         u32 freq;
177         struct clk *external_clk;
178 
179         if (!of_device_is_available(node)) {
180                 pr_info("Kona Timer v1 marked as disabled in device tree\n");
181                 return;
182         }
183 
184         external_clk = of_clk_get_by_name(node, NULL);
185 
186         if (!IS_ERR(external_clk)) {
187                 arch_timer_rate = clk_get_rate(external_clk);
188                 clk_prepare_enable(external_clk);
189         } else if (!of_property_read_u32(node, "clock-frequency", &freq)) {
190                 arch_timer_rate = freq;
191         } else {
192                 pr_err("Kona Timer v1 unable to determine clock-frequency");
193                 return;
194         }
195 
196         /* Setup IRQ numbers */
197         timers.tmr_irq = irq_of_parse_and_map(node, 0);
198 
199         /* Setup IO addresses */
200         timers.tmr_regs = of_iomap(node, 0);
201 
202         kona_timer_disable_and_clear(timers.tmr_regs);
203 
204         kona_timer_clockevents_init();
205         setup_irq(timers.tmr_irq, &kona_timer_irq);
206         kona_timer_set_next_event((arch_timer_rate / HZ), NULL);
207 }
208 
209 CLOCKSOURCE_OF_DECLARE(brcm_kona, "brcm,kona-timer", kona_timer_init);
210 /*
211  * bcm,kona-timer is deprecated by brcm,kona-timer
212  * being kept here for driver compatibility
213  */
214 CLOCKSOURCE_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);
215 

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