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Linux/drivers/clk/ux500/abx500-clk.c

  1 /*
  2  * abx500 clock implementation for ux500 platform.
  3  *
  4  * Copyright (C) 2012 ST-Ericsson SA
  5  * Author: Ulf Hansson <ulf.hansson@linaro.org>
  6  *
  7  * License terms: GNU General Public License (GPL) version 2
  8  */
  9 
 10 #include <linux/err.h>
 11 #include <linux/module.h>
 12 #include <linux/device.h>
 13 #include <linux/platform_device.h>
 14 #include <linux/mfd/abx500/ab8500.h>
 15 #include <linux/mfd/abx500/ab8500-sysctrl.h>
 16 #include <linux/clkdev.h>
 17 #include <linux/clk-provider.h>
 18 #include <linux/mfd/dbx500-prcmu.h>
 19 #include "clk.h"
 20 
 21 /* Clock definitions for ab8500 */
 22 static int ab8500_reg_clks(struct device *dev)
 23 {
 24         int ret;
 25         struct clk *clk;
 26 
 27         const char *intclk_parents[] = {"ab8500_sysclk", "ulpclk"};
 28         u16 intclk_reg_sel[] = {0 , AB8500_SYSULPCLKCTRL1};
 29         u8 intclk_reg_mask[] = {0 , AB8500_SYSULPCLKCTRL1_SYSULPCLKINTSEL_MASK};
 30         u8 intclk_reg_bits[] = {
 31                 0 ,
 32                 (1 << AB8500_SYSULPCLKCTRL1_SYSULPCLKINTSEL_SHIFT)
 33         };
 34 
 35         dev_info(dev, "register clocks for ab850x\n");
 36 
 37         /* Enable SWAT */
 38         ret = ab8500_sysctrl_set(AB8500_SWATCTRL, AB8500_SWATCTRL_SWATENABLE);
 39         if (ret)
 40                 return ret;
 41 
 42         /* ab8500_sysclk */
 43         clk = clk_reg_prcmu_gate("ab8500_sysclk", NULL, PRCMU_SYSCLK, 0);
 44         clk_register_clkdev(clk, "sysclk", "ab8500-usb.0");
 45         clk_register_clkdev(clk, "sysclk", "ab-iddet.0");
 46         clk_register_clkdev(clk, "sysclk", "snd-soc-mop500.0");
 47         clk_register_clkdev(clk, "sysclk", "shrm_bus");
 48 
 49         /* ab8500_sysclk2 */
 50         clk = clk_reg_sysctrl_gate(dev , "ab8500_sysclk2", "ab8500_sysclk",
 51                 AB8500_SYSULPCLKCTRL1, AB8500_SYSULPCLKCTRL1_SYSCLKBUF2REQ,
 52                 AB8500_SYSULPCLKCTRL1_SYSCLKBUF2REQ, 0, 0);
 53         clk_register_clkdev(clk, "sysclk", "0-0070");
 54 
 55         /* ab8500_sysclk3 */
 56         clk = clk_reg_sysctrl_gate(dev , "ab8500_sysclk3", "ab8500_sysclk",
 57                 AB8500_SYSULPCLKCTRL1, AB8500_SYSULPCLKCTRL1_SYSCLKBUF3REQ,
 58                 AB8500_SYSULPCLKCTRL1_SYSCLKBUF3REQ, 0, 0);
 59         clk_register_clkdev(clk, "sysclk", "cg1960_core.0");
 60 
 61         /* ab8500_sysclk4 */
 62         clk = clk_reg_sysctrl_gate(dev , "ab8500_sysclk4", "ab8500_sysclk",
 63                 AB8500_SYSULPCLKCTRL1, AB8500_SYSULPCLKCTRL1_SYSCLKBUF4REQ,
 64                 AB8500_SYSULPCLKCTRL1_SYSCLKBUF4REQ, 0, 0);
 65 
 66         /* ab_ulpclk */
 67         clk = clk_reg_sysctrl_gate_fixed_rate(dev, "ulpclk", NULL,
 68                 AB8500_SYSULPCLKCTRL1, AB8500_SYSULPCLKCTRL1_ULPCLKREQ,
 69                 AB8500_SYSULPCLKCTRL1_ULPCLKREQ,
 70                 38400000, 9000, 0);
 71         clk_register_clkdev(clk, "ulpclk", "snd-soc-mop500.0");
 72 
 73         /* ab8500_intclk */
 74         clk = clk_reg_sysctrl_set_parent(dev , "intclk", intclk_parents, 2,
 75                 intclk_reg_sel, intclk_reg_mask, intclk_reg_bits, 0);
 76         clk_register_clkdev(clk, "intclk", "snd-soc-mop500.0");
 77         clk_register_clkdev(clk, NULL, "ab8500-pwm.1");
 78 
 79         /* ab8500_audioclk */
 80         clk = clk_reg_sysctrl_gate(dev , "audioclk", "intclk",
 81                 AB8500_SYSULPCLKCTRL1, AB8500_SYSULPCLKCTRL1_AUDIOCLKENA,
 82                 AB8500_SYSULPCLKCTRL1_AUDIOCLKENA, 0, 0);
 83         clk_register_clkdev(clk, "audioclk", "ab8500-codec.0");
 84 
 85         return 0;
 86 }
 87 
 88 /* Clock definitions for ab8540 */
 89 static int ab8540_reg_clks(struct device *dev)
 90 {
 91         return 0;
 92 }
 93 
 94 /* Clock definitions for ab9540 */
 95 static int ab9540_reg_clks(struct device *dev)
 96 {
 97         return 0;
 98 }
 99 
100 static int abx500_clk_probe(struct platform_device *pdev)
101 {
102         struct ab8500 *parent = dev_get_drvdata(pdev->dev.parent);
103         int ret;
104 
105         if (is_ab8500(parent) || is_ab8505(parent)) {
106                 ret = ab8500_reg_clks(&pdev->dev);
107         } else if (is_ab8540(parent)) {
108                 ret = ab8540_reg_clks(&pdev->dev);
109         } else if (is_ab9540(parent)) {
110                 ret = ab9540_reg_clks(&pdev->dev);
111         } else {
112                 dev_err(&pdev->dev, "non supported plf id\n");
113                 return -ENODEV;
114         }
115 
116         return ret;
117 }
118 
119 static struct platform_driver abx500_clk_driver = {
120         .driver = {
121                 .name = "abx500-clk",
122         },
123         .probe  = abx500_clk_probe,
124 };
125 
126 static int __init abx500_clk_init(void)
127 {
128         return platform_driver_register(&abx500_clk_driver);
129 }
130 
131 arch_initcall(abx500_clk_init);
132 
133 MODULE_AUTHOR("Ulf Hansson <ulf.hansson@linaro.org");
134 MODULE_DESCRIPTION("ABX500 clk driver");
135 MODULE_LICENSE("GPL v2");
136 

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