Version:  2.0.40 2.2.26 2.4.37 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10

Linux/drivers/clk/tegra/clk.c

  1 /*
  2  * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
  3  *
  4  * This program is free software; you can redistribute it and/or modify it
  5  * under the terms and conditions of the GNU General Public License,
  6  * version 2, as published by the Free Software Foundation.
  7  *
  8  * This program is distributed in the hope it will be useful, but WITHOUT
  9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 11  * more details.
 12  *
 13  * You should have received a copy of the GNU General Public License
 14  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 15  */
 16 
 17 #include <linux/clkdev.h>
 18 #include <linux/clk.h>
 19 #include <linux/clk-provider.h>
 20 #include <linux/of.h>
 21 #include <linux/clk/tegra.h>
 22 #include <linux/reset-controller.h>
 23 
 24 #include <soc/tegra/fuse.h>
 25 
 26 #include "clk.h"
 27 
 28 #define CLK_OUT_ENB_L                   0x010
 29 #define CLK_OUT_ENB_H                   0x014
 30 #define CLK_OUT_ENB_U                   0x018
 31 #define CLK_OUT_ENB_V                   0x360
 32 #define CLK_OUT_ENB_W                   0x364
 33 #define CLK_OUT_ENB_X                   0x280
 34 #define CLK_OUT_ENB_Y                   0x298
 35 #define CLK_OUT_ENB_SET_L               0x320
 36 #define CLK_OUT_ENB_CLR_L               0x324
 37 #define CLK_OUT_ENB_SET_H               0x328
 38 #define CLK_OUT_ENB_CLR_H               0x32c
 39 #define CLK_OUT_ENB_SET_U               0x330
 40 #define CLK_OUT_ENB_CLR_U               0x334
 41 #define CLK_OUT_ENB_SET_V               0x440
 42 #define CLK_OUT_ENB_CLR_V               0x444
 43 #define CLK_OUT_ENB_SET_W               0x448
 44 #define CLK_OUT_ENB_CLR_W               0x44c
 45 #define CLK_OUT_ENB_SET_X               0x284
 46 #define CLK_OUT_ENB_CLR_X               0x288
 47 #define CLK_OUT_ENB_SET_Y               0x29c
 48 #define CLK_OUT_ENB_CLR_Y               0x2a0
 49 
 50 #define RST_DEVICES_L                   0x004
 51 #define RST_DEVICES_H                   0x008
 52 #define RST_DEVICES_U                   0x00C
 53 #define RST_DEVICES_V                   0x358
 54 #define RST_DEVICES_W                   0x35C
 55 #define RST_DEVICES_X                   0x28C
 56 #define RST_DEVICES_Y                   0x2a4
 57 #define RST_DEVICES_SET_L               0x300
 58 #define RST_DEVICES_CLR_L               0x304
 59 #define RST_DEVICES_SET_H               0x308
 60 #define RST_DEVICES_CLR_H               0x30c
 61 #define RST_DEVICES_SET_U               0x310
 62 #define RST_DEVICES_CLR_U               0x314
 63 #define RST_DEVICES_SET_V               0x430
 64 #define RST_DEVICES_CLR_V               0x434
 65 #define RST_DEVICES_SET_W               0x438
 66 #define RST_DEVICES_CLR_W               0x43c
 67 #define RST_DEVICES_SET_X               0x290
 68 #define RST_DEVICES_CLR_X               0x294
 69 #define RST_DEVICES_SET_Y               0x2a8
 70 #define RST_DEVICES_CLR_Y               0x2ac
 71 
 72 /* Global data of Tegra CPU CAR ops */
 73 static struct tegra_cpu_car_ops dummy_car_ops;
 74 struct tegra_cpu_car_ops *tegra_cpu_car_ops = &dummy_car_ops;
 75 
 76 int *periph_clk_enb_refcnt;
 77 static int periph_banks;
 78 static struct clk **clks;
 79 static int clk_num;
 80 static struct clk_onecell_data clk_data;
 81 
 82 /* Handlers for SoC-specific reset lines */
 83 static int (*special_reset_assert)(unsigned long);
 84 static int (*special_reset_deassert)(unsigned long);
 85 static unsigned int num_special_reset;
 86 
 87 static const struct tegra_clk_periph_regs periph_regs[] = {
 88         [0] = {
 89                 .enb_reg = CLK_OUT_ENB_L,
 90                 .enb_set_reg = CLK_OUT_ENB_SET_L,
 91                 .enb_clr_reg = CLK_OUT_ENB_CLR_L,
 92                 .rst_reg = RST_DEVICES_L,
 93                 .rst_set_reg = RST_DEVICES_SET_L,
 94                 .rst_clr_reg = RST_DEVICES_CLR_L,
 95         },
 96         [1] = {
 97                 .enb_reg = CLK_OUT_ENB_H,
 98                 .enb_set_reg = CLK_OUT_ENB_SET_H,
 99                 .enb_clr_reg = CLK_OUT_ENB_CLR_H,
100                 .rst_reg = RST_DEVICES_H,
101                 .rst_set_reg = RST_DEVICES_SET_H,
102                 .rst_clr_reg = RST_DEVICES