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Linux/drivers/clk/shmobile/clk-emev2.c

  1 /*
  2  * EMMA Mobile EV2 common clock framework support
  3  *
  4  * Copyright (C) 2013 Takashi Yoshii <takashi.yoshii.ze@renesas.com>
  5  * Copyright (C) 2012 Magnus Damm
  6  *
  7  * This program is free software; you can redistribute it and/or modify
  8  * it under the terms of the GNU General Public License as published by
  9  * the Free Software Foundation; version 2 of the License.
 10  *
 11  * This program is distributed in the hope that it will be useful,
 12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 14  * GNU General Public License for more details.
 15  *
 16  * You should have received a copy of the GNU General Public License
 17  * along with this program; if not, write to the Free Software
 18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 19  */
 20 #include <linux/clk-provider.h>
 21 #include <linux/clkdev.h>
 22 #include <linux/io.h>
 23 #include <linux/of.h>
 24 #include <linux/of_address.h>
 25 
 26 /* EMEV2 SMU registers */
 27 #define USIAU0_RSTCTRL 0x094
 28 #define USIBU1_RSTCTRL 0x0ac
 29 #define USIBU2_RSTCTRL 0x0b0
 30 #define USIBU3_RSTCTRL 0x0b4
 31 #define STI_RSTCTRL 0x124
 32 #define STI_CLKSEL 0x688
 33 
 34 static DEFINE_SPINLOCK(lock);
 35 
 36 /* not pretty, but hey */
 37 void __iomem *smu_base;
 38 
 39 static void __init emev2_smu_write(unsigned long value, int offs)
 40 {
 41         BUG_ON(!smu_base || (offs >= PAGE_SIZE));
 42         writel_relaxed(value, smu_base + offs);
 43 }
 44 
 45 static const struct of_device_id smu_id[] __initconst = {
 46         { .compatible = "renesas,emev2-smu", },
 47         {},
 48 };
 49 
 50 static void __init emev2_smu_init(void)
 51 {
 52         struct device_node *np;
 53 
 54         np = of_find_matching_node(NULL, smu_id);
 55         BUG_ON(!np);
 56         smu_base = of_iomap(np, 0);
 57         BUG_ON(!smu_base);
 58         of_node_put(np);
 59 
 60         /* setup STI timer to run on 32.768 kHz and deassert reset */
 61         emev2_smu_write(0, STI_CLKSEL);
 62         emev2_smu_write(1, STI_RSTCTRL);
 63 
 64         /* deassert reset for UART0->UART3 */
 65         emev2_smu_write(2, USIAU0_RSTCTRL);
 66         emev2_smu_write(2, USIBU1_RSTCTRL);
 67         emev2_smu_write(2, USIBU2_RSTCTRL);
 68         emev2_smu_write(2, USIBU3_RSTCTRL);
 69 }
 70 
 71 static void __init emev2_smu_clkdiv_init(struct device_node *np)
 72 {
 73         u32 reg[2];
 74         struct clk *clk;
 75         const char *parent_name = of_clk_get_parent_name(np, 0);
 76         if (WARN_ON(of_property_read_u32_array(np, "reg", reg, 2)))
 77                 return;
 78         if (!smu_base)
 79                 emev2_smu_init();
 80         clk = clk_register_divider(NULL, np->name, parent_name, 0,
 81                                    smu_base + reg[0], reg[1], 8, 0, &lock);
 82         of_clk_add_provider(np, of_clk_src_simple_get, clk);
 83         clk_register_clkdev(clk, np->name, NULL);
 84         pr_debug("## %s %s %p\n", __func__, np->name, clk);
 85 }
 86 CLK_OF_DECLARE(emev2_smu_clkdiv, "renesas,emev2-smu-clkdiv",
 87                 emev2_smu_clkdiv_init);
 88 
 89 static void __init emev2_smu_gclk_init(struct device_node *np)
 90 {
 91         u32 reg[2];
 92         struct clk *clk;
 93         const char *parent_name = of_clk_get_parent_name(np, 0);
 94         if (WARN_ON(of_property_read_u32_array(np, "reg", reg, 2)))
 95                 return;
 96         if (!smu_base)
 97                 emev2_smu_init();
 98         clk = clk_register_gate(NULL, np->name, parent_name, 0,
 99                                 smu_base + reg[0], reg[1], 0, &lock);
100         of_clk_add_provider(np, of_clk_src_simple_get, clk);
101         clk_register_clkdev(clk, np->name, NULL);
102         pr_debug("## %s %s %p\n", __func__, np->name, clk);
103 }
104 CLK_OF_DECLARE(emev2_smu_gclk, "renesas,emev2-smu-gclk", emev2_smu_gclk_init);
105 

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