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Linux/drivers/clk/Kconfig

  1 
  2 config CLKDEV_LOOKUP
  3         bool
  4         select HAVE_CLK
  5 
  6 config HAVE_CLK_PREPARE
  7         bool
  8 
  9 config HAVE_MACH_CLKDEV
 10         bool
 11 
 12 config COMMON_CLK
 13         bool
 14         select HAVE_CLK_PREPARE
 15         select CLKDEV_LOOKUP
 16         select SRCU
 17         select RATIONAL
 18         ---help---
 19           The common clock framework is a single definition of struct
 20           clk, useful across many platforms, as well as an
 21           implementation of the clock API in include/linux/clk.h.
 22           Architectures utilizing the common struct clk should select
 23           this option.
 24 
 25 menu "Common Clock Framework"
 26         depends on COMMON_CLK
 27 
 28 config COMMON_CLK_WM831X
 29         tristate "Clock driver for WM831x/2x PMICs"
 30         depends on MFD_WM831X
 31         ---help---
 32           Supports the clocking subsystem of the WM831x/2x series of
 33           PMICs from Wolfson Microelectronics.
 34 
 35 source "drivers/clk/versatile/Kconfig"
 36 
 37 config COMMON_CLK_MAX_GEN
 38         bool
 39 
 40 config COMMON_CLK_MAX77686
 41         tristate "Clock driver for Maxim 77686 MFD"
 42         depends on MFD_MAX77686
 43         select COMMON_CLK_MAX_GEN
 44         ---help---
 45           This driver supports Maxim 77686 crystal oscillator clock. 
 46 
 47 config COMMON_CLK_MAX77802
 48         tristate "Clock driver for Maxim 77802 PMIC"
 49         depends on MFD_MAX77686
 50         select COMMON_CLK_MAX_GEN
 51         ---help---
 52           This driver supports Maxim 77802 crystal oscillator clock.
 53 
 54 config COMMON_CLK_RK808
 55         tristate "Clock driver for RK808"
 56         depends on MFD_RK808
 57         ---help---
 58           This driver supports RK808 crystal oscillator clock. These
 59           multi-function devices have two fixed-rate oscillators,
 60           clocked at 32KHz each. Clkout1 is always on, Clkout2 can off
 61           by control register.
 62 
 63 config COMMON_CLK_SCPI
 64         tristate "Clock driver controlled via SCPI interface"
 65         depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
 66           ---help---
 67           This driver provides support for clocks that are controlled
 68           by firmware that implements the SCPI interface.
 69 
 70           This driver uses SCPI Message Protocol to interact with the
 71           firmware providing all the clock controls.
 72 
 73 config COMMON_CLK_SI5351
 74         tristate "Clock driver for SiLabs 5351A/B/C"
 75         depends on I2C
 76         select REGMAP_I2C
 77         select RATIONAL
 78         ---help---
 79           This driver supports Silicon Labs 5351A/B/C programmable clock
 80           generators.
 81 
 82 config COMMON_CLK_SI514
 83         tristate "Clock driver for SiLabs 514 devices"
 84         depends on I2C
 85         depends on OF
 86         select REGMAP_I2C
 87         help
 88         ---help---
 89           This driver supports the Silicon Labs 514 programmable clock
 90           generator.
 91 
 92 config COMMON_CLK_SI570
 93         tristate "Clock driver for SiLabs 570 and compatible devices"
 94         depends on I2C
 95         depends on OF
 96         select REGMAP_I2C
 97         help
 98         ---help---
 99           This driver supports Silicon Labs 570/571/598/599 programmable
100           clock generators.
101 
102 config COMMON_CLK_CDCE925
103         tristate "Clock driver for TI CDCE925 devices"
104         depends on I2C
105         depends on OF
106         select REGMAP_I2C
107         help
108         ---help---
109           This driver supports the TI CDCE925 programmable clock synthesizer.
110           The chip contains two PLLs with spread-spectrum clocking support and
111           five output dividers. The driver only supports the following setup,
112           and uses a fixed setting for the output muxes.
113           Y1 is derived from the input clock
114           Y2 and Y3 derive from PLL1
115           Y4 and Y5 derive from PLL2
116           Given a target output frequency, the driver will set the PLL and
117           divider to best approximate the desired output.
118 
119 config COMMON_CLK_S2MPS11
120         tristate "Clock driver for S2MPS1X/S5M8767 MFD"
121         depends on MFD_SEC_CORE
122         ---help---
123           This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
124           clock. These multi-function devices have two (S2MPS14) or three
125           (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
126 
127 config CLK_TWL6040
128         tristate "External McPDM functional clock from twl6040"
129         depends on TWL6040_CORE
130         ---help---
131           Enable the external functional clock support on OMAP4+ platforms for
132           McPDM. McPDM module is using the external bit clock on the McPDM bus
133           as functional clock.
134 
135 config COMMON_CLK_AXI_CLKGEN
136         tristate "AXI clkgen driver"
137         depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST
138         help
139         ---help---
140           Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
141           FPGAs. It is commonly used in Analog Devices' reference designs.
142 
143 config CLK_QORIQ
144         bool "Clock driver for Freescale QorIQ platforms"
145         depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF
146         ---help---
147           This adds the clock driver support for Freescale QorIQ platforms
148           using common clock framework.
149 
150 config COMMON_CLK_XGENE
151         bool "Clock driver for APM XGene SoC"
152         default y
153         depends on ARM64 || COMPILE_TEST
154         ---help---
155           Sypport for the APM X-Gene SoC reference, PLL, and device clocks.
156 
157 config COMMON_CLK_KEYSTONE
158         tristate "Clock drivers for Keystone based SOCs"
159         depends on (ARCH_KEYSTONE || COMPILE_TEST) && OF
160         ---help---
161           Supports clock drivers for Keystone based SOCs. These SOCs have local
162           a power sleep control module that gate the clock to the IPs and PLLs.
163 
164 config COMMON_CLK_PALMAS
165         tristate "Clock driver for TI Palmas devices"
166         depends on MFD_PALMAS
167         ---help---
168           This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
169           using common clock framework.
170 
171 config COMMON_CLK_PWM
172         tristate "Clock driver for PWMs used as clock outputs"
173         depends on PWM
174         ---help---
175           Adapter driver so that any PWM output can be (mis)used as clock signal
176           at 50% duty cycle.
177 
178 config COMMON_CLK_PXA
179         def_bool COMMON_CLK && ARCH_PXA
180         ---help---
181           Sypport for the Marvell PXA SoC.
182 
183 config COMMON_CLK_CDCE706
184         tristate "Clock driver for TI CDCE706 clock synthesizer"
185         depends on I2C
186         select REGMAP_I2C
187         select RATIONAL
188         ---help---
189           This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
190 
191 source "drivers/clk/bcm/Kconfig"
192 source "drivers/clk/hisilicon/Kconfig"
193 source "drivers/clk/qcom/Kconfig"
194 
195 endmenu
196 
197 source "drivers/clk/mvebu/Kconfig"
198 
199 source "drivers/clk/samsung/Kconfig"
200 source "drivers/clk/tegra/Kconfig"

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