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Linux/drivers/atm/lanai.c

  1 /* lanai.c -- Copyright 1999-2003 by Mitchell Blank Jr <mitch@sfgoth.com>
  2  *
  3  *  This program is free software; you can redistribute it and/or
  4  *  modify it under the terms of the GNU General Public License
  5  *  as published by the Free Software Foundation; either version
  6  *  2 of the License, or (at your option) any later version.
  7  *
  8  * This driver supports ATM cards based on the Efficient "Lanai"
  9  * chipset such as the Speedstream 3010 and the ENI-25p.  The
 10  * Speedstream 3060 is currently not supported since we don't
 11  * have the code to drive the on-board Alcatel DSL chipset (yet).
 12  *
 13  * Thanks to Efficient for supporting this project with hardware,
 14  * documentation, and by answering my questions.
 15  *
 16  * Things not working yet:
 17  *
 18  * o  We don't support the Speedstream 3060 yet - this card has
 19  *    an on-board DSL modem chip by Alcatel and the driver will
 20  *    need some extra code added to handle it
 21  *
 22  * o  Note that due to limitations of the Lanai only one VCC can be
 23  *    in CBR at once
 24  *
 25  * o We don't currently parse the EEPROM at all.  The code is all
 26  *   there as per the spec, but it doesn't actually work.  I think
 27  *   there may be some issues with the docs.  Anyway, do NOT
 28  *   enable it yet - bugs in that code may actually damage your
 29  *   hardware!  Because of this you should hardware an ESI before
 30  *   trying to use this in a LANE or MPOA environment.
 31  *
 32  * o  AAL0 is stubbed in but the actual rx/tx path isn't written yet:
 33  *      vcc_tx_aal0() needs to send or queue a SKB
 34  *      vcc_tx_unqueue_aal0() needs to attempt to send queued SKBs
 35  *      vcc_rx_aal0() needs to handle AAL0 interrupts
 36  *    This isn't too much work - I just wanted to get other things
 37  *    done first.
 38  *
 39  * o  lanai_change_qos() isn't written yet
 40  *
 41  * o  There aren't any ioctl's yet -- I'd like to eventually support
 42  *    setting loopback and LED modes that way.
 43  *
 44  * o  If the segmentation engine or DMA gets shut down we should restart
 45  *    card as per section 17.0i.  (see lanai_reset)
 46  *
 47  * o setsockopt(SO_CIRANGE) isn't done (although despite what the
 48  *   API says it isn't exactly commonly implemented)
 49  */
 50 
 51 /* Version history:
 52  *   v.1.00 -- 26-JUL-2003 -- PCI/DMA updates
 53  *   v.0.02 -- 11-JAN-2000 -- Endian fixes
 54  *   v.0.01 -- 30-NOV-1999 -- Initial release
 55  */
 56 
 57 #include <linux/module.h>
 58 #include <linux/slab.h>
 59 #include <linux/mm.h>
 60 #include <linux/atmdev.h>
 61 #include <asm/io.h>
 62 #include <asm/byteorder.h>
 63 #include <linux/spinlock.h>
 64 #include <linux/pci.h>
 65 #include <linux/dma-mapping.h>
 66 #include <linux/init.h>
 67 #include <linux/delay.h>
 68 #include <linux/interrupt.h>
 69 
 70 /* -------------------- TUNABLE PARAMATERS: */
 71 
 72 /*
 73  * Maximum number of VCIs per card.  Setting it lower could theoretically
 74  * save some memory, but since we allocate our vcc list with get_free_pages,
 75  * it's not really likely for most architectures
 76  */
 77 #define NUM_VCI                 (1024)
 78 
 79 /*
 80  * Enable extra debugging
 81  */
 82 #define DEBUG
 83 /*
 84  * Debug _all_ register operations with card, except the memory test.
 85  * Also disables the timed poll to prevent extra chattiness.  This
 86  * isn't for normal use
 87  */
 88 #undef DEBUG_RW
 89 
 90 /*
 91  * The programming guide specifies a full test of the on-board SRAM
 92  * at initialization time.  Undefine to remove this
 93  */
 94 #define FULL_MEMORY_TEST
 95 
 96 /*
 97  * This is the number of (4 byte) service entries that we will
 98  * try to allocate at startup.  Note that we will end up with
 99  * one PAGE_SIZE's worth regardless of what this is set to
100  */
101 #define SERVICE_ENTRIES         (1024)
102 /* TODO: make above a module load-time option */
103 
104 /*
105  * We normally read the onboard EEPROM in order to discover our MAC
106  * address.  Undefine to _not_ do this
107  */
108 /* #define READ_EEPROM */ /* ***DONT ENABLE YET*** */
109 /* TODO: make above a module load-time option (also) */
110 
111 /*
112  * Depth of TX fifo (in 128 byte units; range 2-31)
113  * Smaller numbers are better for network latency
114  * Larger numbers are better for PCI latency
115  * I'm really sure where the best tradeoff is, but the BSD driver uses
116  * 7 and it seems to work ok.
117  */
118 #define TX_FIFO_DEPTH           (7)
119 /* TODO: make above a module load-time option */
120 
121 /*
122  * How often (in jiffies) we will try to unstick stuck connections -
123  * shouldn't need to happen much
124  */
125 #define LANAI_POLL_PERIOD       (10*HZ)
126 /* TODO: make above a module load-time option */
127 
128 /*
129  * When allocating an AAL5 receiving buffer, try to make it at least
130  * large enough to hold this many max_sdu sized PDUs
131  */
132 #define AAL5_RX_MULTIPLIER      (3)
133 /* TODO: make above a module load-time option */
134 
135 /*
136  * Same for transmitting buffer
137  */
138 #define AAL5_TX_MULTIPLIER      (3)
139 /* TODO: make above a module load-time option */
140 
141 /*
142  * When allocating an AAL0 transmiting buffer, how many cells should fit.
143  * Remember we'll end up with a PAGE_SIZE of them anyway, so this isn't
144  * really critical
145  */
146 #define AAL0_TX_MULTIPLIER      (40)
147 /* TODO: make above a module load-time option */
148 
149 /*
150  * How large should we make the AAL0 receiving buffer.  Remember that this
151  * is shared between all AAL0 VC's
152  */
153 #define AAL0_RX_BUFFER_SIZE     (PAGE_SIZE)
154 /* TODO: make above a module load-time option */
155 
156 /*
157  * Should we use Lanai's "powerdown" feature when no vcc's are bound?
158  */
159 /* #define USE_POWERDOWN */
160 /* TODO: make above a module load-time option (also) */
161 
162 /* -------------------- DEBUGGING AIDS: */
163 
164 #define DEV_LABEL "lanai"
165 
166 #ifdef DEBUG
167 
168 #define DPRINTK(format, args...) \
169         printk(KERN_DEBUG DEV_LABEL ": " format, ##args)
170 #define APRINTK(truth, format, args...) \
171         do { \
172                 if (unlikely(!(truth))) \
173                         printk(KERN_ERR DEV_LABEL ": " format, ##args); \
174         } while (0)
175 
176 #else /* !DEBUG */
177 
178 #define DPRINTK(format, args...)
179 #define APRINTK(truth, format, args...)
180 
181 #endif /* DEBUG */
182 
183 #ifdef DEBUG_RW
184 #define RWDEBUG(format, args...) \
185         printk(KERN_DEBUG DEV_LABEL ": " format, ##args)
186 #else /* !DEBUG_RW */
187 #define RWDEBUG(format, args...)
188 #endif
189 
190 /* -------------------- DATA DEFINITIONS: */
191 
192 #define LANAI_MAPPING_SIZE      (0x40000)
193 #define LANAI_EEPROM_SIZE       (128)
194 
195 typedef int vci_t;
196 typedef void __iomem *bus_addr_t;
197 
198 /* DMA buffer in host memory for TX, RX, or service list. */
199 struct lanai_buffer {
200         u32 *start;     /* From get_free_pages */
201         u32 *end;       /* One past last byte */
202         u32 *ptr;       /* Pointer to current host location */
203         dma_addr_t dmaaddr;
204 };
205 
206 struct lanai_vcc_stats {
207         unsigned rx_nomem;
208         union {
209                 struct {
210                         unsigned rx_badlen;
211                         unsigned service_trash;
212                         unsigned service_stream;
213                         unsigned service_rxcrc;
214                 } aal5;
215                 struct {
216                 } aal0;
217         } x;
218 };
219 
220 struct lanai_dev;                       /* Forward declaration */
221 
222 /*
223  * This is the card-specific per-vcc data.  Note that unlike some other
224  * drivers there is NOT a 1-to-1 correspondance between these and
225  * atm_vcc's - each one of these represents an actual 2-way vcc, but
226  * an atm_vcc can be 1-way and share with a 1-way vcc in the other
227  * direction.  To make it weirder, there can even be 0-way vccs
228  * bound to us, waiting to do a change_qos
229  */
230 struct lanai_vcc {
231         bus_addr_t vbase;               /* Base of VCC's registers */
232         struct lanai_vcc_stats stats;
233         int nref;                       /* # of atm_vcc's who reference us */
234         vci_t vci;
235         struct {
236                 struct lanai_buffer buf;
237                 struct atm_vcc *atmvcc; /* atm_vcc who is receiver */
238         } rx;
239         struct {
240                 struct lanai_buffer buf;
241                 struct atm_vcc *atmvcc; /* atm_vcc who is transmitter */
242                 int endptr;             /* last endptr from service entry */
243                 struct sk_buff_head backlog;
244                 void (*unqueue)(struct lanai_dev *, struct lanai_vcc *, int);
245         } tx;
246 };
247 
248 enum lanai_type {
249         lanai2  = PCI_DEVICE_ID_EF_ATM_LANAI2,
250         lanaihb = PCI_DEVICE_ID_EF_ATM_LANAIHB
251 };
252 
253 struct lanai_dev_stats {
254         unsigned ovfl_trash;    /* # of cells dropped - buffer overflow */
255         unsigned vci_trash;     /* # of cells dropped - closed vci */
256         unsigned hec_err;       /* # of cells dropped - bad HEC */
257         unsigned atm_ovfl;      /* # of cells dropped - rx fifo overflow */
258         unsigned pcierr_parity_detect;
259         unsigned pcierr_serr_set;
260         unsigned pcierr_master_abort;
261         unsigned pcierr_m_target_abort;
262         unsigned pcierr_s_target_abort;
263         unsigned pcierr_master_parity;
264         unsigned service_notx;
265         unsigned service_norx;
266         unsigned service_rxnotaal5;
267         unsigned dma_reenable;
268         unsigned card_reset;
269 };
270 
271 struct lanai_dev {
272         bus_addr_t base;
273         struct lanai_dev_stats stats;
274         struct lanai_buffer service;
275         struct lanai_vcc **vccs;
276 #ifdef USE_POWERDOWN
277         int nbound;                     /* number of bound vccs */
278 #endif
279         enum lanai_type type;
280         vci_t num_vci;                  /* Currently just NUM_VCI */
281         u8 eeprom[LANAI_EEPROM_SIZE];
282         u32 serialno, magicno;
283         struct pci_dev *pci;
284         DECLARE_BITMAP(backlog_vccs, NUM_VCI);   /* VCCs with tx backlog */
285         DECLARE_BITMAP(transmit_ready, NUM_VCI); /* VCCs with transmit space */
286         struct timer_list timer;
287         int naal0;
288         struct lanai_buffer aal0buf;    /* AAL0 RX buffers */
289         u32 conf1, conf2;               /* CONFIG[12] registers */
290         u32 status;                     /* STATUS register */
291         spinlock_t endtxlock;
292         spinlock_t servicelock;
293         struct atm_vcc *cbrvcc;
294         int number;
295         int board_rev;
296 /* TODO - look at race conditions with maintence of conf1/conf2 */
297 /* TODO - transmit locking: should we use _irq not _irqsave? */
298 /* TODO - organize above in some rational fashion (see <asm/cache.h>) */
299 };
300 
301 /*
302  * Each device has two bitmaps for each VCC (baclog_vccs and transmit_ready)
303  * This function iterates one of these, calling a given function for each
304  * vci with their bit set
305  */
306 static void vci_bitfield_iterate(struct lanai_dev *lanai,
307         const unsigned long *lp,
308         void (*func)(struct lanai_dev *,vci_t vci))
309 {
310         vci_t vci;
311 
312         for_each_set_bit(vci, lp, NUM_VCI)
313                 func(lanai, vci);
314 }
315 
316 /* -------------------- BUFFER  UTILITIES: */
317 
318 /*
319  * Lanai needs DMA buffers aligned to 256 bytes of at least 1024 bytes -
320  * usually any page allocation will do.  Just to be safe in case
321  * PAGE_SIZE is insanely tiny, though...
322  */
323 #define LANAI_PAGE_SIZE   ((PAGE_SIZE >= 1024) ? PAGE_SIZE : 1024)
324 
325 /*
326  * Allocate a buffer in host RAM for service list, RX, or TX
327  * Returns buf->start==NULL if no memory
328  * Note that the size will be rounded up 2^n bytes, and
329  * if we can't allocate that we'll settle for something smaller
330  * until minbytes
331  */
332 static void lanai_buf_allocate(struct lanai_buffer *buf,
333         size_t bytes, size_t minbytes, struct pci_dev *pci)
334 {
335         int size;
336 
337         if (bytes > (128 * 1024))       /* max lanai buffer size */
338                 bytes = 128 * 1024;
339         for (size = LANAI_PAGE_SIZE; size < bytes; size *= 2)
340                 ;
341         if (minbytes < LANAI_PAGE_SIZE)
342                 minbytes = LANAI_PAGE_SIZE;
343         do {
344                 /*
345                  * Technically we could use non-consistent mappings for
346                  * everything, but the way the lanai uses DMA memory would
347                  * make that a terrific pain.  This is much simpler.
348                  */
349                 buf->start = dma_alloc_coherent(&pci->dev,
350                                                 size, &buf->dmaaddr, GFP_KERNEL);
351                 if (buf->start != NULL) {       /* Success */
352                         /* Lanai requires 256-byte alignment of DMA bufs */
353                         APRINTK((buf->dmaaddr & ~0xFFFFFF00) == 0,
354                             "bad dmaaddr: 0x%lx\n",
355                             (unsigned long) buf->dmaaddr);
356                         buf->ptr = buf->start;
357                         buf->end = (u32 *)
358                             (&((unsigned char *) buf->start)[size]);
359                         memset(buf->start, 0, size);
360                         break;
361                 }
362                 size /= 2;
363         } while (size >= minbytes);
364 }
365 
366 /* size of buffer in bytes */
367 static inline size_t lanai_buf_size(const struct lanai_buffer *buf)
368 {
369         return ((unsigned long) buf->end) - ((unsigned long) buf->start);
370 }
371 
372 static void lanai_buf_deallocate(struct lanai_buffer *buf,
373         struct pci_dev *pci)
374 {
375         if (buf->start != NULL) {
376                 dma_free_coherent(&pci->dev, lanai_buf_size(buf),
377                                   buf->start, buf->dmaaddr);
378                 buf->start = buf->end = buf->ptr = NULL;
379         }
380 }
381 
382 /* size of buffer as "card order" (0=1k .. 7=128k) */
383 static int lanai_buf_size_cardorder(const struct lanai_buffer *buf)
384 {
385         int order = get_order(lanai_buf_size(buf)) + (PAGE_SHIFT - 10);
386 
387         /* This can only happen if PAGE_SIZE is gigantic, but just in case */
388         if (order > 7)
389                 order = 7;
390         return order;
391 }
392 
393 /* -------------------- PORT I/O UTILITIES: */
394 
395 /* Registers (and their bit-fields) */
396 enum lanai_register {
397         Reset_Reg               = 0x00, /* Reset; read for chip type; bits: */
398 #define   RESET_GET_BOARD_REV(x)    (((x)>> 0)&0x03)    /* Board revision */
399 #define   RESET_GET_BOARD_ID(x)     (((x)>> 2)&0x03)    /* Board ID */
400 #define     BOARD_ID_LANAI256           (0)     /* 25.6M adapter card */
401         Endian_Reg              = 0x04, /* Endian setting */
402         IntStatus_Reg           = 0x08, /* Interrupt status */
403         IntStatusMasked_Reg     = 0x0C, /* Interrupt status (masked) */
404         IntAck_Reg              = 0x10, /* Interrupt acknowledge */
405         IntAckMasked_Reg        = 0x14, /* Interrupt acknowledge (masked) */
406         IntStatusSet_Reg        = 0x18, /* Get status + enable/disable */
407         IntStatusSetMasked_Reg  = 0x1C, /* Get status + en/di (masked) */
408         IntControlEna_Reg       = 0x20, /* Interrupt control enable */
409         IntControlDis_Reg       = 0x24, /* Interrupt control disable */
410         Status_Reg              = 0x28, /* Status */
411 #define   STATUS_PROMDATA        (0x00000001)   /* PROM_DATA pin */
412 #define   STATUS_WAITING         (0x00000002)   /* Interrupt being delayed */
413 #define   STATUS_SOOL            (0x00000004)   /* SOOL alarm */
414 #define   STATUS_LOCD            (0x00000008)   /* LOCD alarm */
415 #define   STATUS_LED             (0x00000010)   /* LED (HAPPI) output */
416 #define   STATUS_GPIN            (0x00000020)   /* GPIN pin */
417 #define   STATUS_BUTTBUSY        (0x00000040)   /* Butt register is pending */
418         Config1_Reg             = 0x2C, /* Config word 1; bits: */
419 #define   CONFIG1_PROMDATA       (0x00000001)   /* PROM_DATA pin */
420 #define   CONFIG1_PROMCLK        (0x00000002)   /* PROM_CLK pin */
421 #define   CONFIG1_SET_READMODE(x) ((x)*0x004)   /* PCI BM reads; values: */
422 #define     READMODE_PLAIN          (0)         /*   Plain memory read */
423 #define     READMODE_LINE           (2)         /*   Memory read line */
424 #define     READMODE_MULTIPLE       (3)         /*   Memory read multiple */
425 #define   CONFIG1_DMA_ENABLE     (0x00000010)   /* Turn on DMA */
426 #define   CONFIG1_POWERDOWN      (0x00000020)   /* Turn off clocks */
427 #define   CONFIG1_SET_LOOPMODE(x) ((x)*0x080)   /* Clock&loop mode; values: */
428 #define     LOOPMODE_NORMAL         (0)         /*   Normal - no loop */
429 #define     LOOPMODE_TIME           (1)
430 #define     LOOPMODE_DIAG           (2)
431 #define     LOOPMODE_LINE           (3)
432 #define   CONFIG1_MASK_LOOPMODE  (0x00000180)
433 #define   CONFIG1_SET_LEDMODE(x) ((x)*0x0200)   /* Mode of LED; values: */
434 #define     LEDMODE_NOT_SOOL        (0)         /*   !SOOL */
435 #define     LEDMODE_OFF             (1)         /*   0     */
436 #define     LEDMODE_ON              (2)         /*   1     */
437 #define     LEDMODE_NOT_LOCD        (3)         /*   !LOCD */
438 #define     LEDMORE_GPIN            (4)         /*   GPIN  */
439 #define     LEDMODE_NOT_GPIN        (7)         /*   !GPIN */
440 #define   CONFIG1_MASK_LEDMODE   (0x00000E00)
441 #define   CONFIG1_GPOUT1         (0x00001000)   /* Toggle for reset */
442 #define   CONFIG1_GPOUT2         (0x00002000)   /* Loopback PHY */
443 #define   CONFIG1_GPOUT3         (0x00004000)   /* Loopback lanai */
444         Config2_Reg             = 0x30, /* Config word 2; bits: */
445 #define   CONFIG2_HOWMANY        (0x00000001)   /* >512 VCIs? */
446 #define   CONFIG2_PTI7_MODE      (0x00000002)   /* Make PTI=7 RM, not OAM */
447 #define   CONFIG2_VPI_CHK_DIS    (0x00000004)   /* Ignore RX VPI value */
448 #define   CONFIG2_HEC_DROP       (0x00000008)   /* Drop cells w/ HEC errors */
449 #define   CONFIG2_VCI0_NORMAL    (0x00000010)   /* Treat VCI=0 normally */
450 #define   CONFIG2_CBR_ENABLE     (0x00000020)   /* Deal with CBR traffic */
451 #define   CONFIG2_TRASH_ALL      (0x00000040)   /* Trashing incoming cells */
452 #define   CONFIG2_TX_DISABLE     (0x00000080)   /* Trashing outgoing cells */
453 #define   CONFIG2_SET_TRASH      (0x00000100)   /* Turn trashing on */
454         Statistics_Reg          = 0x34, /* Statistics; bits: */
455 #define   STATS_GET_FIFO_OVFL(x)    (((x)>> 0)&0xFF)    /* FIFO overflowed */
456 #define   STATS_GET_HEC_ERR(x)      (((x)>> 8)&0xFF)    /* HEC was bad */
457 #define   STATS_GET_BAD_VCI(x)      (((x)>>16)&0xFF)    /* VCI not open */
458 #define   STATS_GET_BUF_OVFL(x)     (((x)>>24)&0xFF)    /* VCC buffer full */
459         ServiceStuff_Reg        = 0x38, /* Service stuff; bits: */
460 #define   SSTUFF_SET_SIZE(x) ((x)*0x20000000)   /* size of service buffer */
461 #define   SSTUFF_SET_ADDR(x)        ((x)>>8)    /* set address of buffer */
462         ServWrite_Reg           = 0x3C, /* ServWrite Pointer */
463         ServRead_Reg            = 0x40, /* ServRead Pointer */
464         TxDepth_Reg             = 0x44, /* FIFO Transmit Depth */
465         Butt_Reg                = 0x48, /* Butt register */
466         CBR_ICG_Reg             = 0x50,
467         CBR_PTR_Reg             = 0x54,
468         PingCount_Reg           = 0x58, /* Ping count */
469         DMA_Addr_Reg            = 0x5C  /* DMA address */
470 };
471 
472 static inline bus_addr_t reg_addr(const struct lanai_dev *lanai,
473         enum lanai_register reg)
474 {
475         return lanai->base + reg;
476 }
477 
478 static inline u32 reg_read(const struct lanai_dev *lanai,
479         enum lanai_register reg)
480 {
481         u32 t;
482         t = readl(reg_addr(lanai, reg));
483         RWDEBUG("R [0x%08X] 0x%02X = 0x%08X\n", (unsigned int) lanai->base,
484             (int) reg, t);
485         return t;
486 }
487 
488 static inline void reg_write(const struct lanai_dev *lanai, u32 val,
489         enum lanai_register reg)
490 {
491         RWDEBUG("W [0x%08X] 0x%02X < 0x%08X\n", (unsigned int) lanai->base,
492             (int) reg, val);
493         writel(val, reg_addr(lanai, reg));
494 }
495 
496 static inline void conf1_write(const struct lanai_dev *lanai)
497 {
498         reg_write(lanai, lanai->conf1, Config1_Reg);
499 }
500 
501 static inline void conf2_write(const struct lanai_dev *lanai)
502 {
503         reg_write(lanai, lanai->conf2, Config2_Reg);
504 }
505 
506 /* Same as conf2_write(), but defers I/O if we're powered down */
507 static inline void conf2_write_if_powerup(const struct lanai_dev *lanai)
508 {
509 #ifdef USE_POWERDOWN
510         if (unlikely((lanai->conf1 & CONFIG1_POWERDOWN) != 0))
511                 return;
512 #endif /* USE_POWERDOWN */
513         conf2_write(lanai);
514 }
515 
516 static inline void reset_board(const struct lanai_dev *lanai)
517 {
518         DPRINTK("about to reset board\n");
519         reg_write(lanai, 0, Reset_Reg);
520         /*
521          * If we don't delay a little while here then we can end up
522          * leaving the card in a VERY weird state and lock up the
523          * PCI bus.  This isn't documented anywhere but I've convinced
524          * myself after a lot of painful experimentation
525          */
526         udelay(5);
527 }
528 
529 /* -------------------- CARD SRAM UTILITIES: */
530 
531 /* The SRAM is mapped into normal PCI memory space - the only catch is
532  * that it is only 16-bits wide but must be accessed as 32-bit.  The
533  * 16 high bits will be zero.  We don't hide this, since they get
534  * programmed mostly like discrete registers anyway
535  */
536 #define SRAM_START (0x20000)
537 #define SRAM_BYTES (0x20000)    /* Again, half don't really exist */
538 
539 static inline bus_addr_t sram_addr(const struct lanai_dev *lanai, int offset)
540 {
541         return lanai->base + SRAM_START + offset;
542 }
543 
544 static inline u32 sram_read(const struct lanai_dev *lanai, int offset)
545 {
546         return readl(sram_addr(lanai, offset));
547 }
548 
549 static inline void sram_write(const struct lanai_dev *lanai,
550         u32 val, int offset)
551 {
552         writel(val, sram_addr(lanai, offset));
553 }
554 
555 static int sram_test_word(const struct lanai_dev *lanai, int offset,
556                           u32 pattern)
557 {
558         u32 readback;
559         sram_write(lanai, pattern, offset);
560         readback = sram_read(lanai, offset);
561         if (likely(readback == pattern))
562                 return 0;
563         printk(KERN_ERR DEV_LABEL
564             "(itf %d): SRAM word at %d bad: wrote 0x%X, read 0x%X\n",
565             lanai->number, offset,
566             (unsigned int) pattern, (unsigned int) readback);
567         return -EIO;
568 }
569 
570 static int sram_test_pass(const struct lanai_dev *lanai, u32 pattern)
571 {
572         int offset, result = 0;
573         for (offset = 0; offset < SRAM_BYTES && result == 0; offset += 4)
574                 result = sram_test_word(lanai, offset, pattern);
575         return result;
576 }
577 
578 static int sram_test_and_clear(const struct lanai_dev *lanai)
579 {
580 #ifdef FULL_MEMORY_TEST
581         int result;
582         DPRINTK("testing SRAM\n");
583         if ((result = sram_test_pass(lanai, 0x5555)) != 0)
584                 return result;
585         if ((result = sram_test_pass(lanai, 0xAAAA)) != 0)
586                 return result;
587 #endif
588         DPRINTK("clearing SRAM\n");
589         return sram_test_pass(lanai, 0x0000);
590 }
591 
592 /* -------------------- CARD-BASED VCC TABLE UTILITIES: */
593 
594 /* vcc table */
595 enum lanai_vcc_offset {
596         vcc_rxaddr1             = 0x00, /* Location1, plus bits: */
597 #define   RXADDR1_SET_SIZE(x) ((x)*0x0000100)   /* size of RX buffer */
598 #define   RXADDR1_SET_RMMODE(x) ((x)*0x00800)   /* RM cell action; values: */
599 #define     RMMODE_TRASH          (0)           /*   discard */
600 #define     RMMODE_PRESERVE       (1)           /*   input as AAL0 */
601 #define     RMMODE_PIPE           (2)           /*   pipe to coscheduler */
602 #define     RMMODE_PIPEALL        (3)           /*   pipe non-RM too */
603 #define   RXADDR1_OAM_PRESERVE   (0x00002000)   /* Input OAM cells as AAL0 */
604 #define   RXADDR1_SET_MODE(x) ((x)*0x0004000)   /* Reassembly mode */
605 #define     RXMODE_TRASH          (0)           /*   discard */
606 #define     RXMODE_AAL0           (1)           /*   non-AAL5 mode */
607 #define     RXMODE_AAL5           (2)           /*   AAL5, intr. each PDU */
608 #define     RXMODE_AAL5_STREAM    (3)           /*   AAL5 w/o per-PDU intr */
609         vcc_rxaddr2             = 0x04, /* Location2 */
610         vcc_rxcrc1              = 0x08, /* RX CRC claculation space */
611         vcc_rxcrc2              = 0x0C,
612         vcc_rxwriteptr          = 0x10, /* RX writeptr, plus bits: */
613 #define   RXWRITEPTR_LASTEFCI    (0x00002000)   /* Last PDU had EFCI bit */
614 #define   RXWRITEPTR_DROPPING    (0x00004000)   /* Had error, dropping */
615 #define   RXWRITEPTR_TRASHING    (0x00008000)   /* Trashing */
616         vcc_rxbufstart          = 0x14, /* RX bufstart, plus bits: */
617 #define   RXBUFSTART_CLP         (0x00004000)
618 #define   RXBUFSTART_CI          (0x00008000)
619         vcc_rxreadptr           = 0x18, /* RX readptr */
620         vcc_txicg               = 0x1C, /* TX ICG */
621         vcc_txaddr1             = 0x20, /* Location1, plus bits: */
622 #define   TXADDR1_SET_SIZE(x) ((x)*0x0000100)   /* size of TX buffer */
623 #define   TXADDR1_ABR            (0x00008000)   /* use ABR (doesn't work) */
624         vcc_txaddr2             = 0x24, /* Location2 */
625         vcc_txcrc1              = 0x28, /* TX CRC claculation space */
626         vcc_txcrc2              = 0x2C,
627         vcc_txreadptr           = 0x30, /* TX Readptr, plus bits: */
628 #define   TXREADPTR_GET_PTR(x) ((x)&0x01FFF)
629 #define   TXREADPTR_MASK_DELTA  (0x0000E000)    /* ? */
630         vcc_txendptr            = 0x34, /* TX Endptr, plus bits: */
631 #define   TXENDPTR_CLP          (0x00002000)
632 #define   TXENDPTR_MASK_PDUMODE (0x0000C000)    /* PDU mode; values: */
633 #define     PDUMODE_AAL0         (0*0x04000)
634 #define     PDUMODE_AAL5         (2*0x04000)
635 #define     PDUMODE_AAL5STREAM   (3*0x04000)
636         vcc_txwriteptr          = 0x38, /* TX Writeptr */
637 #define   TXWRITEPTR_GET_PTR(x) ((x)&0x1FFF)
638         vcc_txcbr_next          = 0x3C  /* # of next CBR VCI in ring */
639 #define   TXCBR_NEXT_BOZO       (0x00008000)    /* "bozo bit" */
640 };
641 
642 #define CARDVCC_SIZE    (0x40)
643 
644 static inline bus_addr_t cardvcc_addr(const struct lanai_dev *lanai,
645         vci_t vci)
646 {
647         return sram_addr(lanai, vci * CARDVCC_SIZE);
648 }
649 
650 static inline u32 cardvcc_read(const struct lanai_vcc *lvcc,
651         enum lanai_vcc_offset offset)
652 {
653         u32 val;
654         APRINTK(lvcc->vbase != NULL, "cardvcc_read: unbound vcc!\n");
655         val= readl(lvcc->vbase + offset);
656         RWDEBUG("VR vci=%04d 0x%02X = 0x%08X\n",
657             lvcc->vci, (int) offset, val);
658         return val;
659 }
660 
661 static inline void cardvcc_write(const struct lanai_vcc *lvcc,
662         u32 val, enum lanai_vcc_offset offset)
663 {
664         APRINTK(lvcc->vbase != NULL, "cardvcc_write: unbound vcc!\n");
665         APRINTK((val & ~0xFFFF) == 0,
666             "cardvcc_write: bad val 0x%X (vci=%d, addr=0x%02X)\n",
667             (unsigned int) val, lvcc->vci, (unsigned int) offset);
668         RWDEBUG("VW vci=%04d 0x%02X > 0x%08X\n",
669             lvcc->vci, (unsigned int) offset, (unsigned int) val);
670         writel(val, lvcc->vbase + offset);
671 }
672 
673 /* -------------------- COMPUTE SIZE OF AN AAL5 PDU: */
674 
675 /* How many bytes will an AAL5 PDU take to transmit - remember that:
676  *   o  we need to add 8 bytes for length, CPI, UU, and CRC
677  *   o  we need to round up to 48 bytes for cells
678  */
679 static inline int aal5_size(int size)
680 {
681         int cells = (size + 8 + 47) / 48;
682         return cells * 48;
683 }
684 
685 /* -------------------- FREE AN ATM SKB: */
686 
687 static inline void lanai_free_skb(struct atm_vcc *atmvcc, struct sk_buff *skb)
688 {
689         if (atmvcc->pop != NULL)
690                 atmvcc->pop(atmvcc, skb);
691         else
692                 dev_kfree_skb_any(skb);
693 }
694 
695 /* -------------------- TURN VCCS ON AND OFF: */
696 
697 static void host_vcc_start_rx(const struct lanai_vcc *lvcc)
698 {
699         u32 addr1;
700         if (lvcc->rx.atmvcc->qos.aal == ATM_AAL5) {
701                 dma_addr_t dmaaddr = lvcc->rx.buf.dmaaddr;
702                 cardvcc_write(lvcc, 0xFFFF, vcc_rxcrc1);
703                 cardvcc_write(lvcc, 0xFFFF, vcc_rxcrc2);
704                 cardvcc_write(lvcc, 0, vcc_rxwriteptr);
705                 cardvcc_write(lvcc, 0, vcc_rxbufstart);
706                 cardvcc_write(lvcc, 0, vcc_rxreadptr);
707                 cardvcc_write(lvcc, (dmaaddr >> 16) & 0xFFFF, vcc_rxaddr2);
708                 addr1 = ((dmaaddr >> 8) & 0xFF) |
709                     RXADDR1_SET_SIZE(lanai_buf_size_cardorder(&lvcc->rx.buf))|
710                     RXADDR1_SET_RMMODE(RMMODE_TRASH) |  /* ??? */
711                  /* RXADDR1_OAM_PRESERVE |      --- no OAM support yet */
712                     RXADDR1_SET_MODE(RXMODE_AAL5);
713         } else
714                 addr1 = RXADDR1_SET_RMMODE(RMMODE_PRESERVE) | /* ??? */
715                     RXADDR1_OAM_PRESERVE |                    /* ??? */
716                     RXADDR1_SET_MODE(RXMODE_AAL0);
717         /* This one must be last! */
718         cardvcc_write(lvcc, addr1, vcc_rxaddr1);
719 }
720 
721 static void host_vcc_start_tx(const struct lanai_vcc *lvcc)
722 {
723         dma_addr_t dmaaddr = lvcc->tx.buf.dmaaddr;
724         cardvcc_write(lvcc, 0, vcc_txicg);
725         cardvcc_write(lvcc, 0xFFFF, vcc_txcrc1);
726         cardvcc_write(lvcc, 0xFFFF, vcc_txcrc2);
727         cardvcc_write(lvcc, 0, vcc_txreadptr);
728         cardvcc_write(lvcc, 0, vcc_txendptr);
729         cardvcc_write(lvcc, 0, vcc_txwriteptr);
730         cardvcc_write(lvcc,
731                 (lvcc->tx.atmvcc->qos.txtp.traffic_class == ATM_CBR) ?
732                 TXCBR_NEXT_BOZO | lvcc->vci : 0, vcc_txcbr_next);
733         cardvcc_write(lvcc, (dmaaddr >> 16) & 0xFFFF, vcc_txaddr2);
734         cardvcc_write(lvcc,
735             ((dmaaddr >> 8) & 0xFF) |
736             TXADDR1_SET_SIZE(lanai_buf_size_cardorder(&lvcc->tx.buf)),
737             vcc_txaddr1);
738 }
739 
740 /* Shutdown receiving on card */
741 static void lanai_shutdown_rx_vci(const struct lanai_vcc *lvcc)
742 {
743         if (lvcc->vbase == NULL)        /* We were never bound to a VCI */
744                 return;
745         /* 15.1.1 - set to trashing, wait one cell time (15us) */
746         cardvcc_write(lvcc,
747             RXADDR1_SET_RMMODE(RMMODE_TRASH) |
748             RXADDR1_SET_MODE(RXMODE_TRASH), vcc_rxaddr1);
749         udelay(15);
750         /* 15.1.2 - clear rest of entries */
751         cardvcc_write(lvcc, 0, vcc_rxaddr2);
752         cardvcc_write(lvcc, 0, vcc_rxcrc1);
753         cardvcc_write(lvcc, 0, vcc_rxcrc2);
754         cardvcc_write(lvcc, 0, vcc_rxwriteptr);
755         cardvcc_write(lvcc, 0, vcc_rxbufstart);
756         cardvcc_write(lvcc, 0, vcc_rxreadptr);
757 }
758 
759 /* Shutdown transmitting on card.
760  * Unfortunately the lanai needs us to wait until all the data
761  * drains out of the buffer before we can dealloc it, so this
762  * can take awhile -- up to 370ms for a full 128KB buffer
763  * assuming everone else is quiet.  In theory the time is
764  * boundless if there's a CBR VCC holding things up.
765  */
766 static void lanai_shutdown_tx_vci(struct lanai_dev *lanai,
767         struct lanai_vcc *lvcc)
768 {
769         struct sk_buff *skb;
770         unsigned long flags, timeout;
771         int read, write, lastread = -1;
772         APRINTK(!in_interrupt(),
773             "lanai_shutdown_tx_vci called w/o process context!\n");
774         if (lvcc->vbase == NULL)        /* We were never bound to a VCI */
775                 return;
776         /* 15.2.1 - wait for queue to drain */
777         while ((skb = skb_dequeue(&lvcc->tx.backlog)) != NULL)
778                 lanai_free_skb(lvcc->tx.atmvcc, skb);
779         read_lock_irqsave(&vcc_sklist_lock, flags);
780         __clear_bit(lvcc->vci, lanai->backlog_vccs);
781         read_unlock_irqrestore(&vcc_sklist_lock, flags);
782         /*
783          * We need to wait for the VCC to drain but don't wait forever.  We
784          * give each 1K of buffer size 1/128th of a second to clear out.
785          * TODO: maybe disable CBR if we're about to timeout?
786          */
787         timeout = jiffies +
788             (((lanai_buf_size(&lvcc->tx.buf) / 1024) * HZ) >> 7);
789         write = TXWRITEPTR_GET_PTR(cardvcc_read(lvcc, vcc_txwriteptr));
790         for (;;) {
791                 read = TXREADPTR_GET_PTR(cardvcc_read(lvcc, vcc_txreadptr));
792                 if (read == write &&       /* Is TX buffer empty? */
793                     (lvcc->tx.atmvcc->qos.txtp.traffic_class != ATM_CBR ||
794                     (cardvcc_read(lvcc, vcc_txcbr_next) &
795                     TXCBR_NEXT_BOZO) == 0))
796                         break;
797                 if (read != lastread) {    /* Has there been any progress? */
798                         lastread = read;
799                         timeout += HZ / 10;
800                 }
801                 if (unlikely(time_after(jiffies, timeout))) {
802                         printk(KERN_ERR DEV_LABEL "(itf %d): Timed out on "
803                             "backlog closing vci %d\n",
804                             lvcc->tx.atmvcc->dev->number, lvcc->vci);
805                         DPRINTK("read, write = %d, %d\n", read, write);
806                         break;
807                 }
808                 msleep(40);
809         }
810         /* 15.2.2 - clear out all tx registers */
811         cardvcc_write(lvcc, 0, vcc_txreadptr);
812         cardvcc_write(lvcc, 0, vcc_txwriteptr);
813         cardvcc_write(lvcc, 0, vcc_txendptr);
814         cardvcc_write(lvcc, 0, vcc_txcrc1);
815         cardvcc_write(lvcc, 0, vcc_txcrc2);
816         cardvcc_write(lvcc, 0, vcc_txaddr2);
817         cardvcc_write(lvcc, 0, vcc_txaddr1);
818 }
819 
820 /* -------------------- MANAGING AAL0 RX BUFFER: */
821 
822 static inline int aal0_buffer_allocate(struct lanai_dev *lanai)
823 {
824         DPRINTK("aal0_buffer_allocate: allocating AAL0 RX buffer\n");
825         lanai_buf_allocate(&lanai->aal0buf, AAL0_RX_BUFFER_SIZE, 80,
826                            lanai->pci);
827         return (lanai->aal0buf.start == NULL) ? -ENOMEM : 0;
828 }
829 
830 static inline void aal0_buffer_free(struct lanai_dev *lanai)
831 {
832         DPRINTK("aal0_buffer_allocate: freeing AAL0 RX buffer\n");
833         lanai_buf_deallocate(&lanai->aal0buf, lanai->pci);
834 }
835 
836 /* -------------------- EEPROM UTILITIES: */
837 
838 /* Offsets of data in the EEPROM */
839 #define EEPROM_COPYRIGHT        (0)
840 #define EEPROM_COPYRIGHT_LEN    (44)
841 #define EEPROM_CHECKSUM         (62)
842 #define EEPROM_CHECKSUM_REV     (63)
843 #define EEPROM_MAC              (64)
844 #define EEPROM_MAC_REV          (70)
845 #define EEPROM_SERIAL           (112)
846 #define EEPROM_SERIAL_REV       (116)
847 #define EEPROM_MAGIC            (120)
848 #define EEPROM_MAGIC_REV        (124)
849 
850 #define EEPROM_MAGIC_VALUE      (0x5AB478D2)
851 
852 #ifndef READ_EEPROM
853 
854 /* Stub functions to use if EEPROM reading is disabled */
855 static int eeprom_read(struct lanai_dev *lanai)
856 {
857         printk(KERN_INFO DEV_LABEL "(itf %d): *NOT* reading EEPROM\n",
858             lanai->number);
859         memset(&lanai->eeprom[EEPROM_MAC], 0, 6);
860         return 0;
861 }
862 
863 static int eeprom_validate(struct lanai_dev *lanai)
864 {
865         lanai->serialno = 0;
866         lanai->magicno = EEPROM_MAGIC_VALUE;
867         return 0;
868 }
869 
870 #else /* READ_EEPROM */
871 
872 static int eeprom_read(struct lanai_dev *lanai)
873 {
874         int i, address;
875         u8 data;
876         u32 tmp;
877 #define set_config1(x)   do { lanai->conf1 = x; conf1_write(lanai); \
878                             } while (0)
879 #define clock_h()        set_config1(lanai->conf1 | CONFIG1_PROMCLK)
880 #define clock_l()        set_config1(lanai->conf1 &~ CONFIG1_PROMCLK)
881 #define data_h()         set_config1(lanai->conf1 | CONFIG1_PROMDATA)
882 #define data_l()         set_config1(lanai->conf1 &~ CONFIG1_PROMDATA)
883 #define pre_read()       do { data_h(); clock_h(); udelay(5); } while (0)
884 #define read_pin()       (reg_read(lanai, Status_Reg) & STATUS_PROMDATA)
885 #define send_stop()      do { data_l(); udelay(5); clock_h(); udelay(5); \
886                               data_h(); udelay(5); } while (0)
887         /* start with both clock and data high */
888         data_h(); clock_h(); udelay(5);
889         for (address = 0; address < LANAI_EEPROM_SIZE; address++) {
890                 data = (address << 1) | 1;      /* Command=read + address */
891                 /* send start bit */
892                 data_l(); udelay(5);
893                 clock_l(); udelay(5);
894                 for (i = 128; i != 0; i >>= 1) {   /* write command out */
895                         tmp = (lanai->conf1 & ~CONFIG1_PROMDATA) |
896                             ((data & i) ? CONFIG1_PROMDATA : 0);
897                         if (lanai->conf1 != tmp) {
898                                 set_config1(tmp);
899                                 udelay(5);      /* Let new data settle */
900                         }
901                         clock_h(); udelay(5); clock_l(); udelay(5);
902                 }
903                 /* look for ack */
904                 data_h(); clock_h(); udelay(5);
905                 if (read_pin() != 0)
906                         goto error;     /* No ack seen */
907                 clock_l(); udelay(5);
908                 /* read back result */
909                 for (data = 0, i = 7; i >= 0; i--) {
910                         data_h(); clock_h(); udelay(5);
911                         data = (data << 1) | !!read_pin();
912                         clock_l(); udelay(5);
913                 }
914                 /* look again for ack */
915                 data_h(); clock_h(); udelay(5);
916                 if (read_pin() == 0)
917                         goto error;     /* Spurious ack */
918                 clock_l(); udelay(5);
919                 send_stop();
920                 lanai->eeprom[address] = data;
921                 DPRINTK("EEPROM 0x%04X %02X\n",
922                     (unsigned int) address, (unsigned int) data);
923         }
924         return 0;
925     error:
926         clock_l(); udelay(5);           /* finish read */
927         send_stop();
928         printk(KERN_ERR DEV_LABEL "(itf %d): error reading EEPROM byte %d\n",
929             lanai->number, address);
930         return -EIO;
931 #undef set_config1
932 #undef clock_h
933 #undef clock_l
934 #undef data_h
935 #undef data_l
936 #undef pre_read
937 #undef read_pin
938 #undef send_stop
939 }
940 
941 /* read a big-endian 4-byte value out of eeprom */
942 static inline u32 eeprom_be4(const struct lanai_dev *lanai, int address)
943 {
944         return be32_to_cpup((const u32 *) &lanai->eeprom[address]);
945 }
946 
947 /* Checksum/validate EEPROM contents */
948 static int eeprom_validate(struct lanai_dev *lanai)
949 {
950         int i, s;
951         u32 v;
952         const u8 *e = lanai->eeprom;
953 #ifdef DEBUG
954         /* First, see if we can get an ASCIIZ string out of the copyright */
955         for (i = EEPROM_COPYRIGHT;
956             i < (EEPROM_COPYRIGHT + EEPROM_COPYRIGHT_LEN); i++)
957                 if (e[i] < 0x20 || e[i] > 0x7E)
958                         break;
959         if ( i != EEPROM_COPYRIGHT &&
960             i != EEPROM_COPYRIGHT + EEPROM_COPYRIGHT_LEN && e[i] == '\0')
961                 DPRINTK("eeprom: copyright = \"%s\"\n",
962                     (char *) &e[EEPROM_COPYRIGHT]);
963         else
964                 DPRINTK("eeprom: copyright not found\n");
965 #endif
966         /* Validate checksum */
967         for (i = s = 0; i < EEPROM_CHECKSUM; i++)
968                 s += e[i];
969         s &= 0xFF;
970         if (s != e[EEPROM_CHECKSUM]) {
971                 printk(KERN_ERR DEV_LABEL "(itf %d): EEPROM checksum bad "
972                     "(wanted 0x%02X, got 0x%02X)\n", lanai->number,
973                     (unsigned int) s, (unsigned int) e[EEPROM_CHECKSUM]);
974                 return -EIO;
975         }
976         s ^= 0xFF;
977         if (s != e[EEPROM_CHECKSUM_REV]) {
978                 printk(KERN_ERR DEV_LABEL "(itf %d): EEPROM inverse checksum "
979                     "bad (wanted 0x%02X, got 0x%02X)\n", lanai->number,
980                     (unsigned int) s, (unsigned int) e[EEPROM_CHECKSUM_REV]);
981                 return -EIO;
982         }
983         /* Verify MAC address */
984         for (i = 0; i < 6; i++)
985                 if ((e[EEPROM_MAC + i] ^ e[EEPROM_MAC_REV + i]) != 0xFF) {
986                         printk(KERN_ERR DEV_LABEL
987                             "(itf %d) : EEPROM MAC addresses don't match "
988                             "(0x%02X, inverse 0x%02X)\n", lanai->number,
989                             (unsigned int) e[EEPROM_MAC + i],
990                             (unsigned int) e[EEPROM_MAC_REV + i]);
991                         return -EIO;
992                 }
993         DPRINTK("eeprom: MAC address = %pM\n", &e[EEPROM_MAC]);
994         /* Verify serial number */
995         lanai->serialno = eeprom_be4(lanai, EEPROM_SERIAL);
996         v = eeprom_be4(lanai, EEPROM_SERIAL_REV);
997         if ((lanai->serialno ^ v) != 0xFFFFFFFF) {
998                 printk(KERN_ERR DEV_LABEL "(itf %d): EEPROM serial numbers "
999                     "don't match (0x%08X, inverse 0x%08X)\n", lanai->number,
1000                     (unsigned int) lanai->serialno, (unsigned int) v);
1001                 return -EIO;
1002         }
1003         DPRINTK("eeprom: Serial number = %d\n", (unsigned int) lanai->serialno);
1004         /* Verify magic number */
1005         lanai->magicno = eeprom_be4(lanai, EEPROM_MAGIC);
1006         v = eeprom_be4(lanai, EEPROM_MAGIC_REV);
1007         if ((lanai->magicno ^ v) != 0xFFFFFFFF) {
1008                 printk(KERN_ERR DEV_LABEL "(itf %d): EEPROM magic numbers "
1009                     "don't match (0x%08X, inverse 0x%08X)\n", lanai->number,
1010                     lanai->magicno, v);
1011                 return -EIO;
1012         }
1013         DPRINTK("eeprom: Magic number = 0x%08X\n", lanai->magicno);
1014         if (lanai->magicno != EEPROM_MAGIC_VALUE)
1015                 printk(KERN_WARNING DEV_LABEL "(itf %d): warning - EEPROM "
1016                     "magic not what expected (got 0x%08X, not 0x%08X)\n",
1017                     lanai->number, (unsigned int) lanai->magicno,
1018                     (unsigned int) EEPROM_MAGIC_VALUE);
1019         return 0;
1020 }
1021 
1022 #endif /* READ_EEPROM */
1023 
1024 static inline const u8 *eeprom_mac(const struct lanai_dev *lanai)
1025 {
1026         return &lanai->eeprom[EEPROM_MAC];
1027 }
1028 
1029 /* -------------------- INTERRUPT HANDLING UTILITIES: */
1030 
1031 /* Interrupt types */
1032 #define INT_STATS       (0x00000002)    /* Statistics counter overflow */
1033 #define INT_SOOL        (0x00000004)    /* SOOL changed state */
1034 #define INT_LOCD        (0x00000008)    /* LOCD changed state */
1035 #define INT_LED         (0x00000010)    /* LED (HAPPI) changed state */
1036 #define INT_GPIN        (0x00000020)    /* GPIN changed state */
1037 #define INT_PING        (0x00000040)    /* PING_COUNT fulfilled */
1038 #define INT_WAKE        (0x00000080)    /* Lanai wants bus */
1039 #define INT_CBR0        (0x00000100)    /* CBR sched hit VCI 0 */
1040 #define INT_LOCK        (0x00000200)    /* Service list overflow */
1041 #define INT_MISMATCH    (0x00000400)    /* TX magic list mismatch */
1042 #define INT_AAL0_STR    (0x00000800)    /* Non-AAL5 buffer half filled */
1043 #define INT_AAL0        (0x00001000)    /* Non-AAL5 data available */
1044 #define INT_SERVICE     (0x00002000)    /* Service list entries available */
1045 #define INT_TABORTSENT  (0x00004000)    /* Target abort sent by lanai */
1046 #define INT_TABORTBM    (0x00008000)    /* Abort rcv'd as bus master */
1047 #define INT_TIMEOUTBM   (0x00010000)    /* No response to bus master */
1048 #define INT_PCIPARITY   (0x00020000)    /* Parity error on PCI */
1049 
1050 /* Sets of the above */
1051 #define INT_ALL         (0x0003FFFE)    /* All interrupts */
1052 #define INT_STATUS      (0x0000003C)    /* Some status pin changed */
1053 #define INT_DMASHUT     (0x00038000)    /* DMA engine got shut down */
1054 #define INT_SEGSHUT     (0x00000700)    /* Segmentation got shut down */
1055 
1056 static inline u32 intr_pending(const struct lanai_dev *lanai)
1057 {
1058         return reg_read(lanai, IntStatusMasked_Reg);
1059 }
1060 
1061 static inline void intr_enable(const struct lanai_dev *lanai, u32 i)
1062 {
1063         reg_write(lanai, i, IntControlEna_Reg);
1064 }
1065 
1066 static inline void intr_disable(const struct lanai_dev *lanai, u32 i)
1067 {
1068         reg_write(lanai, i, IntControlDis_Reg);
1069 }
1070 
1071 /* -------------------- CARD/PCI STATUS: */
1072 
1073 static void status_message(int itf, const char *name, int status)
1074 {
1075         static const char *onoff[2] = { "off to on", "on to off" };
1076         printk(KERN_INFO DEV_LABEL "(itf %d): %s changed from %s\n",
1077             itf, name, onoff[!status]);
1078 }
1079 
1080 static void lanai_check_status(struct lanai_dev *lanai)
1081 {
1082         u32 new = reg_read(lanai, Status_Reg);
1083         u32 changes = new ^ lanai->status;
1084         lanai->status = new;
1085 #define e(flag, name) \
1086                 if (changes & flag) \
1087                         status_message(lanai->number, name, new & flag)
1088         e(STATUS_SOOL, "SOOL");
1089         e(STATUS_LOCD, "LOCD");
1090         e(STATUS_LED, "LED");
1091         e(STATUS_GPIN, "GPIN");
1092 #undef e
1093 }
1094 
1095 static void pcistatus_got(int itf, const char *name)
1096 {
1097         printk(KERN_INFO DEV_LABEL "(itf %d): PCI got %s error\n", itf, name);
1098 }
1099 
1100 static void pcistatus_check(struct lanai_dev *lanai, int clearonly)
1101 {
1102         u16 s;
1103         int result;
1104         result = pci_read_config_word(lanai->pci, PCI_STATUS, &s);
1105         if (result != PCIBIOS_SUCCESSFUL) {
1106                 printk(KERN_ERR DEV_LABEL "(itf %d): can't read PCI_STATUS: "
1107                     "%d\n", lanai->number, result);
1108                 return;
1109         }
1110         s &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
1111             PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABORT |
1112             PCI_STATUS_SIG_TARGET_ABORT | PCI_STATUS_PARITY;
1113         if (s == 0)
1114                 return;
1115         result = pci_write_config_word(lanai->pci, PCI_STATUS, s);
1116         if (result != PCIBIOS_SUCCESSFUL)
1117                 printk(KERN_ERR DEV_LABEL "(itf %d): can't write PCI_STATUS: "
1118                     "%d\n", lanai->number, result);
1119         if (clearonly)
1120                 return;
1121 #define e(flag, name, stat) \
1122                 if (s & flag) { \
1123                         pcistatus_got(lanai->number, name); \
1124                         ++lanai->stats.pcierr_##stat; \
1125                 }
1126         e(PCI_STATUS_DETECTED_PARITY, "parity", parity_detect);
1127         e(PCI_STATUS_SIG_SYSTEM_ERROR, "signalled system", serr_set);
1128         e(PCI_STATUS_REC_MASTER_ABORT, "master", master_abort);
1129         e(PCI_STATUS_REC_TARGET_ABORT, "master target", m_target_abort);
1130         e(PCI_STATUS_SIG_TARGET_ABORT, "slave", s_target_abort);
1131         e(PCI_STATUS_PARITY, "master parity", master_parity);
1132 #undef e
1133 }
1134 
1135 /* -------------------- VCC TX BUFFER UTILITIES: */
1136 
1137 /* space left in tx buffer in bytes */
1138 static inline int vcc_tx_space(const struct lanai_vcc *lvcc, int endptr)
1139 {
1140         int r;
1141         r = endptr * 16;
1142         r -= ((unsigned long) lvcc->tx.buf.ptr) -
1143             ((unsigned long) lvcc->tx.buf.start);
1144         r -= 16;        /* Leave "bubble" - if start==end it looks empty */
1145         if (r < 0)
1146                 r += lanai_buf_size(&lvcc->tx.buf);
1147         return r;
1148 }
1149 
1150 /* test if VCC is currently backlogged */
1151 static inline int vcc_is_backlogged(const struct lanai_vcc *lvcc)
1152 {
1153         return !skb_queue_empty(&lvcc->tx.backlog);
1154 }
1155 
1156 /* Bit fields in the segmentation buffer descriptor */
1157 #define DESCRIPTOR_MAGIC        (0xD0000000)
1158 #define DESCRIPTOR_AAL5         (0x00008000)
1159 #define DESCRIPTOR_AAL5_STREAM  (0x00004000)
1160 #define DESCRIPTOR_CLP          (0x00002000)
1161 
1162 /* Add 32-bit descriptor with its padding */
1163 static inline void vcc_tx_add_aal5_descriptor(struct lanai_vcc *lvcc,
1164         u32 flags, int len)
1165 {
1166         int pos;
1167         APRINTK((((unsigned long) lvcc->tx.buf.ptr) & 15) == 0,
1168             "vcc_tx_add_aal5_descriptor: bad ptr=%p\n", lvcc->tx.buf.ptr);
1169         lvcc->tx.buf.ptr += 4;  /* Hope the values REALLY don't matter */
1170         pos = ((unsigned char *) lvcc->tx.buf.ptr) -
1171             (unsigned char *) lvcc->tx.buf.start;
1172         APRINTK((pos & ~0x0001FFF0) == 0,
1173             "vcc_tx_add_aal5_descriptor: bad pos (%d) before, vci=%d, "
1174             "start,ptr,end=%p,%p,%p\n", pos, lvcc->vci,
1175             lvcc->tx.buf.start, lvcc->tx.buf.ptr, lvcc->tx.buf.end);
1176         pos = (pos + len) & (lanai_buf_size(&lvcc->tx.buf) - 1);
1177         APRINTK((pos & ~0x0001FFF0) == 0,
1178             "vcc_tx_add_aal5_descriptor: bad pos (%d) after, vci=%d, "
1179             "start,ptr,end=%p,%p,%p\n", pos, lvcc->vci,
1180             lvcc->tx.buf.start, lvcc->tx.buf.ptr, lvcc->tx.buf.end);
1181         lvcc->tx.buf.ptr[-1] =
1182             cpu_to_le32(DESCRIPTOR_MAGIC | DESCRIPTOR_AAL5 |
1183             ((lvcc->tx.atmvcc->atm_options & ATM_ATMOPT_CLP) ?
1184             DESCRIPTOR_CLP : 0) | flags | pos >> 4);
1185         if (lvcc->tx.buf.ptr >= lvcc->tx.buf.end)
1186                 lvcc->tx.buf.ptr = lvcc->tx.buf.start;
1187 }
1188 
1189 /* Add 32-bit AAL5 trailer and leave room for its CRC */
1190 static inline void vcc_tx_add_aal5_trailer(struct lanai_vcc *lvcc,
1191         int len, int cpi, int uu)
1192 {
1193         APRINTK((((unsigned long) lvcc->tx.buf.ptr) & 15) == 8,
1194             "vcc_tx_add_aal5_trailer: bad ptr=%p\n", lvcc->tx.buf.ptr);
1195         lvcc->tx.buf.ptr += 2;
1196         lvcc->tx.buf.ptr[-2] = cpu_to_be32((uu << 24) | (cpi << 16) | len);
1197         if (lvcc->tx.buf.ptr >= lvcc->tx.buf.end)
1198                 lvcc->tx.buf.ptr = lvcc->tx.buf.start;
1199 }
1200 
1201 static inline void vcc_tx_memcpy(struct lanai_vcc *lvcc,
1202         const unsigned char *src, int n)
1203 {
1204         unsigned char *e;
1205         int m;
1206         e = ((unsigned char *) lvcc->tx.buf.ptr) + n;
1207         m = e - (unsigned char *) lvcc->tx.buf.end;
1208         if (m < 0)
1209                 m = 0;
1210         memcpy(lvcc->tx.buf.ptr, src, n - m);
1211         if (m != 0) {
1212                 memcpy(lvcc->tx.buf.start, src + n - m, m);
1213                 e = ((unsigned char *) lvcc->tx.buf.start) + m;
1214         }
1215         lvcc->tx.buf.ptr = (u32 *) e;
1216 }
1217 
1218 static inline void vcc_tx_memzero(struct lanai_vcc *lvcc, int n)
1219 {
1220         unsigned char *e;
1221         int m;
1222         if (n == 0)
1223                 return;
1224         e = ((unsigned char *) lvcc->tx.buf.ptr) + n;
1225         m = e - (unsigned char *) lvcc->tx.buf.end;
1226         if (m < 0)
1227                 m = 0;
1228         memset(lvcc->tx.buf.ptr, 0, n - m);
1229         if (m != 0) {
1230                 memset(lvcc->tx.buf.start, 0, m);
1231                 e = ((unsigned char *) lvcc->tx.buf.start) + m;
1232         }
1233         lvcc->tx.buf.ptr = (u32 *) e;
1234 }
1235 
1236 /* Update "butt" register to specify new WritePtr */
1237 static inline void lanai_endtx(struct lanai_dev *lanai,
1238         const struct lanai_vcc *lvcc)
1239 {
1240         int i, ptr = ((unsigned char *) lvcc->tx.buf.ptr) -
1241             (unsigned char *) lvcc->tx.buf.start;
1242         APRINTK((ptr & ~0x0001FFF0) == 0,
1243             "lanai_endtx: bad ptr (%d), vci=%d, start,ptr,end=%p,%p,%p\n",
1244             ptr, lvcc->vci, lvcc->tx.buf.start, lvcc->tx.buf.ptr,
1245             lvcc->tx.buf.end);
1246 
1247         /*
1248          * Since the "butt register" is a shared resounce on the card we
1249          * serialize all accesses to it through this spinlock.  This is
1250          * mostly just paranoia since the register is rarely "busy" anyway
1251          * but is needed for correctness.
1252          */
1253         spin_lock(&lanai->endtxlock);
1254         /*
1255          * We need to check if the "butt busy" bit is set before
1256          * updating the butt register.  In theory this should
1257          * never happen because the ATM card is plenty fast at
1258          * updating the register.  Still, we should make sure
1259          */
1260         for (i = 0; reg_read(lanai, Status_Reg) & STATUS_BUTTBUSY; i++) {
1261                 if (unlikely(i > 50)) {
1262                         printk(KERN_ERR DEV_LABEL "(itf %d): butt register "
1263                             "always busy!\n", lanai->number);
1264                         break;
1265                 }
1266                 udelay(5);
1267         }
1268         /*
1269          * Before we tall the card to start work we need to be sure 100% of
1270          * the info in the service buffer has been written before we tell
1271          * the card about it
1272          */
1273         wmb();
1274         reg_write(lanai, (ptr << 12) | lvcc->vci, Butt_Reg);
1275         spin_unlock(&lanai->endtxlock);
1276 }
1277 
1278 /*
1279  * Add one AAL5 PDU to lvcc's transmit buffer.  Caller garauntees there's
1280  * space available.  "pdusize" is the number of bytes the PDU will take
1281  */
1282 static void lanai_send_one_aal5(struct lanai_dev *lanai,
1283         struct lanai_vcc *lvcc, struct sk_buff *skb, int pdusize)
1284 {
1285         int pad;
1286         APRINTK(pdusize == aal5_size(skb->len),
1287             "lanai_send_one_aal5: wrong size packet (%d != %d)\n",
1288             pdusize, aal5_size(skb->len));
1289         vcc_tx_add_aal5_descriptor(lvcc, 0, pdusize);
1290         pad = pdusize - skb->len - 8;
1291         APRINTK(pad >= 0, "pad is negative (%d)\n", pad);
1292         APRINTK(pad < 48, "pad is too big (%d)\n", pad);
1293         vcc_tx_memcpy(lvcc, skb->data, skb->len);
1294         vcc_tx_memzero(lvcc, pad);
1295         vcc_tx_add_aal5_trailer(lvcc, skb->len, 0, 0);
1296         lanai_endtx(lanai, lvcc);
1297         lanai_free_skb(lvcc->tx.atmvcc, skb);
1298         atomic_inc(&lvcc->tx.atmvcc->stats->tx);
1299 }
1300 
1301 /* Try to fill the buffer - don't call unless there is backlog */
1302 static void vcc_tx_unqueue_aal5(struct lanai_dev *lanai,
1303         struct lanai_vcc *lvcc, int endptr)
1304 {
1305         int n;
1306         struct sk_buff *skb;
1307         int space = vcc_tx_space(lvcc, endptr);
1308         APRINTK(vcc_is_backlogged(lvcc),
1309             "vcc_tx_unqueue() called with empty backlog (vci=%d)\n",
1310             lvcc->vci);
1311         while (space >= 64) {
1312                 skb = skb_dequeue(&lvcc->tx.backlog);
1313                 if (skb == NULL)
1314                         goto no_backlog;
1315                 n = aal5_size(skb->len);
1316                 if (n + 16 > space) {
1317                         /* No room for this packet - put it back on queue */
1318                         skb_queue_head(&lvcc->tx.backlog, skb);
1319                         return;
1320                 }
1321                 lanai_send_one_aal5(lanai, lvcc, skb, n);
1322                 space -= n + 16;
1323         }
1324         if (!vcc_is_backlogged(lvcc)) {
1325             no_backlog:
1326                 __clear_bit(lvcc->vci, lanai->backlog_vccs);
1327         }
1328 }
1329 
1330 /* Given an skb that we want to transmit either send it now or queue */
1331 static void vcc_tx_aal5(struct lanai_dev *lanai, struct lanai_vcc *lvcc,
1332         struct sk_buff *skb)
1333 {
1334         int space, n;
1335         if (vcc_is_backlogged(lvcc))            /* Already backlogged */
1336                 goto queue_it;
1337         space = vcc_tx_space(lvcc,
1338                     TXREADPTR_GET_PTR(cardvcc_read(lvcc, vcc_txreadptr)));
1339         n = aal5_size(skb->len);
1340         APRINTK(n + 16 >= 64, "vcc_tx_aal5: n too small (%d)\n", n);
1341         if (space < n + 16) {                   /* No space for this PDU */
1342                 __set_bit(lvcc->vci, lanai->backlog_vccs);
1343             queue_it:
1344                 skb_queue_tail(&lvcc->tx.backlog, skb);
1345                 return;
1346         }
1347         lanai_send_one_aal5(lanai, lvcc, skb, n);
1348 }
1349 
1350 static void vcc_tx_unqueue_aal0(struct lanai_dev *lanai,
1351         struct lanai_vcc *lvcc, int endptr)
1352 {
1353         printk(KERN_INFO DEV_LABEL
1354             ": vcc_tx_unqueue_aal0: not implemented\n");
1355 }
1356 
1357 static void vcc_tx_aal0(struct lanai_dev *lanai, struct lanai_vcc *lvcc,
1358         struct sk_buff *skb)
1359 {
1360         printk(KERN_INFO DEV_LABEL ": vcc_tx_aal0: not implemented\n");
1361         /* Remember to increment lvcc->tx.atmvcc->stats->tx */
1362         lanai_free_skb(lvcc->tx.atmvcc, skb);
1363 }
1364 
1365 /* -------------------- VCC RX BUFFER UTILITIES: */
1366 
1367 /* unlike the _tx_ cousins, this doesn't update ptr */
1368 static inline void vcc_rx_memcpy(unsigned char *dest,
1369         const struct lanai_vcc *lvcc, int n)
1370 {
1371         int m = ((const unsigned char *) lvcc->rx.buf.ptr) + n -
1372             ((const unsigned char *) (lvcc->rx.buf.end));
1373         if (m < 0)
1374                 m = 0;
1375         memcpy(dest, lvcc->rx.buf.ptr, n - m);
1376         memcpy(dest + n - m, lvcc->rx.buf.start, m);
1377         /* Make sure that these copies don't get reordered */
1378         barrier();
1379 }
1380 
1381 /* Receive AAL5 data on a VCC with a particular endptr */
1382 static void vcc_rx_aal5(struct lanai_vcc *lvcc, int endptr)
1383 {
1384         int size;
1385         struct sk_buff *skb;
1386         const u32 *x;
1387         u32 *end = &lvcc->rx.buf.start[endptr * 4];
1388         int n = ((unsigned long) end) - ((unsigned long) lvcc->rx.buf.ptr);
1389         if (n < 0)
1390                 n += lanai_buf_size(&lvcc->rx.buf);
1391         APRINTK(n >= 0 && n < lanai_buf_size(&lvcc->rx.buf) && !(n & 15),
1392             "vcc_rx_aal5: n out of range (%d/%Zu)\n",
1393             n, lanai_buf_size(&lvcc->rx.buf));
1394         /* Recover the second-to-last word to get true pdu length */
1395         if ((x = &end[-2]) < lvcc->rx.buf.start)
1396                 x = &lvcc->rx.buf.end[-2];
1397         /*
1398          * Before we actually read from the buffer, make sure the memory
1399          * changes have arrived
1400          */
1401         rmb();
1402         size = be32_to_cpup(x) & 0xffff;
1403         if (unlikely(n != aal5_size(size))) {
1404                 /* Make sure size matches padding */
1405                 printk(KERN_INFO DEV_LABEL "(itf %d): Got bad AAL5 length "
1406                     "on vci=%d - size=%d n=%d\n",
1407                     lvcc->rx.atmvcc->dev->number, lvcc->vci, size, n);
1408                 lvcc->stats.x.aal5.rx_badlen++;
1409                 goto out;
1410         }
1411         skb = atm_alloc_charge(lvcc->rx.atmvcc, size, GFP_ATOMIC);
1412         if (unlikely(skb == NULL)) {
1413                 lvcc->stats.rx_nomem++;
1414                 goto out;
1415         }
1416         skb_put(skb, size);
1417         vcc_rx_memcpy(skb->data, lvcc, size);
1418         ATM_SKB(skb)->vcc = lvcc->rx.atmvcc;
1419         __net_timestamp(skb);
1420         lvcc->rx.atmvcc->push(lvcc->rx.atmvcc, skb);
1421         atomic_inc(&lvcc->rx.atmvcc->stats->rx);
1422     out:
1423         lvcc->rx.buf.ptr = end;
1424         cardvcc_write(lvcc, endptr, vcc_rxreadptr);
1425 }
1426 
1427 static void vcc_rx_aal0(struct lanai_dev *lanai)
1428 {
1429         printk(KERN_INFO DEV_LABEL ": vcc_rx_aal0: not implemented\n");
1430         /* Remember to get read_lock(&vcc_sklist_lock) while looking up VC */
1431         /* Remember to increment lvcc->rx.atmvcc->stats->rx */
1432 }
1433 
1434 /* -------------------- MANAGING HOST-BASED VCC TABLE: */
1435 
1436 /* Decide whether to use vmalloc or get_zeroed_page for VCC table */
1437 #if (NUM_VCI * BITS_PER_LONG) <= PAGE_SIZE
1438 #define VCCTABLE_GETFREEPAGE
1439 #else
1440 #include <linux/vmalloc.h>
1441 #endif
1442 
1443 static int vcc_table_allocate(struct lanai_dev *lanai)
1444 {
1445 #ifdef VCCTABLE_GETFREEPAGE
1446         APRINTK((lanai->num_vci) * sizeof(struct lanai_vcc *) <= PAGE_SIZE,
1447             "vcc table > PAGE_SIZE!");
1448         lanai->vccs = (struct lanai_vcc **) get_zeroed_page(GFP_KERNEL);
1449         return (lanai->vccs == NULL) ? -ENOMEM : 0;
1450 #else
1451         int bytes = (lanai->num_vci) * sizeof(struct lanai_vcc *);
1452         lanai->vccs = vzalloc(bytes);
1453         if (unlikely(lanai->vccs == NULL))
1454                 return -ENOMEM;
1455         return 0;
1456 #endif
1457 }
1458 
1459 static inline void vcc_table_deallocate(const struct lanai_dev *lanai)
1460 {
1461 #ifdef VCCTABLE_GETFREEPAGE
1462         free_page((unsigned long) lanai->vccs);
1463 #else
1464         vfree(lanai->vccs);
1465 #endif
1466 }
1467 
1468 /* Allocate a fresh lanai_vcc, with the appropriate things cleared */
1469 static inline struct lanai_vcc *new_lanai_vcc(void)
1470 {
1471         struct lanai_vcc *lvcc;
1472         lvcc =  kzalloc(sizeof(*lvcc), GFP_KERNEL);
1473         if (likely(lvcc != NULL)) {
1474                 skb_queue_head_init(&lvcc->tx.backlog);
1475 #ifdef DEBUG
1476                 lvcc->vci = -1;
1477 #endif
1478         }
1479         return lvcc;
1480 }
1481 
1482 static int lanai_get_sized_buffer(struct lanai_dev *lanai,
1483         struct lanai_buffer *buf, int max_sdu, int multiplier,
1484         const char *name)
1485 {
1486         int size;
1487         if (unlikely(max_sdu < 1))
1488                 max_sdu = 1;
1489         max_sdu = aal5_size(max_sdu);
1490         size = (max_sdu + 16) * multiplier + 16;
1491         lanai_buf_allocate(buf, size, max_sdu + 32, lanai->pci);
1492         if (unlikely(buf->start == NULL))
1493                 return -ENOMEM;
1494         if (unlikely(lanai_buf_size(buf) < size))
1495                 printk(KERN_WARNING DEV_LABEL "(itf %d): wanted %d bytes "
1496                     "for %s buffer, got only %Zu\n", lanai->number, size,
1497                     name, lanai_buf_size(buf));
1498         DPRINTK("Allocated %Zu byte %s buffer\n", lanai_buf_size(buf), name);
1499         return 0;
1500 }
1501 
1502 /* Setup a RX buffer for a currently unbound AAL5 vci */
1503 static inline int lanai_setup_rx_vci_aal5(struct lanai_dev *lanai,
1504         struct lanai_vcc *lvcc, const struct atm_qos *qos)
1505 {
1506         return lanai_get_sized_buffer(lanai, &lvcc->rx.buf,
1507             qos->rxtp.max_sdu, AAL5_RX_MULTIPLIER, "RX");
1508 }
1509 
1510 /* Setup a TX buffer for a currently unbound AAL5 vci */
1511 static int lanai_setup_tx_vci(struct lanai_dev *lanai, struct lanai_vcc *lvcc,
1512         const struct atm_qos *qos)
1513 {
1514         int max_sdu, multiplier;
1515         if (qos->aal == ATM_AAL0) {
1516                 lvcc->tx.unqueue = vcc_tx_unqueue_aal0;
1517                 max_sdu = ATM_CELL_SIZE - 1;
1518                 multiplier = AAL0_TX_MULTIPLIER;
1519         } else {
1520                 lvcc->tx.unqueue = vcc_tx_unqueue_aal5;
1521                 max_sdu = qos->txtp.max_sdu;
1522                 multiplier = AAL5_TX_MULTIPLIER;
1523         }
1524         return lanai_get_sized_buffer(lanai, &lvcc->tx.buf, max_sdu,
1525             multiplier, "TX");
1526 }
1527 
1528 static inline void host_vcc_bind(struct lanai_dev *lanai,
1529         struct lanai_vcc *lvcc, vci_t vci)
1530 {
1531         if (lvcc->vbase != NULL)
1532                 return;    /* We already were bound in the other direction */
1533         DPRINTK("Binding vci %d\n", vci);
1534 #ifdef USE_POWERDOWN
1535         if (lanai->nbound++ == 0) {
1536                 DPRINTK("Coming out of powerdown\n");
1537                 lanai->conf1 &= ~CONFIG1_POWERDOWN;
1538                 conf1_write(lanai);
1539                 conf2_write(lanai);
1540         }
1541 #endif
1542         lvcc->vbase = cardvcc_addr(lanai, vci);
1543         lanai->vccs[lvcc->vci = vci] = lvcc;
1544 }
1545 
1546 static inline void host_vcc_unbind(struct lanai_dev *lanai,
1547         struct lanai_vcc *lvcc)
1548 {
1549         if (lvcc->vbase == NULL)
1550                 return; /* This vcc was never bound */
1551         DPRINTK("Unbinding vci %d\n", lvcc->vci);
1552         lvcc->vbase = NULL;
1553         lanai->vccs[lvcc->vci] = NULL;
1554 #ifdef USE_POWERDOWN
1555         if (--lanai->nbound == 0) {
1556                 DPRINTK("Going into powerdown\n");
1557                 lanai->conf1 |= CONFIG1_POWERDOWN;
1558                 conf1_write(lanai);
1559         }
1560 #endif
1561 }
1562 
1563 /* -------------------- RESET CARD: */
1564 
1565 static void lanai_reset(struct lanai_dev *lanai)
1566 {
1567         printk(KERN_CRIT DEV_LABEL "(itf %d): *NOT* resetting - not "
1568             "implemented\n", lanai->number);
1569         /* TODO */
1570         /* The following is just a hack until we write the real
1571          * resetter - at least ack whatever interrupt sent us
1572          * here
1573          */
1574         reg_write(lanai, INT_ALL, IntAck_Reg);
1575         lanai->stats.card_reset++;
1576 }
1577 
1578 /* -------------------- SERVICE LIST UTILITIES: */
1579 
1580 /*
1581  * Allocate service buffer and tell card about it
1582  */
1583 static int service_buffer_allocate(struct lanai_dev *lanai)
1584 {
1585         lanai_buf_allocate(&lanai->service, SERVICE_ENTRIES * 4, 8,
1586             lanai->pci);
1587         if (unlikely(lanai->service.start == NULL))
1588                 return -ENOMEM;
1589         DPRINTK("allocated service buffer at 0x%08lX, size %Zu(%d)\n",
1590             (unsigned long) lanai->service.start,
1591             lanai_buf_size(&lanai->service),
1592             lanai_buf_size_cardorder(&lanai->service));
1593         /* Clear ServWrite register to be safe */
1594         reg_write(lanai, 0, ServWrite_Reg);
1595         /* ServiceStuff register contains size and address of buffer */
1596         reg_write(lanai,
1597             SSTUFF_SET_SIZE(lanai_buf_size_cardorder(&lanai->service)) |
1598             SSTUFF_SET_ADDR(lanai->service.dmaaddr),
1599             ServiceStuff_Reg);
1600         return 0;
1601 }
1602 
1603 static inline void service_buffer_deallocate(struct lanai_dev *lanai)
1604 {
1605         lanai_buf_deallocate(&lanai->service, lanai->pci);
1606 }
1607 
1608 /* Bitfields in service list */
1609 #define SERVICE_TX      (0x80000000)    /* Was from transmission */
1610 #define SERVICE_TRASH   (0x40000000)    /* RXed PDU was trashed */
1611 #define SERVICE_CRCERR  (0x20000000)    /* RXed PDU had CRC error */
1612 #define SERVICE_CI      (0x10000000)    /* RXed PDU had CI set */
1613 #define SERVICE_CLP     (0x08000000)    /* RXed PDU had CLP set */
1614 #define SERVICE_STREAM  (0x04000000)    /* RX Stream mode */
1615 #define SERVICE_GET_VCI(x) (((x)>>16)&0x3FF)
1616 #define SERVICE_GET_END(x) ((x)&0x1FFF)
1617 
1618 /* Handle one thing from the service list - returns true if it marked a
1619  * VCC ready for xmit
1620  */
1621 static int handle_service(struct lanai_dev *lanai, u32 s)
1622 {
1623         vci_t vci = SERVICE_GET_VCI(s);
1624         struct lanai_vcc *lvcc;
1625         read_lock(&vcc_sklist_lock);
1626         lvcc = lanai->vccs[vci];
1627         if (unlikely(lvcc == NULL)) {
1628                 read_unlock(&vcc_sklist_lock);
1629                 DPRINTK("(itf %d) got service entry 0x%X for nonexistent "
1630                     "vcc %d\n", lanai->number, (unsigned int) s, vci);
1631                 if (s & SERVICE_TX)
1632                         lanai->stats.service_notx++;
1633                 else
1634                         lanai->stats.service_norx++;
1635                 return 0;
1636         }
1637         if (s & SERVICE_TX) {                   /* segmentation interrupt */
1638                 if (unlikely(lvcc->tx.atmvcc == NULL)) {
1639                         read_unlock(&vcc_sklist_lock);
1640                         DPRINTK("(itf %d) got service entry 0x%X for non-TX "
1641                             "vcc %d\n", lanai->number, (unsigned int) s, vci);
1642                         lanai->stats.service_notx++;
1643                         return 0;
1644                 }
1645                 __set_bit(vci, lanai->transmit_ready);
1646                 lvcc->tx.endptr = SERVICE_GET_END(s);
1647                 read_unlock(&vcc_sklist_lock);
1648                 return 1;
1649         }
1650         if (unlikely(lvcc->rx.atmvcc == NULL)) {
1651                 read_unlock(&vcc_sklist_lock);
1652                 DPRINTK("(itf %d) got service entry 0x%X for non-RX "
1653                     "vcc %d\n", lanai->number, (unsigned int) s, vci);
1654                 lanai->stats.service_norx++;
1655                 return 0;
1656         }
1657         if (unlikely(lvcc->rx.atmvcc->qos.aal != ATM_AAL5)) {
1658                 read_unlock(&vcc_sklist_lock);
1659                 DPRINTK("(itf %d) got RX service entry 0x%X for non-AAL5 "
1660                     "vcc %d\n", lanai->number, (unsigned int) s, vci);
1661                 lanai->stats.service_rxnotaal5++;
1662                 atomic_inc(&lvcc->rx.atmvcc->stats->rx_err);
1663                 return 0;
1664         }
1665         if (likely(!(s & (SERVICE_TRASH | SERVICE_STREAM | SERVICE_CRCERR)))) {
1666                 vcc_rx_aal5(lvcc, SERVICE_GET_END(s));
1667                 read_unlock(&vcc_sklist_lock);
1668                 return 0;
1669         }
1670         if (s & SERVICE_TRASH) {
1671                 int bytes;
1672                 read_unlock(&vcc_sklist_lock);
1673                 DPRINTK("got trashed rx pdu on vci %d\n", vci);
1674                 atomic_inc(&lvcc->rx.atmvcc->stats->rx_err);
1675                 lvcc->stats.x.aal5.service_trash++;
1676                 bytes = (SERVICE_GET_END(s) * 16) -
1677                     (((unsigned long) lvcc->rx.buf.ptr) -
1678                     ((unsigned long) lvcc->rx.buf.start)) + 47;
1679                 if (bytes < 0)
1680                         bytes += lanai_buf_size(&lvcc->rx.buf);
1681                 lanai->stats.ovfl_trash += (bytes / 48);
1682                 return 0;
1683         }
1684         if (s & SERVICE_STREAM) {
1685                 read_unlock(&vcc_sklist_lock);
1686                 atomic_inc(&lvcc->rx.atmvcc->stats->rx_err);
1687                 lvcc->stats.x.aal5.service_stream++;
1688                 printk(KERN_ERR DEV_LABEL "(itf %d): Got AAL5 stream "
1689                     "PDU on VCI %d!\n", lanai->number, vci);
1690                 lanai_reset(lanai);
1691                 return 0;
1692         }
1693         DPRINTK("got rx crc error on vci %d\n", vci);
1694         atomic_inc(&lvcc->rx.atmvcc->stats->rx_err);
1695         lvcc->stats.x.aal5.service_rxcrc++;
1696         lvcc->rx.buf.ptr = &lvcc->rx.buf.start[SERVICE_GET_END(s) * 4];
1697         cardvcc_write(lvcc, SERVICE_GET_END(s), vcc_rxreadptr);
1698         read_unlock(&vcc_sklist_lock);
1699         return 0;
1700 }
1701 
1702 /* Try transmitting on all VCIs that we marked ready to serve */
1703 static void iter_transmit(struct lanai_dev *lanai, vci_t vci)
1704 {
1705         struct lanai_vcc *lvcc = lanai->vccs[vci];
1706         if (vcc_is_backlogged(lvcc))
1707                 lvcc->tx.unqueue(lanai, lvcc, lvcc->tx.endptr);
1708 }
1709 
1710 /* Run service queue -- called from interrupt context or with
1711  * interrupts otherwise disabled and with the lanai->servicelock
1712  * lock held
1713  */
1714 static void run_service(struct lanai_dev *lanai)
1715 {
1716         int ntx = 0;
1717         u32 wreg = reg_read(lanai, ServWrite_Reg);
1718         const u32 *end = lanai->service.start + wreg;
1719         while (lanai->service.ptr != end) {
1720                 ntx += handle_service(lanai,
1721                     le32_to_cpup(lanai->service.ptr++));
1722                 if (lanai->service.ptr >= lanai->service.end)
1723                         lanai->service.ptr = lanai->service.start;
1724         }
1725         reg_write(lanai, wreg, ServRead_Reg);
1726         if (ntx != 0) {
1727                 read_lock(&vcc_sklist_lock);
1728                 vci_bitfield_iterate(lanai, lanai->transmit_ready,
1729                     iter_transmit);
1730                 bitmap_zero(lanai->transmit_ready, NUM_VCI);
1731                 read_unlock(&vcc_sklist_lock);
1732         }
1733 }
1734 
1735 /* -------------------- GATHER STATISTICS: */
1736 
1737 static void get_statistics(struct lanai_dev *lanai)
1738 {
1739         u32 statreg = reg_read(lanai, Statistics_Reg);
1740         lanai->stats.atm_ovfl += STATS_GET_FIFO_OVFL(statreg);
1741         lanai->stats.hec_err += STATS_GET_HEC_ERR(statreg);
1742         lanai->stats.vci_trash += STATS_GET_BAD_VCI(statreg);
1743         lanai->stats.ovfl_trash += STATS_GET_BUF_OVFL(statreg);
1744 }
1745 
1746 /* -------------------- POLLING TIMER: */
1747 
1748 #ifndef DEBUG_RW
1749 /* Try to undequeue 1 backlogged vcc */
1750 static void iter_dequeue(struct lanai_dev *lanai, vci_t vci)
1751 {
1752         struct lanai_vcc *lvcc = lanai->vccs[vci];
1753         int endptr;
1754         if (lvcc == NULL || lvcc->tx.atmvcc == NULL ||
1755             !vcc_is_backlogged(lvcc)) {
1756                 __clear_bit(vci, lanai->backlog_vccs);
1757                 return;
1758         }
1759         endptr = TXREADPTR_GET_PTR(cardvcc_read(lvcc, vcc_txreadptr));
1760         lvcc->tx.unqueue(lanai, lvcc, endptr);
1761 }
1762 #endif /* !DEBUG_RW */
1763 
1764 static void lanai_timed_poll(unsigned long arg)
1765 {
1766         struct lanai_dev *lanai = (struct lanai_dev *) arg;
1767 #ifndef DEBUG_RW
1768         unsigned long flags;
1769 #ifdef USE_POWERDOWN
1770         if (lanai->conf1 & CONFIG1_POWERDOWN)
1771                 return;
1772 #endif /* USE_POWERDOWN */
1773         local_irq_save(flags);
1774         /* If we can grab the spinlock, check if any services need to be run */
1775         if (spin_trylock(&lanai->servicelock)) {
1776                 run_service(lanai);
1777                 spin_unlock(&lanai->servicelock);
1778         }
1779         /* ...and see if any backlogged VCs can make progress */
1780         /* unfortunately linux has no read_trylock() currently */
1781         read_lock(&vcc_sklist_lock);
1782         vci_bitfield_iterate(lanai, lanai->backlog_vccs, iter_dequeue);
1783         read_unlock(&vcc_sklist_lock);
1784         local_irq_restore(flags);
1785 
1786         get_statistics(lanai);
1787 #endif /* !DEBUG_RW */
1788         mod_timer(&lanai->timer, jiffies + LANAI_POLL_PERIOD);
1789 }
1790 
1791 static inline void lanai_timed_poll_start(struct lanai_dev *lanai)
1792 {
1793         init_timer(&lanai->timer);
1794         lanai->timer.expires = jiffies + LANAI_POLL_PERIOD;
1795         lanai->timer.data = (unsigned long) lanai;
1796         lanai->timer.function = lanai_timed_poll;
1797         add_timer(&lanai->timer);
1798 }
1799 
1800 static inline void lanai_timed_poll_stop(struct lanai_dev *lanai)
1801 {
1802         del_timer_sync(&lanai->timer);
1803 }
1804 
1805 /* -------------------- INTERRUPT SERVICE: */
1806 
1807 static inline void lanai_int_1(struct lanai_dev *lanai, u32 reason)
1808 {
1809         u32 ack = 0;
1810         if (reason & INT_SERVICE) {
1811                 ack = INT_SERVICE;
1812                 spin_lock(&lanai->servicelock);
1813                 run_service(lanai);
1814                 spin_unlock(&lanai->servicelock);
1815         }
1816         if (reason & (INT_AAL0_STR | INT_AAL0)) {
1817                 ack |= reason & (INT_AAL0_STR | INT_AAL0);
1818                 vcc_rx_aal0(lanai);
1819         }
1820         /* The rest of the interrupts are pretty rare */
1821         if (ack == reason)
1822                 goto done;
1823         if (reason & INT_STATS) {
1824                 reason &= ~INT_STATS;   /* No need to ack */
1825                 get_statistics(lanai);
1826         }
1827         if (reason & INT_STATUS) {
1828                 ack |= reason & INT_STATUS;
1829                 lanai_check_status(lanai);
1830         }
1831         if (unlikely(reason & INT_DMASHUT)) {
1832                 printk(KERN_ERR DEV_LABEL "(itf %d): driver error - DMA "
1833                     "shutdown, reason=0x%08X, address=0x%08X\n",
1834                     lanai->number, (unsigned int) (reason & INT_DMASHUT),
1835                     (unsigned int) reg_read(lanai, DMA_Addr_Reg));
1836                 if (reason & INT_TABORTBM) {
1837                         lanai_reset(lanai);
1838                         return;
1839                 }
1840                 ack |= (reason & INT_DMASHUT);
1841                 printk(KERN_ERR DEV_LABEL "(itf %d): re-enabling DMA\n",
1842                     lanai->number);
1843                 conf1_write(lanai);
1844                 lanai->stats.dma_reenable++;
1845                 pcistatus_check(lanai, 0);
1846         }
1847         if (unlikely(reason & INT_TABORTSENT)) {
1848                 ack |= (reason & INT_TABORTSENT);
1849                 printk(KERN_ERR DEV_LABEL "(itf %d): sent PCI target abort\n",
1850                     lanai->number);
1851                 pcistatus_check(lanai, 0);
1852         }
1853         if (unlikely(reason & INT_SEGSHUT)) {
1854                 printk(KERN_ERR DEV_LABEL "(itf %d): driver error - "
1855                     "segmentation shutdown, reason=0x%08X\n", lanai->number,
1856                     (unsigned int) (reason & INT_SEGSHUT));
1857                 lanai_reset(lanai);
1858                 return;
1859         }
1860         if (unlikely(reason & (INT_PING | INT_WAKE))) {
1861                 printk(KERN_ERR DEV_LABEL "(itf %d): driver error - "
1862                     "unexpected interrupt 0x%08X, resetting\n",
1863                     lanai->number,
1864                     (unsigned int) (reason & (INT_PING | INT_WAKE)));
1865                 lanai_reset(lanai);
1866                 return;
1867         }
1868 #ifdef DEBUG
1869         if (unlikely(ack != reason)) {
1870                 DPRINTK("unacked ints: 0x%08X\n",
1871                     (unsigned int) (reason & ~ack));
1872                 ack = reason;
1873         }
1874 #endif
1875    done:
1876         if (ack != 0)
1877                 reg_write(lanai, ack, IntAck_Reg);
1878 }
1879 
1880 static irqreturn_t lanai_int(int irq, void *devid)
1881 {
1882         struct lanai_dev *lanai = devid;
1883         u32 reason;
1884 
1885 #ifdef USE_POWERDOWN
1886         /*
1887          * If we're powered down we shouldn't be generating any interrupts -
1888          * so assume that this is a shared interrupt line and it's for someone
1889          * else
1890          */
1891         if (unlikely(lanai->conf1 & CONFIG1_POWERDOWN))
1892                 return IRQ_NONE;
1893 #endif
1894 
1895         reason = intr_pending(lanai);
1896         if (reason == 0)
1897                 return IRQ_NONE;        /* Must be for someone else */
1898 
1899         do {
1900                 if (unlikely(reason == 0xFFFFFFFF))
1901                         break;          /* Maybe we've been unplugged? */
1902                 lanai_int_1(lanai, reason);
1903                 reason = intr_pending(lanai);
1904         } while (reason != 0);
1905 
1906         return IRQ_HANDLED;
1907 }
1908 
1909 /* TODO - it would be nice if we could use the "delayed interrupt" system
1910  *   to some advantage
1911  */
1912 
1913 /* -------------------- CHECK BOARD ID/REV: */
1914 
1915 /*
1916  * The board id and revision are stored both in the reset register and
1917  * in the PCI configuration space - the documentation says to check
1918  * each of them.  If revp!=NULL we store the revision there
1919  */
1920 static int check_board_id_and_rev(const char *name, u32 val, int *revp)
1921 {
1922         DPRINTK("%s says board_id=%d, board_rev=%d\n", name,
1923                 (int) RESET_GET_BOARD_ID(val),
1924                 (int) RESET_GET_BOARD_REV(val));
1925         if (RESET_GET_BOARD_ID(val) != BOARD_ID_LANAI256) {
1926                 printk(KERN_ERR DEV_LABEL ": Found %s board-id %d -- not a "
1927                     "Lanai 25.6\n", name, (int) RESET_GET_BOARD_ID(val));
1928                 return -ENODEV;
1929         }
1930         if (revp != NULL)
1931                 *revp = RESET_GET_BOARD_REV(val);
1932         return 0;
1933 }
1934 
1935 /* -------------------- PCI INITIALIZATION/SHUTDOWN: */
1936 
1937 static int lanai_pci_start(struct lanai_dev *lanai)
1938 {
1939         struct pci_dev *pci = lanai->pci;
1940         int result;
1941 
1942         if (pci_enable_device(pci) != 0) {
1943                 printk(KERN_ERR DEV_LABEL "(itf %d): can't enable "
1944                     "PCI device", lanai->number);
1945                 return -ENXIO;
1946         }
1947         pci_set_master(pci);
1948         if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32)) != 0) {
1949                 printk(KERN_WARNING DEV_LABEL
1950                     "(itf %d): No suitable DMA available.\n", lanai->number);
1951                 return -EBUSY;
1952         }
1953         result = check_board_id_and_rev("PCI", pci->subsystem_device, NULL);
1954         if (result != 0)
1955                 return result;
1956         /* Set latency timer to zero as per lanai docs */
1957         result = pci_write_config_byte(pci, PCI_LATENCY_TIMER, 0);
1958         if (result != PCIBIOS_SUCCESSFUL) {
1959                 printk(KERN_ERR DEV_LABEL "(itf %d): can't write "
1960                     "PCI_LATENCY_TIMER: %d\n", lanai->number, result);
1961                 return -EINVAL;
1962         }
1963         pcistatus_check(lanai, 1);
1964         pcistatus_check(lanai, 0);
1965         return 0;
1966 }
1967 
1968 /* -------------------- VPI/VCI ALLOCATION: */
1969 
1970 /*
1971  * We _can_ use VCI==0 for normal traffic, but only for UBR (or we'll
1972  * get a CBRZERO interrupt), and we can use it only if no one is receiving
1973  * AAL0 traffic (since they will use the same queue) - according to the
1974  * docs we shouldn't even use it for AAL0 traffic
1975  */
1976 static inline int vci0_is_ok(struct lanai_dev *lanai,
1977         const struct atm_qos *qos)
1978 {
1979         if (qos->txtp.traffic_class == ATM_CBR || qos->aal == ATM_AAL0)
1980                 return 0;
1981         if (qos->rxtp.traffic_class != ATM_NONE) {
1982                 if (lanai->naal0 != 0)
1983                         return 0;
1984                 lanai->conf2 |= CONFIG2_VCI0_NORMAL;
1985                 conf2_write_if_powerup(lanai);
1986         }
1987         return 1;
1988 }
1989 
1990 /* return true if vci is currently unused, or if requested qos is
1991  * compatible
1992  */
1993 static int vci_is_ok(struct lanai_dev *lanai, vci_t vci,
1994         const struct atm_vcc *atmvcc)
1995 {
1996         const struct atm_qos *qos = &atmvcc->qos;
1997         const struct lanai_vcc *lvcc = lanai->vccs[vci];
1998         if (vci == 0 && !vci0_is_ok(lanai, qos))
1999                 return 0;
2000         if (unlikely(lvcc != NULL)) {
2001                 if (qos->rxtp.traffic_class != ATM_NONE &&
2002                     lvcc->rx.atmvcc != NULL && lvcc->rx.atmvcc != atmvcc)
2003                         return 0;
2004                 if (qos->txtp.traffic_class != ATM_NONE &&
2005                     lvcc->tx.atmvcc != NULL && lvcc->tx.atmvcc != atmvcc)
2006                         return 0;
2007                 if (qos->txtp.traffic_class == ATM_CBR &&
2008                     lanai->cbrvcc != NULL && lanai->cbrvcc != atmvcc)
2009                         return 0;
2010         }
2011         if (qos->aal == ATM_AAL0 && lanai->naal0 == 0 &&
2012             qos->rxtp.traffic_class != ATM_NONE) {
2013                 const struct lanai_vcc *vci0 = lanai->vccs[0];
2014                 if (vci0 != NULL && vci0->rx.atmvcc != NULL)
2015                         return 0;
2016                 lanai->conf2 &= ~CONFIG2_VCI0_NORMAL;
2017                 conf2_write_if_powerup(lanai);
2018         }
2019         return 1;
2020 }
2021 
2022 static int lanai_normalize_ci(struct lanai_dev *lanai,
2023         const struct atm_vcc *atmvcc, short *vpip, vci_t *vcip)
2024 {
2025         switch (*vpip) {
2026                 case ATM_VPI_ANY:
2027                         *vpip = 0;
2028                         /* FALLTHROUGH */
2029                 case 0:
2030                         break;
2031                 default:
2032                         return -EADDRINUSE;
2033         }
2034         switch (*vcip) {
2035                 case ATM_VCI_ANY:
2036                         for (*vcip = ATM_NOT_RSV_VCI; *vcip < lanai->num_vci;
2037                             (*vcip)++)
2038                                 if (vci_is_ok(lanai, *vcip, atmvcc))
2039                                         return 0;
2040                         return -EADDRINUSE;
2041                 default:
2042                         if (*vcip >= lanai->num_vci || *vcip < 0 ||
2043                             !vci_is_ok(lanai, *vcip, atmvcc))
2044                                 return -EADDRINUSE;
2045         }
2046         return 0;
2047 }
2048 
2049 /* -------------------- MANAGE CBR: */
2050 
2051 /*
2052  * CBR ICG is stored as a fixed-point number with 4 fractional bits.
2053  * Note that storing a number greater than 2046.0 will result in
2054  * incorrect shaping
2055  */
2056 #define CBRICG_FRAC_BITS        (4)
2057 #define CBRICG_MAX              (2046 << CBRICG_FRAC_BITS)
2058 
2059 /*
2060  * ICG is related to PCR with the formula PCR = MAXPCR / (ICG + 1)
2061  * where MAXPCR is (according to the docs) 25600000/(54*8),
2062  * which is equal to (3125<<9)/27.
2063  *
2064  * Solving for ICG, we get:
2065  *    ICG = MAXPCR/PCR - 1
2066  *    ICG = (3125<<9)/(27*PCR) - 1
2067  *    ICG = ((3125<<9) - (27*PCR)) / (27*PCR)
2068  *
2069  * The end result is supposed to be a fixed-point number with FRAC_BITS
2070  * bits of a fractional part, so we keep everything in the numerator
2071  * shifted by that much as we compute
2072  *
2073  */
2074 static int pcr_to_cbricg(const struct atm_qos *qos)
2075 {
2076         int rounddown = 0;      /* 1 = Round PCR down, i.e. round ICG _up_ */
2077         int x, icg, pcr = atm_pcr_goal(&qos->txtp);
2078         if (pcr == 0)           /* Use maximum bandwidth */
2079                 return 0;
2080         if (pcr < 0) {
2081                 rounddown = 1;
2082                 pcr = -pcr;
2083         }
2084         x = pcr * 27;
2085         icg = (3125 << (9 + CBRICG_FRAC_BITS)) - (x << CBRICG_FRAC_BITS);
2086         if (rounddown)
2087                 icg += x - 1;
2088         icg /= x;
2089         if (icg > CBRICG_MAX)
2090                 icg = CBRICG_MAX;
2091         DPRINTK("pcr_to_cbricg: pcr=%d rounddown=%c icg=%d\n",
2092             pcr, rounddown ? 'Y' : 'N', icg);
2093         return icg;
2094 }
2095 
2096 static inline void lanai_cbr_setup(struct lanai_dev *lanai)
2097 {
2098         reg_write(lanai, pcr_to_cbricg(&lanai->cbrvcc->qos), CBR_ICG_Reg);
2099         reg_write(lanai, lanai->cbrvcc->vci, CBR_PTR_Reg);
2100         lanai->conf2 |= CONFIG2_CBR_ENABLE;
2101         conf2_write(lanai);
2102 }
2103 
2104 static inline void lanai_cbr_shutdown(struct lanai_dev *lanai)
2105 {
2106         lanai->conf2 &= ~CONFIG2_CBR_ENABLE;
2107         conf2_write(lanai);
2108 }
2109 
2110 /* -------------------- OPERATIONS: */
2111 
2112 /* setup a newly detected device */
2113 static int lanai_dev_open(struct atm_dev *atmdev)
2114 {
2115         struct lanai_dev *lanai = (struct lanai_dev *) atmdev->dev_data;
2116         unsigned long raw_base;
2117         int result;
2118 
2119         DPRINTK("In lanai_dev_open()\n");
2120         /* Basic device fields */
2121         lanai->number = atmdev->number;
2122         lanai->num_vci = NUM_VCI;
2123         bitmap_zero(lanai->backlog_vccs, NUM_VCI);
2124         bitmap_zero(lanai->transmit_ready, NUM_VCI);
2125         lanai->naal0 = 0;
2126 #ifdef USE_POWERDOWN
2127         lanai->nbound = 0;
2128 #endif
2129         lanai->cbrvcc = NULL;
2130         memset(&lanai->stats, 0, sizeof lanai->stats);
2131         spin_lock_init(&lanai->endtxlock);
2132         spin_lock_init(&lanai->servicelock);
2133         atmdev->ci_range.vpi_bits = 0;
2134         atmdev->ci_range.vci_bits = 0;
2135         while (1 << atmdev->ci_range.vci_bits < lanai->num_vci)
2136                 atmdev->ci_range.vci_bits++;
2137         atmdev->link_rate = ATM_25_PCR;
2138 
2139         /* 3.2: PCI initialization */
2140         if ((result = lanai_pci_start(lanai)) != 0)
2141                 goto error;
2142         raw_base = lanai->pci->resource[0].start;
2143         lanai->base = (bus_addr_t) ioremap(raw_base, LANAI_MAPPING_SIZE);
2144         if (lanai->base == NULL) {
2145                 printk(KERN_ERR DEV_LABEL ": couldn't remap I/O space\n");
2146                 goto error_pci;
2147         }
2148         /* 3.3: Reset lanai and PHY */
2149         reset_board(lanai);
2150         lanai->conf1 = reg_read(lanai, Config1_Reg);
2151         lanai->conf1 &= ~(CONFIG1_GPOUT1 | CONFIG1_POWERDOWN |
2152             CONFIG1_MASK_LEDMODE);
2153         lanai->conf1 |= CONFIG1_SET_LEDMODE(LEDMODE_NOT_SOOL);
2154         reg_write(lanai, lanai->conf1 | CONFIG1_GPOUT1, Config1_Reg);
2155         udelay(1000);
2156         conf1_write(lanai);
2157 
2158         /*
2159          * 3.4: Turn on endian mode for big-endian hardware
2160          *   We don't actually want to do this - the actual bit fields
2161          *   in the endian register are not documented anywhere.
2162          *   Instead we do the bit-flipping ourselves on big-endian
2163          *   hardware.
2164          *
2165          * 3.5: get the board ID/rev by reading the reset register
2166          */
2167         result = check_board_id_and_rev("register",
2168             reg_read(lanai, Reset_Reg), &lanai->board_rev);
2169         if (result != 0)
2170                 goto error_unmap;
2171 
2172         /* 3.6: read EEPROM */
2173         if ((result = eeprom_read(lanai)) != 0)
2174                 goto error_unmap;
2175         if ((result = eeprom_validate(lanai)) != 0)
2176                 goto error_unmap;
2177 
2178         /* 3.7: re-reset PHY, do loopback tests, setup PHY */
2179         reg_write(lanai, lanai->conf1 | CONFIG1_GPOUT1, Config1_Reg);
2180         udelay(1000);
2181         conf1_write(lanai);
2182         /* TODO - loopback tests */
2183         lanai->conf1 |= (CONFIG1_GPOUT2 | CONFIG1_GPOUT3 | CONFIG1_DMA_ENABLE);
2184         conf1_write(lanai);
2185 
2186         /* 3.8/3.9: test and initialize card SRAM */
2187         if ((result = sram_test_and_clear(lanai)) != 0)
2188                 goto error_unmap;
2189 
2190         /* 3.10: initialize lanai registers */
2191         lanai->conf1 |= CONFIG1_DMA_ENABLE;
2192         conf1_write(lanai);
2193         if ((result = service_buffer_allocate(lanai)) != 0)
2194                 goto error_unmap;
2195         if ((result = vcc_table_allocate(lanai)) != 0)
2196                 goto error_service;
2197         lanai->conf2 = (lanai->num_vci >= 512 ? CONFIG2_HOWMANY : 0) |
2198             CONFIG2_HEC_DROP |  /* ??? */ CONFIG2_PTI7_MODE;
2199         conf2_write(lanai);
2200         reg_write(lanai, TX_FIFO_DEPTH, TxDepth_Reg);
2201         reg_write(lanai, 0, CBR_ICG_Reg);       /* CBR defaults to no limit */
2202         if ((result = request_irq(lanai->pci->irq, lanai_int, IRQF_SHARED,
2203             DEV_LABEL, lanai)) != 0) {
2204                 printk(KERN_ERR DEV_LABEL ": can't allocate interrupt\n");
2205                 goto error_vcctable;
2206         }
2207         mb();                           /* Make sure that all that made it */
2208         intr_enable(lanai, INT_ALL & ~(INT_PING | INT_WAKE));
2209         /* 3.11: initialize loop mode (i.e. turn looping off) */
2210         lanai->conf1 = (lanai->conf1 & ~CONFIG1_MASK_LOOPMODE) |
2211             CONFIG1_SET_LOOPMODE(LOOPMODE_NORMAL) |
2212             CONFIG1_GPOUT2 | CONFIG1_GPOUT3;
2213         conf1_write(lanai);
2214         lanai->status = reg_read(lanai, Status_Reg);
2215         /* We're now done initializing this card */
2216 #ifdef USE_POWERDOWN
2217         lanai->conf1 |= CONFIG1_POWERDOWN;
2218         conf1_write(lanai);
2219 #endif
2220         memcpy(atmdev->esi, eeprom_mac(lanai), ESI_LEN);
2221         lanai_timed_poll_start(lanai);
2222         printk(KERN_NOTICE DEV_LABEL "(itf %d): rev.%d, base=0x%lx, irq=%u "
2223                 "(%pMF)\n", lanai->number, (int) lanai->pci->revision,
2224                 (unsigned long) lanai->base, lanai->pci->irq, atmdev->esi);
2225         printk(KERN_NOTICE DEV_LABEL "(itf %d): LANAI%s, serialno=%u(0x%X), "
2226             "board_rev=%d\n", lanai->number,
2227             lanai->type==lanai2 ? "2" : "HB", (unsigned int) lanai->serialno,
2228             (unsigned int) lanai->serialno, lanai->board_rev);
2229         return 0;
2230 
2231     error_vcctable:
2232         vcc_table_deallocate(lanai);
2233     error_service:
2234         service_buffer_deallocate(lanai);
2235     error_unmap:
2236         reset_board(lanai);
2237 #ifdef USE_POWERDOWN
2238         lanai->conf1 = reg_read(lanai, Config1_Reg) | CONFIG1_POWERDOWN;
2239         conf1_write(lanai);
2240 #endif
2241         iounmap(lanai->base);
2242     error_pci:
2243         pci_disable_device(lanai->pci);
2244     error:
2245         return result;
2246 }
2247 
2248 /* called when device is being shutdown, and all vcc's are gone - higher
2249  * levels will deallocate the atm device for us
2250  */
2251 static void lanai_dev_close(struct atm_dev *atmdev)
2252 {
2253         struct lanai_dev *lanai = (struct lanai_dev *) atmdev->dev_data;
2254         printk(KERN_INFO DEV_LABEL "(itf %d): shutting down interface\n",
2255             lanai->number);
2256         lanai_timed_poll_stop(lanai);
2257 #ifdef USE_POWERDOWN
2258         lanai->conf1 = reg_read(lanai, Config1_Reg) & ~CONFIG1_POWERDOWN;
2259         conf1_write(lanai);
2260 #endif
2261         intr_disable(lanai, INT_ALL);
2262         free_irq(lanai->pci->irq, lanai);
2263         reset_board(lanai);
2264 #ifdef USE_POWERDOWN
2265         lanai->conf1 |= CONFIG1_POWERDOWN;
2266         conf1_write(lanai);
2267 #endif
2268         pci_disable_device(lanai->pci);
2269         vcc_table_deallocate(lanai);
2270         service_buffer_deallocate(lanai);
2271         iounmap(lanai->base);
2272         kfree(lanai);
2273 }
2274 
2275 /* close a vcc */
2276 static void lanai_close(struct atm_vcc *atmvcc)
2277 {
2278         struct lanai_vcc *lvcc = (struct lanai_vcc *) atmvcc->dev_data;
2279         struct lanai_dev *lanai = (struct lanai_dev *) atmvcc->dev->dev_data;
2280         if (lvcc == NULL)
2281                 return;
2282         clear_bit(ATM_VF_READY, &atmvcc->flags);
2283         clear_bit(ATM_VF_PARTIAL, &atmvcc->flags);
2284         if (lvcc->rx.atmvcc == atmvcc) {
2285                 lanai_shutdown_rx_vci(lvcc);
2286                 if (atmvcc->qos.aal == ATM_AAL0) {
2287                         if (--lanai->naal0 <= 0)
2288                                 aal0_buffer_free(lanai);
2289                 } else
2290                         lanai_buf_deallocate(&lvcc->rx.buf, lanai->pci);
2291                 lvcc->rx.atmvcc = NULL;
2292         }
2293         if (lvcc->tx.atmvcc == atmvcc) {
2294                 if (atmvcc == lanai->cbrvcc) {
2295                         if (lvcc->vbase != NULL)
2296                                 lanai_cbr_shutdown(lanai);
2297                         lanai->cbrvcc = NULL;
2298                 }
2299                 lanai_shutdown_tx_vci(lanai, lvcc);
2300                 lanai_buf_deallocate(&lvcc->tx.buf, lanai->pci);
2301                 lvcc->tx.atmvcc = NULL;
2302         }
2303         if (--lvcc->nref == 0) {
2304                 host_vcc_unbind(lanai, lvcc);
2305                 kfree(lvcc);
2306         }
2307         atmvcc->dev_data = NULL;
2308         clear_bit(ATM_VF_ADDR, &atmvcc->flags);
2309 }
2310 
2311 /* open a vcc on the card to vpi/vci */
2312 static int lanai_open(struct atm_vcc *atmvcc)
2313 {
2314         struct lanai_dev *lanai;
2315         struct lanai_vcc *lvcc;
2316         int result = 0;
2317         int vci = atmvcc->vci;
2318         short vpi = atmvcc->vpi;
2319         /* we don't support partial open - it's not really useful anyway */
2320         if ((test_bit(ATM_VF_PARTIAL, &atmvcc->flags)) ||
2321             (vpi == ATM_VPI_UNSPEC) || (vci == ATM_VCI_UNSPEC))
2322                 return -EINVAL;
2323         lanai = (struct lanai_dev *) atmvcc->dev->dev_data;
2324         result = lanai_normalize_ci(lanai, atmvcc, &vpi, &vci);
2325         if (unlikely(result != 0))
2326                 goto out;
2327         set_bit(ATM_VF_ADDR, &atmvcc->flags);
2328         if (atmvcc->qos.aal != ATM_AAL0 && atmvcc->qos.aal != ATM_AAL5)
2329                 return -EINVAL;
2330         DPRINTK(DEV_LABEL "(itf %d): open %d.%d\n", lanai->number,
2331             (int) vpi, vci);
2332         lvcc = lanai->vccs[vci];
2333         if (lvcc == NULL) {
2334                 lvcc = new_lanai_vcc();
2335                 if (unlikely(lvcc == NULL))
2336                         return -ENOMEM;
2337                 atmvcc->dev_data = lvcc;
2338         }
2339         lvcc->nref++;
2340         if (atmvcc->qos.rxtp.traffic_class != ATM_NONE) {
2341                 APRINTK(lvcc->rx.atmvcc == NULL, "rx.atmvcc!=NULL, vci=%d\n",
2342                     vci);
2343                 if (atmvcc->qos.aal == ATM_AAL0) {
2344                         if (lanai->naal0 == 0)
2345                                 result = aal0_buffer_allocate(lanai);
2346                 } else
2347                         result = lanai_setup_rx_vci_aal5(
2348                             lanai, lvcc, &atmvcc->qos);
2349                 if (unlikely(result != 0))
2350                         goto out_free;
2351                 lvcc->rx.atmvcc = atmvcc;
2352                 lvcc->stats.rx_nomem = 0;
2353                 lvcc->stats.x.aal5.rx_badlen = 0;
2354                 lvcc->stats.x.aal5.service_trash = 0;
2355                 lvcc->stats.x.aal5.service_stream = 0;
2356                 lvcc->stats.x.aal5.service_rxcrc = 0;
2357                 if (atmvcc->qos.aal == ATM_AAL0)
2358                         lanai->naal0++;
2359         }
2360         if (atmvcc->qos.txtp.traffic_class != ATM_NONE) {
2361                 APRINTK(lvcc->tx.atmvcc == NULL, "tx.atmvcc!=NULL, vci=%d\n",
2362                     vci);
2363                 result = lanai_setup_tx_vci(lanai, lvcc, &atmvcc->qos);
2364                 if (unlikely(result != 0))
2365                         goto out_free;
2366                 lvcc->tx.atmvcc = atmvcc;
2367                 if (atmvcc->qos.txtp.traffic_class == ATM_CBR) {
2368                         APRINTK(lanai->cbrvcc == NULL,
2369                             "cbrvcc!=NULL, vci=%d\n", vci);
2370                         lanai->cbrvcc = atmvcc;
2371                 }
2372         }
2373         host_vcc_bind(lanai, lvcc, vci);
2374         /*
2375          * Make sure everything made it to RAM before we tell the card about
2376          * the VCC
2377          */
2378         wmb();
2379         if (atmvcc == lvcc->rx.atmvcc)
2380                 host_vcc_start_rx(lvcc);
2381         if (atmvcc == lvcc->tx.atmvcc) {
2382                 host_vcc_start_tx(lvcc);
2383                 if (lanai->cbrvcc == atmvcc)
2384                         lanai_cbr_setup(lanai);
2385         }
2386         set_bit(ATM_VF_READY, &atmvcc->flags);
2387         return 0;
2388     out_free:
2389         lanai_close(atmvcc);
2390     out:
2391         return result;
2392 }
2393 
2394 static int lanai_send(struct atm_vcc *atmvcc, struct sk_buff *skb)
2395 {
2396         struct lanai_vcc *lvcc = (struct lanai_vcc *) atmvcc->dev_data;
2397         struct lanai_dev *lanai = (struct lanai_dev *) atmvcc->dev->dev_data;
2398         unsigned long flags;
2399         if (unlikely(lvcc == NULL || lvcc->vbase == NULL ||
2400               lvcc->tx.atmvcc != atmvcc))
2401                 goto einval;
2402 #ifdef DEBUG
2403         if (unlikely(skb == NULL)) {
2404                 DPRINTK("lanai_send: skb==NULL for vci=%d\n", atmvcc->vci);
2405                 goto einval;
2406         }
2407         if (unlikely(lanai == NULL)) {
2408                 DPRINTK("lanai_send: lanai==NULL for vci=%d\n", atmvcc->vci);
2409                 goto einval;
2410         }
2411 #endif
2412         ATM_SKB(skb)->vcc = atmvcc;
2413         switch (atmvcc->qos.aal) {
2414                 case ATM_AAL5:
2415                         read_lock_irqsave(&vcc_sklist_lock, flags);
2416                         vcc_tx_aal5(lanai, lvcc, skb);
2417                         read_unlock_irqrestore(&vcc_sklist_lock, flags);
2418                         return 0;
2419                 case ATM_AAL0:
2420                         if (unlikely(skb->len != ATM_CELL_SIZE-1))
2421                                 goto einval;
2422   /* NOTE - this next line is technically invalid - we haven't unshared skb */
2423                         cpu_to_be32s((u32 *) skb->data);
2424                         read_lock_irqsave(&vcc_sklist_lock, flags);
2425                         vcc_tx_aal0(lanai, lvcc, skb);
2426                         read_unlock_irqrestore(&vcc_sklist_lock, flags);
2427                         return 0;
2428         }
2429         DPRINTK("lanai_send: bad aal=%d on vci=%d\n", (int) atmvcc->qos.aal,
2430             atmvcc->vci);
2431     einval:
2432         lanai_free_skb(atmvcc, skb);
2433         return -EINVAL;
2434 }
2435 
2436 static int lanai_change_qos(struct atm_vcc *atmvcc,
2437         /*const*/ struct atm_qos *qos, int flags)
2438 {
2439         return -EBUSY;          /* TODO: need to write this */
2440 }
2441 
2442 #ifndef CONFIG_PROC_FS
2443 #define lanai_proc_read NULL
2444 #else
2445 static int lanai_proc_read(struct atm_dev *atmdev, loff_t *pos, char *page)
2446 {
2447         struct lanai_dev *lanai = (struct lanai_dev *) atmdev->dev_data;
2448         loff_t left = *pos;
2449         struct lanai_vcc *lvcc;
2450         if (left-- == 0)
2451                 return sprintf(page, DEV_LABEL "(itf %d): chip=LANAI%s, "
2452                     "serial=%u, magic=0x%08X, num_vci=%d\n",
2453                     atmdev->number, lanai->type==lanai2 ? "2" : "HB",
2454                     (unsigned int) lanai->serialno,
2455                     (unsigned int) lanai->magicno, lanai->num_vci);
2456         if (left-- == 0)
2457                 return sprintf(page, "revision: board=%d, pci_if=%d\n",
2458                     lanai->board_rev, (int) lanai->pci->revision);
2459         if (left-- == 0)
2460                 return sprintf(page, "EEPROM ESI: %pM\n",
2461                     &lanai->eeprom[EEPROM_MAC]);
2462         if (left-- == 0)
2463                 return sprintf(page, "status: SOOL=%d, LOCD=%d, LED=%d, "
2464                     "GPIN=%d\n", (lanai->status & STATUS_SOOL) ? 1 : 0,
2465                     (lanai->status & STATUS_LOCD) ? 1 : 0,
2466                     (lanai->status & STATUS_LED) ? 1 : 0,
2467                     (lanai->status & STATUS_GPIN) ? 1 : 0);
2468         if (left-- == 0)
2469                 return sprintf(page, "global buffer sizes: service=%Zu, "
2470                     "aal0_rx=%Zu\n", lanai_buf_size(&lanai->service),
2471                     lanai->naal0 ? lanai_buf_size(&lanai->aal0buf) : 0);
2472         if (left-- == 0) {
2473                 get_statistics(lanai);
2474                 return sprintf(page, "cells in error: overflow=%u, "
2475                     "closed_vci=%u, bad_HEC=%u, rx_fifo=%u\n",
2476                     lanai->stats.ovfl_trash, lanai->stats.vci_trash,
2477                     lanai->stats.hec_err, lanai->stats.atm_ovfl);
2478         }
2479         if (left-- == 0)
2480                 return sprintf(page, "PCI errors: parity_detect=%u, "
2481                     "master_abort=%u, master_target_abort=%u,\n",
2482                     lanai->stats.pcierr_parity_detect,
2483                     lanai->stats.pcierr_serr_set,
2484                     lanai->stats.pcierr_m_target_abort);
2485         if (left-- == 0)
2486                 return sprintf(page, "            slave_target_abort=%u, "
2487                     "master_parity=%u\n", lanai->stats.pcierr_s_target_abort,
2488                     lanai->stats.pcierr_master_parity);
2489         if (left-- == 0)
2490                 return sprintf(page, "                     no_tx=%u, "
2491                     "no_rx=%u, bad_rx_aal=%u\n", lanai->stats.service_norx,
2492                     lanai->stats.service_notx,
2493                     lanai->stats.service_rxnotaal5);
2494         if (left-- == 0)
2495                 return sprintf(page, "resets: dma=%u, card=%u\n",
2496                     lanai->stats.dma_reenable, lanai->stats.card_reset);
2497         /* At this point, "left" should be the VCI we're looking for */
2498         read_lock(&vcc_sklist_lock);
2499         for (; ; left++) {
2500                 if (left >= NUM_VCI) {
2501                         left = 0;
2502                         goto out;
2503                 }
2504                 if ((lvcc = lanai->vccs[left]) != NULL)
2505                         break;
2506                 (*pos)++;
2507         }
2508         /* Note that we re-use "left" here since we're done with it */
2509         left = sprintf(page, "VCI %4d: nref=%d, rx_nomem=%u",  (vci_t) left,
2510             lvcc->nref, lvcc->stats.rx_nomem);
2511         if (lvcc->rx.atmvcc != NULL) {
2512                 left += sprintf(&page[left], ",\n          rx_AAL=%d",
2513                     lvcc->rx.atmvcc->qos.aal == ATM_AAL5 ? 5 : 0);
2514                 if (lvcc->rx.atmvcc->qos.aal == ATM_AAL5)
2515                         left += sprintf(&page[left], ", rx_buf_size=%Zu, "
2516                             "rx_bad_len=%u,\n          rx_service_trash=%u, "
2517                             "rx_service_stream=%u, rx_bad_crc=%u",
2518                             lanai_buf_size(&lvcc->rx.buf),
2519                             lvcc->stats.x.aal5.rx_badlen,
2520                             lvcc->stats.x.aal5.service_trash,
2521                             lvcc->stats.x.aal5.service_stream,
2522                             lvcc->stats.x.aal5.service_rxcrc);
2523         }
2524         if (lvcc->tx.atmvcc != NULL)
2525                 left += sprintf(&page[left], ",\n          tx_AAL=%d, "
2526                     "tx_buf_size=%Zu, tx_qos=%cBR, tx_backlogged=%c",
2527                     lvcc->tx.atmvcc->qos.aal == ATM_AAL5 ? 5 : 0,
2528                     lanai_buf_size(&lvcc->tx.buf),
2529                     lvcc->tx.atmvcc == lanai->cbrvcc ? 'C' : 'U',
2530                     vcc_is_backlogged(lvcc) ? 'Y' : 'N');
2531         page[left++] = '\n';
2532         page[left] = '\0';
2533     out:
2534         read_unlock(&vcc_sklist_lock);
2535         return left;
2536 }
2537 #endif /* CONFIG_PROC_FS */
2538 
2539 /* -------------------- HOOKS: */
2540 
2541 static const struct atmdev_ops ops = {
2542         .dev_close      = lanai_dev_close,
2543         .open           = lanai_open,
2544         .close          = lanai_close,
2545         .getsockopt     = NULL,
2546         .setsockopt     = NULL,
2547         .send           = lanai_send,
2548         .phy_put        = NULL,
2549         .phy_get        = NULL,
2550         .change_qos     = lanai_change_qos,
2551         .proc_read      = lanai_proc_read,
2552         .owner          = THIS_MODULE
2553 };
2554 
2555 /* initialize one probed card */
2556 static int lanai_init_one(struct pci_dev *pci,
2557                           const struct pci_device_id *ident)
2558 {
2559         struct lanai_dev *lanai;
2560         struct atm_dev *atmdev;
2561         int result;
2562 
2563         lanai = kmalloc(sizeof(*lanai), GFP_KERNEL);
2564         if (lanai == NULL) {
2565                 printk(KERN_ERR DEV_LABEL
2566                        ": couldn't allocate dev_data structure!\n");
2567                 return -ENOMEM;
2568         }
2569 
2570         atmdev = atm_dev_register(DEV_LABEL, &pci->dev, &ops, -1, NULL);
2571         if (atmdev == NULL) {
2572                 printk(KERN_ERR DEV_LABEL
2573                     ": couldn't register atm device!\n");
2574                 kfree(lanai);
2575                 return -EBUSY;
2576         }
2577 
2578         atmdev->dev_data = lanai;
2579         lanai->pci = pci;
2580         lanai->type = (enum lanai_type) ident->device;
2581 
2582         result = lanai_dev_open(atmdev);
2583         if (result != 0) {
2584                 DPRINTK("lanai_start() failed, err=%d\n", -result);
2585                 atm_dev_deregister(atmdev);
2586                 kfree(lanai);
2587         }
2588         return result;
2589 }
2590 
2591 static struct pci_device_id lanai_pci_tbl[] = {
2592         { PCI_VDEVICE(EF, PCI_DEVICE_ID_EF_ATM_LANAI2) },
2593         { PCI_VDEVICE(EF, PCI_DEVICE_ID_EF_ATM_LANAIHB) },
2594         { 0, }  /* terminal entry */
2595 };
2596 MODULE_DEVICE_TABLE(pci, lanai_pci_tbl);
2597 
2598 static struct pci_driver lanai_driver = {
2599         .name     = DEV_LABEL,
2600         .id_table = lanai_pci_tbl,
2601         .probe    = lanai_init_one,
2602 };
2603 
2604 module_pci_driver(lanai_driver);
2605 
2606 MODULE_AUTHOR("Mitchell Blank Jr <mitch@sfgoth.com>");
2607 MODULE_DESCRIPTION("Efficient Networks Speedstream 3010 driver");
2608 MODULE_LICENSE("GPL");
2609 

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