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Linux/drivers/ata/sata_uli.c

  1 /*
  2  *  sata_uli.c - ULi Electronics SATA
  3  *
  4  *
  5  *  This program is free software; you can redistribute it and/or modify
  6  *  it under the terms of the GNU General Public License as published by
  7  *  the Free Software Foundation; either version 2, or (at your option)
  8  *  any later version.
  9  *
 10  *  This program is distributed in the hope that it will be useful,
 11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 13  *  GNU General Public License for more details.
 14  *
 15  *  You should have received a copy of the GNU General Public License
 16  *  along with this program; see the file COPYING.  If not, write to
 17  *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
 18  *
 19  *
 20  *  libata documentation is available via 'make {ps|pdf}docs',
 21  *  as Documentation/DocBook/libata.*
 22  *
 23  *  Hardware documentation available under NDA.
 24  *
 25  */
 26 
 27 #include <linux/kernel.h>
 28 #include <linux/module.h>
 29 #include <linux/gfp.h>
 30 #include <linux/pci.h>
 31 #include <linux/blkdev.h>
 32 #include <linux/delay.h>
 33 #include <linux/interrupt.h>
 34 #include <linux/device.h>
 35 #include <scsi/scsi_host.h>
 36 #include <linux/libata.h>
 37 
 38 #define DRV_NAME        "sata_uli"
 39 #define DRV_VERSION     "1.3"
 40 
 41 enum {
 42         uli_5289                = 0,
 43         uli_5287                = 1,
 44         uli_5281                = 2,
 45 
 46         uli_max_ports           = 4,
 47 
 48         /* PCI configuration registers */
 49         ULI5287_BASE            = 0x90, /* sata0 phy SCR registers */
 50         ULI5287_OFFS            = 0x10, /* offset from sata0->sata1 phy regs */
 51         ULI5281_BASE            = 0x60, /* sata0 phy SCR  registers */
 52         ULI5281_OFFS            = 0x60, /* offset from sata0->sata1 phy regs */
 53 };
 54 
 55 struct uli_priv {
 56         unsigned int            scr_cfg_addr[uli_max_ports];
 57 };
 58 
 59 static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
 60 static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
 61 static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
 62 
 63 static const struct pci_device_id uli_pci_tbl[] = {
 64         { PCI_VDEVICE(AL, 0x5289), uli_5289 },
 65         { PCI_VDEVICE(AL, 0x5287), uli_5287 },
 66         { PCI_VDEVICE(AL, 0x5281), uli_5281 },
 67 
 68         { }     /* terminate list */
 69 };
 70 
 71 static struct pci_driver uli_pci_driver = {
 72         .name                   = DRV_NAME,
 73         .id_table               = uli_pci_tbl,
 74         .probe                  = uli_init_one,
 75         .remove                 = ata_pci_remove_one,
 76 };
 77 
 78 static struct scsi_host_template uli_sht = {
 79         ATA_BMDMA_SHT(DRV_NAME),
 80 };
 81 
 82 static struct ata_port_operations uli_ops = {
 83         .inherits               = &ata_bmdma_port_ops,
 84         .scr_read               = uli_scr_read,
 85         .scr_write              = uli_scr_write,
 86         .hardreset              = ATA_OP_NULL,
 87 };
 88 
 89 static const struct ata_port_info uli_port_info = {
 90         .flags          = ATA_FLAG_SATA | ATA_FLAG_IGN_SIMPLEX,
 91         .pio_mask       = ATA_PIO4,
 92         .udma_mask      = ATA_UDMA6,
 93         .port_ops       = &uli_ops,
 94 };
 95 
 96 
 97 MODULE_AUTHOR("Peer Chen");
 98 MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller");
 99 MODULE_LICENSE("GPL");
100 MODULE_DEVICE_TABLE(pci, uli_pci_tbl);
101 MODULE_VERSION(DRV_VERSION);
102 
103 static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
104 {
105         struct uli_priv *hpriv = ap->host->private_data;
106         return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg);
107 }
108 
109 static u32 uli_scr_cfg_read(struct ata_link *link, unsigned int sc_reg)
110 {
111         struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
112         unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg);
113         u32 val;
114 
115         pci_read_config_dword(pdev, cfg_addr, &val);
116         return val;
117 }
118 
119 static void uli_scr_cfg_write(struct ata_link *link, unsigned int scr, u32 val)
120 {
121         struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
122         unsigned int cfg_addr = get_scr_cfg_addr(link->ap, scr);
123 
124         pci_write_config_dword(pdev, cfg_addr, val);
125 }
126 
127 static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val)
128 {
129         if (sc_reg > SCR_CONTROL)
130                 return -EINVAL;
131 
132         *val = uli_scr_cfg_read(link, sc_reg);
133         return 0;
134 }
135 
136 static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
137 {
138         if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0
139                 return -EINVAL;
140 
141         uli_scr_cfg_write(link, sc_reg, val);
142         return 0;
143 }
144 
145 static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
146 {
147         const struct ata_port_info *ppi[] = { &uli_port_info, NULL };
148         unsigned int board_idx = (unsigned int) ent->driver_data;
149         struct ata_host *host;
150         struct uli_priv *hpriv;
151         void __iomem * const *iomap;
152         struct ata_ioports *ioaddr;
153         int n_ports, rc;
154 
155         ata_print_version_once(&pdev->dev, DRV_VERSION);
156 
157         rc = pcim_enable_device(pdev);
158         if (rc)
159                 return rc;
160 
161         n_ports = 2;
162         if (board_idx == uli_5287)
163                 n_ports = 4;
164 
165         /* allocate the host */
166         host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
167         if (!host)
168                 return -ENOMEM;
169 
170         hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
171         if (!hpriv)
172                 return -ENOMEM;
173         host->private_data = hpriv;
174 
175         /* the first two ports are standard SFF */
176         rc = ata_pci_sff_init_host(host);
177         if (rc)
178                 return rc;
179 
180         ata_pci_bmdma_init(host);
181 
182         iomap = host->iomap;
183 
184         switch (board_idx) {
185         case uli_5287:
186                 /* If there are four, the last two live right after
187                  * the standard SFF ports.
188                  */
189                 hpriv->scr_cfg_addr[0] = ULI5287_BASE;
190                 hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
191 
192                 ioaddr = &host->ports[2]->ioaddr;
193                 ioaddr->cmd_addr = iomap[0] + 8;
194                 ioaddr->altstatus_addr =
195                 ioaddr->ctl_addr = (void __iomem *)
196                         ((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4;
197                 ioaddr->bmdma_addr = iomap[4] + 16;
198                 hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4;
199                 ata_sff_std_ports(ioaddr);
200 
201                 ata_port_desc(host->ports[2],
202                         "cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
203                         (unsigned long long)pci_resource_start(pdev, 0) + 8,
204                         ((unsigned long long)pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS) + 4,
205                         (unsigned long long)pci_resource_start(pdev, 4) + 16);
206 
207                 ioaddr = &host->ports[3]->ioaddr;
208                 ioaddr->cmd_addr = iomap[2] + 8;
209                 ioaddr->altstatus_addr =
210                 ioaddr->ctl_addr = (void __iomem *)
211                         ((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4;
212                 ioaddr->bmdma_addr = iomap[4] + 24;
213                 hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5;
214                 ata_sff_std_ports(ioaddr);
215 
216                 ata_port_desc(host->ports[2],
217                         "cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
218                         (unsigned long long)pci_resource_start(pdev, 2) + 9,
219                         ((unsigned long long)pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS) + 4,
220                         (unsigned long long)pci_resource_start(pdev, 4) + 24);
221 
222                 break;
223 
224         case uli_5289:
225                 hpriv->scr_cfg_addr[0] = ULI5287_BASE;
226                 hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
227                 break;
228 
229         case uli_5281:
230                 hpriv->scr_cfg_addr[0] = ULI5281_BASE;
231                 hpriv->scr_cfg_addr[1] = ULI5281_BASE + ULI5281_OFFS;
232                 break;
233 
234         default:
235                 BUG();
236                 break;
237         }
238 
239         pci_set_master(pdev);
240         pci_intx(pdev, 1);
241         return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt,
242                                  IRQF_SHARED, &uli_sht);
243 }
244 
245 module_pci_driver(uli_pci_driver);
246 

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