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Linux/drivers/ata/pata_via.c

  1 /*
  2  * pata_via.c   - VIA PATA for new ATA layer
  3  *                        (C) 2005-2006 Red Hat Inc
  4  *
  5  *  Documentation
  6  *      Most chipset documentation available under NDA only
  7  *
  8  *  VIA version guide
  9  *      VIA VT82C561    -       early design, uses ata_generic currently
 10  *      VIA VT82C576    -       MWDMA, 33Mhz
 11  *      VIA VT82C586    -       MWDMA, 33Mhz
 12  *      VIA VT82C586a   -       Added UDMA to 33Mhz
 13  *      VIA VT82C586b   -       UDMA33
 14  *      VIA VT82C596a   -       Nonfunctional UDMA66
 15  *      VIA VT82C596b   -       Working UDMA66
 16  *      VIA VT82C686    -       Nonfunctional UDMA66
 17  *      VIA VT82C686a   -       Working UDMA66
 18  *      VIA VT82C686b   -       Updated to UDMA100
 19  *      VIA VT8231      -       UDMA100
 20  *      VIA VT8233      -       UDMA100
 21  *      VIA VT8233a     -       UDMA133
 22  *      VIA VT8233c     -       UDMA100
 23  *      VIA VT8235      -       UDMA133
 24  *      VIA VT8237      -       UDMA133
 25  *      VIA VT8237A     -       UDMA133
 26  *      VIA VT8237S     -       UDMA133
 27  *      VIA VT8251      -       UDMA133
 28  *
 29  *      Most registers remain compatible across chips. Others start reserved
 30  *      and acquire sensible semantics if set to 1 (eg cable detect). A few
 31  *      exceptions exist, notably around the FIFO settings.
 32  *
 33  *      One additional quirk of the VIA design is that like ALi they use few
 34  *      PCI IDs for a lot of chips.
 35  *
 36  *      Based heavily on:
 37  *
 38  * Version 3.38
 39  *
 40  * VIA IDE driver for Linux. Supported southbridges:
 41  *
 42  *   vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
 43  *   vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
 44  *   vt8235, vt8237
 45  *
 46  * Copyright (c) 2000-2002 Vojtech Pavlik
 47  *
 48  * Based on the work of:
 49  *      Michel Aubry
 50  *      Jeff Garzik
 51  *      Andre Hedrick
 52 
 53  */
 54 
 55 #include <linux/kernel.h>
 56 #include <linux/module.h>
 57 #include <linux/pci.h>
 58 #include <linux/blkdev.h>
 59 #include <linux/delay.h>
 60 #include <linux/gfp.h>
 61 #include <scsi/scsi_host.h>
 62 #include <linux/libata.h>
 63 #include <linux/dmi.h>
 64 
 65 #define DRV_NAME "pata_via"
 66 #define DRV_VERSION "0.3.4"
 67 
 68 enum {
 69         VIA_BAD_PREQ    = 0x01, /* Crashes if PREQ# till DDACK# set */
 70         VIA_BAD_CLK66   = 0x02, /* 66 MHz clock doesn't work correctly */
 71         VIA_SET_FIFO    = 0x04, /* Needs to have FIFO split set */
 72         VIA_NO_UNMASK   = 0x08, /* Doesn't work with IRQ unmasking on */
 73         VIA_BAD_ID      = 0x10, /* Has wrong vendor ID (0x1107) */
 74         VIA_BAD_AST     = 0x20, /* Don't touch Address Setup Timing */
 75         VIA_NO_ENABLES  = 0x40, /* Has no enablebits */
 76         VIA_SATA_PATA   = 0x80, /* SATA/PATA combined configuration */
 77 };
 78 
 79 enum {
 80         VIA_IDFLAG_SINGLE = (1 << 0), /* single channel controller) */
 81 };
 82 
 83 /*
 84  * VIA SouthBridge chips.
 85  */
 86 
 87 static const struct via_isa_bridge {
 88         const char *name;
 89         u16 id;
 90         u8 rev_min;
 91         u8 rev_max;
 92         u8 udma_mask;
 93         u8 flags;
 94 } via_isa_bridges[] = {
 95         { "vx855",      PCI_DEVICE_ID_VIA_VX855,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
 96         { "vx800",      PCI_DEVICE_ID_VIA_VX800,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
 97         { "vt8261",     PCI_DEVICE_ID_VIA_8261,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 98         { "vt8237s",    PCI_DEVICE_ID_VIA_8237S,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 99         { "vt8251",     PCI_DEVICE_ID_VIA_8251,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
100         { "cx700",      PCI_DEVICE_ID_VIA_CX700,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
101         { "vt6410",     PCI_DEVICE_ID_VIA_6410,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
102         { "vt6415",     PCI_DEVICE_ID_VIA_6415,     0x00, 0xff, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
103         { "vt8237a",    PCI_DEVICE_ID_VIA_8237A,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
104         { "vt8237",     PCI_DEVICE_ID_VIA_8237,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
105         { "vt8235",     PCI_DEVICE_ID_VIA_8235,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
106         { "vt8233a",    PCI_DEVICE_ID_VIA_8233A,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
107         { "vt8233c",    PCI_DEVICE_ID_VIA_8233C_0,  0x00, 0x2f, ATA_UDMA5, },
108         { "vt8233",     PCI_DEVICE_ID_VIA_8233_0,   0x00, 0x2f, ATA_UDMA5, },
109         { "vt8231",     PCI_DEVICE_ID_VIA_8231,     0x00, 0x2f, ATA_UDMA5, },
110         { "vt82c686b",  PCI_DEVICE_ID_VIA_82C686,   0x40, 0x4f, ATA_UDMA5, },
111         { "vt82c686a",  PCI_DEVICE_ID_VIA_82C686,   0x10, 0x2f, ATA_UDMA4, },
112         { "vt82c686",   PCI_DEVICE_ID_VIA_82C686,   0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
113         { "vt82c596b",  PCI_DEVICE_ID_VIA_82C596,   0x10, 0x2f, ATA_UDMA4, },
114         { "vt82c596a",  PCI_DEVICE_ID_VIA_82C596,   0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
115         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
116         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
117         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
118         { "vt82c586a",  PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
119         { "vt82c586",   PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f,      0x00, VIA_SET_FIFO },
120         { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f,      0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
121         { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f,      0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
122         { "vtxxxx",     PCI_DEVICE_ID_VIA_ANON,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
123         { NULL }
124 };
125 
126 static const struct dmi_system_id no_atapi_dma_dmi_table[] = {
127         {
128                 .ident = "AVERATEC 3200",
129                 .matches = {
130                         DMI_MATCH(DMI_BOARD_VENDOR, "AVERATEC"),
131                         DMI_MATCH(DMI_BOARD_NAME, "3200"),
132                 },
133         },
134         { }
135 };
136 
137 struct via_port {
138         u8 cached_device;
139 };
140 
141 /*
142  *      Cable special cases
143  */
144 
145 static const struct dmi_system_id cable_dmi_table[] = {
146         {
147                 .ident = "Acer Ferrari 3400",
148                 .matches = {
149                         DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
150                         DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
151                 },
152         },
153         { }
154 };
155 
156 static int via_cable_override(struct pci_dev *pdev)
157 {
158         /* Systems by DMI */
159         if (dmi_check_system(cable_dmi_table))
160                 return 1;
161         /* Arima W730-K8/Targa Visionary 811/... */
162         if (pdev->subsystem_vendor == 0x161F && pdev->subsystem_device == 0x2032)
163                 return 1;
164         return 0;
165 }
166 
167 
168 /**
169  *      via_cable_detect        -       cable detection
170  *      @ap: ATA port
171  *
172  *      Perform cable detection. Actually for the VIA case the BIOS
173  *      already did this for us. We read the values provided by the
174  *      BIOS. If you are using an 8235 in a non-PC configuration you
175  *      may need to update this code.
176  *
177  *      Hotplug also impacts on this.
178  */
179 
180 static int via_cable_detect(struct ata_port *ap) {
181         const struct via_isa_bridge *config = ap->host->private_data;
182         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
183         u32 ata66;
184 
185         if (via_cable_override(pdev))
186                 return ATA_CBL_PATA40_SHORT;
187 
188         if ((config->flags & VIA_SATA_PATA) && ap->port_no == 0)
189                 return ATA_CBL_SATA;
190 
191         /* Early chips are 40 wire */
192         if (config->udma_mask < ATA_UDMA4)
193                 return ATA_CBL_PATA40;
194         /* UDMA 66 chips have only drive side logic */
195         else if (config->udma_mask < ATA_UDMA5)
196                 return ATA_CBL_PATA_UNK;
197         /* UDMA 100 or later */
198         pci_read_config_dword(pdev, 0x50, &ata66);
199         /* Check both the drive cable reporting bits, we might not have
200            two drives */
201         if (ata66 & (0x10100000 >> (16 * ap->port_no)))
202                 return ATA_CBL_PATA80;
203         /* Check with ACPI so we can spot BIOS reported SATA bridges */
204         if (ata_acpi_init_gtm(ap) &&
205             ata_acpi_cbl_80wire(ap, ata_acpi_init_gtm(ap)))
206                 return ATA_CBL_PATA80;
207         return ATA_CBL_PATA40;
208 }
209 
210 static int via_pre_reset(struct ata_link *link, unsigned long deadline)
211 {
212         struct ata_port *ap = link->ap;
213         const struct via_isa_bridge *config = ap->host->private_data;
214 
215         if (!(config->flags & VIA_NO_ENABLES)) {
216                 static const struct pci_bits via_enable_bits[] = {
217                         { 0x40, 1, 0x02, 0x02 },
218                         { 0x40, 1, 0x01, 0x01 }
219                 };
220                 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
221                 if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no]))
222                         return -ENOENT;
223         }
224 
225         return ata_sff_prereset(link, deadline);
226 }
227 
228 
229 /**
230  *      via_do_set_mode -       set transfer mode data
231  *      @ap: ATA interface
232  *      @adev: ATA device
233  *      @mode: ATA mode being programmed
234  *      @set_ast: Set to program address setup
235  *      @udma_type: UDMA mode/format of registers
236  *
237  *      Program the VIA registers for DMA and PIO modes. Uses the ata timing
238  *      support in order to compute modes.
239  *
240  *      FIXME: Hotplug will require we serialize multiple mode changes
241  *      on the two channels.
242  */
243 
244 static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev,
245                             int mode, int set_ast, int udma_type)
246 {
247         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
248         struct ata_device *peer = ata_dev_pair(adev);
249         struct ata_timing t, p;
250         static int via_clock = 33333;   /* Bus clock in kHZ */
251         unsigned long T =  1000000000 / via_clock;
252         unsigned long UT = T;
253         int ut;
254         int offset = 3 - (2*ap->port_no) - adev->devno;
255 
256         switch (udma_type) {
257         case ATA_UDMA4:
258                 UT = T / 2; break;
259         case ATA_UDMA5:
260                 UT = T / 3; break;
261         case ATA_UDMA6:
262                 UT = T / 4; break;
263         }
264 
265         /* Calculate the timing values we require */
266         ata_timing_compute(adev, mode, &t, T, UT);
267 
268         /* We share 8bit timing so we must merge the constraints */
269         if (peer) {
270                 if (peer->pio_mode) {
271                         ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
272                         ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
273                 }
274         }
275 
276         /* Address setup is programmable but breaks on UDMA133 setups */
277         if (set_ast) {
278                 u8 setup;       /* 2 bits per drive */
279                 int shift = 2 * offset;
280 
281                 pci_read_config_byte(pdev, 0x4C, &setup);
282                 setup &= ~(3 << shift);
283                 setup |= (clamp_val(t.setup, 1, 4) - 1) << shift;
284                 pci_write_config_byte(pdev, 0x4C, setup);
285         }
286 
287         /* Load the PIO mode bits */
288         pci_write_config_byte(pdev, 0x4F - ap->port_no,
289                 ((clamp_val(t.act8b, 1, 16) - 1) << 4) | (clamp_val(t.rec8b, 1, 16) - 1));
290         pci_write_config_byte(pdev, 0x48 + offset,
291                 ((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1));
292 
293         /* Load the UDMA bits according to type */
294         switch (udma_type) {
295         case ATA_UDMA2:
296         default:
297                 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03;
298                 break;
299         case ATA_UDMA4:
300                 ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f;
301                 break;
302         case ATA_UDMA5:
303                 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
304                 break;
305         case ATA_UDMA6:
306                 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
307                 break;
308         }
309 
310         /* Set UDMA unless device is not UDMA capable */
311         if (udma_type) {
312                 u8 udma_etc;
313 
314                 pci_read_config_byte(pdev, 0x50 + offset, &udma_etc);
315 
316                 /* clear transfer mode bit */
317                 udma_etc &= ~0x20;
318 
319                 if (t.udma) {
320                         /* preserve 80-wire cable detection bit */
321                         udma_etc &= 0x10;
322                         udma_etc |= ut;
323                 }
324 
325                 pci_write_config_byte(pdev, 0x50 + offset, udma_etc);
326         }
327 }
328 
329 static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
330 {
331         const struct via_isa_bridge *config = ap->host->private_data;
332         int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
333 
334         via_do_set_mode(ap, adev, adev->pio_mode, set_ast, config->udma_mask);
335 }
336 
337 static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
338 {
339         const struct via_isa_bridge *config = ap->host->private_data;
340         int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
341 
342         via_do_set_mode(ap, adev, adev->dma_mode, set_ast, config->udma_mask);
343 }
344 
345 /**
346  *      via_mode_filter         -       filter buggy device/mode pairs
347  *      @dev: ATA device
348  *      @mask: Mode bitmask
349  *
350  *      We need to apply some minimal filtering for old controllers and at least
351  *      one breed of Transcend SSD. Return the updated mask.
352  */
353 
354 static unsigned long via_mode_filter(struct ata_device *dev, unsigned long mask)
355 {
356         struct ata_host *host = dev->link->ap->host;
357         const struct via_isa_bridge *config = host->private_data;
358         unsigned char model_num[ATA_ID_PROD_LEN + 1];
359 
360         if (config->id == PCI_DEVICE_ID_VIA_82C586_0) {
361                 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
362                 if (strcmp(model_num, "TS64GSSD25-M") == 0) {
363                         ata_dev_warn(dev,
364         "disabling UDMA mode due to reported lockups with this device\n");
365                         mask &= ~ ATA_MASK_UDMA;
366                 }
367         }
368 
369         if (dev->class == ATA_DEV_ATAPI &&
370             dmi_check_system(no_atapi_dma_dmi_table)) {
371                 ata_dev_warn(dev, "controller locks up on ATAPI DMA, forcing PIO\n");
372                 mask &= ATA_MASK_PIO;
373         }
374 
375         return mask;
376 }
377 
378 /**
379  *      via_tf_load - send taskfile registers to host controller
380  *      @ap: Port to which output is sent
381  *      @tf: ATA taskfile register set
382  *
383  *      Outputs ATA taskfile to standard ATA host controller.
384  *
385  *      Note: This is to fix the internal bug of via chipsets, which
386  *      will reset the device register after changing the IEN bit on
387  *      ctl register
388  */
389 static void via_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
390 {
391         struct ata_ioports *ioaddr = &ap->ioaddr;
392         struct via_port *vp = ap->private_data;
393         unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
394         int newctl = 0;
395 
396         if (tf->ctl != ap->last_ctl) {
397                 iowrite8(tf->ctl, ioaddr->ctl_addr);
398                 ap->last_ctl = tf->ctl;
399                 ata_wait_idle(ap);
400                 newctl = 1;
401         }
402 
403         if (tf->flags & ATA_TFLAG_DEVICE) {
404                 iowrite8(tf->device, ioaddr->device_addr);
405                 vp->cached_device = tf->device;
406         } else if (newctl)
407                 iowrite8(vp->cached_device, ioaddr->device_addr);
408 
409         if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
410                 WARN_ON_ONCE(!ioaddr->ctl_addr);
411                 iowrite8(tf->hob_feature, ioaddr->feature_addr);
412                 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
413                 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
414                 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
415                 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
416                 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
417                         tf->hob_feature,
418                         tf->hob_nsect,
419                         tf->hob_lbal,
420                         tf->hob_lbam,
421                         tf->hob_lbah);
422         }
423 
424         if (is_addr) {
425                 iowrite8(tf->feature, ioaddr->feature_addr);
426                 iowrite8(tf->nsect, ioaddr->nsect_addr);
427                 iowrite8(tf->lbal, ioaddr->lbal_addr);
428                 iowrite8(tf->lbam, ioaddr->lbam_addr);
429                 iowrite8(tf->lbah, ioaddr->lbah_addr);
430                 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
431                         tf->feature,
432                         tf->nsect,
433                         tf->lbal,
434                         tf->lbam,
435                         tf->lbah);
436         }
437 
438         ata_wait_idle(ap);
439 }
440 
441 static int via_port_start(struct ata_port *ap)
442 {
443         struct via_port *vp;
444         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
445 
446         int ret = ata_bmdma_port_start(ap);
447         if (ret < 0)
448                 return ret;
449 
450         vp = devm_kzalloc(&pdev->dev, sizeof(struct via_port), GFP_KERNEL);
451         if (vp == NULL)
452                 return -ENOMEM;
453         ap->private_data = vp;
454         return 0;
455 }
456 
457 static struct scsi_host_template via_sht = {
458         ATA_BMDMA_SHT(DRV_NAME),
459 };
460 
461 static struct ata_port_operations via_port_ops = {
462         .inherits       = &ata_bmdma_port_ops,
463         .cable_detect   = via_cable_detect,
464         .set_piomode    = via_set_piomode,
465         .set_dmamode    = via_set_dmamode,
466         .prereset       = via_pre_reset,
467         .sff_tf_load    = via_tf_load,
468         .port_start     = via_port_start,
469         .mode_filter    = via_mode_filter,
470 };
471 
472 static struct ata_port_operations via_port_ops_noirq = {
473         .inherits       = &via_port_ops,
474         .sff_data_xfer  = ata_sff_data_xfer_noirq,
475 };
476 
477 /**
478  *      via_config_fifo         -       set up the FIFO
479  *      @pdev: PCI device
480  *      @flags: configuration flags
481  *
482  *      Set the FIFO properties for this device if necessary. Used both on
483  *      set up and on and the resume path
484  */
485 
486 static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
487 {
488         u8 enable;
489 
490         /* 0x40 low bits indicate enabled channels */
491         pci_read_config_byte(pdev, 0x40 , &enable);
492         enable &= 3;
493 
494         if (flags & VIA_SET_FIFO) {
495                 static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
496                 u8 fifo;
497 
498                 pci_read_config_byte(pdev, 0x43, &fifo);
499 
500                 /* Clear PREQ# until DDACK# for errata */
501                 if (flags & VIA_BAD_PREQ)
502                         fifo &= 0x7F;
503                 else
504                         fifo &= 0x9f;
505                 /* Turn on FIFO for enabled channels */
506                 fifo |= fifo_setting[enable];
507                 pci_write_config_byte(pdev, 0x43, fifo);
508         }
509 }
510 
511 static void via_fixup(struct pci_dev *pdev, const struct via_isa_bridge *config)
512 {
513         u32 timing;
514 
515         /* Initialise the FIFO for the enabled channels. */
516         via_config_fifo(pdev, config->flags);
517 
518         if (config->udma_mask == ATA_UDMA4) {
519                 /* The 66 MHz devices require we enable the clock */
520                 pci_read_config_dword(pdev, 0x50, &timing);
521                 timing |= 0x80008;
522                 pci_write_config_dword(pdev, 0x50, timing);
523         }
524         if (config->flags & VIA_BAD_CLK66) {
525                 /* Disable the 66MHz clock on problem devices */
526                 pci_read_config_dword(pdev, 0x50, &timing);
527                 timing &= ~0x80008;
528                 pci_write_config_dword(pdev, 0x50, timing);
529         }
530 }
531 
532 /**
533  *      via_init_one            -       discovery callback
534  *      @pdev: PCI device
535  *      @id: PCI table info
536  *
537  *      A VIA IDE interface has been discovered. Figure out what revision
538  *      and perform configuration work before handing it to the ATA layer
539  */
540 
541 static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
542 {
543         /* Early VIA without UDMA support */
544         static const struct ata_port_info via_mwdma_info = {
545                 .flags = ATA_FLAG_SLAVE_POSS,
546                 .pio_mask = ATA_PIO4,
547                 .mwdma_mask = ATA_MWDMA2,
548                 .port_ops = &via_port_ops
549         };
550         /* Ditto with IRQ masking required */
551         static const struct ata_port_info via_mwdma_info_borked = {
552                 .flags = ATA_FLAG_SLAVE_POSS,
553                 .pio_mask = ATA_PIO4,
554                 .mwdma_mask = ATA_MWDMA2,
555                 .port_ops = &via_port_ops_noirq,
556         };
557         /* VIA UDMA 33 devices (and borked 66) */
558         static const struct ata_port_info via_udma33_info = {
559                 .flags = ATA_FLAG_SLAVE_POSS,
560                 .pio_mask = ATA_PIO4,
561                 .mwdma_mask = ATA_MWDMA2,
562                 .udma_mask = ATA_UDMA2,
563                 .port_ops = &via_port_ops
564         };
565         /* VIA UDMA 66 devices */
566         static const struct ata_port_info via_udma66_info = {
567                 .flags = ATA_FLAG_SLAVE_POSS,
568                 .pio_mask = ATA_PIO4,
569                 .mwdma_mask = ATA_MWDMA2,
570                 .udma_mask = ATA_UDMA4,
571                 .port_ops = &via_port_ops
572         };
573         /* VIA UDMA 100 devices */
574         static const struct ata_port_info via_udma100_info = {
575                 .flags = ATA_FLAG_SLAVE_POSS,
576                 .pio_mask = ATA_PIO4,
577                 .mwdma_mask = ATA_MWDMA2,
578                 .udma_mask = ATA_UDMA5,
579                 .port_ops = &via_port_ops
580         };
581         /* UDMA133 with bad AST (All current 133) */
582         static const struct ata_port_info via_udma133_info = {
583                 .flags = ATA_FLAG_SLAVE_POSS,
584                 .pio_mask = ATA_PIO4,
585                 .mwdma_mask = ATA_MWDMA2,
586                 .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */
587                 .port_ops = &via_port_ops
588         };
589         const struct ata_port_info *ppi[] = { NULL, NULL };
590         struct pci_dev *isa;
591         const struct via_isa_bridge *config;
592         u8 enable;
593         unsigned long flags = id->driver_data;
594         int rc;
595 
596         ata_print_version_once(&pdev->dev, DRV_VERSION);
597 
598         rc = pcim_enable_device(pdev);
599         if (rc)
600                 return rc;
601 
602         if (flags & VIA_IDFLAG_SINGLE)
603                 ppi[1] = &ata_dummy_port_info;
604 
605         /* To find out how the IDE will behave and what features we
606            actually have to look at the bridge not the IDE controller */
607         for (config = via_isa_bridges; config->id != PCI_DEVICE_ID_VIA_ANON;
608              config++)
609                 if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
610                         !!(config->flags & VIA_BAD_ID),
611                         config->id, NULL))) {
612                         u8 rev = isa->revision;
613                         pci_dev_put(isa);
614 
615                         if ((id->device == 0x0415 || id->device == 0x3164) &&
616                             (config->id != id->device))
617                                 continue;
618 
619                         if (rev >= config->rev_min && rev <= config->rev_max)
620                                 break;
621                 }
622 
623         if (!(config->flags & VIA_NO_ENABLES)) {
624                 /* 0x40 low bits indicate enabled channels */
625                 pci_read_config_byte(pdev, 0x40 , &enable);
626                 enable &= 3;
627                 if (enable == 0)
628                         return -ENODEV;
629         }
630 
631         /* Clock set up */
632         switch (config->udma_mask) {
633         case 0x00:
634                 if (config->flags & VIA_NO_UNMASK)
635                         ppi[0] = &via_mwdma_info_borked;
636                 else
637                         ppi[0] = &via_mwdma_info;
638                 break;
639         case ATA_UDMA2:
640                 ppi[0] = &via_udma33_info;
641                 break;
642         case ATA_UDMA4:
643                 ppi[0] = &via_udma66_info;
644                 break;
645         case ATA_UDMA5:
646                 ppi[0] = &via_udma100_info;
647                 break;
648         case ATA_UDMA6:
649                 ppi[0] = &via_udma133_info;
650                 break;
651         default:
652                 WARN_ON(1);
653                 return -ENODEV;
654         }
655 
656         via_fixup(pdev, config);
657 
658         /* We have established the device type, now fire it up */
659         return ata_pci_bmdma_init_one(pdev, ppi, &via_sht, (void *)config, 0);
660 }
661 
662 #ifdef CONFIG_PM
663 /**
664  *      via_reinit_one          -       reinit after resume
665  *      @pdev; PCI device
666  *
667  *      Called when the VIA PATA device is resumed. We must then
668  *      reconfigure the fifo and other setup we may have altered. In
669  *      addition the kernel needs to have the resume methods on PCI
670  *      quirk supported.
671  */
672 
673 static int via_reinit_one(struct pci_dev *pdev)
674 {
675         struct ata_host *host = pci_get_drvdata(pdev);
676         int rc;
677 
678         rc = ata_pci_device_do_resume(pdev);
679         if (rc)
680                 return rc;
681 
682         via_fixup(pdev, host->private_data);
683 
684         ata_host_resume(host);
685         return 0;
686 }
687 #endif
688 
689 static const struct pci_device_id via[] = {
690         { PCI_VDEVICE(VIA, 0x0415), },
691         { PCI_VDEVICE(VIA, 0x0571), },
692         { PCI_VDEVICE(VIA, 0x0581), },
693         { PCI_VDEVICE(VIA, 0x1571), },
694         { PCI_VDEVICE(VIA, 0x3164), },
695         { PCI_VDEVICE(VIA, 0x5324), },
696         { PCI_VDEVICE(VIA, 0xC409), VIA_IDFLAG_SINGLE },
697         { PCI_VDEVICE(VIA, 0x9001), VIA_IDFLAG_SINGLE },
698 
699         { },
700 };
701 
702 static struct pci_driver via_pci_driver = {
703         .name           = DRV_NAME,
704         .id_table       = via,
705         .probe          = via_init_one,
706         .remove         = ata_pci_remove_one,
707 #ifdef CONFIG_PM
708         .suspend        = ata_pci_device_suspend,
709         .resume         = via_reinit_one,
710 #endif
711 };
712 
713 module_pci_driver(via_pci_driver);
714 
715 MODULE_AUTHOR("Alan Cox");
716 MODULE_DESCRIPTION("low-level driver for VIA PATA");
717 MODULE_LICENSE("GPL");
718 MODULE_DEVICE_TABLE(pci, via);
719 MODULE_VERSION(DRV_VERSION);
720 

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