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Linux/drivers/ata/pata_oldpiix.c

  1 /*
  2  *    pata_oldpiix.c - Intel PATA/SATA controllers
  3  *
  4  *      (C) 2005 Red Hat
  5  *
  6  *    Some parts based on ata_piix.c by Jeff Garzik and others.
  7  *
  8  *    Early PIIX differs significantly from the later PIIX as it lacks
  9  *    SITRE and the slave timing registers. This means that you have to
 10  *    set timing per channel, or be clever. Libata tells us whenever it
 11  *    does drive selection and we use this to reload the timings.
 12  *
 13  *    Because of these behaviour differences PIIX gets its own driver module.
 14  */
 15 
 16 #include <linux/kernel.h>
 17 #include <linux/module.h>
 18 #include <linux/pci.h>
 19 #include <linux/blkdev.h>
 20 #include <linux/delay.h>
 21 #include <linux/device.h>
 22 #include <scsi/scsi_host.h>
 23 #include <linux/libata.h>
 24 #include <linux/ata.h>
 25 
 26 #define DRV_NAME        "pata_oldpiix"
 27 #define DRV_VERSION     "0.5.5"
 28 
 29 /**
 30  *      oldpiix_pre_reset               -       probe begin
 31  *      @link: ATA link
 32  *      @deadline: deadline jiffies for the operation
 33  *
 34  *      Set up cable type and use generic probe init
 35  */
 36 
 37 static int oldpiix_pre_reset(struct ata_link *link, unsigned long deadline)
 38 {
 39         struct ata_port *ap = link->ap;
 40         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 41         static const struct pci_bits oldpiix_enable_bits[] = {
 42                 { 0x41U, 1U, 0x80UL, 0x80UL },  /* port 0 */
 43                 { 0x43U, 1U, 0x80UL, 0x80UL },  /* port 1 */
 44         };
 45 
 46         if (!pci_test_config_bits(pdev, &oldpiix_enable_bits[ap->port_no]))
 47                 return -ENOENT;
 48 
 49         return ata_sff_prereset(link, deadline);
 50 }
 51 
 52 /**
 53  *      oldpiix_set_piomode - Initialize host controller PATA PIO timings
 54  *      @ap: Port whose timings we are configuring
 55  *      @adev: Device whose timings we are configuring
 56  *
 57  *      Set PIO mode for device, in host controller PCI config space.
 58  *
 59  *      LOCKING:
 60  *      None (inherited from caller).
 61  */
 62 
 63 static void oldpiix_set_piomode (struct ata_port *ap, struct ata_device *adev)
 64 {
 65         unsigned int pio        = adev->pio_mode - XFER_PIO_0;
 66         struct pci_dev *dev     = to_pci_dev(ap->host->dev);
 67         unsigned int idetm_port= ap->port_no ? 0x42 : 0x40;
 68         u16 idetm_data;
 69         int control = 0;
 70 
 71         /*
 72          *      See Intel Document 298600-004 for the timing programing rules
 73          *      for PIIX/ICH. Note that the early PIIX does not have the slave
 74          *      timing port at 0x44.
 75          */
 76 
 77         static const     /* ISP  RTC */
 78         u8 timings[][2] = { { 0, 0 },
 79                             { 0, 0 },
 80                             { 1, 0 },
 81                             { 2, 1 },
 82                             { 2, 3 }, };
 83 
 84         if (pio > 1)
 85                 control |= 1;   /* TIME */
 86         if (ata_pio_need_iordy(adev))
 87                 control |= 2;   /* IE */
 88 
 89         /* Intel specifies that the prefetch/posting is for disk only */
 90         if (adev->class == ATA_DEV_ATA)
 91                 control |= 4;   /* PPE */
 92 
 93         pci_read_config_word(dev, idetm_port, &idetm_data);
 94 
 95         /*
 96          * Set PPE, IE and TIME as appropriate.
 97          * Clear the other drive's timing bits.
 98          */
 99         if (adev->devno == 0) {
100                 idetm_data &= 0xCCE0;
101                 idetm_data |= control;
102         } else {
103                 idetm_data &= 0xCC0E;
104                 idetm_data |= (control << 4);
105         }
106         idetm_data |= (timings[pio][0] << 12) |
107                         (timings[pio][1] << 8);
108         pci_write_config_word(dev, idetm_port, idetm_data);
109 
110         /* Track which port is configured */
111         ap->private_data = adev;
112 }
113 
114 /**
115  *      oldpiix_set_dmamode - Initialize host controller PATA DMA timings
116  *      @ap: Port whose timings we are configuring
117  *      @adev: Device to program
118  *
119  *      Set MWDMA mode for device, in host controller PCI config space.
120  *
121  *      LOCKING:
122  *      None (inherited from caller).
123  */
124 
125 static void oldpiix_set_dmamode (struct ata_port *ap, struct ata_device *adev)
126 {
127         struct pci_dev *dev     = to_pci_dev(ap->host->dev);
128         u8 idetm_port           = ap->port_no ? 0x42 : 0x40;
129         u16 idetm_data;
130 
131         static const     /* ISP  RTC */
132         u8 timings[][2] = { { 0, 0 },
133                             { 0, 0 },
134                             { 1, 0 },
135                             { 2, 1 },
136                             { 2, 3 }, };
137 
138         /*
139          * MWDMA is driven by the PIO timings. We must also enable
140          * IORDY unconditionally along with TIME1. PPE has already
141          * been set when the PIO timing was set.
142          */
143 
144         unsigned int mwdma      = adev->dma_mode - XFER_MW_DMA_0;
145         unsigned int control;
146         const unsigned int needed_pio[3] = {
147                 XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
148         };
149         int pio = needed_pio[mwdma] - XFER_PIO_0;
150 
151         pci_read_config_word(dev, idetm_port, &idetm_data);
152 
153         control = 3;    /* IORDY|TIME0 */
154         /* Intel specifies that the PPE functionality is for disk only */
155         if (adev->class == ATA_DEV_ATA)
156                 control |= 4;   /* PPE enable */
157 
158         /* If the drive MWDMA is faster than it can do PIO then
159            we must force PIO into PIO0 */
160 
161         if (adev->pio_mode < needed_pio[mwdma])
162                 /* Enable DMA timing only */
163                 control |= 8;   /* PIO cycles in PIO0 */
164 
165         /* Mask out the relevant control and timing bits we will load. Also
166            clear the other drive TIME register as a precaution */
167         if (adev->devno == 0) {
168                 idetm_data &= 0xCCE0;
169                 idetm_data |= control;
170         } else {
171                 idetm_data &= 0xCC0E;
172                 idetm_data |= (control << 4);
173         }
174         idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
175         pci_write_config_word(dev, idetm_port, idetm_data);
176 
177         /* Track which port is configured */
178         ap->private_data = adev;
179 }
180 
181 /**
182  *      oldpiix_qc_issue        -       command issue
183  *      @qc: command pending
184  *
185  *      Called when the libata layer is about to issue a command. We wrap
186  *      this interface so that we can load the correct ATA timings if
187  *      necessary. Our logic also clears TIME0/TIME1 for the other device so
188  *      that, even if we get this wrong, cycles to the other device will
189  *      be made PIO0.
190  */
191 
192 static unsigned int oldpiix_qc_issue(struct ata_queued_cmd *qc)
193 {
194         struct ata_port *ap = qc->ap;
195         struct ata_device *adev = qc->dev;
196 
197         if (adev != ap->private_data) {
198                 oldpiix_set_piomode(ap, adev);
199                 if (ata_dma_enabled(adev))
200                         oldpiix_set_dmamode(ap, adev);
201         }
202         return ata_bmdma_qc_issue(qc);
203 }
204 
205 
206 static struct scsi_host_template oldpiix_sht = {
207         ATA_BMDMA_SHT(DRV_NAME),
208 };
209 
210 static struct ata_port_operations oldpiix_pata_ops = {
211         .inherits               = &ata_bmdma_port_ops,
212         .qc_issue               = oldpiix_qc_issue,
213         .cable_detect           = ata_cable_40wire,
214         .set_piomode            = oldpiix_set_piomode,
215         .set_dmamode            = oldpiix_set_dmamode,
216         .prereset               = oldpiix_pre_reset,
217 };
218 
219 
220 /**
221  *      oldpiix_init_one - Register PIIX ATA PCI device with kernel services
222  *      @pdev: PCI device to register
223  *      @ent: Entry in oldpiix_pci_tbl matching with @pdev
224  *
225  *      Called from kernel PCI layer.  We probe for combined mode (sigh),
226  *      and then hand over control to libata, for it to do the rest.
227  *
228  *      LOCKING:
229  *      Inherited from PCI layer (may sleep).
230  *
231  *      RETURNS:
232  *      Zero on success, or -ERRNO value.
233  */
234 
235 static int oldpiix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
236 {
237         static const struct ata_port_info info = {
238                 .flags          = ATA_FLAG_SLAVE_POSS,
239                 .pio_mask       = ATA_PIO4,
240                 .mwdma_mask     = ATA_MWDMA12_ONLY,
241                 .port_ops       = &oldpiix_pata_ops,
242         };
243         const struct ata_port_info *ppi[] = { &info, NULL };
244 
245         ata_print_version_once(&pdev->dev, DRV_VERSION);
246 
247         return ata_pci_bmdma_init_one(pdev, ppi, &oldpiix_sht, NULL, 0);
248 }
249 
250 static const struct pci_device_id oldpiix_pci_tbl[] = {
251         { PCI_VDEVICE(INTEL, 0x1230), },
252 
253         { }     /* terminate list */
254 };
255 
256 static struct pci_driver oldpiix_pci_driver = {
257         .name                   = DRV_NAME,
258         .id_table               = oldpiix_pci_tbl,
259         .probe                  = oldpiix_init_one,
260         .remove                 = ata_pci_remove_one,
261 #ifdef CONFIG_PM
262         .suspend                = ata_pci_device_suspend,
263         .resume                 = ata_pci_device_resume,
264 #endif
265 };
266 
267 module_pci_driver(oldpiix_pci_driver);
268 
269 MODULE_AUTHOR("Alan Cox");
270 MODULE_DESCRIPTION("SCSI low-level driver for early PIIX series controllers");
271 MODULE_LICENSE("GPL");
272 MODULE_DEVICE_TABLE(pci, oldpiix_pci_tbl);
273 MODULE_VERSION(DRV_VERSION);
274 

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