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Linux/drivers/acpi/acpi_lpss.c

  1 /*
  2  * ACPI support for Intel Lynxpoint LPSS.
  3  *
  4  * Copyright (C) 2013, Intel Corporation
  5  * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
  6  *          Rafael J. Wysocki <rafael.j.wysocki@intel.com>
  7  *
  8  * This program is free software; you can redistribute it and/or modify
  9  * it under the terms of the GNU General Public License version 2 as
 10  * published by the Free Software Foundation.
 11  */
 12 
 13 #include <linux/acpi.h>
 14 #include <linux/clk.h>
 15 #include <linux/clkdev.h>
 16 #include <linux/clk-provider.h>
 17 #include <linux/err.h>
 18 #include <linux/io.h>
 19 #include <linux/platform_device.h>
 20 #include <linux/platform_data/clk-lpss.h>
 21 #include <linux/pm_runtime.h>
 22 
 23 #include "internal.h"
 24 
 25 ACPI_MODULE_NAME("acpi_lpss");
 26 
 27 #define LPSS_CLK_SIZE   0x04
 28 #define LPSS_LTR_SIZE   0x18
 29 
 30 /* Offsets relative to LPSS_PRIVATE_OFFSET */
 31 #define LPSS_GENERAL                    0x08
 32 #define LPSS_GENERAL_LTR_MODE_SW        BIT(2)
 33 #define LPSS_GENERAL_UART_RTS_OVRD      BIT(3)
 34 #define LPSS_SW_LTR                     0x10
 35 #define LPSS_AUTO_LTR                   0x14
 36 #define LPSS_LTR_SNOOP_REQ              BIT(15)
 37 #define LPSS_LTR_SNOOP_MASK             0x0000FFFF
 38 #define LPSS_LTR_SNOOP_LAT_1US          0x800
 39 #define LPSS_LTR_SNOOP_LAT_32US         0xC00
 40 #define LPSS_LTR_SNOOP_LAT_SHIFT        5
 41 #define LPSS_LTR_SNOOP_LAT_CUTOFF       3000
 42 #define LPSS_LTR_MAX_VAL                0x3FF
 43 #define LPSS_TX_INT                     0x20
 44 #define LPSS_TX_INT_MASK                BIT(1)
 45 
 46 struct lpss_shared_clock {
 47         const char *name;
 48         unsigned long rate;
 49         struct clk *clk;
 50 };
 51 
 52 struct lpss_private_data;
 53 
 54 struct lpss_device_desc {
 55         bool clk_required;
 56         const char *clkdev_name;
 57         bool ltr_required;
 58         unsigned int prv_offset;
 59         size_t prv_size_override;
 60         bool clk_gate;
 61         struct lpss_shared_clock *shared_clock;
 62         void (*setup)(struct lpss_private_data *pdata);
 63 };
 64 
 65 static struct lpss_device_desc lpss_dma_desc = {
 66         .clk_required = true,
 67         .clkdev_name = "hclk",
 68 };
 69 
 70 struct lpss_private_data {
 71         void __iomem *mmio_base;
 72         resource_size_t mmio_size;
 73         struct clk *clk;
 74         const struct lpss_device_desc *dev_desc;
 75 };
 76 
 77 static void lpss_uart_setup(struct lpss_private_data *pdata)
 78 {
 79         unsigned int offset;
 80         u32 reg;
 81 
 82         offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
 83         reg = readl(pdata->mmio_base + offset);
 84         writel(reg | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
 85 
 86         offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
 87         reg = readl(pdata->mmio_base + offset);
 88         writel(reg | LPSS_GENERAL_UART_RTS_OVRD, pdata->mmio_base + offset);
 89 }
 90 
 91 static struct lpss_device_desc lpt_dev_desc = {
 92         .clk_required = true,
 93         .prv_offset = 0x800,
 94         .ltr_required = true,
 95         .clk_gate = true,
 96 };
 97 
 98 static struct lpss_device_desc lpt_uart_dev_desc = {
 99         .clk_required = true,
100         .prv_offset = 0x800,
101         .ltr_required = true,
102         .clk_gate = true,
103         .setup = lpss_uart_setup,
104 };
105 
106 static struct lpss_device_desc lpt_sdio_dev_desc = {
107         .prv_offset = 0x1000,
108         .prv_size_override = 0x1018,
109         .ltr_required = true,
110 };
111 
112 static struct lpss_shared_clock pwm_clock = {
113         .name = "pwm_clk",
114         .rate = 25000000,
115 };
116 
117 static struct lpss_device_desc byt_pwm_dev_desc = {
118         .clk_required = true,
119         .shared_clock = &pwm_clock,
120 };
121 
122 static struct lpss_shared_clock uart_clock = {
123         .name = "uart_clk",
124         .rate = 44236800,
125 };
126 
127 static struct lpss_device_desc byt_uart_dev_desc = {
128         .clk_required = true,
129         .prv_offset = 0x800,
130         .clk_gate = true,
131         .shared_clock = &uart_clock,
132         .setup = lpss_uart_setup,
133 };
134 
135 static struct lpss_shared_clock spi_clock = {
136         .name = "spi_clk",
137         .rate = 50000000,
138 };
139 
140 static struct lpss_device_desc byt_spi_dev_desc = {
141         .clk_required = true,
142         .prv_offset = 0x400,
143         .clk_gate = true,
144         .shared_clock = &spi_clock,
145 };
146 
147 static struct lpss_device_desc byt_sdio_dev_desc = {
148         .clk_required = true,
149 };
150 
151 static struct lpss_shared_clock i2c_clock = {
152         .name = "i2c_clk",
153         .rate = 100000000,
154 };
155 
156 static struct lpss_device_desc byt_i2c_dev_desc = {
157         .clk_required = true,
158         .prv_offset = 0x800,
159         .shared_clock = &i2c_clock,
160 };
161 
162 static const struct acpi_device_id acpi_lpss_device_ids[] = {
163         /* Generic LPSS devices */
164         { "INTL9C60", (unsigned long)&lpss_dma_desc },
165 
166         /* Lynxpoint LPSS devices */
167         { "INT33C0", (unsigned long)&lpt_dev_desc },
168         { "INT33C1", (unsigned long)&lpt_dev_desc },
169         { "INT33C2", (unsigned long)&lpt_dev_desc },
170         { "INT33C3", (unsigned long)&lpt_dev_desc },
171         { "INT33C4", (unsigned long)&lpt_uart_dev_desc },
172         { "INT33C5", (unsigned long)&lpt_uart_dev_desc },
173         { "INT33C6", (unsigned long)&lpt_sdio_dev_desc },
174         { "INT33C7", },
175 
176         /* BayTrail LPSS devices */
177         { "80860F09", (unsigned long)&byt_pwm_dev_desc },
178         { "80860F0A", (unsigned long)&byt_uart_dev_desc },
179         { "80860F0E", (unsigned long)&byt_spi_dev_desc },
180         { "80860F14", (unsigned long)&byt_sdio_dev_desc },
181         { "80860F41", (unsigned long)&byt_i2c_dev_desc },
182         { "INT33B2", },
183 
184         { "INT3430", (unsigned long)&lpt_dev_desc },
185         { "INT3431", (unsigned long)&lpt_dev_desc },
186         { "INT3432", (unsigned long)&lpt_dev_desc },
187         { "INT3433", (unsigned long)&lpt_dev_desc },
188         { "INT3434", (unsigned long)&lpt_uart_dev_desc },
189         { "INT3435", (unsigned long)&lpt_uart_dev_desc },
190         { "INT3436", (unsigned long)&lpt_sdio_dev_desc },
191         { "INT3437", },
192 
193         { }
194 };
195 
196 static int is_memory(struct acpi_resource *res, void *not_used)
197 {
198         struct resource r;
199         return !acpi_dev_resource_memory(res, &r);
200 }
201 
202 /* LPSS main clock device. */
203 static struct platform_device *lpss_clk_dev;
204 
205 static inline void lpt_register_clock_device(void)
206 {
207         lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
208 }
209 
210 static int register_device_clock(struct acpi_device *adev,
211                                  struct lpss_private_data *pdata)
212 {
213         const struct lpss_device_desc *dev_desc = pdata->dev_desc;
214         struct lpss_shared_clock *shared_clock = dev_desc->shared_clock;
215         struct clk *clk = ERR_PTR(-ENODEV);
216         struct lpss_clk_data *clk_data;
217         const char *parent;
218 
219         if (!lpss_clk_dev)
220                 lpt_register_clock_device();
221 
222         clk_data = platform_get_drvdata(lpss_clk_dev);
223         if (!clk_data)
224                 return -ENODEV;
225 
226         if (dev_desc->clkdev_name) {
227                 clk_register_clkdev(clk_data->clk, dev_desc->clkdev_name,
228                                     dev_name(&adev->dev));
229                 return 0;
230         }
231 
232         if (!pdata->mmio_base
233             || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
234                 return -ENODATA;
235 
236         parent = clk_data->name;
237 
238         if (shared_clock) {
239                 clk = shared_clock->clk;
240                 if (!clk) {
241                         clk = clk_register_fixed_rate(NULL, shared_clock->name,
242                                                       "lpss_clk", 0,
243                                                       shared_clock->rate);
244                         shared_clock->clk = clk;
245                 }
246                 parent = shared_clock->name;
247         }
248 
249         if (dev_desc->clk_gate) {
250                 clk = clk_register_gate(NULL, dev_name(&adev->dev), parent, 0,
251                                         pdata->mmio_base + dev_desc->prv_offset,
252                                         0, 0, NULL);
253                 pdata->clk = clk;
254         }
255 
256         if (IS_ERR(clk))
257                 return PTR_ERR(clk);
258 
259         clk_register_clkdev(clk, NULL, dev_name(&adev->dev));
260         return 0;
261 }
262 
263 static int acpi_lpss_create_device(struct acpi_device *adev,
264                                    const struct acpi_device_id *id)
265 {
266         struct lpss_device_desc *dev_desc;
267         struct lpss_private_data *pdata;
268         struct resource_list_entry *rentry;
269         struct list_head resource_list;
270         int ret;
271 
272         dev_desc = (struct lpss_device_desc *)id->driver_data;
273         if (!dev_desc)
274                 return acpi_create_platform_device(adev, id);
275 
276         pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
277         if (!pdata)
278                 return -ENOMEM;
279 
280         INIT_LIST_HEAD(&resource_list);
281         ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
282         if (ret < 0)
283                 goto err_out;
284 
285         list_for_each_entry(rentry, &resource_list, node)
286                 if (resource_type(&rentry->res) == IORESOURCE_MEM) {
287                         if (dev_desc->prv_size_override)
288                                 pdata->mmio_size = dev_desc->prv_size_override;
289                         else
290                                 pdata->mmio_size = resource_size(&rentry->res);
291                         pdata->mmio_base = ioremap(rentry->res.start,
292                                                    pdata->mmio_size);
293                         break;
294                 }
295 
296         acpi_dev_free_resource_list(&resource_list);
297 
298         pdata->dev_desc = dev_desc;
299 
300         if (dev_desc->clk_required) {
301                 ret = register_device_clock(adev, pdata);
302                 if (ret) {
303                         /* Skip the device, but continue the namespace scan. */
304                         ret = 0;
305                         goto err_out;
306                 }
307         }
308 
309         /*
310          * This works around a known issue in ACPI tables where LPSS devices
311          * have _PS0 and _PS3 without _PSC (and no power resources), so
312          * acpi_bus_init_power() will assume that the BIOS has put them into D0.
313          */
314         ret = acpi_device_fix_up_power(adev);
315         if (ret) {
316                 /* Skip the device, but continue the namespace scan. */
317                 ret = 0;
318                 goto err_out;
319         }
320 
321         if (dev_desc->setup)
322                 dev_desc->setup(pdata);
323 
324         adev->driver_data = pdata;
325         ret = acpi_create_platform_device(adev, id);
326         if (ret > 0)
327                 return ret;
328 
329         adev->driver_data = NULL;
330 
331  err_out:
332         kfree(pdata);
333         return ret;
334 }
335 
336 static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg)
337 {
338         return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
339 }
340 
341 static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata,
342                              unsigned int reg)
343 {
344         writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
345 }
346 
347 static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
348 {
349         struct acpi_device *adev;
350         struct lpss_private_data *pdata;
351         unsigned long flags;
352         int ret;
353 
354         ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
355         if (WARN_ON(ret))
356                 return ret;
357 
358         spin_lock_irqsave(&dev->power.lock, flags);
359         if (pm_runtime_suspended(dev)) {
360                 ret = -EAGAIN;
361                 goto out;
362         }
363         pdata = acpi_driver_data(adev);
364         if (WARN_ON(!pdata || !pdata->mmio_base)) {
365                 ret = -ENODEV;
366                 goto out;
367         }
368         *val = __lpss_reg_read(pdata, reg);
369 
370  out:
371         spin_unlock_irqrestore(&dev->power.lock, flags);
372         return ret;
373 }
374 
375 static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
376                              char *buf)
377 {
378         u32 ltr_value = 0;
379         unsigned int reg;
380         int ret;
381 
382         reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
383         ret = lpss_reg_read(dev, reg, &ltr_value);
384         if (ret)
385                 return ret;
386 
387         return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
388 }
389 
390 static ssize_t lpss_ltr_mode_show(struct device *dev,
391                                   struct device_attribute *attr, char *buf)
392 {
393         u32 ltr_mode = 0;
394         char *outstr;
395         int ret;
396 
397         ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
398         if (ret)
399                 return ret;
400 
401         outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
402         return sprintf(buf, "%s\n", outstr);
403 }
404 
405 static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
406 static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
407 static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
408 
409 static struct attribute *lpss_attrs[] = {
410         &dev_attr_auto_ltr.attr,
411         &dev_attr_sw_ltr.attr,
412         &dev_attr_ltr_mode.attr,
413         NULL,
414 };
415 
416 static struct attribute_group lpss_attr_group = {
417         .attrs = lpss_attrs,
418         .name = "lpss_ltr",
419 };
420 
421 static void acpi_lpss_set_ltr(struct device *dev, s32 val)
422 {
423         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
424         u32 ltr_mode, ltr_val;
425 
426         ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL);
427         if (val < 0) {
428                 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) {
429                         ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW;
430                         __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
431                 }
432                 return;
433         }
434         ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK;
435         if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) {
436                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US;
437                 val = LPSS_LTR_MAX_VAL;
438         } else if (val > LPSS_LTR_MAX_VAL) {
439                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ;
440                 val >>= LPSS_LTR_SNOOP_LAT_SHIFT;
441         } else {
442                 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ;
443         }
444         ltr_val |= val;
445         __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR);
446         if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) {
447                 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW;
448                 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
449         }
450 }
451 
452 static int acpi_lpss_platform_notify(struct notifier_block *nb,
453                                      unsigned long action, void *data)
454 {
455         struct platform_device *pdev = to_platform_device(data);
456         struct lpss_private_data *pdata;
457         struct acpi_device *adev;
458         const struct acpi_device_id *id;
459         int ret = 0;
460 
461         id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
462         if (!id || !id->driver_data)
463                 return 0;
464 
465         if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
466                 return 0;
467 
468         pdata = acpi_driver_data(adev);
469         if (!pdata || !pdata->mmio_base || !pdata->dev_desc->ltr_required)
470                 return 0;
471 
472         if (pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
473                 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
474                 return 0;
475         }
476 
477         if (action == BUS_NOTIFY_ADD_DEVICE)
478                 ret = sysfs_create_group(&pdev->dev.kobj, &lpss_attr_group);
479         else if (action == BUS_NOTIFY_DEL_DEVICE)
480                 sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
481 
482         return ret;
483 }
484 
485 static struct notifier_block acpi_lpss_nb = {
486         .notifier_call = acpi_lpss_platform_notify,
487 };
488 
489 static void acpi_lpss_bind(struct device *dev)
490 {
491         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
492 
493         if (!pdata || !pdata->mmio_base || !pdata->dev_desc->ltr_required)
494                 return;
495 
496         if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE)
497                 dev->power.set_latency_tolerance = acpi_lpss_set_ltr;
498         else
499                 dev_err(dev, "MMIO size insufficient to access LTR\n");
500 }
501 
502 static void acpi_lpss_unbind(struct device *dev)
503 {
504         dev->power.set_latency_tolerance = NULL;
505 }
506 
507 static struct acpi_scan_handler lpss_handler = {
508         .ids = acpi_lpss_device_ids,
509         .attach = acpi_lpss_create_device,
510         .bind = acpi_lpss_bind,
511         .unbind = acpi_lpss_unbind,
512 };
513 
514 void __init acpi_lpss_init(void)
515 {
516         if (!lpt_clk_init()) {
517                 bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
518                 acpi_scan_add_handler(&lpss_handler);
519         }
520 }
521 

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