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Linux/arch/powerpc/platforms/cell/Kconfig

  1 config PPC_CELL
  2         bool
  3         default n
  4 
  5 config PPC_CELL_COMMON
  6         bool
  7         select PPC_CELL
  8         select PPC_DCR_MMIO
  9         select PPC_INDIRECT_PIO
 10         select PPC_INDIRECT_MMIO
 11         select PPC_NATIVE
 12         select PPC_RTAS
 13         select IRQ_EDGE_EOI_HANDLER
 14 
 15 config PPC_CELL_NATIVE
 16         bool
 17         select PPC_CELL_COMMON
 18         select MPIC
 19         select PPC_IO_WORKAROUNDS
 20         select IBM_EMAC_EMAC4
 21         select IBM_EMAC_RGMII
 22         select IBM_EMAC_ZMII #test only
 23         select IBM_EMAC_TAH  #test only
 24         default n
 25 
 26 config PPC_IBM_CELL_BLADE
 27         bool "IBM Cell Blade"
 28         depends on PPC64 && PPC_BOOK3S && CPU_BIG_ENDIAN
 29         select PPC_CELL_NATIVE
 30         select PPC_OF_PLATFORM_PCI
 31         select PCI
 32         select MMIO_NVRAM
 33         select PPC_UDBG_16550
 34         select UDBG_RTAS_CONSOLE
 35 
 36 config AXON_MSI
 37         bool
 38         depends on PPC_IBM_CELL_BLADE && PCI_MSI
 39         default y
 40 
 41 menu "Cell Broadband Engine options"
 42         depends on PPC_CELL
 43 
 44 config SPU_FS
 45         tristate "SPU file system"
 46         default m
 47         depends on PPC_CELL
 48         select SPU_BASE
 49         select MEMORY_HOTPLUG
 50         help
 51           The SPU file system is used to access Synergistic Processing
 52           Units on machines implementing the Broadband Processor
 53           Architecture.
 54 
 55 config SPU_BASE
 56         bool
 57         default n
 58         select PPC_COPRO_BASE
 59 
 60 config CBE_RAS
 61         bool "RAS features for bare metal Cell BE"
 62         depends on PPC_CELL_NATIVE
 63         default y
 64 
 65 config PPC_IBM_CELL_RESETBUTTON
 66         bool "IBM Cell Blade Pinhole reset button"
 67         depends on CBE_RAS && PPC_IBM_CELL_BLADE
 68         default y
 69         help
 70           Support Pinhole Resetbutton on IBM Cell blades.
 71           This adds a method to trigger system reset via front panel pinhole button.
 72 
 73 config PPC_IBM_CELL_POWERBUTTON
 74         tristate "IBM Cell Blade power button"
 75         depends on PPC_IBM_CELL_BLADE && INPUT_EVDEV
 76         default y
 77         help
 78           Support Powerbutton on IBM Cell blades.
 79           This will enable the powerbutton as an input device.
 80 
 81 config CBE_THERM
 82         tristate "CBE thermal support"
 83         default m
 84         depends on CBE_RAS && SPU_BASE
 85 
 86 config PPC_PMI
 87         tristate
 88         default y
 89         depends on CPU_FREQ_CBE_PMI || PPC_IBM_CELL_POWERBUTTON
 90         help
 91           PMI (Platform Management Interrupt) is a way to
 92           communicate with the BMC (Baseboard Management Controller).
 93           It is used in some IBM Cell blades.
 94 
 95 config CBE_CPUFREQ_SPU_GOVERNOR
 96         tristate "CBE frequency scaling based on SPU usage"
 97         depends on SPU_FS && CPU_FREQ
 98         default m
 99         help
100           This governor checks for spu usage to adjust the cpu frequency.
101           If no spu is running on a given cpu, that cpu will be throttled to
102           the minimal possible frequency.
103 
104 endmenu
105 
106 config OPROFILE_CELL
107         def_bool y
108         depends on PPC_CELL_NATIVE && (OPROFILE = m || OPROFILE = y) && SPU_BASE
109 

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