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Linux/arch/powerpc/platforms/Kconfig.cputype

  1 config PPC64
  2         bool "64-bit kernel"
  3         default n
  4         select HAVE_VIRT_CPU_ACCOUNTING
  5         help
  6           This option selects whether a 32-bit or a 64-bit kernel
  7           will be built.
  8 
  9 menu "Processor support"
 10 choice
 11         prompt "Processor Type"
 12         depends on PPC32
 13         help
 14           There are five families of 32 bit PowerPC chips supported.
 15           The most common ones are the desktop and server CPUs (601, 603,
 16           604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
 17           embedded 512x/52xx/82xx/83xx/86xx counterparts.
 18           The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
 19           (85xx) each form a family of their own that is not compatible
 20           with the others.
 21 
 22           If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
 23 
 24 config PPC_BOOK3S_32
 25         bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
 26         select PPC_FPU
 27 
 28 config PPC_85xx
 29         bool "Freescale 85xx"
 30         select E500
 31 
 32 config PPC_8xx
 33         bool "Freescale 8xx"
 34         select FSL_SOC
 35         select 8xx
 36         select PPC_LIB_RHEAP
 37 
 38 config 40x
 39         bool "AMCC 40x"
 40         select PPC_DCR_NATIVE
 41         select PPC_UDBG_16550
 42         select 4xx_SOC
 43         select PPC_PCI_CHOICE
 44 
 45 config 44x
 46         bool "AMCC 44x, 46x or 47x"
 47         select PPC_DCR_NATIVE
 48         select PPC_UDBG_16550
 49         select 4xx_SOC
 50         select PPC_PCI_CHOICE
 51         select PHYS_64BIT
 52 
 53 config E200
 54         bool "Freescale e200"
 55 
 56 endchoice
 57 
 58 choice
 59         prompt "Processor Type"
 60         depends on PPC64
 61         help
 62           There are two families of 64 bit PowerPC chips supported.
 63           The most common ones are the desktop and server CPUs
 64           (POWER4, POWER5, 970, POWER5+, POWER6, POWER7, POWER8 ...)
 65 
 66           The other are the "embedded" processors compliant with the
 67           "Book 3E" variant of the architecture
 68 
 69 config PPC_BOOK3S_64
 70         bool "Server processors"
 71         select PPC_FPU
 72         select PPC_HAVE_PMU_SUPPORT
 73         select SYS_SUPPORTS_HUGETLBFS
 74         select HAVE_ARCH_TRANSPARENT_HUGEPAGE if PPC_64K_PAGES
 75         select ARCH_SUPPORTS_NUMA_BALANCING
 76         select IRQ_WORK
 77 
 78 config PPC_BOOK3E_64
 79         bool "Embedded processors"
 80         select PPC_FPU # Make it a choice ?
 81         select PPC_SMP_MUXED_IPI
 82         select PPC_DOORBELL
 83 
 84 endchoice
 85 
 86 choice
 87         prompt "CPU selection"
 88         depends on PPC64
 89         default GENERIC_CPU
 90         help
 91           This will create a kernel which is optimised for a particular CPU.
 92           The resulting kernel may not run on other CPUs, so use this with care.
 93 
 94           If unsure, select Generic.
 95 
 96 config GENERIC_CPU
 97         bool "Generic"
 98         depends on !CPU_LITTLE_ENDIAN
 99 
100 config CELL_CPU
101         bool "Cell Broadband Engine"
102         depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
103 
104 config POWER4_CPU
105         bool "POWER4"
106         depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
107 
108 config POWER5_CPU
109         bool "POWER5"
110         depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
111 
112 config POWER6_CPU
113         bool "POWER6"
114         depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
115 
116 config POWER7_CPU
117         bool "POWER7"
118         depends on PPC_BOOK3S_64
119         select ARCH_HAS_FAST_MULTIPLIER
120 
121 config POWER8_CPU
122         bool "POWER8"
123         depends on PPC_BOOK3S_64
124         select ARCH_HAS_FAST_MULTIPLIER
125 
126 config E5500_CPU
127         bool "Freescale e5500"
128         depends on E500
129 
130 config E6500_CPU
131         bool "Freescale e6500"
132         depends on E500
133 
134 endchoice
135 
136 config PPC_BOOK3S
137         def_bool y
138         depends on PPC_BOOK3S_32 || PPC_BOOK3S_64
139 
140 config PPC_BOOK3E
141         def_bool y
142         depends on PPC_BOOK3E_64
143 
144 config 6xx
145         def_bool y
146         depends on PPC32 && PPC_BOOK3S
147         select PPC_HAVE_PMU_SUPPORT
148 
149 config TUNE_CELL
150         bool "Optimize for Cell Broadband Engine"
151         depends on PPC64 && PPC_BOOK3S
152         help
153           Cause the compiler to optimize for the PPE of the Cell Broadband
154           Engine. This will make the code run considerably faster on Cell
155           but somewhat slower on other machines. This option only changes
156           the scheduling of instructions, not the selection of instructions
157           itself, so the resulting kernel will keep running on all other
158           machines.
159 
160 # this is temp to handle compat with arch=ppc
161 config 8xx
162         bool
163 
164 config E500
165         select FSL_EMB_PERFMON
166         select PPC_FSL_BOOK3E
167         bool
168 
169 config PPC_E500MC
170         bool "e500mc Support"
171         select PPC_FPU
172         select COMMON_CLK
173         depends on E500
174         help
175           This must be enabled for running on e500mc (and derivatives
176           such as e5500/e6500), and must be disabled for running on
177           e500v1 or e500v2.
178 
179 config PPC_FPU
180         bool
181         default y if PPC64
182 
183 config FSL_EMB_PERFMON
184         bool "Freescale Embedded Perfmon"
185         depends on E500 || PPC_83xx
186         help
187           This is the Performance Monitor support found on the e500 core
188           and some e300 cores (c3 and c4).  Select this only if your
189           core supports the Embedded Performance Monitor APU
190 
191 config FSL_EMB_PERF_EVENT
192         bool
193         depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
194         default y
195 
196 config FSL_EMB_PERF_EVENT_E500
197         bool
198         depends on FSL_EMB_PERF_EVENT && E500
199         default y
200 
201 config 4xx
202         bool
203         depends on 40x || 44x
204         default y
205 
206 config BOOKE
207         bool
208         depends on E200 || E500 || 44x || PPC_BOOK3E
209         default y
210 
211 config FSL_BOOKE
212         bool
213         depends on (E200 || E500) && PPC32
214         default y
215 
216 # this is for common code between PPC32 & PPC64 FSL BOOKE
217 config PPC_FSL_BOOK3E
218         bool
219         select FSL_EMB_PERFMON
220         select PPC_SMP_MUXED_IPI
221         select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
222         select PPC_DOORBELL
223         default y if FSL_BOOKE
224 
225 config PTE_64BIT
226         bool
227         depends on 44x || E500 || PPC_86xx
228         default y if PHYS_64BIT
229 
230 config PHYS_64BIT
231         bool 'Large physical address support' if E500 || PPC_86xx
232         depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
233         ---help---
234           This option enables kernel support for larger than 32-bit physical
235           addresses.  This feature may not be available on all cores.
236 
237           If you have more than 3.5GB of RAM or so, you also need to enable
238           SWIOTLB under Kernel Options for this to work.  The actual number
239           is platform-dependent.
240 
241           If in doubt, say N here.
242 
243 config ALTIVEC
244         bool "AltiVec Support"
245         depends on 6xx || PPC_BOOK3S_64 || (PPC_E500MC && PPC64)
246         ---help---
247           This option enables kernel support for the Altivec extensions to the
248           PowerPC processor. The kernel currently supports saving and restoring
249           altivec registers, and turning on the 'altivec enable' bit so user
250           processes can execute altivec instructions.
251 
252           This option is only usefully if you have a processor that supports
253           altivec (G4, otherwise known as 74xx series), but does not have
254           any affect on a non-altivec cpu (it does, however add code to the
255           kernel).
256 
257           If in doubt, say Y here.
258 
259 config VSX
260         bool "VSX Support"
261         depends on PPC_BOOK3S_64 && ALTIVEC && PPC_FPU
262         ---help---
263 
264           This option enables kernel support for the Vector Scaler extensions
265           to the PowerPC processor. The kernel currently supports saving and
266           restoring VSX registers, and turning on the 'VSX enable' bit so user
267           processes can execute VSX instructions.
268 
269           This option is only useful if you have a processor that supports
270           VSX (P7 and above), but does not have any affect on a non-VSX
271           CPUs (it does, however add code to the kernel).
272 
273           If in doubt, say Y here.
274 
275 config PPC_ICSWX
276         bool "Support for PowerPC icswx coprocessor instruction"
277         depends on PPC_BOOK3S_64
278         default n
279         ---help---
280 
281           This option enables kernel support for the PowerPC Initiate
282           Coprocessor Store Word (icswx) coprocessor instruction on POWER7
283           or newer processors.
284 
285           This option is only useful if you have a processor that supports
286           the icswx coprocessor instruction. It does not have any effect
287           on processors without the icswx coprocessor instruction.
288 
289           This option slightly increases kernel memory usage.
290 
291           If in doubt, say N here.
292 
293 config PPC_ICSWX_PID
294         bool "icswx requires direct PID management"
295         depends on PPC_ICSWX
296         default y
297         ---help---
298           The PID register in server is used explicitly for ICSWX.  In
299           embedded systems PID management is done by the system.
300 
301 config PPC_ICSWX_USE_SIGILL
302         bool "Should a bad CT cause a SIGILL?"
303         depends on PPC_ICSWX
304         default n
305         ---help---
306           Should a bad CT used for "non-record form ICSWX" cause an
307           illegal instruction signal or should it be silent as
308           architected.
309 
310           If in doubt, say N here.
311 
312 config SPE_POSSIBLE
313         def_bool y
314         depends on E200 || (E500 && !PPC_E500MC)
315 
316 config SPE
317         bool "SPE Support"
318         depends on SPE_POSSIBLE
319         default y
320         ---help---
321           This option enables kernel support for the Signal Processing
322           Extensions (SPE) to the PowerPC processor. The kernel currently
323           supports saving and restoring SPE registers, and turning on the
324           'spe enable' bit so user processes can execute SPE instructions.
325 
326           This option is only useful if you have a processor that supports
327           SPE (e500, otherwise known as 85xx series), but does not have any
328           effect on a non-spe cpu (it does, however add code to the kernel).
329 
330           If in doubt, say Y here.
331 
332 config PPC_STD_MMU
333         def_bool y
334         depends on PPC_BOOK3S
335 
336 config PPC_STD_MMU_32
337         def_bool y
338         depends on PPC_STD_MMU && PPC32
339 
340 config PPC_STD_MMU_64
341         def_bool y
342         depends on PPC_STD_MMU && PPC64
343 
344 config PPC_MMU_NOHASH
345         def_bool y
346         depends on !PPC_STD_MMU
347 
348 config PPC_BOOK3E_MMU
349         def_bool y
350         depends on FSL_BOOKE || PPC_BOOK3E
351 
352 config PPC_MM_SLICES
353         bool
354         default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES)
355         default n
356 
357 config PPC_HAVE_PMU_SUPPORT
358        bool
359 
360 config PPC_PERF_CTRS
361        def_bool y
362        depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
363        help
364          This enables the powerpc-specific perf_event back-end.
365 
366 config SMP
367         depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x
368         bool "Symmetric multi-processing support"
369         ---help---
370           This enables support for systems with more than one CPU. If you have
371           a system with only one CPU, say N. If you have a system with more
372           than one CPU, say Y.  Note that the kernel does not currently
373           support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
374           since they have inadequate hardware support for multiprocessor
375           operation.
376 
377           If you say N here, the kernel will run on single and multiprocessor
378           machines, but will use only one CPU of a multiprocessor machine. If
379           you say Y here, the kernel will run on single-processor machines.
380           On a single-processor machine, the kernel will run faster if you say
381           N here.
382 
383           If you don't know what to do here, say N.
384 
385 config NR_CPUS
386         int "Maximum number of CPUs (2-8192)"
387         range 2 8192
388         depends on SMP
389         default "32" if PPC64
390         default "4"
391 
392 config NOT_COHERENT_CACHE
393         bool
394         depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON
395         default n if PPC_47x
396         default y
397 
398 config CHECK_CACHE_COHERENCY
399         bool
400 
401 config PPC_DOORBELL
402         bool
403         default n
404 
405 endmenu
406 
407 choice
408         prompt "Endianness selection"
409         default CPU_BIG_ENDIAN
410         help
411           This option selects whether a big endian or little endian kernel will
412           be built.
413 
414 config CPU_BIG_ENDIAN
415         bool "Build big endian kernel"
416         help
417           Build a big endian kernel.
418 
419           If unsure, select this option.
420 
421 config CPU_LITTLE_ENDIAN
422         bool "Build little endian kernel"
423         select PPC64_BOOT_WRAPPER
424         help
425           Build a little endian kernel.
426 
427           Note that if cross compiling a little endian kernel,
428           CROSS_COMPILE must point to a toolchain capable of targeting
429           little endian powerpc.
430 
431 endchoice
432 
433 config PPC64_BOOT_WRAPPER
434         def_bool n
435         depends on CPU_LITTLE_ENDIAN

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