Version:  2.6.34 2.6.35 2.6.36 2.6.37 2.6.38 2.6.39 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14

Linux/arch/powerpc/platforms/85xx/mpc85xx_ads.c

  1 /*
  2  * MPC85xx setup and early boot code plus other random bits.
  3  *
  4  * Maintained by Kumar Gala (see MAINTAINERS for contact information)
  5  *
  6  * Copyright 2005 Freescale Semiconductor Inc.
  7  *
  8  * This program is free software; you can redistribute  it and/or modify it
  9  * under  the terms of  the GNU General  Public License as published by the
 10  * Free Software Foundation;  either version 2 of the  License, or (at your
 11  * option) any later version.
 12  */
 13 
 14 #include <linux/stddef.h>
 15 #include <linux/kernel.h>
 16 #include <linux/pci.h>
 17 #include <linux/kdev_t.h>
 18 #include <linux/delay.h>
 19 #include <linux/seq_file.h>
 20 #include <linux/of_platform.h>
 21 
 22 #include <asm/time.h>
 23 #include <asm/machdep.h>
 24 #include <asm/pci-bridge.h>
 25 #include <asm/mpic.h>
 26 #include <mm/mmu_decl.h>
 27 #include <asm/udbg.h>
 28 
 29 #include <sysdev/fsl_soc.h>
 30 #include <sysdev/fsl_pci.h>
 31 
 32 #ifdef CONFIG_CPM2
 33 #include <asm/cpm2.h>
 34 #include <sysdev/cpm2_pic.h>
 35 #endif
 36 
 37 #include "mpc85xx.h"
 38 
 39 #ifdef CONFIG_PCI
 40 static int mpc85xx_exclude_device(struct pci_controller *hose,
 41                                    u_char bus, u_char devfn)
 42 {
 43         if (bus == 0 && PCI_SLOT(devfn) == 0)
 44                 return PCIBIOS_DEVICE_NOT_FOUND;
 45         else
 46                 return PCIBIOS_SUCCESSFUL;
 47 }
 48 #endif /* CONFIG_PCI */
 49 
 50 static void __init mpc85xx_ads_pic_init(void)
 51 {
 52         struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,
 53                         0, 256, " OpenPIC  ");
 54         BUG_ON(mpic == NULL);
 55         mpic_init(mpic);
 56 
 57         mpc85xx_cpm2_pic_init();
 58 }
 59 
 60 /*
 61  * Setup the architecture
 62  */
 63 #ifdef CONFIG_CPM2
 64 struct cpm_pin {
 65         int port, pin, flags;
 66 };
 67 
 68 static const struct cpm_pin mpc8560_ads_pins[] = {
 69         /* SCC1 */
 70         {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 71         {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
 72         {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 73 
 74         /* SCC2 */
 75         {2, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 76         {2, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 77         {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 78         {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 79         {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 80 
 81         /* FCC2 */
 82         {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 83         {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 84         {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 85         {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 86         {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 87         {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 88         {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 89         {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 90         {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 91         {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 92         {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 93         {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
 94         {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 95         {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 96         {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */
 97         {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */
 98 
 99         /* FCC3 */
100         {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
101         {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
102         {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
103         {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
104         {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
105         {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
106         {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
107         {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
108         {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
109         {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
110         {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
111         {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
112         {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
113         {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK16 */
114         {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK15 */
115         {2, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
116 };
117 
118 static void __init init_ioports(void)
119 {
120         int i;
121 
122         for (i = 0; i < ARRAY_SIZE(mpc8560_ads_pins); i++) {
123                 const struct cpm_pin *pin = &mpc8560_ads_pins[i];
124                 cpm2_set_pin(pin->port, pin->pin, pin->flags);
125         }
126 
127         cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
128         cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
129         cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
130         cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
131         cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
132         cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
133         cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
134         cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
135 }
136 #endif
137 
138 static void __init mpc85xx_ads_setup_arch(void)
139 {
140         if (ppc_md.progress)
141                 ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
142 
143 #ifdef CONFIG_CPM2
144         cpm2_reset();
145         init_ioports();
146 #endif
147 
148 #ifdef CONFIG_PCI
149         ppc_md.pci_exclude_device = mpc85xx_exclude_device;
150 #endif
151 
152         fsl_pci_assign_primary();
153 }
154 
155 static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
156 {
157         uint pvid, svid, phid1;
158 
159         pvid = mfspr(SPRN_PVR);
160         svid = mfspr(SPRN_SVR);
161 
162         seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
163         seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
164         seq_printf(m, "SVR\t\t: 0x%x\n", svid);
165 
166         /* Display cpu Pll setting */
167         phid1 = mfspr(SPRN_HID1);
168         seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
169 }
170 
171 machine_arch_initcall(mpc85xx_ads, mpc85xx_common_publish_devices);
172 
173 /*
174  * Called very early, device-tree isn't unflattened
175  */
176 static int __init mpc85xx_ads_probe(void)
177 {
178         unsigned long root = of_get_flat_dt_root();
179 
180         return of_flat_dt_is_compatible(root, "MPC85xxADS");
181 }
182 
183 define_machine(mpc85xx_ads) {
184         .name                   = "MPC85xx ADS",
185         .probe                  = mpc85xx_ads_probe,
186         .setup_arch             = mpc85xx_ads_setup_arch,
187         .init_IRQ               = mpc85xx_ads_pic_init,
188         .show_cpuinfo           = mpc85xx_ads_show_cpuinfo,
189         .get_irq                = mpic_get_irq,
190         .restart                = fsl_rstcr_restart,
191         .calibrate_decr         = generic_calibrate_decr,
192         .progress               = udbg_progress,
193 };
194 

This page was automatically generated by LXR 0.3.1 (source).  •  Linux is a registered trademark of Linus Torvalds  •  Contact us