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Linux/arch/powerpc/platforms/85xx/corenet_generic.c

  1 /*
  2  * Corenet based SoC DS Setup
  3  *
  4  * Maintained by Kumar Gala (see MAINTAINERS for contact information)
  5  *
  6  * Copyright 2009-2011 Freescale Semiconductor Inc.
  7  *
  8  * This program is free software; you can redistribute  it and/or modify it
  9  * under  the terms of  the GNU General  Public License as published by the
 10  * Free Software Foundation;  either version 2 of the  License, or (at your
 11  * option) any later version.
 12  */
 13 
 14 #include <linux/kernel.h>
 15 #include <linux/pci.h>
 16 #include <linux/kdev_t.h>
 17 #include <linux/delay.h>
 18 #include <linux/interrupt.h>
 19 
 20 #include <asm/time.h>
 21 #include <asm/machdep.h>
 22 #include <asm/pci-bridge.h>
 23 #include <asm/ppc-pci.h>
 24 #include <mm/mmu_decl.h>
 25 #include <asm/prom.h>
 26 #include <asm/udbg.h>
 27 #include <asm/mpic.h>
 28 #include <asm/ehv_pic.h>
 29 #include <asm/qe_ic.h>
 30 
 31 #include <linux/of_platform.h>
 32 #include <sysdev/fsl_soc.h>
 33 #include <sysdev/fsl_pci.h>
 34 #include "smp.h"
 35 #include "mpc85xx.h"
 36 
 37 void __init corenet_gen_pic_init(void)
 38 {
 39         struct mpic *mpic;
 40         unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
 41                 MPIC_NO_RESET;
 42 
 43         struct device_node *np;
 44 
 45         if (ppc_md.get_irq == mpic_get_coreint_irq)
 46                 flags |= MPIC_ENABLE_COREINT;
 47 
 48         mpic = mpic_alloc(NULL, 0, flags, 0, 512, " OpenPIC  ");
 49         BUG_ON(mpic == NULL);
 50 
 51         mpic_init(mpic);
 52 
 53         np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
 54         if (np) {
 55                 qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
 56                                 qe_ic_cascade_high_mpic);
 57                 of_node_put(np);
 58         }
 59 }
 60 
 61 /*
 62  * Setup the architecture
 63  */
 64 void __init corenet_gen_setup_arch(void)
 65 {
 66         mpc85xx_smp_init();
 67 
 68         swiotlb_detect_4g();
 69 
 70         pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
 71 
 72         mpc85xx_qe_init();
 73 }
 74 
 75 static const struct of_device_id of_device_ids[] = {
 76         {
 77                 .compatible     = "simple-bus"
 78         },
 79         {
 80                 .compatible     = "fsl,srio",
 81         },
 82         {
 83                 .compatible     = "fsl,p4080-pcie",
 84         },
 85         {
 86                 .compatible     = "fsl,qoriq-pcie-v2.2",
 87         },
 88         {
 89                 .compatible     = "fsl,qoriq-pcie-v2.3",
 90         },
 91         {
 92                 .compatible     = "fsl,qoriq-pcie-v2.4",
 93         },
 94         {
 95                 .compatible     = "fsl,qoriq-pcie-v3.0",
 96         },
 97         {
 98                 .compatible     = "fsl,qe",
 99         },
100         /* The following two are for the Freescale hypervisor */
101         {
102                 .name           = "hypervisor",
103         },
104         {
105                 .name           = "handles",
106         },
107         {}
108 };
109 
110 int __init corenet_gen_publish_devices(void)
111 {
112         return of_platform_bus_probe(NULL, of_device_ids, NULL);
113 }
114 
115 static const char * const boards[] __initconst = {
116         "fsl,P2041RDB",
117         "fsl,P3041DS",
118         "fsl,P4080DS",
119         "fsl,P5020DS",
120         "fsl,P5040DS",
121         "fsl,T4240QDS",
122         "fsl,B4860QDS",
123         "fsl,B4420QDS",
124         "fsl,B4220QDS",
125         NULL
126 };
127 
128 static const char * const hv_boards[] __initconst = {
129         "fsl,P2041RDB-hv",
130         "fsl,P3041DS-hv",
131         "fsl,P4080DS-hv",
132         "fsl,P5020DS-hv",
133         "fsl,P5040DS-hv",
134         "fsl,T4240QDS-hv",
135         "fsl,B4860QDS-hv",
136         "fsl,B4420QDS-hv",
137         "fsl,B4220QDS-hv",
138         NULL
139 };
140 
141 /*
142  * Called very early, device-tree isn't unflattened
143  */
144 static int __init corenet_generic_probe(void)
145 {
146         unsigned long root = of_get_flat_dt_root();
147 #ifdef CONFIG_SMP
148         extern struct smp_ops_t smp_85xx_ops;
149 #endif
150 
151         if (of_flat_dt_match(root, boards))
152                 return 1;
153 
154         /* Check if we're running under the Freescale hypervisor */
155         if (of_flat_dt_match(root, hv_boards)) {
156                 ppc_md.init_IRQ = ehv_pic_init;
157                 ppc_md.get_irq = ehv_pic_get_irq;
158                 ppc_md.restart = fsl_hv_restart;
159                 ppc_md.power_off = fsl_hv_halt;
160                 ppc_md.halt = fsl_hv_halt;
161 #ifdef CONFIG_SMP
162                 /*
163                  * Disable the timebase sync operations because we can't write
164                  * to the timebase registers under the hypervisor.
165                   */
166                 smp_85xx_ops.give_timebase = NULL;
167                 smp_85xx_ops.take_timebase = NULL;
168 #endif
169                 return 1;
170         }
171 
172         return 0;
173 }
174 
175 define_machine(corenet_generic) {
176         .name                   = "CoreNet Generic",
177         .probe                  = corenet_generic_probe,
178         .setup_arch             = corenet_gen_setup_arch,
179         .init_IRQ               = corenet_gen_pic_init,
180 #ifdef CONFIG_PCI
181         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
182         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
183 #endif
184         .get_irq                = mpic_get_coreint_irq,
185         .restart                = fsl_rstcr_restart,
186         .calibrate_decr         = generic_calibrate_decr,
187         .progress               = udbg_progress,
188 #ifdef CONFIG_PPC64
189         .power_save             = book3e_idle,
190 #else
191         .power_save             = e500_idle,
192 #endif
193 };
194 
195 machine_arch_initcall(corenet_generic, corenet_gen_publish_devices);
196 
197 #ifdef CONFIG_SWIOTLB
198 machine_arch_initcall(corenet_generic, swiotlb_setup_bus_notifier);
199 #endif
200 

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