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Linux/arch/m68k/Kconfig.cpu

  1 comment "Processor Type"
  2 
  3 choice
  4         prompt "CPU family support"
  5         default M68KCLASSIC if MMU
  6         default COLDFIRE if !MMU
  7         help
  8           The Freescale (was Motorola) M68K family of processors implements
  9           the full 68000 processor instruction set.
 10           The Freescale ColdFire family of processors is a modern derivative
 11           of the 68000 processor family. They are mainly targeted at embedded
 12           applications, and are all System-On-Chip (SOC) devices, as opposed
 13           to stand alone CPUs. They implement a subset of the original 68000
 14           processor instruction set.
 15           If you anticipate running this kernel on a computer with a classic
 16           MC68xxx processor, select M68KCLASSIC.
 17           If you anticipate running this kernel on a computer with a ColdFire
 18           processor, select COLDFIRE.
 19 
 20 config M68KCLASSIC
 21         bool "Classic M68K CPU family support"
 22 
 23 config COLDFIRE
 24         bool "Coldfire CPU family support"
 25         select ARCH_REQUIRE_GPIOLIB
 26         select ARCH_HAVE_CUSTOM_GPIO_H
 27         select CPU_HAS_NO_BITFIELDS
 28         select CPU_HAS_NO_MULDIV64
 29         select GENERIC_CSUM
 30         select HAVE_CLK
 31 
 32 endchoice
 33 
 34 if M68KCLASSIC
 35 
 36 config M68000
 37         bool "MC68000"
 38         depends on !MMU
 39         select CPU_HAS_NO_BITFIELDS
 40         select CPU_HAS_NO_MULDIV64
 41         select CPU_HAS_NO_UNALIGNED
 42         select GENERIC_CSUM
 43         help
 44           The Freescale (was Motorola) 68000 CPU is the first generation of
 45           the well known M68K family of processors. The CPU core as well as
 46           being available as a stand alone CPU was also used in many
 47           System-On-Chip devices (eg 68328, 68302, etc). It does not contain
 48           a paging MMU.
 49 
 50 config MCPU32
 51         bool
 52         select CPU_HAS_NO_BITFIELDS
 53         select CPU_HAS_NO_UNALIGNED
 54         help
 55           The Freescale (was then Motorola) CPU32 is a CPU core that is
 56           based on the 68020 processor. For the most part it is used in
 57           System-On-Chip parts, and does not contain a paging MMU.
 58 
 59 config M68020
 60         bool "68020 support"
 61         depends on MMU
 62         select CPU_HAS_ADDRESS_SPACES
 63         help
 64           If you anticipate running this kernel on a computer with a MC68020
 65           processor, say Y. Otherwise, say N. Note that the 68020 requires a
 66           68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
 67           Sun 3, which provides its own version.
 68 
 69 config M68030
 70         bool "68030 support"
 71         depends on MMU && !MMU_SUN3
 72         select CPU_HAS_ADDRESS_SPACES
 73         help
 74           If you anticipate running this kernel on a computer with a MC68030
 75           processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
 76           work, as it does not include an MMU (Memory Management Unit).
 77 
 78 config M68040
 79         bool "68040 support"
 80         depends on MMU && !MMU_SUN3
 81         select CPU_HAS_ADDRESS_SPACES
 82         help
 83           If you anticipate running this kernel on a computer with a MC68LC040
 84           or MC68040 processor, say Y. Otherwise, say N. Note that an
 85           MC68EC040 will not work, as it does not include an MMU (Memory
 86           Management Unit).
 87 
 88 config M68060
 89         bool "68060 support"
 90         depends on MMU && !MMU_SUN3
 91         select CPU_HAS_ADDRESS_SPACES
 92         help
 93           If you anticipate running this kernel on a computer with a MC68060
 94           processor, say Y. Otherwise, say N.
 95 
 96 config M68328
 97         bool "MC68328"
 98         depends on !MMU
 99         select M68000
100         help
101           Motorola 68328 processor support.
102 
103 config M68EZ328
104         bool "MC68EZ328"
105         depends on !MMU
106         select M68000
107         help
108           Motorola 68EX328 processor support.
109 
110 config M68VZ328
111         bool "MC68VZ328"
112         depends on !MMU
113         select M68000
114         help
115           Motorola 68VZ328 processor support.
116 
117 config M68360
118         bool "MC68360"
119         depends on !MMU
120         select MCPU32
121         help
122           Motorola 68360 processor support.
123 
124 endif # M68KCLASSIC
125 
126 if COLDFIRE
127 
128 config M5206
129         bool "MCF5206"
130         depends on !MMU
131         select COLDFIRE_SW_A7
132         select HAVE_MBAR
133         help
134           Motorola ColdFire 5206 processor support.
135 
136 config M5206e
137         bool "MCF5206e"
138         depends on !MMU
139         select COLDFIRE_SW_A7
140         select HAVE_MBAR
141         help
142           Motorola ColdFire 5206e processor support.
143 
144 config M520x
145         bool "MCF520x"
146         depends on !MMU
147         select GENERIC_CLOCKEVENTS
148         select HAVE_CACHE_SPLIT
149         help
150            Freescale Coldfire 5207/5208 processor support.
151 
152 config M523x
153         bool "MCF523x"
154         depends on !MMU
155         select GENERIC_CLOCKEVENTS
156         select HAVE_CACHE_SPLIT
157         select HAVE_IPSBAR
158         help
159           Freescale Coldfire 5230/1/2/4/5 processor support
160 
161 config M5249
162         bool "MCF5249"
163         depends on !MMU
164         select COLDFIRE_SW_A7
165         select HAVE_MBAR
166         help
167           Motorola ColdFire 5249 processor support.
168 
169 config M525x
170         bool "MCF525x"
171         depends on !MMU
172         select COLDFIRE_SW_A7
173         select HAVE_MBAR
174         help
175           Freescale (Motorola) Coldfire 5251/5253 processor support.
176 
177 config M527x
178         bool
179 
180 config M5271
181         bool "MCF5271"
182         depends on !MMU
183         select M527x
184         select HAVE_CACHE_SPLIT
185         select HAVE_IPSBAR
186         select GENERIC_CLOCKEVENTS
187         help
188           Freescale (Motorola) ColdFire 5270/5271 processor support.
189 
190 config M5272
191         bool "MCF5272"
192         depends on !MMU
193         select COLDFIRE_SW_A7
194         select HAVE_MBAR
195         help
196           Motorola ColdFire 5272 processor support.
197 
198 config M5275
199         bool "MCF5275"
200         depends on !MMU
201         select M527x
202         select HAVE_CACHE_SPLIT
203         select HAVE_IPSBAR
204         select GENERIC_CLOCKEVENTS
205         help
206           Freescale (Motorola) ColdFire 5274/5275 processor support.
207 
208 config M528x
209         bool "MCF528x"
210         depends on !MMU
211         select GENERIC_CLOCKEVENTS
212         select HAVE_CACHE_SPLIT
213         select HAVE_IPSBAR
214         help
215           Motorola ColdFire 5280/5282 processor support.
216 
217 config M5307
218         bool "MCF5307"
219         depends on !MMU
220         select COLDFIRE_SW_A7
221         select HAVE_CACHE_CB
222         select HAVE_MBAR
223         help
224           Motorola ColdFire 5307 processor support.
225 
226 config M53xx
227         bool
228 
229 config M532x
230         bool "MCF532x"
231         depends on !MMU
232         select M53xx
233         select HAVE_CACHE_CB
234         help
235           Freescale (Motorola) ColdFire 532x processor support.
236 
237 config M537x
238         bool "MCF537x"
239         depends on !MMU
240         select M53xx
241         select HAVE_CACHE_CB
242         help
243           Freescale ColdFire 537x processor support.
244 
245 config M5407
246         bool "MCF5407"
247         depends on !MMU
248         select COLDFIRE_SW_A7
249         select HAVE_CACHE_CB
250         select HAVE_MBAR
251         help
252           Motorola ColdFire 5407 processor support.
253 
254 config M54xx
255         bool
256 
257 config M547x
258         bool "MCF547x"
259         select M54xx
260         select MMU_COLDFIRE if MMU
261         select HAVE_CACHE_CB
262         select HAVE_MBAR
263         help
264           Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
265 
266 config M548x
267         bool "MCF548x"
268         select MMU_COLDFIRE if MMU
269         select M54xx
270         select HAVE_CACHE_CB
271         select HAVE_MBAR
272         help
273           Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
274 
275 config M5441x
276         bool "MCF5441x"
277         depends on !MMU
278         select GENERIC_CLOCKEVENTS
279         select HAVE_CACHE_CB
280         help
281           Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
282 
283 endif # COLDFIRE
284 
285 
286 comment "Processor Specific Options"
287 
288 config M68KFPU_EMU
289         bool "Math emulation support"
290         depends on MMU
291         help
292           At some point in the future, this will cause floating-point math
293           instructions to be emulated by the kernel on machines that lack a
294           floating-point math coprocessor.  Thrill-seekers and chronically
295           sleep-deprived psychotic hacker types can say Y now, everyone else
296           should probably wait a while.
297 
298 config M68KFPU_EMU_EXTRAPREC
299         bool "Math emulation extra precision"
300         depends on M68KFPU_EMU
301         help
302           The fpu uses normally a few bit more during calculations for
303           correct rounding, the emulator can (often) do the same but this
304           extra calculation can cost quite some time, so you can disable
305           it here. The emulator will then "only" calculate with a 64 bit
306           mantissa and round slightly incorrect, what is more than enough
307           for normal usage.
308 
309 config M68KFPU_EMU_ONLY
310         bool "Math emulation only kernel"
311         depends on M68KFPU_EMU
312         help
313           This option prevents any floating-point instructions from being
314           compiled into the kernel, thereby the kernel doesn't save any
315           floating point context anymore during task switches, so this
316           kernel will only be usable on machines without a floating-point
317           math coprocessor. This makes the kernel a bit faster as no tests
318           needs to be executed whether a floating-point instruction in the
319           kernel should be executed or not.
320 
321 config ADVANCED
322         bool "Advanced configuration options"
323         depends on MMU
324         ---help---
325           This gives you access to some advanced options for the CPU. The
326           defaults should be fine for most users, but these options may make
327           it possible for you to improve performance somewhat if you know what
328           you are doing.
329 
330           Note that the answer to this question won't directly affect the
331           kernel: saying N will just cause the configurator to skip all
332           the questions about these options.
333 
334           Most users should say N to this question.
335 
336 config RMW_INSNS
337         bool "Use read-modify-write instructions"
338         depends on ADVANCED
339         ---help---
340           This allows to use certain instructions that work with indivisible
341           read-modify-write bus cycles. While this is faster than the
342           workaround of disabling interrupts, it can conflict with DMA
343           ( = direct memory access) on many Amiga systems, and it is also said
344           to destabilize other machines. It is very likely that this will
345           cause serious problems on any Amiga or Atari Medusa if set. The only
346           configuration where it should work are 68030-based Ataris, where it
347           apparently improves performance. But you've been warned! Unless you
348           really know what you are doing, say N. Try Y only if you're quite
349           adventurous.
350 
351 config SINGLE_MEMORY_CHUNK
352         bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
353         depends on MMU
354         default y if SUN3
355         select NEED_MULTIPLE_NODES
356         help
357           Ignore all but the first contiguous chunk of physical memory for VM
358           purposes.  This will save a few bytes kernel size and may speed up
359           some operations.  Say N if not sure.
360 
361 config ARCH_DISCONTIGMEM_ENABLE
362         def_bool MMU && !SINGLE_MEMORY_CHUNK
363 
364 config 060_WRITETHROUGH
365         bool "Use write-through caching for 68060 supervisor accesses"
366         depends on ADVANCED && M68060
367         ---help---
368           The 68060 generally uses copyback caching of recently accessed data.
369           Copyback caching means that memory writes will be held in an on-chip
370           cache and only written back to memory some time later.  Saying Y
371           here will force supervisor (kernel) accesses to use writethrough
372           caching.  Writethrough caching means that data is written to memory
373           straight away, so that cache and memory data always agree.
374           Writethrough caching is less efficient, but is needed for some
375           drivers on 68060 based systems where the 68060 bus snooping signal
376           is hardwired on.  The 53c710 SCSI driver is known to suffer from
377           this problem.
378 
379 config M68K_L2_CACHE
380         bool
381         depends on MAC
382         default y
383 
384 config NODES_SHIFT
385         int
386         default "3"
387         depends on !SINGLE_MEMORY_CHUNK
388 
389 config CPU_HAS_NO_BITFIELDS
390         bool
391 
392 config CPU_HAS_NO_MULDIV64
393         bool
394 
395 config CPU_HAS_NO_UNALIGNED
396         bool
397 
398 config CPU_HAS_ADDRESS_SPACES
399         bool
400 
401 config FPU
402         bool
403 
404 config COLDFIRE_SW_A7
405         bool
406 
407 config HAVE_CACHE_SPLIT
408         bool
409 
410 config HAVE_CACHE_CB
411         bool
412 
413 config HAVE_MBAR
414         bool
415 
416 config HAVE_IPSBAR
417         bool
418 
419 config CLOCK_SET
420         bool "Enable setting the CPU clock frequency"
421         depends on COLDFIRE
422         default n
423         help
424           On some CPU's you do not need to know what the core CPU clock
425           frequency is. On these you can disable clock setting. On some
426           traditional 68K parts, and on all ColdFire parts you need to set
427           the appropriate CPU clock frequency. On these devices many of the
428           onboard peripherals derive their timing from the master CPU clock
429           frequency.
430 
431 config CLOCK_FREQ
432         int "Set the core clock frequency"
433         default "66666666"
434         depends on CLOCK_SET
435         help
436           Define the CPU clock frequency in use. This is the core clock
437           frequency, it may or may not be the same as the external clock
438           crystal fitted to your board. Some processors have an internal
439           PLL and can have their frequency programmed at run time, others
440           use internal dividers. In general the kernel won't setup a PLL
441           if it is fitted (there are some exceptions). This value will be
442           specific to the exact CPU that you are using.
443 
444 config OLDMASK
445         bool "Old mask 5307 (1H55J) silicon"
446         depends on M5307
447         help
448           Build support for the older revision ColdFire 5307 silicon.
449           Specifically this is the 1H55J mask revision.
450 
451 if HAVE_CACHE_SPLIT
452 choice
453         prompt "Split Cache Configuration"
454         default CACHE_I
455 
456 config CACHE_I
457         bool "Instruction"
458         help
459           Use all of the ColdFire CPU cache memory as an instruction cache.
460 
461 config CACHE_D
462         bool "Data"
463         help
464           Use all of the ColdFire CPU cache memory as a data cache.
465 
466 config CACHE_BOTH
467         bool "Both"
468         help
469           Split the ColdFire CPU cache, and use half as an instruction cache
470           and half as a data cache.
471 endchoice
472 endif
473 
474 if HAVE_CACHE_CB
475 choice
476         prompt "Data cache mode"
477         default CACHE_WRITETHRU
478 
479 config CACHE_WRITETHRU
480         bool "Write-through"
481         help
482           The ColdFire CPU cache is set into Write-through mode.
483 
484 config CACHE_COPYBACK
485         bool "Copy-back"
486         help
487           The ColdFire CPU cache is set into Copy-back mode.
488 endchoice
489 endif
490 

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