Version:  2.0.40 2.2.26 2.4.37 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16

Linux/arch/arm/Kconfig

  1 config ARM
  2         bool
  3         default y
  4         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
  5         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
  6         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
  7         select ARCH_HAVE_CUSTOM_GPIO_H
  8         select ARCH_MIGHT_HAVE_PC_PARPORT
  9         select ARCH_SUPPORTS_ATOMIC_RMW
 10         select ARCH_USE_BUILTIN_BSWAP
 11         select ARCH_USE_CMPXCHG_LOCKREF
 12         select ARCH_WANT_IPC_PARSE_VERSION
 13         select BUILDTIME_EXTABLE_SORT if MMU
 14         select CLONE_BACKWARDS
 15         select CPU_PM if (SUSPEND || CPU_IDLE)
 16         select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
 17         select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI)
 18         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
 19         select GENERIC_IDLE_POLL_SETUP
 20         select GENERIC_IRQ_PROBE
 21         select GENERIC_IRQ_SHOW
 22         select GENERIC_PCI_IOMAP
 23         select GENERIC_SCHED_CLOCK
 24         select GENERIC_SMP_IDLE_THREAD
 25         select GENERIC_STRNCPY_FROM_USER
 26         select GENERIC_STRNLEN_USER
 27         select HARDIRQS_SW_RESEND
 28         select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT)
 29         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
 30         select HAVE_ARCH_KGDB
 31         select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
 32         select HAVE_ARCH_TRACEHOOK
 33         select HAVE_BPF_JIT
 34         select HAVE_CC_STACKPROTECTOR
 35         select HAVE_CONTEXT_TRACKING
 36         select HAVE_C_RECORDMCOUNT
 37         select HAVE_DEBUG_KMEMLEAK
 38         select HAVE_DMA_API_DEBUG
 39         select HAVE_DMA_ATTRS
 40         select HAVE_DMA_CONTIGUOUS if MMU
 41         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
 42         select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
 43         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
 44         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
 45         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
 46         select HAVE_GENERIC_DMA_COHERENT
 47         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
 48         select HAVE_IDE if PCI || ISA || PCMCIA
 49         select HAVE_IRQ_TIME_ACCOUNTING
 50         select HAVE_KERNEL_GZIP
 51         select HAVE_KERNEL_LZ4
 52         select HAVE_KERNEL_LZMA
 53         select HAVE_KERNEL_LZO
 54         select HAVE_KERNEL_XZ
 55         select HAVE_KPROBES if !XIP_KERNEL
 56         select HAVE_KRETPROBES if (HAVE_KPROBES)
 57         select HAVE_MEMBLOCK
 58         select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
 59         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
 60         select HAVE_PERF_EVENTS
 61         select HAVE_PERF_REGS
 62         select HAVE_PERF_USER_STACK_DUMP
 63         select HAVE_REGS_AND_STACK_ACCESS_API
 64         select HAVE_SYSCALL_TRACEPOINTS
 65         select HAVE_UID16
 66         select HAVE_VIRT_CPU_ACCOUNTING_GEN
 67         select IRQ_FORCED_THREADING
 68         select KTIME_SCALAR
 69         select MODULES_USE_ELF_REL
 70         select NO_BOOTMEM
 71         select OLD_SIGACTION
 72         select OLD_SIGSUSPEND3
 73         select PERF_USE_VMALLOC
 74         select RTC_LIB
 75         select SYS_SUPPORTS_APM_EMULATION
 76         # Above selects are sorted alphabetically; please add new ones
 77         # according to that.  Thanks.
 78         help
 79           The ARM series is a line of low-power-consumption RISC chip designs
 80           licensed by ARM Ltd and targeted at embedded applications and
 81           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
 82           manufactured, but legacy ARM-based PC hardware remains popular in
 83           Europe.  There is an ARM Linux project with a web page at
 84           <http://www.arm.linux.org.uk/>.
 85 
 86 config ARM_HAS_SG_CHAIN
 87         bool
 88 
 89 config NEED_SG_DMA_LENGTH
 90         bool
 91 
 92 config ARM_DMA_USE_IOMMU
 93         bool
 94         select ARM_HAS_SG_CHAIN
 95         select NEED_SG_DMA_LENGTH
 96 
 97 if ARM_DMA_USE_IOMMU
 98 
 99 config ARM_DMA_IOMMU_ALIGNMENT
100         int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
101         range 4 9
102         default 8
103         help
104           DMA mapping framework by default aligns all buffers to the smallest
105           PAGE_SIZE order which is greater than or equal to the requested buffer
106           size. This works well for buffers up to a few hundreds kilobytes, but
107           for larger buffers it just a waste of address space. Drivers which has
108           relatively small addressing window (like 64Mib) might run out of
109           virtual space with just a few allocations.
110 
111           With this parameter you can specify the maximum PAGE_SIZE order for
112           DMA IOMMU buffers. Larger buffers will be aligned only to this
113           specified order. The order is expressed as a power of two multiplied
114           by the PAGE_SIZE.
115 
116 endif
117 
118 config MIGHT_HAVE_PCI
119         bool
120 
121 config SYS_SUPPORTS_APM_EMULATION
122         bool
123 
124 config HAVE_TCM
125         bool
126         select GENERIC_ALLOCATOR
127 
128 config HAVE_PROC_CPU
129         bool
130 
131 config NO_IOPORT_MAP
132         bool
133 
134 config EISA
135         bool
136         ---help---
137           The Extended Industry Standard Architecture (EISA) bus was
138           developed as an open alternative to the IBM MicroChannel bus.
139 
140           The EISA bus provided some of the features of the IBM MicroChannel
141           bus while maintaining backward compatibility with cards made for
142           the older ISA bus.  The EISA bus saw limited use between 1988 and
143           1995 when it was made obsolete by the PCI bus.
144 
145           Say Y here if you are building a kernel for an EISA-based machine.
146 
147           Otherwise, say N.
148 
149 config SBUS
150         bool
151 
152 config STACKTRACE_SUPPORT
153         bool
154         default y
155 
156 config HAVE_LATENCYTOP_SUPPORT
157         bool
158         depends on !SMP
159         default y
160 
161 config LOCKDEP_SUPPORT
162         bool
163         default y
164 
165 config TRACE_IRQFLAGS_SUPPORT
166         bool
167         default y
168 
169 config RWSEM_XCHGADD_ALGORITHM
170         bool
171         default y
172 
173 config ARCH_HAS_ILOG2_U32
174         bool
175 
176 config ARCH_HAS_ILOG2_U64
177         bool
178 
179 config ARCH_HAS_BANDGAP
180         bool
181 
182 config GENERIC_HWEIGHT
183         bool
184         default y
185 
186 config GENERIC_CALIBRATE_DELAY
187         bool
188         default y
189 
190 config ARCH_MAY_HAVE_PC_FDC
191         bool
192 
193 config ZONE_DMA
194         bool
195 
196 config NEED_DMA_MAP_STATE
197        def_bool y
198 
199 config ARCH_SUPPORTS_UPROBES
200         def_bool y
201 
202 config ARCH_HAS_DMA_SET_COHERENT_MASK
203         bool
204 
205 config GENERIC_ISA_DMA
206         bool
207 
208 config FIQ
209         bool
210 
211 config NEED_RET_TO_USER
212         bool
213 
214 config ARCH_MTD_XIP
215         bool
216 
217 config VECTORS_BASE
218         hex
219         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
220         default DRAM_BASE if REMAP_VECTORS_TO_RAM
221         default 0x00000000
222         help
223           The base address of exception vectors.  This must be two pages
224           in size.
225 
226 config ARM_PATCH_PHYS_VIRT
227         bool "Patch physical to virtual translations at runtime" if EMBEDDED
228         default y
229         depends on !XIP_KERNEL && MMU
230         depends on !ARCH_REALVIEW || !SPARSEMEM
231         help
232           Patch phys-to-virt and virt-to-phys translation functions at
233           boot and module load time according to the position of the
234           kernel in system memory.
235 
236           This can only be used with non-XIP MMU kernels where the base
237           of physical memory is at a 16MB boundary.
238 
239           Only disable this option if you know that you do not require
240           this feature (eg, building a kernel for a single machine) and
241           you need to shrink the kernel to the minimal size.
242 
243 config NEED_MACH_GPIO_H
244         bool
245         help
246           Select this when mach/gpio.h is required to provide special
247           definitions for this platform. The need for mach/gpio.h should
248           be avoided when possible.
249 
250 config NEED_MACH_IO_H
251         bool
252         help
253           Select this when mach/io.h is required to provide special
254           definitions for this platform.  The need for mach/io.h should
255           be avoided when possible.
256 
257 config NEED_MACH_MEMORY_H
258         bool
259         help
260           Select this when mach/memory.h is required to provide special
261           definitions for this platform.  The need for mach/memory.h should
262           be avoided when possible.
263 
264 config PHYS_OFFSET
265         hex "Physical address of main memory" if MMU
266         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
267         default DRAM_BASE if !MMU
268         help
269           Please provide the physical address corresponding to the
270           location of main memory in your system.
271 
272 config GENERIC_BUG
273         def_bool y
274         depends on BUG
275 
276 source "init/Kconfig"
277 
278 source "kernel/Kconfig.freezer"
279 
280 menu "System Type"
281 
282 config MMU
283         bool "MMU-based Paged Memory Management Support"
284         default y
285         help
286           Select if you want MMU-based virtualised addressing space
287           support by paged memory management. If unsure, say 'Y'.
288 
289 #
290 # The "ARM system type" choice list is ordered alphabetically by option
291 # text.  Please add new entries in the option alphabetic order.
292 #
293 choice
294         prompt "ARM system type"
295         default ARCH_VERSATILE if !MMU
296         default ARCH_MULTIPLATFORM if MMU
297 
298 config ARCH_MULTIPLATFORM
299         bool "Allow multiple platforms to be selected"
300         depends on MMU
301         select ARCH_WANT_OPTIONAL_GPIOLIB
302         select ARM_HAS_SG_CHAIN
303         select ARM_PATCH_PHYS_VIRT
304         select AUTO_ZRELADDR
305         select CLKSRC_OF
306         select COMMON_CLK
307         select GENERIC_CLOCKEVENTS
308         select MIGHT_HAVE_PCI
309         select MULTI_IRQ_HANDLER
310         select SPARSE_IRQ
311         select USE_OF
312 
313 config ARCH_INTEGRATOR
314         bool "ARM Ltd. Integrator family"
315         select ARM_AMBA
316         select ARM_PATCH_PHYS_VIRT if MMU
317         select AUTO_ZRELADDR
318         select COMMON_CLK
319         select COMMON_CLK_VERSATILE
320         select GENERIC_CLOCKEVENTS
321         select HAVE_TCM
322         select ICST
323         select MULTI_IRQ_HANDLER
324         select NEED_MACH_MEMORY_H
325         select PLAT_VERSATILE
326         select SPARSE_IRQ
327         select USE_OF
328         select VERSATILE_FPGA_IRQ
329         help
330           Support for ARM's Integrator platform.
331 
332 config ARCH_REALVIEW
333         bool "ARM Ltd. RealView family"
334         select ARCH_WANT_OPTIONAL_GPIOLIB
335         select ARM_AMBA
336         select ARM_TIMER_SP804
337         select COMMON_CLK
338         select COMMON_CLK_VERSATILE
339         select GENERIC_CLOCKEVENTS
340         select GPIO_PL061 if GPIOLIB
341         select ICST
342         select NEED_MACH_MEMORY_H
343         select PLAT_VERSATILE
344         select PLAT_VERSATILE_CLCD
345         help
346           This enables support for ARM Ltd RealView boards.
347 
348 config ARCH_VERSATILE
349         bool "ARM Ltd. Versatile family"
350         select ARCH_WANT_OPTIONAL_GPIOLIB
351         select ARM_AMBA
352         select ARM_TIMER_SP804
353         select ARM_VIC
354         select CLKDEV_LOOKUP
355         select GENERIC_CLOCKEVENTS
356         select HAVE_MACH_CLKDEV
357         select ICST
358         select PLAT_VERSATILE
359         select PLAT_VERSATILE_CLCD
360         select PLAT_VERSATILE_CLOCK
361         select VERSATILE_FPGA_IRQ
362         help
363           This enables support for ARM Ltd Versatile board.
364 
365 config ARCH_AT91
366         bool "Atmel AT91"
367         select ARCH_REQUIRE_GPIOLIB
368         select CLKDEV_LOOKUP
369         select IRQ_DOMAIN
370         select NEED_MACH_IO_H if PCCARD
371         select PINCTRL
372         select PINCTRL_AT91 if USE_OF
373         help
374           This enables support for systems based on Atmel
375           AT91RM9200 and AT91SAM9* processors.
376 
377 config ARCH_CLPS711X
378         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
379         select ARCH_REQUIRE_GPIOLIB
380         select AUTO_ZRELADDR
381         select CLKSRC_MMIO
382         select COMMON_CLK
383         select CPU_ARM720T
384         select GENERIC_CLOCKEVENTS
385         select MFD_SYSCON
386         help
387           Support for Cirrus Logic 711x/721x/731x based boards.
388 
389 config ARCH_GEMINI
390         bool "Cortina Systems Gemini"
391         select ARCH_REQUIRE_GPIOLIB
392         select CLKSRC_MMIO
393         select CPU_FA526
394         select GENERIC_CLOCKEVENTS
395         help
396           Support for the Cortina Systems Gemini family SoCs
397 
398 config ARCH_EBSA110
399         bool "EBSA-110"
400         select ARCH_USES_GETTIMEOFFSET
401         select CPU_SA110
402         select ISA
403         select NEED_MACH_IO_H
404         select NEED_MACH_MEMORY_H
405         select NO_IOPORT_MAP
406         help
407           This is an evaluation board for the StrongARM processor available
408           from Digital. It has limited hardware on-board, including an
409           Ethernet interface, two PCMCIA sockets, two serial ports and a
410           parallel port.
411 
412 config ARCH_EFM32
413         bool "Energy Micro efm32"
414         depends on !MMU
415         select ARCH_REQUIRE_GPIOLIB
416         select ARM_NVIC
417         select AUTO_ZRELADDR
418         select CLKSRC_OF
419         select COMMON_CLK
420         select CPU_V7M
421         select GENERIC_CLOCKEVENTS
422         select NO_DMA
423         select NO_IOPORT_MAP
424         select SPARSE_IRQ
425         select USE_OF
426         help
427           Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
428           processors.
429 
430 config ARCH_EP93XX
431         bool "EP93xx-based"
432         select ARCH_HAS_HOLES_MEMORYMODEL
433         select ARCH_REQUIRE_GPIOLIB
434         select ARCH_USES_GETTIMEOFFSET
435         select ARM_AMBA
436         select ARM_VIC
437         select CLKDEV_LOOKUP
438         select CPU_ARM920T
439         select NEED_MACH_MEMORY_H
440         help
441           This enables support for the Cirrus EP93xx series of CPUs.
442 
443 config ARCH_FOOTBRIDGE
444         bool "FootBridge"
445         select CPU_SA110
446         select FOOTBRIDGE
447         select GENERIC_CLOCKEVENTS
448         select HAVE_IDE
449         select NEED_MACH_IO_H if !MMU
450         select NEED_MACH_MEMORY_H
451         help
452           Support for systems based on the DC21285 companion chip
453           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
454 
455 config ARCH_NETX
456         bool "Hilscher NetX based"
457         select ARM_VIC
458         select CLKSRC_MMIO
459         select CPU_ARM926T
460         select GENERIC_CLOCKEVENTS
461         help
462           This enables support for systems based on the Hilscher NetX Soc
463 
464 config ARCH_IOP13XX
465         bool "IOP13xx-based"
466         depends on MMU
467         select CPU_XSC3
468         select NEED_MACH_MEMORY_H
469         select NEED_RET_TO_USER
470         select PCI
471         select PLAT_IOP
472         select VMSPLIT_1G
473         select SPARSE_IRQ
474         help
475           Support for Intel's IOP13XX (XScale) family of processors.
476 
477 config ARCH_IOP32X
478         bool "IOP32x-based"
479         depends on MMU
480         select ARCH_REQUIRE_GPIOLIB
481         select CPU_XSCALE
482         select GPIO_IOP
483         select NEED_RET_TO_USER
484         select PCI
485         select PLAT_IOP
486         help
487           Support for Intel's 80219 and IOP32X (XScale) family of
488           processors.
489 
490 config ARCH_IOP33X
491         bool "IOP33x-based"
492         depends on MMU
493         select ARCH_REQUIRE_GPIOLIB
494         select CPU_XSCALE
495         select GPIO_IOP
496         select NEED_RET_TO_USER
497         select PCI
498         select PLAT_IOP
499         help
500           Support for Intel's IOP33X (XScale) family of processors.
501 
502 config ARCH_IXP4XX
503         bool "IXP4xx-based"
504         depends on MMU
505         select ARCH_HAS_DMA_SET_COHERENT_MASK
506         select ARCH_REQUIRE_GPIOLIB
507         select ARCH_SUPPORTS_BIG_ENDIAN
508         select CLKSRC_MMIO
509         select CPU_XSCALE
510         select DMABOUNCE if PCI
511         select GENERIC_CLOCKEVENTS
512         select MIGHT_HAVE_PCI
513         select NEED_MACH_IO_H
514         select USB_EHCI_BIG_ENDIAN_DESC
515         select USB_EHCI_BIG_ENDIAN_MMIO
516         help
517           Support for Intel's IXP4XX (XScale) family of processors.
518 
519 config ARCH_DOVE
520         bool "Marvell Dove"
521         select ARCH_REQUIRE_GPIOLIB
522         select CPU_PJ4
523         select GENERIC_CLOCKEVENTS
524         select MIGHT_HAVE_PCI
525         select MVEBU_MBUS
526         select PINCTRL
527         select PINCTRL_DOVE
528         select PLAT_ORION_LEGACY
529         help
530           Support for the Marvell Dove SoC 88AP510
531 
532 config ARCH_KIRKWOOD
533         bool "Marvell Kirkwood"
534         select ARCH_REQUIRE_GPIOLIB
535         select CPU_FEROCEON
536         select GENERIC_CLOCKEVENTS
537         select MVEBU_MBUS
538         select PCI
539         select PCI_QUIRKS
540         select PINCTRL
541         select PINCTRL_KIRKWOOD
542         select PLAT_ORION_LEGACY
543         help
544           Support for the following Marvell Kirkwood series SoCs:
545           88F6180, 88F6192 and 88F6281.
546 
547 config ARCH_MV78XX0
548         bool "Marvell MV78xx0"
549         select ARCH_REQUIRE_GPIOLIB
550         select CPU_FEROCEON
551         select GENERIC_CLOCKEVENTS
552         select MVEBU_MBUS
553         select PCI
554         select PLAT_ORION_LEGACY
555         help
556           Support for the following Marvell MV78xx0 series SoCs:
557           MV781x0, MV782x0.
558 
559 config ARCH_ORION5X
560         bool "Marvell Orion"
561         depends on MMU
562         select ARCH_REQUIRE_GPIOLIB
563         select CPU_FEROCEON
564         select GENERIC_CLOCKEVENTS
565         select MVEBU_MBUS
566         select PCI
567         select PLAT_ORION_LEGACY
568         help
569           Support for the following Marvell Orion 5x series SoCs:
570           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
571           Orion-2 (5281), Orion-1-90 (6183).
572 
573 config ARCH_MMP
574         bool "Marvell PXA168/910/MMP2"
575         depends on MMU
576         select ARCH_REQUIRE_GPIOLIB
577         select CLKDEV_LOOKUP
578         select GENERIC_ALLOCATOR
579         select GENERIC_CLOCKEVENTS
580         select GPIO_PXA
581         select IRQ_DOMAIN
582         select MULTI_IRQ_HANDLER
583         select PINCTRL
584         select PLAT_PXA
585         select SPARSE_IRQ
586         help
587           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
588 
589 config ARCH_KS8695
590         bool "Micrel/Kendin KS8695"
591         select ARCH_REQUIRE_GPIOLIB
592         select CLKSRC_MMIO
593         select CPU_ARM922T
594         select GENERIC_CLOCKEVENTS
595         select NEED_MACH_MEMORY_H
596         help
597           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
598           System-on-Chip devices.
599 
600 config ARCH_W90X900
601         bool "Nuvoton W90X900 CPU"
602         select ARCH_REQUIRE_GPIOLIB
603         select CLKDEV_LOOKUP
604         select CLKSRC_MMIO
605         select CPU_ARM926T
606         select GENERIC_CLOCKEVENTS
607         help
608           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
609           At present, the w90x900 has been renamed nuc900, regarding
610           the ARM series product line, you can login the following
611           link address to know more.
612 
613           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
614                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
615 
616 config ARCH_LPC32XX
617         bool "NXP LPC32XX"
618         select ARCH_REQUIRE_GPIOLIB
619         select ARM_AMBA
620         select CLKDEV_LOOKUP
621         select CLKSRC_MMIO
622         select CPU_ARM926T
623         select GENERIC_CLOCKEVENTS
624         select HAVE_IDE
625         select USE_OF
626         help
627           Support for the NXP LPC32XX family of processors
628 
629 config ARCH_PXA
630         bool "PXA2xx/PXA3xx-based"
631         depends on MMU
632         select ARCH_MTD_XIP
633         select ARCH_REQUIRE_GPIOLIB
634         select ARM_CPU_SUSPEND if PM
635         select AUTO_ZRELADDR
636         select CLKDEV_LOOKUP
637         select CLKSRC_MMIO
638         select GENERIC_CLOCKEVENTS
639         select GPIO_PXA
640         select HAVE_IDE
641         select MULTI_IRQ_HANDLER
642         select PLAT_PXA
643         select SPARSE_IRQ
644         help
645           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
646 
647 config ARCH_MSM
648         bool "Qualcomm MSM (non-multiplatform)"
649         select ARCH_REQUIRE_GPIOLIB
650         select COMMON_CLK
651         select GENERIC_CLOCKEVENTS
652         help
653           Support for Qualcomm MSM/QSD based systems.  This runs on the
654           apps processor of the MSM/QSD and depends on a shared memory
655           interface to the modem processor which runs the baseband
656           stack and controls some vital subsystems
657           (clock and power control, etc).
658 
659 config ARCH_SHMOBILE_LEGACY
660         bool "Renesas ARM SoCs (non-multiplatform)"
661         select ARCH_SHMOBILE
662         select ARM_PATCH_PHYS_VIRT if MMU
663         select CLKDEV_LOOKUP
664         select GENERIC_CLOCKEVENTS
665         select HAVE_ARM_SCU if SMP
666         select HAVE_ARM_TWD if SMP
667         select HAVE_MACH_CLKDEV
668         select HAVE_SMP
669         select MIGHT_HAVE_CACHE_L2X0
670         select MULTI_IRQ_HANDLER
671         select NO_IOPORT_MAP
672         select PINCTRL
673         select PM_GENERIC_DOMAINS if PM
674         select SPARSE_IRQ
675         help
676           Support for Renesas ARM SoC platforms using a non-multiplatform
677           kernel. This includes the SH-Mobile, R-Mobile, EMMA-Mobile, R-Car
678           and RZ families.
679 
680 config ARCH_RPC
681         bool "RiscPC"
682         select ARCH_ACORN
683         select ARCH_MAY_HAVE_PC_FDC
684         select ARCH_SPARSEMEM_ENABLE
685         select ARCH_USES_GETTIMEOFFSET
686         select CPU_SA110
687         select FIQ
688         select HAVE_IDE
689         select HAVE_PATA_PLATFORM
690         select ISA_DMA_API
691         select NEED_MACH_IO_H
692         select NEED_MACH_MEMORY_H
693         select NO_IOPORT_MAP
694         select VIRT_TO_BUS
695         help
696           On the Acorn Risc-PC, Linux can support the internal IDE disk and
697           CD-ROM interface, serial and parallel port, and the floppy drive.
698 
699 config ARCH_SA1100
700         bool "SA1100-based"
701         select ARCH_MTD_XIP
702         select ARCH_REQUIRE_GPIOLIB
703         select ARCH_SPARSEMEM_ENABLE
704         select CLKDEV_LOOKUP
705         select CLKSRC_MMIO
706         select CPU_FREQ
707         select CPU_SA1100
708         select GENERIC_CLOCKEVENTS
709         select HAVE_IDE
710         select ISA
711         select NEED_MACH_MEMORY_H
712         select SPARSE_IRQ
713         help
714           Support for StrongARM 11x0 based boards.
715 
716 config ARCH_S3C24XX
717         bool "Samsung S3C24XX SoCs"
718         select ARCH_REQUIRE_GPIOLIB
719         select ATAGS
720         select CLKDEV_LOOKUP
721         select CLKSRC_SAMSUNG_PWM
722         select GENERIC_CLOCKEVENTS
723         select GPIO_SAMSUNG
724         select HAVE_S3C2410_I2C if I2C
725         select HAVE_S3C2410_WATCHDOG if WATCHDOG
726         select HAVE_S3C_RTC if RTC_CLASS
727         select MULTI_IRQ_HANDLER
728         select NEED_MACH_IO_H
729         select SAMSUNG_ATAGS
730         help
731           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
732           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
733           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
734           Samsung SMDK2410 development board (and derivatives).
735 
736 config ARCH_S3C64XX
737         bool "Samsung S3C64XX"
738         select ARCH_REQUIRE_GPIOLIB
739         select ARM_AMBA
740         select ARM_VIC
741         select ATAGS
742         select CLKDEV_LOOKUP
743         select CLKSRC_SAMSUNG_PWM
744         select COMMON_CLK_SAMSUNG
745         select CPU_V6K
746         select GENERIC_CLOCKEVENTS
747         select GPIO_SAMSUNG
748         select HAVE_S3C2410_I2C if I2C
749         select HAVE_S3C2410_WATCHDOG if WATCHDOG
750         select HAVE_TCM
751         select NO_IOPORT_MAP
752         select PLAT_SAMSUNG
753         select PM_GENERIC_DOMAINS if PM
754         select S3C_DEV_NAND
755         select S3C_GPIO_TRACK
756         select SAMSUNG_ATAGS
757         select SAMSUNG_WAKEMASK
758         select SAMSUNG_WDT_RESET
759         help
760           Samsung S3C64XX series based systems
761 
762 config ARCH_S5P64X0
763         bool "Samsung S5P6440 S5P6450"
764         select ATAGS
765         select CLKDEV_LOOKUP
766         select CLKSRC_SAMSUNG_PWM
767         select CPU_V6
768         select GENERIC_CLOCKEVENTS
769         select GPIO_SAMSUNG
770         select HAVE_S3C2410_I2C if I2C
771         select HAVE_S3C2410_WATCHDOG if WATCHDOG
772         select HAVE_S3C_RTC if RTC_CLASS
773         select NEED_MACH_GPIO_H
774         select SAMSUNG_ATAGS
775         select SAMSUNG_WDT_RESET
776         help
777           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
778           SMDK6450.
779 
780 config ARCH_S5PC100
781         bool "Samsung S5PC100"
782         select ARCH_REQUIRE_GPIOLIB
783         select ATAGS
784         select CLKDEV_LOOKUP
785         select CLKSRC_SAMSUNG_PWM
786         select CPU_V7
787         select GENERIC_CLOCKEVENTS
788         select GPIO_SAMSUNG
789         select HAVE_S3C2410_I2C if I2C
790         select HAVE_S3C2410_WATCHDOG if WATCHDOG
791         select HAVE_S3C_RTC if RTC_CLASS
792         select NEED_MACH_GPIO_H
793         select SAMSUNG_ATAGS
794         select SAMSUNG_WDT_RESET
795         help
796           Samsung S5PC100 series based systems
797 
798 config ARCH_S5PV210
799         bool "Samsung S5PV210/S5PC110"
800         select ARCH_HAS_HOLES_MEMORYMODEL
801         select ARCH_SPARSEMEM_ENABLE
802         select ATAGS
803         select CLKDEV_LOOKUP
804         select CLKSRC_SAMSUNG_PWM
805         select CPU_V7
806         select GENERIC_CLOCKEVENTS
807         select GPIO_SAMSUNG
808         select HAVE_S3C2410_I2C if I2C
809         select HAVE_S3C2410_WATCHDOG if WATCHDOG
810         select HAVE_S3C_RTC if RTC_CLASS
811         select NEED_MACH_GPIO_H
812         select NEED_MACH_MEMORY_H
813         select SAMSUNG_ATAGS
814         help
815           Samsung S5PV210/S5PC110 series based systems
816 
817 config ARCH_DAVINCI
818         bool "TI DaVinci"
819         select ARCH_HAS_HOLES_MEMORYMODEL
820         select ARCH_REQUIRE_GPIOLIB
821         select CLKDEV_LOOKUP
822         select GENERIC_ALLOCATOR
823         select GENERIC_CLOCKEVENTS
824         select GENERIC_IRQ_CHIP
825         select HAVE_IDE
826         select TI_PRIV_EDMA
827         select USE_OF
828         select ZONE_DMA
829         help
830           Support for TI's DaVinci platform.
831 
832 config ARCH_OMAP1
833         bool "TI OMAP1"
834         depends on MMU
835         select ARCH_HAS_HOLES_MEMORYMODEL
836         select ARCH_OMAP
837         select ARCH_REQUIRE_GPIOLIB
838         select CLKDEV_LOOKUP
839         select CLKSRC_MMIO
840         select GENERIC_CLOCKEVENTS
841         select GENERIC_IRQ_CHIP
842         select HAVE_IDE
843         select IRQ_DOMAIN
844         select NEED_MACH_IO_H if PCCARD
845         select NEED_MACH_MEMORY_H
846         help
847           Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
848 
849 endchoice
850 
851 menu "Multiple platform selection"
852         depends on ARCH_MULTIPLATFORM
853 
854 comment "CPU Core family selection"
855 
856 config ARCH_MULTI_V4
857         bool "ARMv4 based platforms (FA526)"
858         depends on !ARCH_MULTI_V6_V7
859         select ARCH_MULTI_V4_V5
860         select CPU_FA526
861 
862 config ARCH_MULTI_V4T
863         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
864         depends on !ARCH_MULTI_V6_V7
865         select ARCH_MULTI_V4_V5
866         select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \
867                 CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \
868                 CPU_ARM925T || CPU_ARM940T)
869 
870 config ARCH_MULTI_V5
871         bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
872         depends on !ARCH_MULTI_V6_V7
873         select ARCH_MULTI_V4_V5
874         select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
875                 CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
876                 CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
877 
878 config ARCH_MULTI_V4_V5
879         bool
880 
881 config ARCH_MULTI_V6
882         bool "ARMv6 based platforms (ARM11)"
883         select ARCH_MULTI_V6_V7
884         select CPU_V6K
885 
886 config ARCH_MULTI_V7
887         bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
888         default y
889         select ARCH_MULTI_V6_V7
890         select CPU_V7
891         select HAVE_SMP
892 
893 config ARCH_MULTI_V6_V7
894         bool
895         select MIGHT_HAVE_CACHE_L2X0
896 
897 config ARCH_MULTI_CPU_AUTO
898         def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
899         select ARCH_MULTI_V5
900 
901 endmenu
902 
903 config ARCH_VIRT
904         bool "Dummy Virtual Machine" if ARCH_MULTI_V7
905         select ARM_AMBA
906         select ARM_GIC
907         select ARM_PSCI
908         select HAVE_ARM_ARCH_TIMER
909 
910 #
911 # This is sorted alphabetically by mach-* pathname.  However, plat-*
912 # Kconfigs may be included either alphabetically (according to the
913 # plat- suffix) or along side the corresponding mach-* source.
914 #
915 source "arch/arm/mach-mvebu/Kconfig"
916 
917 source "arch/arm/mach-at91/Kconfig"
918 
919 source "arch/arm/mach-axxia/Kconfig"
920 
921 source "arch/arm/mach-bcm/Kconfig"
922 
923 source "arch/arm/mach-berlin/Kconfig"
924 
925 source "arch/arm/mach-clps711x/Kconfig"
926 
927 source "arch/arm/mach-cns3xxx/Kconfig"
928 
929 source "arch/arm/mach-davinci/Kconfig"
930 
931 source "arch/arm/mach-dove/Kconfig"
932 
933 source "arch/arm/mach-ep93xx/Kconfig"
934 
935 source "arch/arm/mach-footbridge/Kconfig"
936 
937 source "arch/arm/mach-gemini/Kconfig"
938 
939 source "arch/arm/mach-highbank/Kconfig"
940 
941 source "arch/arm/mach-hisi/Kconfig"
942 
943 source "arch/arm/mach-integrator/Kconfig"
944 
945 source "arch/arm/mach-iop32x/Kconfig"
946 
947 source "arch/arm/mach-iop33x/Kconfig"
948 
949 source "arch/arm/mach-iop13xx/Kconfig"
950 
951 source "arch/arm/mach-ixp4xx/Kconfig"
952 
953 source "arch/arm/mach-keystone/Kconfig"
954 
955 source "arch/arm/mach-kirkwood/Kconfig"
956 
957 source "arch/arm/mach-ks8695/Kconfig"
958 
959 source "arch/arm/mach-msm/Kconfig"
960 
961 source "arch/arm/mach-moxart/Kconfig"
962 
963 source "arch/arm/mach-mv78xx0/Kconfig"
964 
965 source "arch/arm/mach-imx/Kconfig"
966 
967 source "arch/arm/mach-mxs/Kconfig"
968 
969 source "arch/arm/mach-netx/Kconfig"
970 
971 source "arch/arm/mach-nomadik/Kconfig"
972 
973 source "arch/arm/mach-nspire/Kconfig"
974 
975 source "arch/arm/plat-omap/Kconfig"
976 
977 source "arch/arm/mach-omap1/Kconfig"
978 
979 source "arch/arm/mach-omap2/Kconfig"
980 
981 source "arch/arm/mach-orion5x/Kconfig"
982 
983 source "arch/arm/mach-picoxcell/Kconfig"
984 
985 source "arch/arm/mach-pxa/Kconfig"
986 source "arch/arm/plat-pxa/Kconfig"
987 
988 source "arch/arm/mach-mmp/Kconfig"
989 
990 source "arch/arm/mach-qcom/Kconfig"
991 
992 source "arch/arm/mach-realview/Kconfig"
993 
994 source "arch/arm/mach-rockchip/Kconfig"
995 
996 source "arch/arm/mach-sa1100/Kconfig"
997 
998 source "arch/arm/mach-socfpga/Kconfig"
999 
1000 source "arch/arm/mach-spear/Kconfig"
1001 
1002 source "arch/arm/mach-sti/Kconfig"
1003 
1004 source "arch/arm/mach-s3c24xx/Kconfig"
1005 
1006 source "arch/arm/mach-s3c64xx/Kconfig"
1007 
1008 source "arch/arm/mach-s5p64x0/Kconfig"
1009 
1010 source "arch/arm/mach-s5pc100/Kconfig"
1011 
1012 source "arch/arm/mach-s5pv210/Kconfig"
1013 
1014 source "arch/arm/mach-exynos/Kconfig"
1015 source "arch/arm/plat-samsung/Kconfig"
1016 
1017 source "arch/arm/mach-shmobile/Kconfig"
1018 
1019 source "arch/arm/mach-sunxi/Kconfig"
1020 
1021 source "arch/arm/mach-prima2/Kconfig"
1022 
1023 source "arch/arm/mach-tegra/Kconfig"
1024 
1025 source "arch/arm/mach-u300/Kconfig"
1026 
1027 source "arch/arm/mach-ux500/Kconfig"
1028 
1029 source "arch/arm/mach-versatile/Kconfig"
1030 
1031 source "arch/arm/mach-vexpress/Kconfig"
1032 source "arch/arm/plat-versatile/Kconfig"
1033 
1034 source "arch/arm/mach-vt8500/Kconfig"
1035 
1036 source "arch/arm/mach-w90x900/Kconfig"
1037 
1038 source "arch/arm/mach-zynq/Kconfig"
1039 
1040 # Definitions to make life easier
1041 config ARCH_ACORN
1042         bool
1043 
1044 config PLAT_IOP
1045         bool
1046         select GENERIC_CLOCKEVENTS
1047 
1048 config PLAT_ORION
1049         bool
1050         select CLKSRC_MMIO
1051         select COMMON_CLK
1052         select GENERIC_IRQ_CHIP
1053         select IRQ_DOMAIN
1054 
1055 config PLAT_ORION_LEGACY
1056         bool
1057         select PLAT_ORION
1058 
1059 config PLAT_PXA
1060         bool
1061 
1062 config PLAT_VERSATILE
1063         bool
1064 
1065 config ARM_TIMER_SP804
1066         bool
1067         select CLKSRC_MMIO
1068         select CLKSRC_OF if OF
1069 
1070 source "arch/arm/firmware/Kconfig"
1071 
1072 source arch/arm/mm/Kconfig
1073 
1074 config IWMMXT
1075         bool "Enable iWMMXt support"
1076         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
1077         default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
1078         help
1079           Enable support for iWMMXt context switching at run time if
1080           running on a CPU that supports it.
1081 
1082 config MULTI_IRQ_HANDLER
1083         bool
1084         help
1085           Allow each machine to specify it's own IRQ handler at run time.
1086 
1087 if !MMU
1088 source "arch/arm/Kconfig-nommu"
1089 endif
1090 
1091 config PJ4B_ERRATA_4742
1092         bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
1093         depends on CPU_PJ4B && MACH_ARMADA_370
1094         default y
1095         help
1096           When coming out of either a Wait for Interrupt (WFI) or a Wait for
1097           Event (WFE) IDLE states, a specific timing sensitivity exists between
1098           the retiring WFI/WFE instructions and the newly issued subsequent
1099           instructions.  This sensitivity can result in a CPU hang scenario.
1100           Workaround:
1101           The software must insert either a Data Synchronization Barrier (DSB)
1102           or Data Memory Barrier (DMB) command immediately after the WFI/WFE
1103           instruction
1104 
1105 config ARM_ERRATA_326103
1106         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1107         depends on CPU_V6
1108         help
1109           Executing a SWP instruction to read-only memory does not set bit 11
1110           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1111           treat the access as a read, preventing a COW from occurring and
1112           causing the faulting task to livelock.
1113 
1114 config ARM_ERRATA_411920
1115         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1116         depends on CPU_V6 || CPU_V6K
1117         help
1118           Invalidation of the Instruction Cache operation can
1119           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1120           It does not affect the MPCore. This option enables the ARM Ltd.
1121           recommended workaround.
1122 
1123 config ARM_ERRATA_430973
1124         bool "ARM errata: Stale prediction on replaced interworking branch"
1125         depends on CPU_V7
1126         help
1127           This option enables the workaround for the 430973 Cortex-A8
1128           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1129           interworking branch is replaced with another code sequence at the
1130           same virtual address, whether due to self-modifying code or virtual
1131           to physical address re-mapping, Cortex-A8 does not recover from the
1132           stale interworking branch prediction. This results in Cortex-A8
1133           executing the new code sequence in the incorrect ARM or Thumb state.
1134           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1135           and also flushes the branch target cache at every context switch.
1136           Note that setting specific bits in the ACTLR register may not be
1137           available in non-secure mode.
1138 
1139 config ARM_ERRATA_458693
1140         bool "ARM errata: Processor deadlock when a false hazard is created"
1141         depends on CPU_V7
1142         depends on !ARCH_MULTIPLATFORM
1143         help
1144           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1145           erratum. For very specific sequences of memory operations, it is
1146           possible for a hazard condition intended for a cache line to instead
1147           be incorrectly associated with a different cache line. This false
1148           hazard might then cause a processor deadlock. The workaround enables
1149           the L1 caching of the NEON accesses and disables the PLD instruction
1150           in the ACTLR register. Note that setting specific bits in the ACTLR
1151           register may not be available in non-secure mode.
1152 
1153 config ARM_ERRATA_460075
1154         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1155         depends on CPU_V7
1156         depends on !ARCH_MULTIPLATFORM
1157         help
1158           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1159           erratum. Any asynchronous access to the L2 cache may encounter a
1160           situation in which recent store transactions to the L2 cache are lost
1161           and overwritten with stale memory contents from external memory. The
1162           workaround disables the write-allocate mode for the L2 cache via the
1163           ACTLR register. Note that setting specific bits in the ACTLR register
1164           may not be available in non-secure mode.
1165 
1166 config ARM_ERRATA_742230
1167         bool "ARM errata: DMB operation may be faulty"
1168         depends on CPU_V7 && SMP
1169         depends on !ARCH_MULTIPLATFORM
1170         help
1171           This option enables the workaround for the 742230 Cortex-A9
1172           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1173           between two write operations may not ensure the correct visibility
1174           ordering of the two writes. This workaround sets a specific bit in
1175           the diagnostic register of the Cortex-A9 which causes the DMB
1176           instruction to behave as a DSB, ensuring the correct behaviour of
1177           the two writes.
1178 
1179 config ARM_ERRATA_742231
1180         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1181         depends on CPU_V7 && SMP
1182         depends on !ARCH_MULTIPLATFORM
1183         help
1184           This option enables the workaround for the 742231 Cortex-A9
1185           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1186           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1187           accessing some data located in the same cache line, may get corrupted
1188           data due to bad handling of the address hazard when the line gets
1189           replaced from one of the CPUs at the same time as another CPU is
1190           accessing it. This workaround sets specific bits in the diagnostic
1191           register of the Cortex-A9 which reduces the linefill issuing
1192           capabilities of the processor.
1193 
1194 config ARM_ERRATA_643719
1195         bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
1196         depends on CPU_V7 && SMP
1197         help
1198           This option enables the workaround for the 643719 Cortex-A9 (prior to
1199           r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
1200           register returns zero when it should return one. The workaround
1201           corrects this value, ensuring cache maintenance operations which use
1202           it behave as intended and avoiding data corruption.
1203 
1204 config ARM_ERRATA_720789
1205         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1206         depends on CPU_V7
1207         help
1208           This option enables the workaround for the 720789 Cortex-A9 (prior to
1209           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1210           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1211           As a consequence of this erratum, some TLB entries which should be
1212           invalidated are not, resulting in an incoherency in the system page
1213           tables. The workaround changes the TLB flushing routines to invalidate
1214           entries regardless of the ASID.
1215 
1216 config ARM_ERRATA_743622
1217         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1218         depends on CPU_V7
1219         depends on !ARCH_MULTIPLATFORM
1220         help
1221           This option enables the workaround for the 743622 Cortex-A9
1222           (r2p*) erratum. Under very rare conditions, a faulty
1223           optimisation in the Cortex-A9 Store Buffer may lead to data
1224           corruption. This workaround sets a specific bit in the diagnostic
1225           register of the Cortex-A9 which disables the Store Buffer
1226           optimisation, preventing the defect from occurring. This has no
1227           visible impact on the overall performance or power consumption of the
1228           processor.
1229 
1230 config ARM_ERRATA_751472
1231         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1232         depends on CPU_V7
1233         depends on !ARCH_MULTIPLATFORM
1234         help
1235           This option enables the workaround for the 751472 Cortex-A9 (prior
1236           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1237           completion of a following broadcasted operation if the second
1238           operation is received by a CPU before the ICIALLUIS has completed,
1239           potentially leading to corrupted entries in the cache or TLB.
1240 
1241 config ARM_ERRATA_754322
1242         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1243         depends on CPU_V7
1244         help
1245           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1246           r3p*) erratum. A speculative memory access may cause a page table walk
1247           which starts prior to an ASID switch but completes afterwards. This
1248           can populate the micro-TLB with a stale entry which may be hit with
1249           the new ASID. This workaround places two dsb instructions in the mm
1250           switching code so that no page table walks can cross the ASID switch.
1251 
1252 config ARM_ERRATA_754327
1253         bool "ARM errata: no automatic Store Buffer drain"
1254         depends on CPU_V7 && SMP
1255         help
1256           This option enables the workaround for the 754327 Cortex-A9 (prior to
1257           r2p0) erratum. The Store Buffer does not have any automatic draining
1258           mechanism and therefore a livelock may occur if an external agent
1259           continuously polls a memory location waiting to observe an update.
1260           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1261           written polling loops from denying visibility of updates to memory.
1262 
1263 config ARM_ERRATA_364296
1264         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1265         depends on CPU_V6
1266         help
1267           This options enables the workaround for the 364296 ARM1136
1268           r0p2 erratum (possible cache data corruption with
1269           hit-under-miss enabled). It sets the undocumented bit 31 in
1270           the auxiliary control register and the FI bit in the control
1271           register, thus disabling hit-under-miss without putting the
1272           processor into full low interrupt latency mode. ARM11MPCore
1273           is not affected.
1274 
1275 config ARM_ERRATA_764369
1276         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1277         depends on CPU_V7 && SMP
1278         help
1279           This option enables the workaround for erratum 764369
1280           affecting Cortex-A9 MPCore with two or more processors (all
1281           current revisions). Under certain timing circumstances, a data
1282           cache line maintenance operation by MVA targeting an Inner
1283           Shareable memory region may fail to proceed up to either the
1284           Point of Coherency or to the Point of Unification of the
1285           system. This workaround adds a DSB instruction before the
1286           relevant cache maintenance functions and sets a specific bit
1287           in the diagnostic control register of the SCU.
1288 
1289 config ARM_ERRATA_775420
1290        bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1291        depends on CPU_V7
1292        help
1293          This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1294          r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1295          operation aborts with MMU exception, it might cause the processor
1296          to deadlock. This workaround puts DSB before executing ISB if
1297          an abort may occur on cache maintenance.
1298 
1299 config ARM_ERRATA_798181
1300         bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1301         depends on CPU_V7 && SMP
1302         help
1303           On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1304           adequately shooting down all use of the old entries. This
1305           option enables the Linux kernel workaround for this erratum
1306           which sends an IPI to the CPUs that are running the same ASID
1307           as the one being invalidated.
1308 
1309 config ARM_ERRATA_773022
1310         bool "ARM errata: incorrect instructions may be executed from loop buffer"
1311         depends on CPU_V7
1312         help
1313           This option enables the workaround for the 773022 Cortex-A15
1314           (up to r0p4) erratum. In certain rare sequences of code, the
1315           loop buffer may deliver incorrect instructions. This
1316           workaround disables the loop buffer to avoid the erratum.
1317 
1318 endmenu
1319 
1320 source "arch/arm/common/Kconfig"
1321 
1322 menu "Bus support"
1323 
1324 config ARM_AMBA
1325         bool
1326 
1327 config ISA
1328         bool
1329         help
1330           Find out whether you have ISA slots on your motherboard.  ISA is the
1331           name of a bus system, i.e. the way the CPU talks to the other stuff
1332           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1333           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1334           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1335 
1336 # Select ISA DMA controller support
1337 config ISA_DMA
1338         bool
1339         select ISA_DMA_API
1340 
1341 # Select ISA DMA interface
1342 config ISA_DMA_API
1343         bool
1344 
1345 config PCI
1346         bool "PCI support" if MIGHT_HAVE_PCI
1347         help
1348           Find out whether you have a PCI motherboard. PCI is the name of a
1349           bus system, i.e. the way the CPU talks to the other stuff inside
1350           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1351           VESA. If you have PCI, say Y, otherwise N.
1352 
1353 config PCI_DOMAINS
1354         bool
1355         depends on PCI
1356 
1357 config PCI_NANOENGINE
1358         bool "BSE nanoEngine PCI support"
1359         depends on SA1100_NANOENGINE
1360         help
1361           Enable PCI on the BSE nanoEngine board.
1362 
1363 config PCI_SYSCALL
1364         def_bool PCI
1365 
1366 config PCI_HOST_ITE8152
1367         bool
1368         depends on PCI && MACH_ARMCORE
1369         default y
1370         select DMABOUNCE
1371 
1372 source "drivers/pci/Kconfig"
1373 source "drivers/pci/pcie/Kconfig"
1374 
1375 source "drivers/pcmcia/Kconfig"
1376 
1377 endmenu
1378 
1379 menu "Kernel Features"
1380 
1381 config HAVE_SMP
1382         bool
1383         help
1384           This option should be selected by machines which have an SMP-
1385           capable CPU.
1386 
1387           The only effect of this option is to make the SMP-related
1388           options available to the user for configuration.
1389 
1390 config SMP
1391         bool "Symmetric Multi-Processing"
1392         depends on CPU_V6K || CPU_V7
1393         depends on GENERIC_CLOCKEVENTS
1394         depends on HAVE_SMP
1395         depends on MMU || ARM_MPU
1396         help
1397           This enables support for systems with more than one CPU. If you have
1398           a system with only one CPU, say N. If you have a system with more
1399           than one CPU, say Y.
1400 
1401           If you say N here, the kernel will run on uni- and multiprocessor
1402           machines, but will use only one CPU of a multiprocessor machine. If
1403           you say Y here, the kernel will run on many, but not all,
1404           uniprocessor machines. On a uniprocessor machine, the kernel
1405           will run faster if you say N here.
1406 
1407           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1408           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1409           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1410 
1411           If you don't know what to do here, say N.
1412 
1413 config SMP_ON_UP
1414         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1415         depends on SMP && !XIP_KERNEL && MMU
1416         default y
1417         help
1418           SMP kernels contain instructions which fail on non-SMP processors.
1419           Enabling this option allows the kernel to modify itself to make
1420           these instructions safe.  Disabling it allows about 1K of space
1421           savings.
1422 
1423           If you don't know what to do here, say Y.
1424 
1425 config ARM_CPU_TOPOLOGY
1426         bool "Support cpu topology definition"
1427         depends on SMP && CPU_V7
1428         default y
1429         help
1430           Support ARM cpu topology definition. The MPIDR register defines
1431           affinity between processors which is then used to describe the cpu
1432           topology of an ARM System.
1433 
1434 config SCHED_MC
1435         bool "Multi-core scheduler support"
1436         depends on ARM_CPU_TOPOLOGY
1437         help
1438           Multi-core scheduler support improves the CPU scheduler's decision
1439           making when dealing with multi-core CPU chips at a cost of slightly
1440           increased overhead in some places. If unsure say N here.
1441 
1442 config SCHED_SMT
1443         bool "SMT scheduler support"
1444         depends on ARM_CPU_TOPOLOGY
1445         help
1446           Improves the CPU scheduler's decision making when dealing with
1447           MultiThreading at a cost of slightly increased overhead in some
1448           places. If unsure say N here.
1449 
1450 config HAVE_ARM_SCU
1451         bool
1452         help
1453           This option enables support for the ARM system coherency unit
1454 
1455 config HAVE_ARM_ARCH_TIMER
1456         bool "Architected timer support"
1457         depends on CPU_V7
1458         select ARM_ARCH_TIMER
1459         select GENERIC_CLOCKEVENTS
1460         help
1461           This option enables support for the ARM architected timer
1462 
1463 config HAVE_ARM_TWD
1464         bool
1465         depends on SMP
1466         select CLKSRC_OF if OF
1467         help
1468           This options enables support for the ARM timer and watchdog unit
1469 
1470 config MCPM
1471         bool "Multi-Cluster Power Management"
1472         depends on CPU_V7 && SMP
1473         help
1474           This option provides the common power management infrastructure
1475           for (multi-)cluster based systems, such as big.LITTLE based
1476           systems.
1477 
1478 config BIG_LITTLE
1479         bool "big.LITTLE support (Experimental)"
1480         depends on CPU_V7 && SMP
1481         select MCPM
1482         help
1483           This option enables support selections for the big.LITTLE
1484           system architecture.
1485 
1486 config BL_SWITCHER
1487         bool "big.LITTLE switcher support"
1488         depends on BIG_LITTLE && MCPM && HOTPLUG_CPU
1489         select ARM_CPU_SUSPEND
1490         select CPU_PM
1491         help
1492           The big.LITTLE "switcher" provides the core functionality to
1493           transparently handle transition between a cluster of A15's
1494           and a cluster of A7's in a big.LITTLE system.
1495 
1496 config BL_SWITCHER_DUMMY_IF
1497         tristate "Simple big.LITTLE switcher user interface"
1498         depends on BL_SWITCHER && DEBUG_KERNEL
1499         help
1500           This is a simple and dummy char dev interface to control
1501           the big.LITTLE switcher core code.  It is meant for
1502           debugging purposes only.
1503 
1504 choice
1505         prompt "Memory split"
1506         depends on MMU
1507         default VMSPLIT_3G
1508         help
1509           Select the desired split between kernel and user memory.
1510 
1511           If you are not absolutely sure what you are doing, leave this
1512           option alone!
1513 
1514         config VMSPLIT_3G
1515                 bool "3G/1G user/kernel split"
1516         config VMSPLIT_2G
1517                 bool "2G/2G user/kernel split"
1518         config VMSPLIT_1G
1519                 bool "1G/3G user/kernel split"
1520 endchoice
1521 
1522 config PAGE_OFFSET
1523         hex
1524         default PHYS_OFFSET if !MMU
1525         default 0x40000000 if VMSPLIT_1G
1526         default 0x80000000 if VMSPLIT_2G
1527         default 0xC0000000
1528 
1529 config NR_CPUS
1530         int "Maximum number of CPUs (2-32)"
1531         range 2 32
1532         depends on SMP
1533         default "4"
1534 
1535 config HOTPLUG_CPU
1536         bool "Support for hot-pluggable CPUs"
1537         depends on SMP
1538         help
1539           Say Y here to experiment with turning CPUs off and on.  CPUs
1540           can be controlled through /sys/devices/system/cpu.
1541 
1542 config ARM_PSCI
1543         bool "Support for the ARM Power State Coordination Interface (PSCI)"
1544         depends on CPU_V7
1545         help
1546           Say Y here if you want Linux to communicate with system firmware
1547           implementing the PSCI specification for CPU-centric power
1548           management operations described in ARM document number ARM DEN
1549           0022A ("Power State Coordination Interface System Software on
1550           ARM processors").
1551 
1552 # The GPIO number here must be sorted by descending number. In case of
1553 # a multiplatform kernel, we just want the highest value required by the
1554 # selected platforms.
1555 config ARCH_NR_GPIO
1556         int
1557         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1558         default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX
1559         default 416 if ARCH_SUNXI
1560         default 392 if ARCH_U8500
1561         default 352 if ARCH_VT8500
1562         default 264 if MACH_H4700
1563         default 0
1564         help
1565           Maximum number of GPIOs in the system.
1566 
1567           If unsure, leave the default value.
1568 
1569 source kernel/Kconfig.preempt
1570 
1571 config HZ_FIXED
1572         int
1573         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1574                 ARCH_S5PV210 || ARCH_EXYNOS4
1575         default AT91_TIMER_HZ if ARCH_AT91
1576         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
1577         default 0
1578 
1579 choice
1580         depends on HZ_FIXED = 0
1581         prompt "Timer frequency"
1582 
1583 config HZ_100
1584         bool "100 Hz"
1585 
1586 config HZ_200
1587         bool "200 Hz"
1588 
1589 config HZ_250
1590         bool "250 Hz"
1591 
1592 config HZ_300
1593         bool "300 Hz"
1594 
1595 config HZ_500
1596         bool "500 Hz"
1597 
1598 config HZ_1000
1599         bool "1000 Hz"
1600 
1601 endchoice
1602 
1603 config HZ
1604         int
1605         default HZ_FIXED if HZ_FIXED != 0
1606         default 100 if HZ_100
1607         default 200 if HZ_200
1608         default 250 if HZ_250
1609         default 300 if HZ_300
1610         default 500 if HZ_500
1611         default 1000
1612 
1613 config SCHED_HRTICK
1614         def_bool HIGH_RES_TIMERS
1615 
1616 config THUMB2_KERNEL
1617         bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
1618         depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
1619         default y if CPU_THUMBONLY
1620         select AEABI
1621         select ARM_ASM_UNIFIED
1622         select ARM_UNWIND
1623         help
1624           By enabling this option, the kernel will be compiled in
1625           Thumb-2 mode. A compiler/assembler that understand the unified
1626           ARM-Thumb syntax is needed.
1627 
1628           If unsure, say N.
1629 
1630 config THUMB2_AVOID_R_ARM_THM_JUMP11
1631         bool "Work around buggy Thumb-2 short branch relocations in gas"
1632         depends on THUMB2_KERNEL && MODULES
1633         default y
1634         help
1635           Various binutils versions can resolve Thumb-2 branches to
1636           locally-defined, preemptible global symbols as short-range "b.n"
1637           branch instructions.
1638 
1639           This is a problem, because there's no guarantee the final
1640           destination of the symbol, or any candidate locations for a
1641           trampoline, are within range of the branch.  For this reason, the
1642           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1643           relocation in modules at all, and it makes little sense to add
1644           support.
1645 
1646           The symptom is that the kernel fails with an "unsupported
1647           relocation" error when loading some modules.
1648 
1649           Until fixed tools are available, passing
1650           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1651           code which hits this problem, at the cost of a bit of extra runtime
1652           stack usage in some cases.
1653 
1654           The problem is described in more detail at:
1655               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1656 
1657           Only Thumb-2 kernels are affected.
1658 
1659           Unless you are sure your tools don't have this problem, say Y.
1660 
1661 config ARM_ASM_UNIFIED
1662         bool
1663 
1664 config AEABI
1665         bool "Use the ARM EABI to compile the kernel"
1666         help
1667           This option allows for the kernel to be compiled using the latest
1668           ARM ABI (aka EABI).  This is only useful if you are using a user
1669           space environment that is also compiled with EABI.
1670 
1671           Since there are major incompatibilities between the legacy ABI and
1672           EABI, especially with regard to structure member alignment, this
1673           option also changes the kernel syscall calling convention to
1674           disambiguate both ABIs and allow for backward compatibility support
1675           (selected with CONFIG_OABI_COMPAT).
1676 
1677           To use this you need GCC version 4.0.0 or later.
1678 
1679 config OABI_COMPAT
1680         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1681         depends on AEABI && !THUMB2_KERNEL
1682         help
1683           This option preserves the old syscall interface along with the
1684           new (ARM EABI) one. It also provides a compatibility layer to
1685           intercept syscalls that have structure arguments which layout
1686           in memory differs between the legacy ABI and the new ARM EABI
1687           (only for non "thumb" binaries). This option adds a tiny
1688           overhead to all syscalls and produces a slightly larger kernel.
1689 
1690           The seccomp filter system will not be available when this is
1691           selected, since there is no way yet to sensibly distinguish
1692           between calling conventions during filtering.
1693 
1694           If you know you'll be using only pure EABI user space then you
1695           can say N here. If this option is not selected and you attempt
1696           to execute a legacy ABI binary then the result will be
1697           UNPREDICTABLE (in fact it can be predicted that it won't work
1698           at all). If in doubt say N.
1699 
1700 config ARCH_HAS_HOLES_MEMORYMODEL
1701         bool
1702 
1703 config ARCH_SPARSEMEM_ENABLE
1704         bool
1705 
1706 config ARCH_SPARSEMEM_DEFAULT
1707         def_bool ARCH_SPARSEMEM_ENABLE
1708 
1709 config ARCH_SELECT_MEMORY_MODEL
1710         def_bool ARCH_SPARSEMEM_ENABLE
1711 
1712 config HAVE_ARCH_PFN_VALID
1713         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1714 
1715 config HIGHMEM
1716         bool "High Memory Support"
1717         depends on MMU
1718         help
1719           The address space of ARM processors is only 4 Gigabytes large
1720           and it has to accommodate user address space, kernel address
1721           space as well as some memory mapped IO. That means that, if you
1722           have a large amount of physical memory and/or IO, not all of the
1723           memory can be "permanently mapped" by the kernel. The physical
1724           memory that is not permanently mapped is called "high memory".
1725 
1726           Depending on the selected kernel/user memory split, minimum
1727           vmalloc space and actual amount of RAM, you may not need this
1728           option which should result in a slightly faster kernel.
1729 
1730           If unsure, say n.
1731 
1732 config HIGHPTE
1733         bool "Allocate 2nd-level pagetables from highmem"
1734         depends on HIGHMEM
1735 
1736 config HW_PERF_EVENTS
1737         bool "Enable hardware performance counter support for perf events"
1738         depends on PERF_EVENTS
1739         default y
1740         help
1741           Enable hardware performance counter support for perf events. If
1742           disabled, perf events will use software events only.
1743 
1744 config SYS_SUPPORTS_HUGETLBFS
1745        def_bool y
1746        depends on ARM_LPAE
1747 
1748 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
1749        def_bool y
1750        depends on ARM_LPAE
1751 
1752 config ARCH_WANT_GENERAL_HUGETLB
1753         def_bool y
1754 
1755 source "mm/Kconfig"
1756 
1757 config FORCE_MAX_ZONEORDER
1758         int "Maximum zone order" if ARCH_SHMOBILE_LEGACY
1759         range 11 64 if ARCH_SHMOBILE_LEGACY
1760         default "12" if SOC_AM33XX
1761         default "9" if SA1111 || ARCH_EFM32
1762         default "11"
1763         help
1764           The kernel memory allocator divides physically contiguous memory
1765           blocks into "zones", where each zone is a power of two number of
1766           pages.  This option selects the largest power of two that the kernel
1767           keeps in the memory allocator.  If you need to allocate very large
1768           blocks of physically contiguous memory, then you may need to
1769           increase this value.
1770 
1771           This config option is actually maximum order plus one. For example,
1772           a value of 11 means that the largest free memory block is 2^10 pages.
1773 
1774 config ALIGNMENT_TRAP
1775         bool
1776         depends on CPU_CP15_MMU
1777         default y if !ARCH_EBSA110
1778         select HAVE_PROC_CPU if PROC_FS
1779         help
1780           ARM processors cannot fetch/store information which is not
1781           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1782           address divisible by 4. On 32-bit ARM processors, these non-aligned
1783           fetch/store instructions will be emulated in software if you say
1784           here, which has a severe performance impact. This is necessary for
1785           correct operation of some network protocols. With an IP-only
1786           configuration it is safe to say N, otherwise say Y.
1787 
1788 config UACCESS_WITH_MEMCPY
1789         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1790         depends on MMU
1791         default y if CPU_FEROCEON
1792         help
1793           Implement faster copy_to_user and clear_user methods for CPU
1794           cores where a 8-word STM instruction give significantly higher
1795           memory write throughput than a sequence of individual 32bit stores.
1796 
1797           A possible side effect is a slight increase in scheduling latency
1798           between threads sharing the same address space if they invoke
1799           such copy operations with large buffers.
1800 
1801           However, if the CPU data cache is using a write-allocate mode,
1802           this option is unlikely to provide any performance gain.
1803 
1804 config SECCOMP
1805         bool
1806         prompt "Enable seccomp to safely compute untrusted bytecode"
1807         ---help---
1808           This kernel feature is useful for number crunching applications
1809           that may need to compute untrusted bytecode during their
1810           execution. By using pipes or other transports made available to
1811           the process as file descriptors supporting the read/write
1812           syscalls, it's possible to isolate those applications in
1813           their own address space using seccomp. Once seccomp is
1814           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1815           and the task is only allowed to execute a few safe syscalls
1816           defined by each seccomp mode.
1817 
1818 config SWIOTLB
1819         def_bool y
1820 
1821 config IOMMU_HELPER
1822         def_bool SWIOTLB
1823 
1824 config XEN_DOM0
1825         def_bool y
1826         depends on XEN
1827 
1828 config XEN
1829         bool "Xen guest support on ARM (EXPERIMENTAL)"
1830         depends on ARM && AEABI && OF
1831         depends on CPU_V7 && !CPU_V6
1832         depends on !GENERIC_ATOMIC64
1833         depends on MMU
1834         select ARCH_DMA_ADDR_T_64BIT
1835         select ARM_PSCI
1836         select SWIOTLB_XEN
1837         help
1838           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1839 
1840 endmenu
1841 
1842 menu "Boot options"
1843 
1844 config USE_OF
1845         bool "Flattened Device Tree support"
1846         select IRQ_DOMAIN
1847         select OF
1848         select OF_EARLY_FLATTREE
1849         select OF_RESERVED_MEM
1850         help
1851           Include support for flattened device tree machine descriptions.
1852 
1853 config ATAGS
1854         bool "Support for the traditional ATAGS boot data passing" if USE_OF
1855         default y
1856         help
1857           This is the traditional way of passing data to the kernel at boot
1858           time. If you are solely relying on the flattened device tree (or
1859           the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1860           to remove ATAGS support from your kernel binary.  If unsure,
1861           leave this to y.
1862 
1863 config DEPRECATED_PARAM_STRUCT
1864         bool "Provide old way to pass kernel parameters"
1865         depends on ATAGS
1866         help
1867           This was deprecated in 2001 and announced to live on for 5 years.
1868           Some old boot loaders still use this way.
1869 
1870 # Compressed boot loader in ROM.  Yes, we really want to ask about
1871 # TEXT and BSS so we preserve their values in the config files.
1872 config ZBOOT_ROM_TEXT
1873         hex "Compressed ROM boot loader base address"
1874         default "0"
1875         help
1876           The physical address at which the ROM-able zImage is to be
1877           placed in the target.  Platforms which normally make use of
1878           ROM-able zImage formats normally set this to a suitable
1879           value in their defconfig file.
1880 
1881           If ZBOOT_ROM is not enabled, this has no effect.
1882 
1883 config ZBOOT_ROM_BSS
1884         hex "Compressed ROM boot loader BSS address"
1885         default "0"
1886         help
1887           The base address of an area of read/write memory in the target
1888           for the ROM-able zImage which must be available while the
1889           decompressor is running. It must be large enough to hold the
1890           entire decompressed kernel plus an additional 128 KiB.
1891           Platforms which normally make use of ROM-able zImage formats
1892           normally set this to a suitable value in their defconfig file.
1893 
1894           If ZBOOT_ROM is not enabled, this has no effect.
1895 
1896 config ZBOOT_ROM
1897         bool "Compressed boot loader in ROM/flash"
1898         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1899         depends on !ARM_APPENDED_DTB && !XIP_KERNEL && !AUTO_ZRELADDR
1900         help
1901           Say Y here if you intend to execute your compressed kernel image
1902           (zImage) directly from ROM or flash.  If unsure, say N.
1903 
1904 choice
1905         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1906         depends on ZBOOT_ROM && ARCH_SH7372
1907         default ZBOOT_ROM_NONE
1908         help
1909           Include experimental SD/MMC loading code in the ROM-able zImage.
1910           With this enabled it is possible to write the ROM-able zImage
1911           kernel image to an MMC or SD card and boot the kernel straight
1912           from the reset vector. At reset the processor Mask ROM will load
1913           the first part of the ROM-able zImage which in turn loads the
1914           rest the kernel image to RAM.
1915 
1916 config ZBOOT_ROM_NONE
1917         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1918         help
1919           Do not load image from SD or MMC
1920 
1921 config ZBOOT_ROM_MMCIF
1922         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1923         help
1924           Load image from MMCIF hardware block.
1925 
1926 config ZBOOT_ROM_SH_MOBILE_SDHI
1927         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1928         help
1929           Load image from SDHI hardware block
1930 
1931 endchoice
1932 
1933 config ARM_APPENDED_DTB
1934         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1935         depends on OF
1936         help
1937           With this option, the boot code will look for a device tree binary
1938           (DTB) appended to zImage
1939           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1940 
1941           This is meant as a backward compatibility convenience for those
1942           systems with a bootloader that can't be upgraded to accommodate
1943           the documented boot protocol using a device tree.
1944 
1945           Beware that there is very little in terms of protection against
1946           this option being confused by leftover garbage in memory that might
1947           look like a DTB header after a reboot if no actual DTB is appended
1948           to zImage.  Do not leave this option active in a production kernel
1949           if you don't intend to always append a DTB.  Proper passing of the
1950           location into r2 of a bootloader provided DTB is always preferable
1951           to this option.
1952 
1953 config ARM_ATAG_DTB_COMPAT
1954         bool "Supplement the appended DTB with traditional ATAG information"
1955         depends on ARM_APPENDED_DTB
1956         help
1957           Some old bootloaders can't be updated to a DTB capable one, yet
1958           they provide ATAGs with memory configuration, the ramdisk address,
1959           the kernel cmdline string, etc.  Such information is dynamically
1960           provided by the bootloader and can't always be stored in a static
1961           DTB.  To allow a device tree enabled kernel to be used with such
1962           bootloaders, this option allows zImage to extract the information
1963           from the ATAG list and store it at run time into the appended DTB.
1964 
1965 choice
1966         prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1967         default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1968 
1969 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1970         bool "Use bootloader kernel arguments if available"
1971         help
1972           Uses the command-line options passed by the boot loader instead of
1973           the device tree bootargs property. If the boot loader doesn't provide
1974           any, the device tree bootargs property will be used.
1975 
1976 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1977         bool "Extend with bootloader kernel arguments"
1978         help
1979           The command-line arguments provided by the boot loader will be
1980           appended to the the device tree bootargs property.
1981 
1982 endchoice
1983 
1984 config CMDLINE
1985         string "Default kernel command string"
1986         default ""
1987         help
1988           On some architectures (EBSA110 and CATS), there is currently no way
1989           for the boot loader to pass arguments to the kernel. For these
1990           architectures, you should supply some command-line options at build
1991           time by entering them here. As a minimum, you should specify the
1992           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1993 
1994 choice
1995         prompt "Kernel command line type" if CMDLINE != ""
1996         default CMDLINE_FROM_BOOTLOADER
1997         depends on ATAGS
1998 
1999 config CMDLINE_FROM_BOOTLOADER
2000         bool "Use bootloader kernel arguments if available"
2001         help
2002           Uses the command-line options passed by the boot loader. If
2003           the boot loader doesn't provide any, the default kernel command
2004           string provided in CMDLINE will be used.
2005 
2006 config CMDLINE_EXTEND
2007         bool "Extend bootloader kernel arguments"
2008         help
2009           The command-line arguments provided by the boot loader will be
2010           appended to the default kernel command string.
2011 
2012 config CMDLINE_FORCE
2013         bool "Always use the default kernel command string"
2014         help
2015           Always use the default kernel command string, even if the boot
2016           loader passes other arguments to the kernel.
2017           This is useful if you cannot or don't want to change the
2018           command-line options your boot loader passes to the kernel.
2019 endchoice
2020 
2021 config XIP_KERNEL
2022         bool "Kernel Execute-In-Place from ROM"
2023         depends on !ARM_LPAE && !ARCH_MULTIPLATFORM
2024         help
2025           Execute-In-Place allows the kernel to run from non-volatile storage
2026           directly addressable by the CPU, such as NOR flash. This saves RAM
2027           space since the text section of the kernel is not loaded from flash
2028           to RAM.  Read-write sections, such as the data section and stack,
2029           are still copied to RAM.  The XIP kernel is not compressed since
2030           it has to run directly from flash, so it will take more space to
2031           store it.  The flash address used to link the kernel object files,
2032           and for storing it, is configuration dependent. Therefore, if you
2033           say Y here, you must know the proper physical address where to
2034           store the kernel image depending on your own flash memory usage.
2035 
2036           Also note that the make target becomes "make xipImage" rather than
2037           "make zImage" or "make Image".  The final kernel binary to put in
2038           ROM memory will be arch/arm/boot/xipImage.
2039 
2040           If unsure, say N.
2041 
2042 config XIP_PHYS_ADDR
2043         hex "XIP Kernel Physical Location"
2044         depends on XIP_KERNEL
2045         default "0x00080000"
2046         help
2047           This is the physical address in your flash memory the kernel will
2048           be linked for and stored to.  This address is dependent on your
2049           own flash usage.
2050 
2051 config KEXEC
2052         bool "Kexec system call (EXPERIMENTAL)"
2053         depends on (!SMP || PM_SLEEP_SMP)
2054         help
2055           kexec is a system call that implements the ability to shutdown your
2056           current kernel, and to start another kernel.  It is like a reboot
2057           but it is independent of the system firmware.   And like a reboot
2058           you can start any kernel with it, not just Linux.
2059 
2060           It is an ongoing process to be certain the hardware in a machine
2061           is properly shutdown, so do not be surprised if this code does not
2062           initially work for you.
2063 
2064 config ATAGS_PROC
2065         bool "Export atags in procfs"
2066         depends on ATAGS && KEXEC
2067         default y
2068         help
2069           Should the atags used to boot the kernel be exported in an "atags"
2070           file in procfs. Useful with kexec.
2071 
2072 config CRASH_DUMP
2073         bool "Build kdump crash kernel (EXPERIMENTAL)"
2074         help
2075           Generate crash dump after being started by kexec. This should
2076           be normally only set in special crash dump kernels which are
2077           loaded in the main kernel with kexec-tools into a specially
2078           reserved region and then later executed after a crash by
2079           kdump/kexec. The crash dump kernel must be compiled to a
2080           memory address not used by the main kernel
2081 
2082           For more details see Documentation/kdump/kdump.txt
2083 
2084 config AUTO_ZRELADDR
2085         bool "Auto calculation of the decompressed kernel image address"
2086         help
2087           ZRELADDR is the physical address where the decompressed kernel
2088           image will be placed. If AUTO_ZRELADDR is selected, the address
2089           will be determined at run-time by masking the current IP with
2090           0xf8000000. This assumes the zImage being placed in the first 128MB
2091           from start of memory.
2092 
2093 endmenu
2094 
2095 menu "CPU Power Management"
2096 
2097 source "drivers/cpufreq/Kconfig"
2098 
2099 source "drivers/cpuidle/Kconfig"
2100 
2101 endmenu
2102 
2103 menu "Floating point emulation"
2104 
2105 comment "At least one emulation must be selected"
2106 
2107 config FPE_NWFPE
2108         bool "NWFPE math emulation"
2109         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2110         ---help---
2111           Say Y to include the NWFPE floating point emulator in the kernel.
2112           This is necessary to run most binaries. Linux does not currently
2113           support floating point hardware so you need to say Y here even if
2114           your machine has an FPA or floating point co-processor podule.
2115 
2116           You may say N here if you are going to load the Acorn FPEmulator
2117           early in the bootup.
2118 
2119 config FPE_NWFPE_XP
2120         bool "Support extended precision"
2121         depends on FPE_NWFPE
2122         help
2123           Say Y to include 80-bit support in the kernel floating-point
2124           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2125           Note that gcc does not generate 80-bit operations by default,
2126           so in most cases this option only enlarges the size of the
2127           floating point emulator without any good reason.
2128 
2129           You almost surely want to say N here.
2130 
2131 config FPE_FASTFPE
2132         bool "FastFPE math emulation (EXPERIMENTAL)"
2133         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
2134         ---help---
2135           Say Y here to include the FAST floating point emulator in the kernel.
2136           This is an experimental much faster emulator which now also has full
2137           precision for the mantissa.  It does not support any exceptions.
2138           It is very simple, and approximately 3-6 times faster than NWFPE.
2139 
2140           It should be sufficient for most programs.  It may be not suitable
2141           for scientific calculations, but you have to check this for yourself.
2142           If you do not feel you need a faster FP emulation you should better
2143           choose NWFPE.
2144 
2145 config VFP
2146         bool "VFP-format floating point maths"
2147         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2148         help
2149           Say Y to include VFP support code in the kernel. This is needed
2150           if your hardware includes a VFP unit.
2151 
2152           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2153           release notes and additional status information.
2154 
2155           Say N if your target does not have VFP hardware.
2156 
2157 config VFPv3
2158         bool
2159         depends on VFP
2160         default y if CPU_V7
2161 
2162 config NEON
2163         bool "Advanced SIMD (NEON) Extension support"
2164         depends on VFPv3 && CPU_V7
2165         help
2166           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2167           Extension.
2168 
2169 config KERNEL_MODE_NEON
2170         bool "Support for NEON in kernel mode"
2171         depends on NEON && AEABI
2172         help
2173           Say Y to include support for NEON in kernel mode.
2174 
2175 endmenu
2176 
2177 menu "Userspace binary formats"
2178 
2179 source "fs/Kconfig.binfmt"
2180 
2181 config ARTHUR
2182         tristate "RISC OS personality"
2183         depends on !AEABI
2184         help
2185           Say Y here to include the kernel code necessary if you want to run
2186           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2187           experimental; if this sounds frightening, say N and sleep in peace.
2188           You can also say M here to compile this support as a module (which
2189           will be called arthur).
2190 
2191 endmenu
2192 
2193 menu "Power management options"
2194 
2195 source "kernel/power/Kconfig"
2196 
2197 config ARCH_SUSPEND_POSSIBLE
2198         depends on !ARCH_S5PC100
2199         depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \
2200                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2201         def_bool y
2202 
2203 config ARM_CPU_SUSPEND
2204         def_bool PM_SLEEP
2205 
2206 config ARCH_HIBERNATION_POSSIBLE
2207         bool
2208         depends on MMU
2209         default y if ARCH_SUSPEND_POSSIBLE
2210 
2211 endmenu
2212 
2213 source "net/Kconfig"
2214 
2215 source "drivers/Kconfig"
2216 
2217 source "fs/Kconfig"
2218 
2219 source "arch/arm/Kconfig.debug"
2220 
2221 source "security/Kconfig"
2222 
2223 source "crypto/Kconfig"
2224 
2225 source "lib/Kconfig"
2226 
2227 source "arch/arm/kvm/Kconfig"

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