Version:  2.0.40 2.2.26 2.4.37 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18

Linux/arch/arm/Kconfig

  1 config ARM
  2         bool
  3         default y
  4         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
  5         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
  6         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
  7         select ARCH_HAVE_CUSTOM_GPIO_H
  8         select ARCH_MIGHT_HAVE_PC_PARPORT
  9         select ARCH_SUPPORTS_ATOMIC_RMW
 10         select ARCH_USE_BUILTIN_BSWAP
 11         select ARCH_USE_CMPXCHG_LOCKREF
 12         select ARCH_WANT_IPC_PARSE_VERSION
 13         select BUILDTIME_EXTABLE_SORT if MMU
 14         select CLONE_BACKWARDS
 15         select CPU_PM if (SUSPEND || CPU_IDLE)
 16         select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
 17         select GENERIC_ALLOCATOR
 18         select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI)
 19         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
 20         select GENERIC_IDLE_POLL_SETUP
 21         select GENERIC_IRQ_PROBE
 22         select GENERIC_IRQ_SHOW
 23         select GENERIC_PCI_IOMAP
 24         select GENERIC_SCHED_CLOCK
 25         select GENERIC_SMP_IDLE_THREAD
 26         select GENERIC_STRNCPY_FROM_USER
 27         select GENERIC_STRNLEN_USER
 28         select HANDLE_DOMAIN_IRQ
 29         select HARDIRQS_SW_RESEND
 30         select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT)
 31         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
 32         select HAVE_ARCH_KGDB
 33         select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
 34         select HAVE_ARCH_TRACEHOOK
 35         select HAVE_BPF_JIT
 36         select HAVE_CC_STACKPROTECTOR
 37         select HAVE_CONTEXT_TRACKING
 38         select HAVE_C_RECORDMCOUNT
 39         select HAVE_DEBUG_KMEMLEAK
 40         select HAVE_DMA_API_DEBUG
 41         select HAVE_DMA_ATTRS
 42         select HAVE_DMA_CONTIGUOUS if MMU
 43         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
 44         select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
 45         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
 46         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
 47         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
 48         select HAVE_GENERIC_DMA_COHERENT
 49         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
 50         select HAVE_IDE if PCI || ISA || PCMCIA
 51         select HAVE_IRQ_TIME_ACCOUNTING
 52         select HAVE_KERNEL_GZIP
 53         select HAVE_KERNEL_LZ4
 54         select HAVE_KERNEL_LZMA
 55         select HAVE_KERNEL_LZO
 56         select HAVE_KERNEL_XZ
 57         select HAVE_KPROBES if !XIP_KERNEL
 58         select HAVE_KRETPROBES if (HAVE_KPROBES)
 59         select HAVE_MEMBLOCK
 60         select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
 61         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
 62         select HAVE_PERF_EVENTS
 63         select HAVE_PERF_REGS
 64         select HAVE_PERF_USER_STACK_DUMP
 65         select HAVE_RCU_TABLE_FREE if (SMP && ARM_LPAE)
 66         select HAVE_REGS_AND_STACK_ACCESS_API
 67         select HAVE_SYSCALL_TRACEPOINTS
 68         select HAVE_UID16
 69         select HAVE_VIRT_CPU_ACCOUNTING_GEN
 70         select IRQ_FORCED_THREADING
 71         select MODULES_USE_ELF_REL
 72         select NO_BOOTMEM
 73         select OLD_SIGACTION
 74         select OLD_SIGSUSPEND3
 75         select PERF_USE_VMALLOC
 76         select RTC_LIB
 77         select SYS_SUPPORTS_APM_EMULATION
 78         # Above selects are sorted alphabetically; please add new ones
 79         # according to that.  Thanks.
 80         help
 81           The ARM series is a line of low-power-consumption RISC chip designs
 82           licensed by ARM Ltd and targeted at embedded applications and
 83           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
 84           manufactured, but legacy ARM-based PC hardware remains popular in
 85           Europe.  There is an ARM Linux project with a web page at
 86           <http://www.arm.linux.org.uk/>.
 87 
 88 config ARM_HAS_SG_CHAIN
 89         select ARCH_HAS_SG_CHAIN
 90         bool
 91 
 92 config NEED_SG_DMA_LENGTH
 93         bool
 94 
 95 config ARM_DMA_USE_IOMMU
 96         bool
 97         select ARM_HAS_SG_CHAIN
 98         select NEED_SG_DMA_LENGTH
 99 
100 if ARM_DMA_USE_IOMMU
101 
102 config ARM_DMA_IOMMU_ALIGNMENT
103         int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
104         range 4 9
105         default 8
106         help
107           DMA mapping framework by default aligns all buffers to the smallest
108           PAGE_SIZE order which is greater than or equal to the requested buffer
109           size. This works well for buffers up to a few hundreds kilobytes, but
110           for larger buffers it just a waste of address space. Drivers which has
111           relatively small addressing window (like 64Mib) might run out of
112           virtual space with just a few allocations.
113 
114           With this parameter you can specify the maximum PAGE_SIZE order for
115           DMA IOMMU buffers. Larger buffers will be aligned only to this
116           specified order. The order is expressed as a power of two multiplied
117           by the PAGE_SIZE.
118 
119 endif
120 
121 config MIGHT_HAVE_PCI
122         bool
123 
124 config SYS_SUPPORTS_APM_EMULATION
125         bool
126 
127 config HAVE_TCM
128         bool
129         select GENERIC_ALLOCATOR
130 
131 config HAVE_PROC_CPU
132         bool
133 
134 config NO_IOPORT_MAP
135         bool
136 
137 config EISA
138         bool
139         ---help---
140           The Extended Industry Standard Architecture (EISA) bus was
141           developed as an open alternative to the IBM MicroChannel bus.
142 
143           The EISA bus provided some of the features of the IBM MicroChannel
144           bus while maintaining backward compatibility with cards made for
145           the older ISA bus.  The EISA bus saw limited use between 1988 and
146           1995 when it was made obsolete by the PCI bus.
147 
148           Say Y here if you are building a kernel for an EISA-based machine.
149 
150           Otherwise, say N.
151 
152 config SBUS
153         bool
154 
155 config STACKTRACE_SUPPORT
156         bool
157         default y
158 
159 config HAVE_LATENCYTOP_SUPPORT
160         bool
161         depends on !SMP
162         default y
163 
164 config LOCKDEP_SUPPORT
165         bool
166         default y
167 
168 config TRACE_IRQFLAGS_SUPPORT
169         bool
170         default y
171 
172 config RWSEM_XCHGADD_ALGORITHM
173         bool
174         default y
175 
176 config ARCH_HAS_ILOG2_U32
177         bool
178 
179 config ARCH_HAS_ILOG2_U64
180         bool
181 
182 config ARCH_HAS_BANDGAP
183         bool
184 
185 config GENERIC_HWEIGHT
186         bool
187         default y
188 
189 config GENERIC_CALIBRATE_DELAY
190         bool
191         default y
192 
193 config ARCH_MAY_HAVE_PC_FDC
194         bool
195 
196 config ZONE_DMA
197         bool
198 
199 config NEED_DMA_MAP_STATE
200        def_bool y
201 
202 config ARCH_SUPPORTS_UPROBES
203         def_bool y
204 
205 config ARCH_HAS_DMA_SET_COHERENT_MASK
206         bool
207 
208 config GENERIC_ISA_DMA
209         bool
210 
211 config FIQ
212         bool
213 
214 config NEED_RET_TO_USER
215         bool
216 
217 config ARCH_MTD_XIP
218         bool
219 
220 config VECTORS_BASE
221         hex
222         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
223         default DRAM_BASE if REMAP_VECTORS_TO_RAM
224         default 0x00000000
225         help
226           The base address of exception vectors.  This must be two pages
227           in size.
228 
229 config ARM_PATCH_PHYS_VIRT
230         bool "Patch physical to virtual translations at runtime" if EMBEDDED
231         default y
232         depends on !XIP_KERNEL && MMU
233         depends on !ARCH_REALVIEW || !SPARSEMEM
234         help
235           Patch phys-to-virt and virt-to-phys translation functions at
236           boot and module load time according to the position of the
237           kernel in system memory.
238 
239           This can only be used with non-XIP MMU kernels where the base
240           of physical memory is at a 16MB boundary.
241 
242           Only disable this option if you know that you do not require
243           this feature (eg, building a kernel for a single machine) and
244           you need to shrink the kernel to the minimal size.
245 
246 config NEED_MACH_IO_H
247         bool
248         help
249           Select this when mach/io.h is required to provide special
250           definitions for this platform.  The need for mach/io.h should
251           be avoided when possible.
252 
253 config NEED_MACH_MEMORY_H
254         bool
255         help
256           Select this when mach/memory.h is required to provide special
257           definitions for this platform.  The need for mach/memory.h should
258           be avoided when possible.
259 
260 config PHYS_OFFSET
261         hex "Physical address of main memory" if MMU
262         depends on !ARM_PATCH_PHYS_VIRT
263         default DRAM_BASE if !MMU
264         default 0x00000000 if ARCH_EBSA110 || \
265                         EP93XX_SDCE3_SYNC_PHYS_OFFSET || \
266                         ARCH_FOOTBRIDGE || \
267                         ARCH_INTEGRATOR || \
268                         ARCH_IOP13XX || \
269                         ARCH_KS8695 || \
270                         (ARCH_REALVIEW && !REALVIEW_HIGH_PHYS_OFFSET)
271         default 0x10000000 if ARCH_OMAP1 || ARCH_RPC
272         default 0x20000000 if ARCH_S5PV210
273         default 0x70000000 if REALVIEW_HIGH_PHYS_OFFSET
274         default 0xc0000000 if EP93XX_SDCE0_PHYS_OFFSET || ARCH_SA1100
275         default 0xd0000000 if EP93XX_SDCE1_PHYS_OFFSET
276         default 0xe0000000 if EP93XX_SDCE2_PHYS_OFFSET
277         default 0xf0000000 if EP93XX_SDCE3_ASYNC_PHYS_OFFSET
278         help
279           Please provide the physical address corresponding to the
280           location of main memory in your system.
281 
282 config GENERIC_BUG
283         def_bool y
284         depends on BUG
285 
286 source "init/Kconfig"
287 
288 source "kernel/Kconfig.freezer"
289 
290 menu "System Type"
291 
292 config MMU
293         bool "MMU-based Paged Memory Management Support"
294         default y
295         help
296           Select if you want MMU-based virtualised addressing space
297           support by paged memory management. If unsure, say 'Y'.
298 
299 #
300 # The "ARM system type" choice list is ordered alphabetically by option
301 # text.  Please add new entries in the option alphabetic order.
302 #
303 choice
304         prompt "ARM system type"
305         default ARCH_VERSATILE if !MMU
306         default ARCH_MULTIPLATFORM if MMU
307 
308 config ARCH_MULTIPLATFORM
309         bool "Allow multiple platforms to be selected"
310         depends on MMU
311         select ARCH_WANT_OPTIONAL_GPIOLIB
312         select ARM_HAS_SG_CHAIN
313         select ARM_PATCH_PHYS_VIRT
314         select AUTO_ZRELADDR
315         select CLKSRC_OF
316         select COMMON_CLK
317         select GENERIC_CLOCKEVENTS
318         select MIGHT_HAVE_PCI
319         select MULTI_IRQ_HANDLER
320         select SPARSE_IRQ
321         select USE_OF
322 
323 config ARCH_INTEGRATOR
324         bool "ARM Ltd. Integrator family"
325         select ARM_AMBA
326         select ARM_PATCH_PHYS_VIRT if MMU
327         select AUTO_ZRELADDR
328         select COMMON_CLK
329         select COMMON_CLK_VERSATILE
330         select GENERIC_CLOCKEVENTS
331         select HAVE_TCM
332         select ICST
333         select MULTI_IRQ_HANDLER
334         select PLAT_VERSATILE
335         select SPARSE_IRQ
336         select USE_OF
337         select VERSATILE_FPGA_IRQ
338         help
339           Support for ARM's Integrator platform.
340 
341 config ARCH_REALVIEW
342         bool "ARM Ltd. RealView family"
343         select ARCH_WANT_OPTIONAL_GPIOLIB
344         select ARM_AMBA
345         select ARM_TIMER_SP804
346         select COMMON_CLK
347         select COMMON_CLK_VERSATILE
348         select GENERIC_CLOCKEVENTS
349         select GPIO_PL061 if GPIOLIB
350         select ICST
351         select NEED_MACH_MEMORY_H
352         select PLAT_VERSATILE
353         help
354           This enables support for ARM Ltd RealView boards.
355 
356 config ARCH_VERSATILE
357         bool "ARM Ltd. Versatile family"
358         select ARCH_WANT_OPTIONAL_GPIOLIB
359         select ARM_AMBA
360         select ARM_TIMER_SP804
361         select ARM_VIC
362         select CLKDEV_LOOKUP
363         select GENERIC_CLOCKEVENTS
364         select HAVE_MACH_CLKDEV
365         select ICST
366         select PLAT_VERSATILE
367         select PLAT_VERSATILE_CLOCK
368         select VERSATILE_FPGA_IRQ
369         help
370           This enables support for ARM Ltd Versatile board.
371 
372 config ARCH_AT91
373         bool "Atmel AT91"
374         select ARCH_REQUIRE_GPIOLIB
375         select CLKDEV_LOOKUP
376         select IRQ_DOMAIN
377         select NEED_MACH_IO_H if PCCARD
378         select PINCTRL
379         select PINCTRL_AT91 if USE_OF
380         help
381           This enables support for systems based on Atmel
382           AT91RM9200 and AT91SAM9* processors.
383 
384 config ARCH_CLPS711X
385         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
386         select ARCH_REQUIRE_GPIOLIB
387         select AUTO_ZRELADDR
388         select CLKSRC_MMIO
389         select COMMON_CLK
390         select CPU_ARM720T
391         select GENERIC_CLOCKEVENTS
392         select MFD_SYSCON
393         select SOC_BUS
394         help
395           Support for Cirrus Logic 711x/721x/731x based boards.
396 
397 config ARCH_GEMINI
398         bool "Cortina Systems Gemini"
399         select ARCH_REQUIRE_GPIOLIB
400         select CLKSRC_MMIO
401         select CPU_FA526
402         select GENERIC_CLOCKEVENTS
403         help
404           Support for the Cortina Systems Gemini family SoCs
405 
406 config ARCH_EBSA110
407         bool "EBSA-110"
408         select ARCH_USES_GETTIMEOFFSET
409         select CPU_SA110
410         select ISA
411         select NEED_MACH_IO_H
412         select NEED_MACH_MEMORY_H
413         select NO_IOPORT_MAP
414         help
415           This is an evaluation board for the StrongARM processor available
416           from Digital. It has limited hardware on-board, including an
417           Ethernet interface, two PCMCIA sockets, two serial ports and a
418           parallel port.
419 
420 config ARCH_EFM32
421         bool "Energy Micro efm32"
422         depends on !MMU
423         select ARCH_REQUIRE_GPIOLIB
424         select ARM_NVIC
425         select AUTO_ZRELADDR
426         select CLKSRC_OF
427         select COMMON_CLK
428         select CPU_V7M
429         select GENERIC_CLOCKEVENTS
430         select NO_DMA
431         select NO_IOPORT_MAP
432         select SPARSE_IRQ
433         select USE_OF
434         help
435           Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
436           processors.
437 
438 config ARCH_EP93XX
439         bool "EP93xx-based"
440         select ARCH_HAS_HOLES_MEMORYMODEL
441         select ARCH_REQUIRE_GPIOLIB
442         select ARCH_USES_GETTIMEOFFSET
443         select ARM_AMBA
444         select ARM_VIC
445         select CLKDEV_LOOKUP
446         select CPU_ARM920T
447         help
448           This enables support for the Cirrus EP93xx series of CPUs.
449 
450 config ARCH_FOOTBRIDGE
451         bool "FootBridge"
452         select CPU_SA110
453         select FOOTBRIDGE
454         select GENERIC_CLOCKEVENTS
455         select HAVE_IDE
456         select NEED_MACH_IO_H if !MMU
457         select NEED_MACH_MEMORY_H
458         help
459           Support for systems based on the DC21285 companion chip
460           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
461 
462 config ARCH_NETX
463         bool "Hilscher NetX based"
464         select ARM_VIC
465         select CLKSRC_MMIO
466         select CPU_ARM926T
467         select GENERIC_CLOCKEVENTS
468         help
469           This enables support for systems based on the Hilscher NetX Soc
470 
471 config ARCH_IOP13XX
472         bool "IOP13xx-based"
473         depends on MMU
474         select CPU_XSC3
475         select NEED_MACH_MEMORY_H
476         select NEED_RET_TO_USER
477         select PCI
478         select PLAT_IOP
479         select VMSPLIT_1G
480         select SPARSE_IRQ
481         help
482           Support for Intel's IOP13XX (XScale) family of processors.
483 
484 config ARCH_IOP32X
485         bool "IOP32x-based"
486         depends on MMU
487         select ARCH_REQUIRE_GPIOLIB
488         select CPU_XSCALE
489         select GPIO_IOP
490         select NEED_RET_TO_USER
491         select PCI
492         select PLAT_IOP
493         help
494           Support for Intel's 80219 and IOP32X (XScale) family of
495           processors.
496 
497 config ARCH_IOP33X
498         bool "IOP33x-based"
499         depends on MMU
500         select ARCH_REQUIRE_GPIOLIB
501         select CPU_XSCALE
502         select GPIO_IOP
503         select NEED_RET_TO_USER
504         select PCI
505         select PLAT_IOP
506         help
507           Support for Intel's IOP33X (XScale) family of processors.
508 
509 config ARCH_IXP4XX
510         bool "IXP4xx-based"
511         depends on MMU
512         select ARCH_HAS_DMA_SET_COHERENT_MASK
513         select ARCH_REQUIRE_GPIOLIB
514         select ARCH_SUPPORTS_BIG_ENDIAN
515         select CLKSRC_MMIO
516         select CPU_XSCALE
517         select DMABOUNCE if PCI
518         select GENERIC_CLOCKEVENTS
519         select MIGHT_HAVE_PCI
520         select NEED_MACH_IO_H
521         select USB_EHCI_BIG_ENDIAN_DESC
522         select USB_EHCI_BIG_ENDIAN_MMIO
523         help
524           Support for Intel's IXP4XX (XScale) family of processors.
525 
526 config ARCH_DOVE
527         bool "Marvell Dove"
528         select ARCH_REQUIRE_GPIOLIB
529         select CPU_PJ4
530         select GENERIC_CLOCKEVENTS
531         select MIGHT_HAVE_PCI
532         select MVEBU_MBUS
533         select PINCTRL
534         select PINCTRL_DOVE
535         select PLAT_ORION_LEGACY
536         help
537           Support for the Marvell Dove SoC 88AP510
538 
539 config ARCH_MV78XX0
540         bool "Marvell MV78xx0"
541         select ARCH_REQUIRE_GPIOLIB
542         select CPU_FEROCEON
543         select GENERIC_CLOCKEVENTS
544         select MVEBU_MBUS
545         select PCI
546         select PLAT_ORION_LEGACY
547         help
548           Support for the following Marvell MV78xx0 series SoCs:
549           MV781x0, MV782x0.
550 
551 config ARCH_ORION5X
552         bool "Marvell Orion"
553         depends on MMU
554         select ARCH_REQUIRE_GPIOLIB
555         select CPU_FEROCEON
556         select GENERIC_CLOCKEVENTS
557         select MVEBU_MBUS
558         select PCI
559         select PLAT_ORION_LEGACY
560         help
561           Support for the following Marvell Orion 5x series SoCs:
562           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
563           Orion-2 (5281), Orion-1-90 (6183).
564 
565 config ARCH_MMP
566         bool "Marvell PXA168/910/MMP2"
567         depends on MMU
568         select ARCH_REQUIRE_GPIOLIB
569         select CLKDEV_LOOKUP
570         select GENERIC_ALLOCATOR
571         select GENERIC_CLOCKEVENTS
572         select GPIO_PXA
573         select IRQ_DOMAIN
574         select MULTI_IRQ_HANDLER
575         select PINCTRL
576         select PLAT_PXA
577         select SPARSE_IRQ
578         help
579           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
580 
581 config ARCH_KS8695
582         bool "Micrel/Kendin KS8695"
583         select ARCH_REQUIRE_GPIOLIB
584         select CLKSRC_MMIO
585         select CPU_ARM922T
586         select GENERIC_CLOCKEVENTS
587         select NEED_MACH_MEMORY_H
588         help
589           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
590           System-on-Chip devices.
591 
592 config ARCH_W90X900
593         bool "Nuvoton W90X900 CPU"
594         select ARCH_REQUIRE_GPIOLIB
595         select CLKDEV_LOOKUP
596         select CLKSRC_MMIO
597         select CPU_ARM926T
598         select GENERIC_CLOCKEVENTS
599         help
600           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
601           At present, the w90x900 has been renamed nuc900, regarding
602           the ARM series product line, you can login the following
603           link address to know more.
604 
605           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
606                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
607 
608 config ARCH_LPC32XX
609         bool "NXP LPC32XX"
610         select ARCH_REQUIRE_GPIOLIB
611         select ARM_AMBA
612         select CLKDEV_LOOKUP
613         select CLKSRC_MMIO
614         select CPU_ARM926T
615         select GENERIC_CLOCKEVENTS
616         select HAVE_IDE
617         select USE_OF
618         help
619           Support for the NXP LPC32XX family of processors
620 
621 config ARCH_PXA
622         bool "PXA2xx/PXA3xx-based"
623         depends on MMU
624         select ARCH_MTD_XIP
625         select ARCH_REQUIRE_GPIOLIB
626         select ARM_CPU_SUSPEND if PM
627         select AUTO_ZRELADDR
628         select CLKDEV_LOOKUP
629         select CLKSRC_MMIO
630         select CLKSRC_OF
631         select GENERIC_CLOCKEVENTS
632         select GPIO_PXA
633         select HAVE_IDE
634         select MULTI_IRQ_HANDLER
635         select PLAT_PXA
636         select SPARSE_IRQ
637         help
638           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
639 
640 config ARCH_MSM
641         bool "Qualcomm MSM (non-multiplatform)"
642         select ARCH_REQUIRE_GPIOLIB
643         select COMMON_CLK
644         select GENERIC_CLOCKEVENTS
645         help
646           Support for Qualcomm MSM/QSD based systems.  This runs on the
647           apps processor of the MSM/QSD and depends on a shared memory
648           interface to the modem processor which runs the baseband
649           stack and controls some vital subsystems
650           (clock and power control, etc).
651 
652 config ARCH_SHMOBILE_LEGACY
653         bool "Renesas ARM SoCs (non-multiplatform)"
654         select ARCH_SHMOBILE
655         select ARM_PATCH_PHYS_VIRT if MMU
656         select CLKDEV_LOOKUP
657         select CPU_V7
658         select GENERIC_CLOCKEVENTS
659         select HAVE_ARM_SCU if SMP
660         select HAVE_ARM_TWD if SMP
661         select HAVE_MACH_CLKDEV
662         select HAVE_SMP
663         select MIGHT_HAVE_CACHE_L2X0
664         select MULTI_IRQ_HANDLER
665         select NO_IOPORT_MAP
666         select PINCTRL
667         select PM_GENERIC_DOMAINS if PM
668         select SH_CLK_CPG
669         select SPARSE_IRQ
670         help
671           Support for Renesas ARM SoC platforms using a non-multiplatform
672           kernel. This includes the SH-Mobile, R-Mobile, EMMA-Mobile, R-Car
673           and RZ families.
674 
675 config ARCH_RPC
676         bool "RiscPC"
677         select ARCH_ACORN
678         select ARCH_MAY_HAVE_PC_FDC
679         select ARCH_SPARSEMEM_ENABLE
680         select ARCH_USES_GETTIMEOFFSET
681         select CPU_SA110
682         select FIQ
683         select HAVE_IDE
684         select HAVE_PATA_PLATFORM
685         select ISA_DMA_API
686         select NEED_MACH_IO_H
687         select NEED_MACH_MEMORY_H
688         select NO_IOPORT_MAP
689         select VIRT_TO_BUS
690         help
691           On the Acorn Risc-PC, Linux can support the internal IDE disk and
692           CD-ROM interface, serial and parallel port, and the floppy drive.
693 
694 config ARCH_SA1100
695         bool "SA1100-based"
696         select ARCH_MTD_XIP
697         select ARCH_REQUIRE_GPIOLIB
698         select ARCH_SPARSEMEM_ENABLE
699         select CLKDEV_LOOKUP
700         select CLKSRC_MMIO
701         select CPU_FREQ
702         select CPU_SA1100
703         select GENERIC_CLOCKEVENTS
704         select HAVE_IDE
705         select ISA
706         select NEED_MACH_MEMORY_H
707         select SPARSE_IRQ
708         help
709           Support for StrongARM 11x0 based boards.
710 
711 config ARCH_S3C24XX
712         bool "Samsung S3C24XX SoCs"
713         select ARCH_REQUIRE_GPIOLIB
714         select ATAGS
715         select CLKDEV_LOOKUP
716         select CLKSRC_SAMSUNG_PWM
717         select GENERIC_CLOCKEVENTS
718         select GPIO_SAMSUNG
719         select HAVE_S3C2410_I2C if I2C
720         select HAVE_S3C2410_WATCHDOG if WATCHDOG
721         select HAVE_S3C_RTC if RTC_CLASS
722         select MULTI_IRQ_HANDLER
723         select NEED_MACH_IO_H
724         select SAMSUNG_ATAGS
725         help
726           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
727           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
728           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
729           Samsung SMDK2410 development board (and derivatives).
730 
731 config ARCH_S3C64XX
732         bool "Samsung S3C64XX"
733         select ARCH_REQUIRE_GPIOLIB
734         select ARM_AMBA
735         select ARM_VIC
736         select ATAGS
737         select CLKDEV_LOOKUP
738         select CLKSRC_SAMSUNG_PWM
739         select COMMON_CLK_SAMSUNG
740         select CPU_V6K
741         select GENERIC_CLOCKEVENTS
742         select GPIO_SAMSUNG
743         select HAVE_S3C2410_I2C if I2C
744         select HAVE_S3C2410_WATCHDOG if WATCHDOG
745         select HAVE_TCM
746         select NO_IOPORT_MAP
747         select PLAT_SAMSUNG
748         select PM_GENERIC_DOMAINS if PM
749         select S3C_DEV_NAND
750         select S3C_GPIO_TRACK
751         select SAMSUNG_ATAGS
752         select SAMSUNG_WAKEMASK
753         select SAMSUNG_WDT_RESET
754         help
755           Samsung S3C64XX series based systems
756 
757 config ARCH_DAVINCI
758         bool "TI DaVinci"
759         select ARCH_HAS_HOLES_MEMORYMODEL
760         select ARCH_REQUIRE_GPIOLIB
761         select CLKDEV_LOOKUP
762         select GENERIC_ALLOCATOR
763         select GENERIC_CLOCKEVENTS
764         select GENERIC_IRQ_CHIP
765         select HAVE_IDE
766         select TI_PRIV_EDMA
767         select USE_OF
768         select ZONE_DMA
769         help
770           Support for TI's DaVinci platform.
771 
772 config ARCH_OMAP1
773         bool "TI OMAP1"
774         depends on MMU
775         select ARCH_HAS_HOLES_MEMORYMODEL
776         select ARCH_OMAP
777         select ARCH_REQUIRE_GPIOLIB
778         select CLKDEV_LOOKUP
779         select CLKSRC_MMIO
780         select GENERIC_CLOCKEVENTS
781         select GENERIC_IRQ_CHIP
782         select HAVE_IDE
783         select IRQ_DOMAIN
784         select NEED_MACH_IO_H if PCCARD
785         select NEED_MACH_MEMORY_H
786         help
787           Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
788 
789 endchoice
790 
791 menu "Multiple platform selection"
792         depends on ARCH_MULTIPLATFORM
793 
794 comment "CPU Core family selection"
795 
796 config ARCH_MULTI_V4
797         bool "ARMv4 based platforms (FA526)"
798         depends on !ARCH_MULTI_V6_V7
799         select ARCH_MULTI_V4_V5
800         select CPU_FA526
801 
802 config ARCH_MULTI_V4T
803         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
804         depends on !ARCH_MULTI_V6_V7
805         select ARCH_MULTI_V4_V5
806         select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \
807                 CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \
808                 CPU_ARM925T || CPU_ARM940T)
809 
810 config ARCH_MULTI_V5
811         bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
812         depends on !ARCH_MULTI_V6_V7
813         select ARCH_MULTI_V4_V5
814         select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
815                 CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
816                 CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
817 
818 config ARCH_MULTI_V4_V5
819         bool
820 
821 config ARCH_MULTI_V6
822         bool "ARMv6 based platforms (ARM11)"
823         select ARCH_MULTI_V6_V7
824         select CPU_V6K
825 
826 config ARCH_MULTI_V7
827         bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
828         default y
829         select ARCH_MULTI_V6_V7
830         select CPU_V7
831         select HAVE_SMP
832 
833 config ARCH_MULTI_V6_V7
834         bool
835         select MIGHT_HAVE_CACHE_L2X0
836 
837 config ARCH_MULTI_CPU_AUTO
838         def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
839         select ARCH_MULTI_V5
840 
841 endmenu
842 
843 config ARCH_VIRT
844         bool "Dummy Virtual Machine" if ARCH_MULTI_V7
845         select ARM_AMBA
846         select ARM_GIC
847         select ARM_PSCI
848         select HAVE_ARM_ARCH_TIMER
849 
850 #
851 # This is sorted alphabetically by mach-* pathname.  However, plat-*
852 # Kconfigs may be included either alphabetically (according to the
853 # plat- suffix) or along side the corresponding mach-* source.
854 #
855 source "arch/arm/mach-mvebu/Kconfig"
856 
857 source "arch/arm/mach-at91/Kconfig"
858 
859 source "arch/arm/mach-axxia/Kconfig"
860 
861 source "arch/arm/mach-bcm/Kconfig"
862 
863 source "arch/arm/mach-berlin/Kconfig"
864 
865 source "arch/arm/mach-clps711x/Kconfig"
866 
867 source "arch/arm/mach-cns3xxx/Kconfig"
868 
869 source "arch/arm/mach-davinci/Kconfig"
870 
871 source "arch/arm/mach-dove/Kconfig"
872 
873 source "arch/arm/mach-ep93xx/Kconfig"
874 
875 source "arch/arm/mach-footbridge/Kconfig"
876 
877 source "arch/arm/mach-gemini/Kconfig"
878 
879 source "arch/arm/mach-highbank/Kconfig"
880 
881 source "arch/arm/mach-hisi/Kconfig"
882 
883 source "arch/arm/mach-integrator/Kconfig"
884 
885 source "arch/arm/mach-iop32x/Kconfig"
886 
887 source "arch/arm/mach-iop33x/Kconfig"
888 
889 source "arch/arm/mach-iop13xx/Kconfig"
890 
891 source "arch/arm/mach-ixp4xx/Kconfig"
892 
893 source "arch/arm/mach-keystone/Kconfig"
894 
895 source "arch/arm/mach-ks8695/Kconfig"
896 
897 source "arch/arm/mach-meson/Kconfig"
898 
899 source "arch/arm/mach-msm/Kconfig"
900 
901 source "arch/arm/mach-moxart/Kconfig"
902 
903 source "arch/arm/mach-mv78xx0/Kconfig"
904 
905 source "arch/arm/mach-imx/Kconfig"
906 
907 source "arch/arm/mach-mediatek/Kconfig"
908 
909 source "arch/arm/mach-mxs/Kconfig"
910 
911 source "arch/arm/mach-netx/Kconfig"
912 
913 source "arch/arm/mach-nomadik/Kconfig"
914 
915 source "arch/arm/mach-nspire/Kconfig"
916 
917 source "arch/arm/plat-omap/Kconfig"
918 
919 source "arch/arm/mach-omap1/Kconfig"
920 
921 source "arch/arm/mach-omap2/Kconfig"
922 
923 source "arch/arm/mach-orion5x/Kconfig"
924 
925 source "arch/arm/mach-picoxcell/Kconfig"
926 
927 source "arch/arm/mach-pxa/Kconfig"
928 source "arch/arm/plat-pxa/Kconfig"
929 
930 source "arch/arm/mach-mmp/Kconfig"
931 
932 source "arch/arm/mach-qcom/Kconfig"
933 
934 source "arch/arm/mach-realview/Kconfig"
935 
936 source "arch/arm/mach-rockchip/Kconfig"
937 
938 source "arch/arm/mach-sa1100/Kconfig"
939 
940 source "arch/arm/mach-socfpga/Kconfig"
941 
942 source "arch/arm/mach-spear/Kconfig"
943 
944 source "arch/arm/mach-sti/Kconfig"
945 
946 source "arch/arm/mach-s3c24xx/Kconfig"
947 
948 source "arch/arm/mach-s3c64xx/Kconfig"
949 
950 source "arch/arm/mach-s5pv210/Kconfig"
951 
952 source "arch/arm/mach-exynos/Kconfig"
953 source "arch/arm/plat-samsung/Kconfig"
954 
955 source "arch/arm/mach-shmobile/Kconfig"
956 
957 source "arch/arm/mach-sunxi/Kconfig"
958 
959 source "arch/arm/mach-prima2/Kconfig"
960 
961 source "arch/arm/mach-tegra/Kconfig"
962 
963 source "arch/arm/mach-u300/Kconfig"
964 
965 source "arch/arm/mach-ux500/Kconfig"
966 
967 source "arch/arm/mach-versatile/Kconfig"
968 
969 source "arch/arm/mach-vexpress/Kconfig"
970 source "arch/arm/plat-versatile/Kconfig"
971 
972 source "arch/arm/mach-vt8500/Kconfig"
973 
974 source "arch/arm/mach-w90x900/Kconfig"
975 
976 source "arch/arm/mach-zynq/Kconfig"
977 
978 # Definitions to make life easier
979 config ARCH_ACORN
980         bool
981 
982 config PLAT_IOP
983         bool
984         select GENERIC_CLOCKEVENTS
985 
986 config PLAT_ORION
987         bool
988         select CLKSRC_MMIO
989         select COMMON_CLK
990         select GENERIC_IRQ_CHIP
991         select IRQ_DOMAIN
992 
993 config PLAT_ORION_LEGACY
994         bool
995         select PLAT_ORION
996 
997 config PLAT_PXA
998         bool
999 
1000 config PLAT_VERSATILE
1001         bool
1002 
1003 config ARM_TIMER_SP804
1004         bool
1005         select CLKSRC_MMIO
1006         select CLKSRC_OF if OF
1007 
1008 source "arch/arm/firmware/Kconfig"
1009 
1010 source arch/arm/mm/Kconfig
1011 
1012 config IWMMXT
1013         bool "Enable iWMMXt support"
1014         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
1015         default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
1016         help
1017           Enable support for iWMMXt context switching at run time if
1018           running on a CPU that supports it.
1019 
1020 config MULTI_IRQ_HANDLER
1021         bool
1022         help
1023           Allow each machine to specify it's own IRQ handler at run time.
1024 
1025 if !MMU
1026 source "arch/arm/Kconfig-nommu"
1027 endif
1028 
1029 config PJ4B_ERRATA_4742
1030         bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
1031         depends on CPU_PJ4B && MACH_ARMADA_370
1032         default y
1033         help
1034           When coming out of either a Wait for Interrupt (WFI) or a Wait for
1035           Event (WFE) IDLE states, a specific timing sensitivity exists between
1036           the retiring WFI/WFE instructions and the newly issued subsequent
1037           instructions.  This sensitivity can result in a CPU hang scenario.
1038           Workaround:
1039           The software must insert either a Data Synchronization Barrier (DSB)
1040           or Data Memory Barrier (DMB) command immediately after the WFI/WFE
1041           instruction
1042 
1043 config ARM_ERRATA_326103
1044         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1045         depends on CPU_V6
1046         help
1047           Executing a SWP instruction to read-only memory does not set bit 11
1048           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1049           treat the access as a read, preventing a COW from occurring and
1050           causing the faulting task to livelock.
1051 
1052 config ARM_ERRATA_411920
1053         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1054         depends on CPU_V6 || CPU_V6K
1055         help
1056           Invalidation of the Instruction Cache operation can
1057           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1058           It does not affect the MPCore. This option enables the ARM Ltd.
1059           recommended workaround.
1060 
1061 config ARM_ERRATA_430973
1062         bool "ARM errata: Stale prediction on replaced interworking branch"
1063         depends on CPU_V7
1064         help
1065           This option enables the workaround for the 430973 Cortex-A8
1066           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1067           interworking branch is replaced with another code sequence at the
1068           same virtual address, whether due to self-modifying code or virtual
1069           to physical address re-mapping, Cortex-A8 does not recover from the
1070           stale interworking branch prediction. This results in Cortex-A8
1071           executing the new code sequence in the incorrect ARM or Thumb state.
1072           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1073           and also flushes the branch target cache at every context switch.
1074           Note that setting specific bits in the ACTLR register may not be
1075           available in non-secure mode.
1076 
1077 config ARM_ERRATA_458693
1078         bool "ARM errata: Processor deadlock when a false hazard is created"
1079         depends on CPU_V7
1080         depends on !ARCH_MULTIPLATFORM
1081         help
1082           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1083           erratum. For very specific sequences of memory operations, it is
1084           possible for a hazard condition intended for a cache line to instead
1085           be incorrectly associated with a different cache line. This false
1086           hazard might then cause a processor deadlock. The workaround enables
1087           the L1 caching of the NEON accesses and disables the PLD instruction
1088           in the ACTLR register. Note that setting specific bits in the ACTLR
1089           register may not be available in non-secure mode.
1090 
1091 config ARM_ERRATA_460075
1092         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1093         depends on CPU_V7
1094         depends on !ARCH_MULTIPLATFORM
1095         help
1096           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1097           erratum. Any asynchronous access to the L2 cache may encounter a
1098           situation in which recent store transactions to the L2 cache are lost
1099           and overwritten with stale memory contents from external memory. The
1100           workaround disables the write-allocate mode for the L2 cache via the
1101           ACTLR register. Note that setting specific bits in the ACTLR register
1102           may not be available in non-secure mode.
1103 
1104 config ARM_ERRATA_742230
1105         bool "ARM errata: DMB operation may be faulty"
1106         depends on CPU_V7 && SMP
1107         depends on !ARCH_MULTIPLATFORM
1108         help
1109           This option enables the workaround for the 742230 Cortex-A9
1110           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1111           between two write operations may not ensure the correct visibility
1112           ordering of the two writes. This workaround sets a specific bit in
1113           the diagnostic register of the Cortex-A9 which causes the DMB
1114           instruction to behave as a DSB, ensuring the correct behaviour of
1115           the two writes.
1116 
1117 config ARM_ERRATA_742231
1118         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1119         depends on CPU_V7 && SMP
1120         depends on !ARCH_MULTIPLATFORM
1121         help
1122           This option enables the workaround for the 742231 Cortex-A9
1123           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1124           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1125           accessing some data located in the same cache line, may get corrupted
1126           data due to bad handling of the address hazard when the line gets
1127           replaced from one of the CPUs at the same time as another CPU is
1128           accessing it. This workaround sets specific bits in the diagnostic
1129           register of the Cortex-A9 which reduces the linefill issuing
1130           capabilities of the processor.
1131 
1132 config ARM_ERRATA_643719
1133         bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
1134         depends on CPU_V7 && SMP
1135         help
1136           This option enables the workaround for the 643719 Cortex-A9 (prior to
1137           r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
1138           register returns zero when it should return one. The workaround
1139           corrects this value, ensuring cache maintenance operations which use
1140           it behave as intended and avoiding data corruption.
1141 
1142 config ARM_ERRATA_720789
1143         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1144         depends on CPU_V7
1145         help
1146           This option enables the workaround for the 720789 Cortex-A9 (prior to
1147           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1148           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1149           As a consequence of this erratum, some TLB entries which should be
1150           invalidated are not, resulting in an incoherency in the system page
1151           tables. The workaround changes the TLB flushing routines to invalidate
1152           entries regardless of the ASID.
1153 
1154 config ARM_ERRATA_743622
1155         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1156         depends on CPU_V7
1157         depends on !ARCH_MULTIPLATFORM
1158         help
1159           This option enables the workaround for the 743622 Cortex-A9
1160           (r2p*) erratum. Under very rare conditions, a faulty
1161           optimisation in the Cortex-A9 Store Buffer may lead to data
1162           corruption. This workaround sets a specific bit in the diagnostic
1163           register of the Cortex-A9 which disables the Store Buffer
1164           optimisation, preventing the defect from occurring. This has no
1165           visible impact on the overall performance or power consumption of the
1166           processor.
1167 
1168 config ARM_ERRATA_751472
1169         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1170         depends on CPU_V7
1171         depends on !ARCH_MULTIPLATFORM
1172         help
1173           This option enables the workaround for the 751472 Cortex-A9 (prior
1174           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1175           completion of a following broadcasted operation if the second
1176           operation is received by a CPU before the ICIALLUIS has completed,
1177           potentially leading to corrupted entries in the cache or TLB.
1178 
1179 config ARM_ERRATA_754322
1180         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1181         depends on CPU_V7
1182         help
1183           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1184           r3p*) erratum. A speculative memory access may cause a page table walk
1185           which starts prior to an ASID switch but completes afterwards. This
1186           can populate the micro-TLB with a stale entry which may be hit with
1187           the new ASID. This workaround places two dsb instructions in the mm
1188           switching code so that no page table walks can cross the ASID switch.
1189 
1190 config ARM_ERRATA_754327
1191         bool "ARM errata: no automatic Store Buffer drain"
1192         depends on CPU_V7 && SMP
1193         help
1194           This option enables the workaround for the 754327 Cortex-A9 (prior to
1195           r2p0) erratum. The Store Buffer does not have any automatic draining
1196           mechanism and therefore a livelock may occur if an external agent
1197           continuously polls a memory location waiting to observe an update.
1198           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1199           written polling loops from denying visibility of updates to memory.
1200 
1201 config ARM_ERRATA_364296
1202         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1203         depends on CPU_V6
1204         help
1205           This options enables the workaround for the 364296 ARM1136
1206           r0p2 erratum (possible cache data corruption with
1207           hit-under-miss enabled). It sets the undocumented bit 31 in
1208           the auxiliary control register and the FI bit in the control
1209           register, thus disabling hit-under-miss without putting the
1210           processor into full low interrupt latency mode. ARM11MPCore
1211           is not affected.
1212 
1213 config ARM_ERRATA_764369
1214         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1215         depends on CPU_V7 && SMP
1216         help
1217           This option enables the workaround for erratum 764369
1218           affecting Cortex-A9 MPCore with two or more processors (all
1219           current revisions). Under certain timing circumstances, a data
1220           cache line maintenance operation by MVA targeting an Inner
1221           Shareable memory region may fail to proceed up to either the
1222           Point of Coherency or to the Point of Unification of the
1223           system. This workaround adds a DSB instruction before the
1224           relevant cache maintenance functions and sets a specific bit
1225           in the diagnostic control register of the SCU.
1226 
1227 config ARM_ERRATA_775420
1228        bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1229        depends on CPU_V7
1230        help
1231          This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1232          r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1233          operation aborts with MMU exception, it might cause the processor
1234          to deadlock. This workaround puts DSB before executing ISB if
1235          an abort may occur on cache maintenance.
1236 
1237 config ARM_ERRATA_798181
1238         bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1239         depends on CPU_V7 && SMP
1240         help
1241           On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1242           adequately shooting down all use of the old entries. This
1243           option enables the Linux kernel workaround for this erratum
1244           which sends an IPI to the CPUs that are running the same ASID
1245           as the one being invalidated.
1246 
1247 config ARM_ERRATA_773022
1248         bool "ARM errata: incorrect instructions may be executed from loop buffer"
1249         depends on CPU_V7
1250         help
1251           This option enables the workaround for the 773022 Cortex-A15
1252           (up to r0p4) erratum. In certain rare sequences of code, the
1253           loop buffer may deliver incorrect instructions. This
1254           workaround disables the loop buffer to avoid the erratum.
1255 
1256 endmenu
1257 
1258 source "arch/arm/common/Kconfig"
1259 
1260 menu "Bus support"
1261 
1262 config ARM_AMBA
1263         bool
1264 
1265 config ISA
1266         bool
1267         help
1268           Find out whether you have ISA slots on your motherboard.  ISA is the
1269           name of a bus system, i.e. the way the CPU talks to the other stuff
1270           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1271           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1272           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1273 
1274 # Select ISA DMA controller support
1275 config ISA_DMA
1276         bool
1277         select ISA_DMA_API
1278 
1279 # Select ISA DMA interface
1280 config ISA_DMA_API
1281         bool
1282 
1283 config PCI
1284         bool "PCI support" if MIGHT_HAVE_PCI
1285         help
1286           Find out whether you have a PCI motherboard. PCI is the name of a
1287           bus system, i.e. the way the CPU talks to the other stuff inside
1288           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1289           VESA. If you have PCI, say Y, otherwise N.
1290 
1291 config PCI_DOMAINS
1292         bool
1293         depends on PCI
1294 
1295 config PCI_NANOENGINE
1296         bool "BSE nanoEngine PCI support"
1297         depends on SA1100_NANOENGINE
1298         help
1299           Enable PCI on the BSE nanoEngine board.
1300 
1301 config PCI_SYSCALL
1302         def_bool PCI
1303 
1304 config PCI_HOST_ITE8152
1305         bool
1306         depends on PCI && MACH_ARMCORE
1307         default y
1308         select DMABOUNCE
1309 
1310 source "drivers/pci/Kconfig"
1311 source "drivers/pci/pcie/Kconfig"
1312 
1313 source "drivers/pcmcia/Kconfig"
1314 
1315 endmenu
1316 
1317 menu "Kernel Features"
1318 
1319 config HAVE_SMP
1320         bool
1321         help
1322           This option should be selected by machines which have an SMP-
1323           capable CPU.
1324 
1325           The only effect of this option is to make the SMP-related
1326           options available to the user for configuration.
1327 
1328 config SMP
1329         bool "Symmetric Multi-Processing"
1330         depends on CPU_V6K || CPU_V7
1331         depends on GENERIC_CLOCKEVENTS
1332         depends on HAVE_SMP
1333         depends on MMU || ARM_MPU
1334         help
1335           This enables support for systems with more than one CPU. If you have
1336           a system with only one CPU, say N. If you have a system with more
1337           than one CPU, say Y.
1338 
1339           If you say N here, the kernel will run on uni- and multiprocessor
1340           machines, but will use only one CPU of a multiprocessor machine. If
1341           you say Y here, the kernel will run on many, but not all,
1342           uniprocessor machines. On a uniprocessor machine, the kernel
1343           will run faster if you say N here.
1344 
1345           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1346           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1347           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1348 
1349           If you don't know what to do here, say N.
1350 
1351 config SMP_ON_UP
1352         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1353         depends on SMP && !XIP_KERNEL && MMU
1354         default y
1355         help
1356           SMP kernels contain instructions which fail on non-SMP processors.
1357           Enabling this option allows the kernel to modify itself to make
1358           these instructions safe.  Disabling it allows about 1K of space
1359           savings.
1360 
1361           If you don't know what to do here, say Y.
1362 
1363 config ARM_CPU_TOPOLOGY
1364         bool "Support cpu topology definition"
1365         depends on SMP && CPU_V7
1366         default y
1367         help
1368           Support ARM cpu topology definition. The MPIDR register defines
1369           affinity between processors which is then used to describe the cpu
1370           topology of an ARM System.
1371 
1372 config SCHED_MC
1373         bool "Multi-core scheduler support"
1374         depends on ARM_CPU_TOPOLOGY
1375         help
1376           Multi-core scheduler support improves the CPU scheduler's decision
1377           making when dealing with multi-core CPU chips at a cost of slightly
1378           increased overhead in some places. If unsure say N here.
1379 
1380 config SCHED_SMT
1381         bool "SMT scheduler support"
1382         depends on ARM_CPU_TOPOLOGY
1383         help
1384           Improves the CPU scheduler's decision making when dealing with
1385           MultiThreading at a cost of slightly increased overhead in some
1386           places. If unsure say N here.
1387 
1388 config HAVE_ARM_SCU
1389         bool
1390         help
1391           This option enables support for the ARM system coherency unit
1392 
1393 config HAVE_ARM_ARCH_TIMER
1394         bool "Architected timer support"
1395         depends on CPU_V7
1396         select ARM_ARCH_TIMER
1397         select GENERIC_CLOCKEVENTS
1398         help
1399           This option enables support for the ARM architected timer
1400 
1401 config HAVE_ARM_TWD
1402         bool
1403         depends on SMP
1404         select CLKSRC_OF if OF
1405         help
1406           This options enables support for the ARM timer and watchdog unit
1407 
1408 config MCPM
1409         bool "Multi-Cluster Power Management"
1410         depends on CPU_V7 && SMP
1411         help
1412           This option provides the common power management infrastructure
1413           for (multi-)cluster based systems, such as big.LITTLE based
1414           systems.
1415 
1416 config MCPM_QUAD_CLUSTER
1417         bool
1418         depends on MCPM
1419         help
1420           To avoid wasting resources unnecessarily, MCPM only supports up
1421           to 2 clusters by default.
1422           Platforms with 3 or 4 clusters that use MCPM must select this
1423           option to allow the additional clusters to be managed.
1424 
1425 config BIG_LITTLE
1426         bool "big.LITTLE support (Experimental)"
1427         depends on CPU_V7 && SMP
1428         select MCPM
1429         help
1430           This option enables support selections for the big.LITTLE
1431           system architecture.
1432 
1433 config BL_SWITCHER
1434         bool "big.LITTLE switcher support"
1435         depends on BIG_LITTLE && MCPM && HOTPLUG_CPU
1436         select ARM_CPU_SUSPEND
1437         select CPU_PM
1438         help
1439           The big.LITTLE "switcher" provides the core functionality to
1440           transparently handle transition between a cluster of A15's
1441           and a cluster of A7's in a big.LITTLE system.
1442 
1443 config BL_SWITCHER_DUMMY_IF
1444         tristate "Simple big.LITTLE switcher user interface"
1445         depends on BL_SWITCHER && DEBUG_KERNEL
1446         help
1447           This is a simple and dummy char dev interface to control
1448           the big.LITTLE switcher core code.  It is meant for
1449           debugging purposes only.
1450 
1451 choice
1452         prompt "Memory split"
1453         depends on MMU
1454         default VMSPLIT_3G
1455         help
1456           Select the desired split between kernel and user memory.
1457 
1458           If you are not absolutely sure what you are doing, leave this
1459           option alone!
1460 
1461         config VMSPLIT_3G
1462                 bool "3G/1G user/kernel split"
1463         config VMSPLIT_2G
1464                 bool "2G/2G user/kernel split"
1465         config VMSPLIT_1G
1466                 bool "1G/3G user/kernel split"
1467 endchoice
1468 
1469 config PAGE_OFFSET
1470         hex
1471         default PHYS_OFFSET if !MMU
1472         default 0x40000000 if VMSPLIT_1G
1473         default 0x80000000 if VMSPLIT_2G
1474         default 0xC0000000
1475 
1476 config NR_CPUS
1477         int "Maximum number of CPUs (2-32)"
1478         range 2 32
1479         depends on SMP
1480         default "4"
1481 
1482 config HOTPLUG_CPU
1483         bool "Support for hot-pluggable CPUs"
1484         depends on SMP
1485         help
1486           Say Y here to experiment with turning CPUs off and on.  CPUs
1487           can be controlled through /sys/devices/system/cpu.
1488 
1489 config ARM_PSCI
1490         bool "Support for the ARM Power State Coordination Interface (PSCI)"
1491         depends on CPU_V7
1492         help
1493           Say Y here if you want Linux to communicate with system firmware
1494           implementing the PSCI specification for CPU-centric power
1495           management operations described in ARM document number ARM DEN
1496           0022A ("Power State Coordination Interface System Software on
1497           ARM processors").
1498 
1499 # The GPIO number here must be sorted by descending number. In case of
1500 # a multiplatform kernel, we just want the highest value required by the
1501 # selected platforms.
1502 config ARCH_NR_GPIO
1503         int
1504         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1505         default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \
1506                 SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210
1507         default 416 if ARCH_SUNXI
1508         default 392 if ARCH_U8500
1509         default 352 if ARCH_VT8500
1510         default 288 if ARCH_ROCKCHIP
1511         default 264 if MACH_H4700
1512         default 0
1513         help
1514           Maximum number of GPIOs in the system.
1515 
1516           If unsure, leave the default value.
1517 
1518 source kernel/Kconfig.preempt
1519 
1520 config HZ_FIXED
1521         int
1522         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \
1523                 ARCH_S5PV210 || ARCH_EXYNOS4
1524         default AT91_TIMER_HZ if ARCH_AT91
1525         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
1526         default 0
1527 
1528 choice
1529         depends on HZ_FIXED = 0
1530         prompt "Timer frequency"
1531 
1532 config HZ_100
1533         bool "100 Hz"
1534 
1535 config HZ_200
1536         bool "200 Hz"
1537 
1538 config HZ_250
1539         bool "250 Hz"
1540 
1541 config HZ_300
1542         bool "300 Hz"
1543 
1544 config HZ_500
1545         bool "500 Hz"
1546 
1547 config HZ_1000
1548         bool "1000 Hz"
1549 
1550 endchoice
1551 
1552 config HZ
1553         int
1554         default HZ_FIXED if HZ_FIXED != 0
1555         default 100 if HZ_100
1556         default 200 if HZ_200
1557         default 250 if HZ_250
1558         default 300 if HZ_300
1559         default 500 if HZ_500
1560         default 1000
1561 
1562 config SCHED_HRTICK
1563         def_bool HIGH_RES_TIMERS
1564 
1565 config THUMB2_KERNEL
1566         bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
1567         depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
1568         default y if CPU_THUMBONLY
1569         select AEABI
1570         select ARM_ASM_UNIFIED
1571         select ARM_UNWIND
1572         help
1573           By enabling this option, the kernel will be compiled in
1574           Thumb-2 mode. A compiler/assembler that understand the unified
1575           ARM-Thumb syntax is needed.
1576 
1577           If unsure, say N.
1578 
1579 config THUMB2_AVOID_R_ARM_THM_JUMP11
1580         bool "Work around buggy Thumb-2 short branch relocations in gas"
1581         depends on THUMB2_KERNEL && MODULES
1582         default y
1583         help
1584           Various binutils versions can resolve Thumb-2 branches to
1585           locally-defined, preemptible global symbols as short-range "b.n"
1586           branch instructions.
1587 
1588           This is a problem, because there's no guarantee the final
1589           destination of the symbol, or any candidate locations for a
1590           trampoline, are within range of the branch.  For this reason, the
1591           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1592           relocation in modules at all, and it makes little sense to add
1593           support.
1594 
1595           The symptom is that the kernel fails with an "unsupported
1596           relocation" error when loading some modules.
1597 
1598           Until fixed tools are available, passing
1599           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1600           code which hits this problem, at the cost of a bit of extra runtime
1601           stack usage in some cases.
1602 
1603           The problem is described in more detail at:
1604               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1605 
1606           Only Thumb-2 kernels are affected.
1607 
1608           Unless you are sure your tools don't have this problem, say Y.
1609 
1610 config ARM_ASM_UNIFIED
1611         bool
1612 
1613 config AEABI
1614         bool "Use the ARM EABI to compile the kernel"
1615         help
1616           This option allows for the kernel to be compiled using the latest
1617           ARM ABI (aka EABI).  This is only useful if you are using a user
1618           space environment that is also compiled with EABI.
1619 
1620           Since there are major incompatibilities between the legacy ABI and
1621           EABI, especially with regard to structure member alignment, this
1622           option also changes the kernel syscall calling convention to
1623           disambiguate both ABIs and allow for backward compatibility support
1624           (selected with CONFIG_OABI_COMPAT).
1625 
1626           To use this you need GCC version 4.0.0 or later.
1627 
1628 config OABI_COMPAT
1629         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1630         depends on AEABI && !THUMB2_KERNEL
1631         help
1632           This option preserves the old syscall interface along with the
1633           new (ARM EABI) one. It also provides a compatibility layer to
1634           intercept syscalls that have structure arguments which layout
1635           in memory differs between the legacy ABI and the new ARM EABI
1636           (only for non "thumb" binaries). This option adds a tiny
1637           overhead to all syscalls and produces a slightly larger kernel.
1638 
1639           The seccomp filter system will not be available when this is
1640           selected, since there is no way yet to sensibly distinguish
1641           between calling conventions during filtering.
1642 
1643           If you know you'll be using only pure EABI user space then you
1644           can say N here. If this option is not selected and you attempt
1645           to execute a legacy ABI binary then the result will be
1646           UNPREDICTABLE (in fact it can be predicted that it won't work
1647           at all). If in doubt say N.
1648 
1649 config ARCH_HAS_HOLES_MEMORYMODEL
1650         bool
1651 
1652 config ARCH_SPARSEMEM_ENABLE
1653         bool
1654 
1655 config ARCH_SPARSEMEM_DEFAULT
1656         def_bool ARCH_SPARSEMEM_ENABLE
1657 
1658 config ARCH_SELECT_MEMORY_MODEL
1659         def_bool ARCH_SPARSEMEM_ENABLE
1660 
1661 config HAVE_ARCH_PFN_VALID
1662         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1663 
1664 config HAVE_GENERIC_RCU_GUP
1665         def_bool y
1666         depends on ARM_LPAE
1667 
1668 config HIGHMEM
1669         bool "High Memory Support"
1670         depends on MMU
1671         help
1672           The address space of ARM processors is only 4 Gigabytes large
1673           and it has to accommodate user address space, kernel address
1674           space as well as some memory mapped IO. That means that, if you
1675           have a large amount of physical memory and/or IO, not all of the
1676           memory can be "permanently mapped" by the kernel. The physical
1677           memory that is not permanently mapped is called "high memory".
1678 
1679           Depending on the selected kernel/user memory split, minimum
1680           vmalloc space and actual amount of RAM, you may not need this
1681           option which should result in a slightly faster kernel.
1682 
1683           If unsure, say n.
1684 
1685 config HIGHPTE
1686         bool "Allocate 2nd-level pagetables from highmem"
1687         depends on HIGHMEM
1688 
1689 config HW_PERF_EVENTS
1690         bool "Enable hardware performance counter support for perf events"
1691         depends on PERF_EVENTS
1692         default y
1693         help
1694           Enable hardware performance counter support for perf events. If
1695           disabled, perf events will use software events only.
1696 
1697 config SYS_SUPPORTS_HUGETLBFS
1698        def_bool y
1699        depends on ARM_LPAE
1700 
1701 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
1702        def_bool y
1703        depends on ARM_LPAE
1704 
1705 config ARCH_WANT_GENERAL_HUGETLB
1706         def_bool y
1707 
1708 source "mm/Kconfig"
1709 
1710 config FORCE_MAX_ZONEORDER
1711         int "Maximum zone order" if ARCH_SHMOBILE_LEGACY
1712         range 11 64 if ARCH_SHMOBILE_LEGACY
1713         default "12" if SOC_AM33XX
1714         default "9" if SA1111 || ARCH_EFM32
1715         default "11"
1716         help
1717           The kernel memory allocator divides physically contiguous memory
1718           blocks into "zones", where each zone is a power of two number of
1719           pages.  This option selects the largest power of two that the kernel
1720           keeps in the memory allocator.  If you need to allocate very large
1721           blocks of physically contiguous memory, then you may need to
1722           increase this value.
1723 
1724           This config option is actually maximum order plus one. For example,
1725           a value of 11 means that the largest free memory block is 2^10 pages.
1726 
1727 config ALIGNMENT_TRAP
1728         bool
1729         depends on CPU_CP15_MMU
1730         default y if !ARCH_EBSA110
1731         select HAVE_PROC_CPU if PROC_FS
1732         help
1733           ARM processors cannot fetch/store information which is not
1734           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1735           address divisible by 4. On 32-bit ARM processors, these non-aligned
1736           fetch/store instructions will be emulated in software if you say
1737           here, which has a severe performance impact. This is necessary for
1738           correct operation of some network protocols. With an IP-only
1739           configuration it is safe to say N, otherwise say Y.
1740 
1741 config UACCESS_WITH_MEMCPY
1742         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1743         depends on MMU
1744         default y if CPU_FEROCEON
1745         help
1746           Implement faster copy_to_user and clear_user methods for CPU
1747           cores where a 8-word STM instruction give significantly higher
1748           memory write throughput than a sequence of individual 32bit stores.
1749 
1750           A possible side effect is a slight increase in scheduling latency
1751           between threads sharing the same address space if they invoke
1752           such copy operations with large buffers.
1753 
1754           However, if the CPU data cache is using a write-allocate mode,
1755           this option is unlikely to provide any performance gain.
1756 
1757 config SECCOMP
1758         bool
1759         prompt "Enable seccomp to safely compute untrusted bytecode"
1760         ---help---
1761           This kernel feature is useful for number crunching applications
1762           that may need to compute untrusted bytecode during their
1763           execution. By using pipes or other transports made available to
1764           the process as file descriptors supporting the read/write
1765           syscalls, it's possible to isolate those applications in
1766           their own address space using seccomp. Once seccomp is
1767           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1768           and the task is only allowed to execute a few safe syscalls
1769           defined by each seccomp mode.
1770 
1771 config SWIOTLB
1772         def_bool y
1773 
1774 config IOMMU_HELPER
1775         def_bool SWIOTLB
1776 
1777 config XEN_DOM0
1778         def_bool y
1779         depends on XEN
1780 
1781 config XEN
1782         bool "Xen guest support on ARM"
1783         depends on ARM && AEABI && OF
1784         depends on CPU_V7 && !CPU_V6
1785         depends on !GENERIC_ATOMIC64
1786         depends on MMU
1787         select ARCH_DMA_ADDR_T_64BIT
1788         select ARM_PSCI
1789         select SWIOTLB_XEN
1790         help
1791           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1792 
1793 endmenu
1794 
1795 menu "Boot options"
1796 
1797 config USE_OF
1798         bool "Flattened Device Tree support"
1799         select IRQ_DOMAIN
1800         select OF
1801         select OF_EARLY_FLATTREE
1802         select OF_RESERVED_MEM
1803         help
1804           Include support for flattened device tree machine descriptions.
1805 
1806 config ATAGS
1807         bool "Support for the traditional ATAGS boot data passing" if USE_OF
1808         default y
1809         help
1810           This is the traditional way of passing data to the kernel at boot
1811           time. If you are solely relying on the flattened device tree (or
1812           the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1813           to remove ATAGS support from your kernel binary.  If unsure,
1814           leave this to y.
1815 
1816 config DEPRECATED_PARAM_STRUCT
1817         bool "Provide old way to pass kernel parameters"
1818         depends on ATAGS
1819         help
1820           This was deprecated in 2001 and announced to live on for 5 years.
1821           Some old boot loaders still use this way.
1822 
1823 # Compressed boot loader in ROM.  Yes, we really want to ask about
1824 # TEXT and BSS so we preserve their values in the config files.
1825 config ZBOOT_ROM_TEXT
1826         hex "Compressed ROM boot loader base address"
1827         default "0"
1828         help
1829           The physical address at which the ROM-able zImage is to be
1830           placed in the target.  Platforms which normally make use of
1831           ROM-able zImage formats normally set this to a suitable
1832           value in their defconfig file.
1833 
1834           If ZBOOT_ROM is not enabled, this has no effect.
1835 
1836 config ZBOOT_ROM_BSS
1837         hex "Compressed ROM boot loader BSS address"
1838         default "0"
1839         help
1840           The base address of an area of read/write memory in the target
1841           for the ROM-able zImage which must be available while the
1842           decompressor is running. It must be large enough to hold the
1843           entire decompressed kernel plus an additional 128 KiB.
1844           Platforms which normally make use of ROM-able zImage formats
1845           normally set this to a suitable value in their defconfig file.
1846 
1847           If ZBOOT_ROM is not enabled, this has no effect.
1848 
1849 config ZBOOT_ROM
1850         bool "Compressed boot loader in ROM/flash"
1851         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1852         depends on !ARM_APPENDED_DTB && !XIP_KERNEL && !AUTO_ZRELADDR
1853         help
1854           Say Y here if you intend to execute your compressed kernel image
1855           (zImage) directly from ROM or flash.  If unsure, say N.
1856 
1857 choice
1858         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1859         depends on ZBOOT_ROM && ARCH_SH7372
1860         default ZBOOT_ROM_NONE
1861         help
1862           Include experimental SD/MMC loading code in the ROM-able zImage.
1863           With this enabled it is possible to write the ROM-able zImage
1864           kernel image to an MMC or SD card and boot the kernel straight
1865           from the reset vector. At reset the processor Mask ROM will load
1866           the first part of the ROM-able zImage which in turn loads the
1867           rest the kernel image to RAM.
1868 
1869 config ZBOOT_ROM_NONE
1870         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1871         help
1872           Do not load image from SD or MMC
1873 
1874 config ZBOOT_ROM_MMCIF
1875         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1876         help
1877           Load image from MMCIF hardware block.
1878 
1879 config ZBOOT_ROM_SH_MOBILE_SDHI
1880         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1881         help
1882           Load image from SDHI hardware block
1883 
1884 endchoice
1885 
1886 config ARM_APPENDED_DTB
1887         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1888         depends on OF
1889         help
1890           With this option, the boot code will look for a device tree binary
1891           (DTB) appended to zImage
1892           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1893 
1894           This is meant as a backward compatibility convenience for those
1895           systems with a bootloader that can't be upgraded to accommodate
1896           the documented boot protocol using a device tree.
1897 
1898           Beware that there is very little in terms of protection against
1899           this option being confused by leftover garbage in memory that might
1900           look like a DTB header after a reboot if no actual DTB is appended
1901           to zImage.  Do not leave this option active in a production kernel
1902           if you don't intend to always append a DTB.  Proper passing of the
1903           location into r2 of a bootloader provided DTB is always preferable
1904           to this option.
1905 
1906 config ARM_ATAG_DTB_COMPAT
1907         bool "Supplement the appended DTB with traditional ATAG information"
1908         depends on ARM_APPENDED_DTB
1909         help
1910           Some old bootloaders can't be updated to a DTB capable one, yet
1911           they provide ATAGs with memory configuration, the ramdisk address,
1912           the kernel cmdline string, etc.  Such information is dynamically
1913           provided by the bootloader and can't always be stored in a static
1914           DTB.  To allow a device tree enabled kernel to be used with such
1915           bootloaders, this option allows zImage to extract the information
1916           from the ATAG list and store it at run time into the appended DTB.
1917 
1918 choice
1919         prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1920         default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1921 
1922 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1923         bool "Use bootloader kernel arguments if available"
1924         help
1925           Uses the command-line options passed by the boot loader instead of
1926           the device tree bootargs property. If the boot loader doesn't provide
1927           any, the device tree bootargs property will be used.
1928 
1929 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1930         bool "Extend with bootloader kernel arguments"
1931         help
1932           The command-line arguments provided by the boot loader will be
1933           appended to the the device tree bootargs property.
1934 
1935 endchoice
1936 
1937 config CMDLINE
1938         string "Default kernel command string"
1939         default ""
1940         help
1941           On some architectures (EBSA110 and CATS), there is currently no way
1942           for the boot loader to pass arguments to the kernel. For these
1943           architectures, you should supply some command-line options at build
1944           time by entering them here. As a minimum, you should specify the
1945           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1946 
1947 choice
1948         prompt "Kernel command line type" if CMDLINE != ""
1949         default CMDLINE_FROM_BOOTLOADER
1950         depends on ATAGS
1951 
1952 config CMDLINE_FROM_BOOTLOADER
1953         bool "Use bootloader kernel arguments if available"
1954         help
1955           Uses the command-line options passed by the boot loader. If
1956           the boot loader doesn't provide any, the default kernel command
1957           string provided in CMDLINE will be used.
1958 
1959 config CMDLINE_EXTEND
1960         bool "Extend bootloader kernel arguments"
1961         help
1962           The command-line arguments provided by the boot loader will be
1963           appended to the default kernel command string.
1964 
1965 config CMDLINE_FORCE
1966         bool "Always use the default kernel command string"
1967         help
1968           Always use the default kernel command string, even if the boot
1969           loader passes other arguments to the kernel.
1970           This is useful if you cannot or don't want to change the
1971           command-line options your boot loader passes to the kernel.
1972 endchoice
1973 
1974 config XIP_KERNEL
1975         bool "Kernel Execute-In-Place from ROM"
1976         depends on !ARM_LPAE && !ARCH_MULTIPLATFORM
1977         help
1978           Execute-In-Place allows the kernel to run from non-volatile storage
1979           directly addressable by the CPU, such as NOR flash. This saves RAM
1980           space since the text section of the kernel is not loaded from flash
1981           to RAM.  Read-write sections, such as the data section and stack,
1982           are still copied to RAM.  The XIP kernel is not compressed since
1983           it has to run directly from flash, so it will take more space to
1984           store it.  The flash address used to link the kernel object files,
1985           and for storing it, is configuration dependent. Therefore, if you
1986           say Y here, you must know the proper physical address where to
1987           store the kernel image depending on your own flash memory usage.
1988 
1989           Also note that the make target becomes "make xipImage" rather than
1990           "make zImage" or "make Image".  The final kernel binary to put in
1991           ROM memory will be arch/arm/boot/xipImage.
1992 
1993           If unsure, say N.
1994 
1995 config XIP_PHYS_ADDR
1996         hex "XIP Kernel Physical Location"
1997         depends on XIP_KERNEL
1998         default "0x00080000"
1999         help
2000           This is the physical address in your flash memory the kernel will
2001           be linked for and stored to.  This address is dependent on your
2002           own flash usage.
2003 
2004 config KEXEC
2005         bool "Kexec system call (EXPERIMENTAL)"
2006         depends on (!SMP || PM_SLEEP_SMP)
2007         help
2008           kexec is a system call that implements the ability to shutdown your
2009           current kernel, and to start another kernel.  It is like a reboot
2010           but it is independent of the system firmware.   And like a reboot
2011           you can start any kernel with it, not just Linux.
2012 
2013           It is an ongoing process to be certain the hardware in a machine
2014           is properly shutdown, so do not be surprised if this code does not
2015           initially work for you.
2016 
2017 config ATAGS_PROC
2018         bool "Export atags in procfs"
2019         depends on ATAGS && KEXEC
2020         default y
2021         help
2022           Should the atags used to boot the kernel be exported in an "atags"
2023           file in procfs. Useful with kexec.
2024 
2025 config CRASH_DUMP
2026         bool "Build kdump crash kernel (EXPERIMENTAL)"
2027         help
2028           Generate crash dump after being started by kexec. This should
2029           be normally only set in special crash dump kernels which are
2030           loaded in the main kernel with kexec-tools into a specially
2031           reserved region and then later executed after a crash by
2032           kdump/kexec. The crash dump kernel must be compiled to a
2033           memory address not used by the main kernel
2034 
2035           For more details see Documentation/kdump/kdump.txt
2036 
2037 config AUTO_ZRELADDR
2038         bool "Auto calculation of the decompressed kernel image address"
2039         help
2040           ZRELADDR is the physical address where the decompressed kernel
2041           image will be placed. If AUTO_ZRELADDR is selected, the address
2042           will be determined at run-time by masking the current IP with
2043           0xf8000000. This assumes the zImage being placed in the first 128MB
2044           from start of memory.
2045 
2046 endmenu
2047 
2048 menu "CPU Power Management"
2049 
2050 source "drivers/cpufreq/Kconfig"
2051 
2052 source "drivers/cpuidle/Kconfig"
2053 
2054 endmenu
2055 
2056 menu "Floating point emulation"
2057 
2058 comment "At least one emulation must be selected"
2059 
2060 config FPE_NWFPE
2061         bool "NWFPE math emulation"
2062         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2063         ---help---
2064           Say Y to include the NWFPE floating point emulator in the kernel.
2065           This is necessary to run most binaries. Linux does not currently
2066           support floating point hardware so you need to say Y here even if
2067           your machine has an FPA or floating point co-processor podule.
2068 
2069           You may say N here if you are going to load the Acorn FPEmulator
2070           early in the bootup.
2071 
2072 config FPE_NWFPE_XP
2073         bool "Support extended precision"
2074         depends on FPE_NWFPE
2075         help
2076           Say Y to include 80-bit support in the kernel floating-point
2077           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2078           Note that gcc does not generate 80-bit operations by default,
2079           so in most cases this option only enlarges the size of the
2080           floating point emulator without any good reason.
2081 
2082           You almost surely want to say N here.
2083 
2084 config FPE_FASTFPE
2085         bool "FastFPE math emulation (EXPERIMENTAL)"
2086         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
2087         ---help---
2088           Say Y here to include the FAST floating point emulator in the kernel.
2089           This is an experimental much faster emulator which now also has full
2090           precision for the mantissa.  It does not support any exceptions.
2091           It is very simple, and approximately 3-6 times faster than NWFPE.
2092 
2093           It should be sufficient for most programs.  It may be not suitable
2094           for scientific calculations, but you have to check this for yourself.
2095           If you do not feel you need a faster FP emulation you should better
2096           choose NWFPE.
2097 
2098 config VFP
2099         bool "VFP-format floating point maths"
2100         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2101         help
2102           Say Y to include VFP support code in the kernel. This is needed
2103           if your hardware includes a VFP unit.
2104 
2105           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2106           release notes and additional status information.
2107 
2108           Say N if your target does not have VFP hardware.
2109 
2110 config VFPv3
2111         bool
2112         depends on VFP
2113         default y if CPU_V7
2114 
2115 config NEON
2116         bool "Advanced SIMD (NEON) Extension support"
2117         depends on VFPv3 && CPU_V7
2118         help
2119           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2120           Extension.
2121 
2122 config KERNEL_MODE_NEON
2123         bool "Support for NEON in kernel mode"
2124         depends on NEON && AEABI
2125         help
2126           Say Y to include support for NEON in kernel mode.
2127 
2128 endmenu
2129 
2130 menu "Userspace binary formats"
2131 
2132 source "fs/Kconfig.binfmt"
2133 
2134 config ARTHUR
2135         tristate "RISC OS personality"
2136         depends on !AEABI
2137         help
2138           Say Y here to include the kernel code necessary if you want to run
2139           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2140           experimental; if this sounds frightening, say N and sleep in peace.
2141           You can also say M here to compile this support as a module (which
2142           will be called arthur).
2143 
2144 endmenu
2145 
2146 menu "Power management options"
2147 
2148 source "kernel/power/Kconfig"
2149 
2150 config ARCH_SUSPEND_POSSIBLE
2151         depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \
2152                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2153         def_bool y
2154 
2155 config ARM_CPU_SUSPEND
2156         def_bool PM_SLEEP
2157 
2158 config ARCH_HIBERNATION_POSSIBLE
2159         bool
2160         depends on MMU
2161         default y if ARCH_SUSPEND_POSSIBLE
2162 
2163 endmenu
2164 
2165 source "net/Kconfig"
2166 
2167 source "drivers/Kconfig"
2168 
2169 source "fs/Kconfig"
2170 
2171 source "arch/arm/Kconfig.debug"
2172 
2173 source "security/Kconfig"
2174 
2175 source "crypto/Kconfig"
2176 
2177 source "lib/Kconfig"
2178 
2179 source "arch/arm/kvm/Kconfig"

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