Version:  2.0.40 2.2.26 2.4.37 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19

Linux/arch/arm/Kconfig

  1 config ARM
  2         bool
  3         default y
  4         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
  5         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
  6         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
  7         select ARCH_HAVE_CUSTOM_GPIO_H
  8         select ARCH_HAS_GCOV_PROFILE_ALL
  9         select ARCH_MIGHT_HAVE_PC_PARPORT
 10         select ARCH_SUPPORTS_ATOMIC_RMW
 11         select ARCH_USE_BUILTIN_BSWAP
 12         select ARCH_USE_CMPXCHG_LOCKREF
 13         select ARCH_WANT_IPC_PARSE_VERSION
 14         select BUILDTIME_EXTABLE_SORT if MMU
 15         select CLONE_BACKWARDS
 16         select CPU_PM if (SUSPEND || CPU_IDLE)
 17         select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
 18         select GENERIC_ALLOCATOR
 19         select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI)
 20         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
 21         select GENERIC_IDLE_POLL_SETUP
 22         select GENERIC_IRQ_PROBE
 23         select GENERIC_IRQ_SHOW
 24         select GENERIC_PCI_IOMAP
 25         select GENERIC_SCHED_CLOCK
 26         select GENERIC_SMP_IDLE_THREAD
 27         select GENERIC_STRNCPY_FROM_USER
 28         select GENERIC_STRNLEN_USER
 29         select HANDLE_DOMAIN_IRQ
 30         select HARDIRQS_SW_RESEND
 31         select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT)
 32         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
 33         select HAVE_ARCH_KGDB
 34         select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
 35         select HAVE_ARCH_TRACEHOOK
 36         select HAVE_BPF_JIT
 37         select HAVE_CC_STACKPROTECTOR
 38         select HAVE_CONTEXT_TRACKING
 39         select HAVE_C_RECORDMCOUNT
 40         select HAVE_DEBUG_KMEMLEAK
 41         select HAVE_DMA_API_DEBUG
 42         select HAVE_DMA_ATTRS
 43         select HAVE_DMA_CONTIGUOUS if MMU
 44         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
 45         select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
 46         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
 47         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
 48         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
 49         select HAVE_GENERIC_DMA_COHERENT
 50         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
 51         select HAVE_IDE if PCI || ISA || PCMCIA
 52         select HAVE_IRQ_TIME_ACCOUNTING
 53         select HAVE_KERNEL_GZIP
 54         select HAVE_KERNEL_LZ4
 55         select HAVE_KERNEL_LZMA
 56         select HAVE_KERNEL_LZO
 57         select HAVE_KERNEL_XZ
 58         select HAVE_KPROBES if !XIP_KERNEL
 59         select HAVE_KRETPROBES if (HAVE_KPROBES)
 60         select HAVE_MEMBLOCK
 61         select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
 62         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
 63         select HAVE_PERF_EVENTS
 64         select HAVE_PERF_REGS
 65         select HAVE_PERF_USER_STACK_DUMP
 66         select HAVE_RCU_TABLE_FREE if (SMP && ARM_LPAE)
 67         select HAVE_REGS_AND_STACK_ACCESS_API
 68         select HAVE_SYSCALL_TRACEPOINTS
 69         select HAVE_UID16
 70         select HAVE_VIRT_CPU_ACCOUNTING_GEN
 71         select IRQ_FORCED_THREADING
 72         select MODULES_USE_ELF_REL
 73         select NO_BOOTMEM
 74         select OLD_SIGACTION
 75         select OLD_SIGSUSPEND3
 76         select PERF_USE_VMALLOC
 77         select RTC_LIB
 78         select SYS_SUPPORTS_APM_EMULATION
 79         # Above selects are sorted alphabetically; please add new ones
 80         # according to that.  Thanks.
 81         help
 82           The ARM series is a line of low-power-consumption RISC chip designs
 83           licensed by ARM Ltd and targeted at embedded applications and
 84           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
 85           manufactured, but legacy ARM-based PC hardware remains popular in
 86           Europe.  There is an ARM Linux project with a web page at
 87           <http://www.arm.linux.org.uk/>.
 88 
 89 config ARM_HAS_SG_CHAIN
 90         select ARCH_HAS_SG_CHAIN
 91         bool
 92 
 93 config NEED_SG_DMA_LENGTH
 94         bool
 95 
 96 config ARM_DMA_USE_IOMMU
 97         bool
 98         select ARM_HAS_SG_CHAIN
 99         select NEED_SG_DMA_LENGTH
100 
101 if ARM_DMA_USE_IOMMU
102 
103 config ARM_DMA_IOMMU_ALIGNMENT
104         int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
105         range 4 9
106         default 8
107         help
108           DMA mapping framework by default aligns all buffers to the smallest
109           PAGE_SIZE order which is greater than or equal to the requested buffer
110           size. This works well for buffers up to a few hundreds kilobytes, but
111           for larger buffers it just a waste of address space. Drivers which has
112           relatively small addressing window (like 64Mib) might run out of
113           virtual space with just a few allocations.
114 
115           With this parameter you can specify the maximum PAGE_SIZE order for
116           DMA IOMMU buffers. Larger buffers will be aligned only to this
117           specified order. The order is expressed as a power of two multiplied
118           by the PAGE_SIZE.
119 
120 endif
121 
122 config MIGHT_HAVE_PCI
123         bool
124 
125 config SYS_SUPPORTS_APM_EMULATION
126         bool
127 
128 config HAVE_TCM
129         bool
130         select GENERIC_ALLOCATOR
131 
132 config HAVE_PROC_CPU
133         bool
134 
135 config NO_IOPORT_MAP
136         bool
137 
138 config EISA
139         bool
140         ---help---
141           The Extended Industry Standard Architecture (EISA) bus was
142           developed as an open alternative to the IBM MicroChannel bus.
143 
144           The EISA bus provided some of the features of the IBM MicroChannel
145           bus while maintaining backward compatibility with cards made for
146           the older ISA bus.  The EISA bus saw limited use between 1988 and
147           1995 when it was made obsolete by the PCI bus.
148 
149           Say Y here if you are building a kernel for an EISA-based machine.
150 
151           Otherwise, say N.
152 
153 config SBUS
154         bool
155 
156 config STACKTRACE_SUPPORT
157         bool
158         default y
159 
160 config HAVE_LATENCYTOP_SUPPORT
161         bool
162         depends on !SMP
163         default y
164 
165 config LOCKDEP_SUPPORT
166         bool
167         default y
168 
169 config TRACE_IRQFLAGS_SUPPORT
170         bool
171         default y
172 
173 config RWSEM_XCHGADD_ALGORITHM
174         bool
175         default y
176 
177 config ARCH_HAS_ILOG2_U32
178         bool
179 
180 config ARCH_HAS_ILOG2_U64
181         bool
182 
183 config ARCH_HAS_BANDGAP
184         bool
185 
186 config GENERIC_HWEIGHT
187         bool
188         default y
189 
190 config GENERIC_CALIBRATE_DELAY
191         bool
192         default y
193 
194 config ARCH_MAY_HAVE_PC_FDC
195         bool
196 
197 config ZONE_DMA
198         bool
199 
200 config NEED_DMA_MAP_STATE
201        def_bool y
202 
203 config ARCH_SUPPORTS_UPROBES
204         def_bool y
205 
206 config ARCH_HAS_DMA_SET_COHERENT_MASK
207         bool
208 
209 config GENERIC_ISA_DMA
210         bool
211 
212 config FIQ
213         bool
214 
215 config NEED_RET_TO_USER
216         bool
217 
218 config ARCH_MTD_XIP
219         bool
220 
221 config VECTORS_BASE
222         hex
223         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
224         default DRAM_BASE if REMAP_VECTORS_TO_RAM
225         default 0x00000000
226         help
227           The base address of exception vectors.  This must be two pages
228           in size.
229 
230 config ARM_PATCH_PHYS_VIRT
231         bool "Patch physical to virtual translations at runtime" if EMBEDDED
232         default y
233         depends on !XIP_KERNEL && MMU
234         depends on !ARCH_REALVIEW || !SPARSEMEM
235         help
236           Patch phys-to-virt and virt-to-phys translation functions at
237           boot and module load time according to the position of the
238           kernel in system memory.
239 
240           This can only be used with non-XIP MMU kernels where the base
241           of physical memory is at a 16MB boundary.
242 
243           Only disable this option if you know that you do not require
244           this feature (eg, building a kernel for a single machine) and
245           you need to shrink the kernel to the minimal size.
246 
247 config NEED_MACH_IO_H
248         bool
249         help
250           Select this when mach/io.h is required to provide special
251           definitions for this platform.  The need for mach/io.h should
252           be avoided when possible.
253 
254 config NEED_MACH_MEMORY_H
255         bool
256         help
257           Select this when mach/memory.h is required to provide special
258           definitions for this platform.  The need for mach/memory.h should
259           be avoided when possible.
260 
261 config PHYS_OFFSET
262         hex "Physical address of main memory" if MMU
263         depends on !ARM_PATCH_PHYS_VIRT
264         default DRAM_BASE if !MMU
265         default 0x00000000 if ARCH_EBSA110 || \
266                         EP93XX_SDCE3_SYNC_PHYS_OFFSET || \
267                         ARCH_FOOTBRIDGE || \
268                         ARCH_INTEGRATOR || \
269                         ARCH_IOP13XX || \
270                         ARCH_KS8695 || \
271                         (ARCH_REALVIEW && !REALVIEW_HIGH_PHYS_OFFSET)
272         default 0x10000000 if ARCH_OMAP1 || ARCH_RPC
273         default 0x20000000 if ARCH_S5PV210
274         default 0x70000000 if REALVIEW_HIGH_PHYS_OFFSET
275         default 0xc0000000 if EP93XX_SDCE0_PHYS_OFFSET || ARCH_SA1100
276         default 0xd0000000 if EP93XX_SDCE1_PHYS_OFFSET
277         default 0xe0000000 if EP93XX_SDCE2_PHYS_OFFSET
278         default 0xf0000000 if EP93XX_SDCE3_ASYNC_PHYS_OFFSET
279         help
280           Please provide the physical address corresponding to the
281           location of main memory in your system.
282 
283 config GENERIC_BUG
284         def_bool y
285         depends on BUG
286 
287 source "init/Kconfig"
288 
289 source "kernel/Kconfig.freezer"
290 
291 menu "System Type"
292 
293 config MMU
294         bool "MMU-based Paged Memory Management Support"
295         default y
296         help
297           Select if you want MMU-based virtualised addressing space
298           support by paged memory management. If unsure, say 'Y'.
299 
300 #
301 # The "ARM system type" choice list is ordered alphabetically by option
302 # text.  Please add new entries in the option alphabetic order.
303 #
304 choice
305         prompt "ARM system type"
306         default ARCH_VERSATILE if !MMU
307         default ARCH_MULTIPLATFORM if MMU
308 
309 config ARCH_MULTIPLATFORM
310         bool "Allow multiple platforms to be selected"
311         depends on MMU
312         select ARCH_WANT_OPTIONAL_GPIOLIB
313         select ARM_HAS_SG_CHAIN
314         select ARM_PATCH_PHYS_VIRT
315         select AUTO_ZRELADDR
316         select CLKSRC_OF
317         select COMMON_CLK
318         select GENERIC_CLOCKEVENTS
319         select MIGHT_HAVE_PCI
320         select MULTI_IRQ_HANDLER
321         select SPARSE_IRQ
322         select USE_OF
323 
324 config ARCH_REALVIEW
325         bool "ARM Ltd. RealView family"
326         select ARCH_WANT_OPTIONAL_GPIOLIB
327         select ARM_AMBA
328         select ARM_TIMER_SP804
329         select COMMON_CLK
330         select COMMON_CLK_VERSATILE
331         select GENERIC_CLOCKEVENTS
332         select GPIO_PL061 if GPIOLIB
333         select ICST
334         select NEED_MACH_MEMORY_H
335         select PLAT_VERSATILE
336         select PLAT_VERSATILE_SCHED_CLOCK
337         help
338           This enables support for ARM Ltd RealView boards.
339 
340 config ARCH_VERSATILE
341         bool "ARM Ltd. Versatile family"
342         select ARCH_WANT_OPTIONAL_GPIOLIB
343         select ARM_AMBA
344         select ARM_TIMER_SP804
345         select ARM_VIC
346         select CLKDEV_LOOKUP
347         select GENERIC_CLOCKEVENTS
348         select HAVE_MACH_CLKDEV
349         select ICST
350         select PLAT_VERSATILE
351         select PLAT_VERSATILE_CLOCK
352         select PLAT_VERSATILE_SCHED_CLOCK
353         select VERSATILE_FPGA_IRQ
354         help
355           This enables support for ARM Ltd Versatile board.
356 
357 config ARCH_AT91
358         bool "Atmel AT91"
359         select ARCH_REQUIRE_GPIOLIB
360         select CLKDEV_LOOKUP
361         select IRQ_DOMAIN
362         select NEED_MACH_IO_H if PCCARD
363         select PINCTRL
364         select PINCTRL_AT91
365         select USE_OF
366         help
367           This enables support for systems based on Atmel
368           AT91RM9200, AT91SAM9 and SAMA5 processors.
369 
370 config ARCH_CLPS711X
371         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
372         select ARCH_REQUIRE_GPIOLIB
373         select AUTO_ZRELADDR
374         select CLKSRC_MMIO
375         select COMMON_CLK
376         select CPU_ARM720T
377         select GENERIC_CLOCKEVENTS
378         select MFD_SYSCON
379         select SOC_BUS
380         help
381           Support for Cirrus Logic 711x/721x/731x based boards.
382 
383 config ARCH_GEMINI
384         bool "Cortina Systems Gemini"
385         select ARCH_REQUIRE_GPIOLIB
386         select CLKSRC_MMIO
387         select CPU_FA526
388         select GENERIC_CLOCKEVENTS
389         help
390           Support for the Cortina Systems Gemini family SoCs
391 
392 config ARCH_EBSA110
393         bool "EBSA-110"
394         select ARCH_USES_GETTIMEOFFSET
395         select CPU_SA110
396         select ISA
397         select NEED_MACH_IO_H
398         select NEED_MACH_MEMORY_H
399         select NO_IOPORT_MAP
400         help
401           This is an evaluation board for the StrongARM processor available
402           from Digital. It has limited hardware on-board, including an
403           Ethernet interface, two PCMCIA sockets, two serial ports and a
404           parallel port.
405 
406 config ARCH_EFM32
407         bool "Energy Micro efm32"
408         depends on !MMU
409         select ARCH_REQUIRE_GPIOLIB
410         select ARM_NVIC
411         select AUTO_ZRELADDR
412         select CLKSRC_OF
413         select COMMON_CLK
414         select CPU_V7M
415         select GENERIC_CLOCKEVENTS
416         select NO_DMA
417         select NO_IOPORT_MAP
418         select SPARSE_IRQ
419         select USE_OF
420         help
421           Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
422           processors.
423 
424 config ARCH_EP93XX
425         bool "EP93xx-based"
426         select ARCH_HAS_HOLES_MEMORYMODEL
427         select ARCH_REQUIRE_GPIOLIB
428         select ARCH_USES_GETTIMEOFFSET
429         select ARM_AMBA
430         select ARM_VIC
431         select CLKDEV_LOOKUP
432         select CPU_ARM920T
433         help
434           This enables support for the Cirrus EP93xx series of CPUs.
435 
436 config ARCH_FOOTBRIDGE
437         bool "FootBridge"
438         select CPU_SA110
439         select FOOTBRIDGE
440         select GENERIC_CLOCKEVENTS
441         select HAVE_IDE
442         select NEED_MACH_IO_H if !MMU
443         select NEED_MACH_MEMORY_H
444         help
445           Support for systems based on the DC21285 companion chip
446           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
447 
448 config ARCH_NETX
449         bool "Hilscher NetX based"
450         select ARM_VIC
451         select CLKSRC_MMIO
452         select CPU_ARM926T
453         select GENERIC_CLOCKEVENTS
454         help
455           This enables support for systems based on the Hilscher NetX Soc
456 
457 config ARCH_IOP13XX
458         bool "IOP13xx-based"
459         depends on MMU
460         select CPU_XSC3
461         select NEED_MACH_MEMORY_H
462         select NEED_RET_TO_USER
463         select PCI
464         select PLAT_IOP
465         select VMSPLIT_1G
466         select SPARSE_IRQ
467         help
468           Support for Intel's IOP13XX (XScale) family of processors.
469 
470 config ARCH_IOP32X
471         bool "IOP32x-based"
472         depends on MMU
473         select ARCH_REQUIRE_GPIOLIB
474         select CPU_XSCALE
475         select GPIO_IOP
476         select NEED_RET_TO_USER
477         select PCI
478         select PLAT_IOP
479         help
480           Support for Intel's 80219 and IOP32X (XScale) family of
481           processors.
482 
483 config ARCH_IOP33X
484         bool "IOP33x-based"
485         depends on MMU
486         select ARCH_REQUIRE_GPIOLIB
487         select CPU_XSCALE
488         select GPIO_IOP
489         select NEED_RET_TO_USER
490         select PCI
491         select PLAT_IOP
492         help
493           Support for Intel's IOP33X (XScale) family of processors.
494 
495 config ARCH_IXP4XX
496         bool "IXP4xx-based"
497         depends on MMU
498         select ARCH_HAS_DMA_SET_COHERENT_MASK
499         select ARCH_REQUIRE_GPIOLIB
500         select ARCH_SUPPORTS_BIG_ENDIAN
501         select CLKSRC_MMIO
502         select CPU_XSCALE
503         select DMABOUNCE if PCI
504         select GENERIC_CLOCKEVENTS
505         select MIGHT_HAVE_PCI
506         select NEED_MACH_IO_H
507         select USB_EHCI_BIG_ENDIAN_DESC
508         select USB_EHCI_BIG_ENDIAN_MMIO
509         help
510           Support for Intel's IXP4XX (XScale) family of processors.
511 
512 config ARCH_DOVE
513         bool "Marvell Dove"
514         select ARCH_REQUIRE_GPIOLIB
515         select CPU_PJ4
516         select GENERIC_CLOCKEVENTS
517         select MIGHT_HAVE_PCI
518         select MVEBU_MBUS
519         select PINCTRL
520         select PINCTRL_DOVE
521         select PLAT_ORION_LEGACY
522         help
523           Support for the Marvell Dove SoC 88AP510
524 
525 config ARCH_MV78XX0
526         bool "Marvell MV78xx0"
527         select ARCH_REQUIRE_GPIOLIB
528         select CPU_FEROCEON
529         select GENERIC_CLOCKEVENTS
530         select MVEBU_MBUS
531         select PCI
532         select PLAT_ORION_LEGACY
533         help
534           Support for the following Marvell MV78xx0 series SoCs:
535           MV781x0, MV782x0.
536 
537 config ARCH_ORION5X
538         bool "Marvell Orion"
539         depends on MMU
540         select ARCH_REQUIRE_GPIOLIB
541         select CPU_FEROCEON
542         select GENERIC_CLOCKEVENTS
543         select MVEBU_MBUS
544         select PCI
545         select PLAT_ORION_LEGACY
546         help
547           Support for the following Marvell Orion 5x series SoCs:
548           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
549           Orion-2 (5281), Orion-1-90 (6183).
550 
551 config ARCH_MMP
552         bool "Marvell PXA168/910/MMP2"
553         depends on MMU
554         select ARCH_REQUIRE_GPIOLIB
555         select CLKDEV_LOOKUP
556         select GENERIC_ALLOCATOR
557         select GENERIC_CLOCKEVENTS
558         select GPIO_PXA
559         select IRQ_DOMAIN
560         select MULTI_IRQ_HANDLER
561         select PINCTRL
562         select PLAT_PXA
563         select SPARSE_IRQ
564         help
565           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
566 
567 config ARCH_KS8695
568         bool "Micrel/Kendin KS8695"
569         select ARCH_REQUIRE_GPIOLIB
570         select CLKSRC_MMIO
571         select CPU_ARM922T
572         select GENERIC_CLOCKEVENTS
573         select NEED_MACH_MEMORY_H
574         help
575           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
576           System-on-Chip devices.
577 
578 config ARCH_W90X900
579         bool "Nuvoton W90X900 CPU"
580         select ARCH_REQUIRE_GPIOLIB
581         select CLKDEV_LOOKUP
582         select CLKSRC_MMIO
583         select CPU_ARM926T
584         select GENERIC_CLOCKEVENTS
585         help
586           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
587           At present, the w90x900 has been renamed nuc900, regarding
588           the ARM series product line, you can login the following
589           link address to know more.
590 
591           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
592                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
593 
594 config ARCH_LPC32XX
595         bool "NXP LPC32XX"
596         select ARCH_REQUIRE_GPIOLIB
597         select ARM_AMBA
598         select CLKDEV_LOOKUP
599         select CLKSRC_MMIO
600         select CPU_ARM926T
601         select GENERIC_CLOCKEVENTS
602         select HAVE_IDE
603         select USE_OF
604         help
605           Support for the NXP LPC32XX family of processors
606 
607 config ARCH_PXA
608         bool "PXA2xx/PXA3xx-based"
609         depends on MMU
610         select ARCH_MTD_XIP
611         select ARCH_REQUIRE_GPIOLIB
612         select ARM_CPU_SUSPEND if PM
613         select AUTO_ZRELADDR
614         select CLKDEV_LOOKUP
615         select CLKSRC_MMIO
616         select CLKSRC_OF
617         select GENERIC_CLOCKEVENTS
618         select GPIO_PXA
619         select HAVE_IDE
620         select MULTI_IRQ_HANDLER
621         select PLAT_PXA
622         select SPARSE_IRQ
623         help
624           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
625 
626 config ARCH_MSM
627         bool "Qualcomm MSM (non-multiplatform)"
628         select ARCH_REQUIRE_GPIOLIB
629         select COMMON_CLK
630         select GENERIC_CLOCKEVENTS
631         help
632           Support for Qualcomm MSM/QSD based systems.  This runs on the
633           apps processor of the MSM/QSD and depends on a shared memory
634           interface to the modem processor which runs the baseband
635           stack and controls some vital subsystems
636           (clock and power control, etc).
637 
638 config ARCH_SHMOBILE_LEGACY
639         bool "Renesas ARM SoCs (non-multiplatform)"
640         select ARCH_SHMOBILE
641         select ARM_PATCH_PHYS_VIRT if MMU
642         select CLKDEV_LOOKUP
643         select CPU_V7
644         select GENERIC_CLOCKEVENTS
645         select HAVE_ARM_SCU if SMP
646         select HAVE_ARM_TWD if SMP
647         select HAVE_MACH_CLKDEV
648         select HAVE_SMP
649         select MIGHT_HAVE_CACHE_L2X0
650         select MULTI_IRQ_HANDLER
651         select NO_IOPORT_MAP
652         select PINCTRL
653         select PM_GENERIC_DOMAINS if PM
654         select SH_CLK_CPG
655         select SPARSE_IRQ
656         help
657           Support for Renesas ARM SoC platforms using a non-multiplatform
658           kernel. This includes the SH-Mobile, R-Mobile, EMMA-Mobile, R-Car
659           and RZ families.
660 
661 config ARCH_RPC
662         bool "RiscPC"
663         select ARCH_ACORN
664         select ARCH_MAY_HAVE_PC_FDC
665         select ARCH_SPARSEMEM_ENABLE
666         select ARCH_USES_GETTIMEOFFSET
667         select CPU_SA110
668         select FIQ
669         select HAVE_IDE
670         select HAVE_PATA_PLATFORM
671         select ISA_DMA_API
672         select NEED_MACH_IO_H
673         select NEED_MACH_MEMORY_H
674         select NO_IOPORT_MAP
675         select VIRT_TO_BUS
676         help
677           On the Acorn Risc-PC, Linux can support the internal IDE disk and
678           CD-ROM interface, serial and parallel port, and the floppy drive.
679 
680 config ARCH_SA1100
681         bool "SA1100-based"
682         select ARCH_MTD_XIP
683         select ARCH_REQUIRE_GPIOLIB
684         select ARCH_SPARSEMEM_ENABLE
685         select CLKDEV_LOOKUP
686         select CLKSRC_MMIO
687         select CPU_FREQ
688         select CPU_SA1100
689         select GENERIC_CLOCKEVENTS
690         select HAVE_IDE
691         select IRQ_DOMAIN
692         select ISA
693         select MULTI_IRQ_HANDLER
694         select NEED_MACH_MEMORY_H
695         select SPARSE_IRQ
696         help
697           Support for StrongARM 11x0 based boards.
698 
699 config ARCH_S3C24XX
700         bool "Samsung S3C24XX SoCs"
701         select ARCH_REQUIRE_GPIOLIB
702         select ATAGS
703         select CLKDEV_LOOKUP
704         select CLKSRC_SAMSUNG_PWM
705         select GENERIC_CLOCKEVENTS
706         select GPIO_SAMSUNG
707         select HAVE_S3C2410_I2C if I2C
708         select HAVE_S3C2410_WATCHDOG if WATCHDOG
709         select HAVE_S3C_RTC if RTC_CLASS
710         select MULTI_IRQ_HANDLER
711         select NEED_MACH_IO_H
712         select SAMSUNG_ATAGS
713         help
714           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
715           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
716           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
717           Samsung SMDK2410 development board (and derivatives).
718 
719 config ARCH_S3C64XX
720         bool "Samsung S3C64XX"
721         select ARCH_REQUIRE_GPIOLIB
722         select ARM_AMBA
723         select ARM_VIC
724         select ATAGS
725         select CLKDEV_LOOKUP
726         select CLKSRC_SAMSUNG_PWM
727         select COMMON_CLK_SAMSUNG
728         select CPU_V6K
729         select GENERIC_CLOCKEVENTS
730         select GPIO_SAMSUNG
731         select HAVE_S3C2410_I2C if I2C
732         select HAVE_S3C2410_WATCHDOG if WATCHDOG
733         select HAVE_TCM
734         select NO_IOPORT_MAP
735         select PLAT_SAMSUNG
736         select PM_GENERIC_DOMAINS if PM
737         select S3C_DEV_NAND
738         select S3C_GPIO_TRACK
739         select SAMSUNG_ATAGS
740         select SAMSUNG_WAKEMASK
741         select SAMSUNG_WDT_RESET
742         help
743           Samsung S3C64XX series based systems
744 
745 config ARCH_DAVINCI
746         bool "TI DaVinci"
747         select ARCH_HAS_HOLES_MEMORYMODEL
748         select ARCH_REQUIRE_GPIOLIB
749         select CLKDEV_LOOKUP
750         select GENERIC_ALLOCATOR
751         select GENERIC_CLOCKEVENTS
752         select GENERIC_IRQ_CHIP
753         select HAVE_IDE
754         select TI_PRIV_EDMA
755         select USE_OF
756         select ZONE_DMA
757         help
758           Support for TI's DaVinci platform.
759 
760 config ARCH_OMAP1
761         bool "TI OMAP1"
762         depends on MMU
763         select ARCH_HAS_HOLES_MEMORYMODEL
764         select ARCH_OMAP
765         select ARCH_REQUIRE_GPIOLIB
766         select CLKDEV_LOOKUP
767         select CLKSRC_MMIO
768         select GENERIC_CLOCKEVENTS
769         select GENERIC_IRQ_CHIP
770         select HAVE_IDE
771         select IRQ_DOMAIN
772         select NEED_MACH_IO_H if PCCARD
773         select NEED_MACH_MEMORY_H
774         help
775           Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
776 
777 endchoice
778 
779 menu "Multiple platform selection"
780         depends on ARCH_MULTIPLATFORM
781 
782 comment "CPU Core family selection"
783 
784 config ARCH_MULTI_V4
785         bool "ARMv4 based platforms (FA526)"
786         depends on !ARCH_MULTI_V6_V7
787         select ARCH_MULTI_V4_V5
788         select CPU_FA526
789 
790 config ARCH_MULTI_V4T
791         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
792         depends on !ARCH_MULTI_V6_V7
793         select ARCH_MULTI_V4_V5
794         select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \
795                 CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \
796                 CPU_ARM925T || CPU_ARM940T)
797 
798 config ARCH_MULTI_V5
799         bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
800         depends on !ARCH_MULTI_V6_V7
801         select ARCH_MULTI_V4_V5
802         select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
803                 CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
804                 CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
805 
806 config ARCH_MULTI_V4_V5
807         bool
808 
809 config ARCH_MULTI_V6
810         bool "ARMv6 based platforms (ARM11)"
811         select ARCH_MULTI_V6_V7
812         select CPU_V6K
813 
814 config ARCH_MULTI_V7
815         bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
816         default y
817         select ARCH_MULTI_V6_V7
818         select CPU_V7
819         select HAVE_SMP
820 
821 config ARCH_MULTI_V6_V7
822         bool
823         select MIGHT_HAVE_CACHE_L2X0
824 
825 config ARCH_MULTI_CPU_AUTO
826         def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
827         select ARCH_MULTI_V5
828 
829 endmenu
830 
831 config ARCH_VIRT
832         bool "Dummy Virtual Machine" if ARCH_MULTI_V7
833         select ARM_AMBA
834         select ARM_GIC
835         select ARM_PSCI
836         select HAVE_ARM_ARCH_TIMER
837 
838 #
839 # This is sorted alphabetically by mach-* pathname.  However, plat-*
840 # Kconfigs may be included either alphabetically (according to the
841 # plat- suffix) or along side the corresponding mach-* source.
842 #
843 source "arch/arm/mach-mvebu/Kconfig"
844 
845 source "arch/arm/mach-asm9260/Kconfig"
846 
847 source "arch/arm/mach-at91/Kconfig"
848 
849 source "arch/arm/mach-axxia/Kconfig"
850 
851 source "arch/arm/mach-bcm/Kconfig"
852 
853 source "arch/arm/mach-berlin/Kconfig"
854 
855 source "arch/arm/mach-clps711x/Kconfig"
856 
857 source "arch/arm/mach-cns3xxx/Kconfig"
858 
859 source "arch/arm/mach-davinci/Kconfig"
860 
861 source "arch/arm/mach-dove/Kconfig"
862 
863 source "arch/arm/mach-ep93xx/Kconfig"
864 
865 source "arch/arm/mach-footbridge/Kconfig"
866 
867 source "arch/arm/mach-gemini/Kconfig"
868 
869 source "arch/arm/mach-highbank/Kconfig"
870 
871 source "arch/arm/mach-hisi/Kconfig"
872 
873 source "arch/arm/mach-integrator/Kconfig"
874 
875 source "arch/arm/mach-iop32x/Kconfig"
876 
877 source "arch/arm/mach-iop33x/Kconfig"
878 
879 source "arch/arm/mach-iop13xx/Kconfig"
880 
881 source "arch/arm/mach-ixp4xx/Kconfig"
882 
883 source "arch/arm/mach-keystone/Kconfig"
884 
885 source "arch/arm/mach-ks8695/Kconfig"
886 
887 source "arch/arm/mach-meson/Kconfig"
888 
889 source "arch/arm/mach-msm/Kconfig"
890 
891 source "arch/arm/mach-moxart/Kconfig"
892 
893 source "arch/arm/mach-mv78xx0/Kconfig"
894 
895 source "arch/arm/mach-imx/Kconfig"
896 
897 source "arch/arm/mach-mediatek/Kconfig"
898 
899 source "arch/arm/mach-mxs/Kconfig"
900 
901 source "arch/arm/mach-netx/Kconfig"
902 
903 source "arch/arm/mach-nomadik/Kconfig"
904 
905 source "arch/arm/mach-nspire/Kconfig"
906 
907 source "arch/arm/plat-omap/Kconfig"
908 
909 source "arch/arm/mach-omap1/Kconfig"
910 
911 source "arch/arm/mach-omap2/Kconfig"
912 
913 source "arch/arm/mach-orion5x/Kconfig"
914 
915 source "arch/arm/mach-picoxcell/Kconfig"
916 
917 source "arch/arm/mach-pxa/Kconfig"
918 source "arch/arm/plat-pxa/Kconfig"
919 
920 source "arch/arm/mach-mmp/Kconfig"
921 
922 source "arch/arm/mach-qcom/Kconfig"
923 
924 source "arch/arm/mach-realview/Kconfig"
925 
926 source "arch/arm/mach-rockchip/Kconfig"
927 
928 source "arch/arm/mach-sa1100/Kconfig"
929 
930 source "arch/arm/mach-socfpga/Kconfig"
931 
932 source "arch/arm/mach-spear/Kconfig"
933 
934 source "arch/arm/mach-sti/Kconfig"
935 
936 source "arch/arm/mach-s3c24xx/Kconfig"
937 
938 source "arch/arm/mach-s3c64xx/Kconfig"
939 
940 source "arch/arm/mach-s5pv210/Kconfig"
941 
942 source "arch/arm/mach-exynos/Kconfig"
943 source "arch/arm/plat-samsung/Kconfig"
944 
945 source "arch/arm/mach-shmobile/Kconfig"
946 
947 source "arch/arm/mach-sunxi/Kconfig"
948 
949 source "arch/arm/mach-prima2/Kconfig"
950 
951 source "arch/arm/mach-tegra/Kconfig"
952 
953 source "arch/arm/mach-u300/Kconfig"
954 
955 source "arch/arm/mach-ux500/Kconfig"
956 
957 source "arch/arm/mach-versatile/Kconfig"
958 
959 source "arch/arm/mach-vexpress/Kconfig"
960 source "arch/arm/plat-versatile/Kconfig"
961 
962 source "arch/arm/mach-vt8500/Kconfig"
963 
964 source "arch/arm/mach-w90x900/Kconfig"
965 
966 source "arch/arm/mach-zynq/Kconfig"
967 
968 # Definitions to make life easier
969 config ARCH_ACORN
970         bool
971 
972 config PLAT_IOP
973         bool
974         select GENERIC_CLOCKEVENTS
975 
976 config PLAT_ORION
977         bool
978         select CLKSRC_MMIO
979         select COMMON_CLK
980         select GENERIC_IRQ_CHIP
981         select IRQ_DOMAIN
982 
983 config PLAT_ORION_LEGACY
984         bool
985         select PLAT_ORION
986 
987 config PLAT_PXA
988         bool
989 
990 config PLAT_VERSATILE
991         bool
992 
993 config ARM_TIMER_SP804
994         bool
995         select CLKSRC_MMIO
996         select CLKSRC_OF if OF
997 
998 source "arch/arm/firmware/Kconfig"
999 
1000 source arch/arm/mm/Kconfig
1001 
1002 config IWMMXT
1003         bool "Enable iWMMXt support"
1004         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
1005         default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
1006         help
1007           Enable support for iWMMXt context switching at run time if
1008           running on a CPU that supports it.
1009 
1010 config MULTI_IRQ_HANDLER
1011         bool
1012         help
1013           Allow each machine to specify it's own IRQ handler at run time.
1014 
1015 if !MMU
1016 source "arch/arm/Kconfig-nommu"
1017 endif
1018 
1019 config PJ4B_ERRATA_4742
1020         bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
1021         depends on CPU_PJ4B && MACH_ARMADA_370
1022         default y
1023         help
1024           When coming out of either a Wait for Interrupt (WFI) or a Wait for
1025           Event (WFE) IDLE states, a specific timing sensitivity exists between
1026           the retiring WFI/WFE instructions and the newly issued subsequent
1027           instructions.  This sensitivity can result in a CPU hang scenario.
1028           Workaround:
1029           The software must insert either a Data Synchronization Barrier (DSB)
1030           or Data Memory Barrier (DMB) command immediately after the WFI/WFE
1031           instruction
1032 
1033 config ARM_ERRATA_326103
1034         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1035         depends on CPU_V6
1036         help
1037           Executing a SWP instruction to read-only memory does not set bit 11
1038           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1039           treat the access as a read, preventing a COW from occurring and
1040           causing the faulting task to livelock.
1041 
1042 config ARM_ERRATA_411920
1043         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1044         depends on CPU_V6 || CPU_V6K
1045         help
1046           Invalidation of the Instruction Cache operation can
1047           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1048           It does not affect the MPCore. This option enables the ARM Ltd.
1049           recommended workaround.
1050 
1051 config ARM_ERRATA_430973
1052         bool "ARM errata: Stale prediction on replaced interworking branch"
1053         depends on CPU_V7
1054         help
1055           This option enables the workaround for the 430973 Cortex-A8
1056           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1057           interworking branch is replaced with another code sequence at the
1058           same virtual address, whether due to self-modifying code or virtual
1059           to physical address re-mapping, Cortex-A8 does not recover from the
1060           stale interworking branch prediction. This results in Cortex-A8
1061           executing the new code sequence in the incorrect ARM or Thumb state.
1062           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1063           and also flushes the branch target cache at every context switch.
1064           Note that setting specific bits in the ACTLR register may not be
1065           available in non-secure mode.
1066 
1067 config ARM_ERRATA_458693
1068         bool "ARM errata: Processor deadlock when a false hazard is created"
1069         depends on CPU_V7
1070         depends on !ARCH_MULTIPLATFORM
1071         help
1072           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1073           erratum. For very specific sequences of memory operations, it is
1074           possible for a hazard condition intended for a cache line to instead
1075           be incorrectly associated with a different cache line. This false
1076           hazard might then cause a processor deadlock. The workaround enables
1077           the L1 caching of the NEON accesses and disables the PLD instruction
1078           in the ACTLR register. Note that setting specific bits in the ACTLR
1079           register may not be available in non-secure mode.
1080 
1081 config ARM_ERRATA_460075
1082         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1083         depends on CPU_V7
1084         depends on !ARCH_MULTIPLATFORM
1085         help
1086           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1087           erratum. Any asynchronous access to the L2 cache may encounter a
1088           situation in which recent store transactions to the L2 cache are lost
1089           and overwritten with stale memory contents from external memory. The
1090           workaround disables the write-allocate mode for the L2 cache via the
1091           ACTLR register. Note that setting specific bits in the ACTLR register
1092           may not be available in non-secure mode.
1093 
1094 config ARM_ERRATA_742230
1095         bool "ARM errata: DMB operation may be faulty"
1096         depends on CPU_V7 && SMP
1097         depends on !ARCH_MULTIPLATFORM
1098         help
1099           This option enables the workaround for the 742230 Cortex-A9
1100           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1101           between two write operations may not ensure the correct visibility
1102           ordering of the two writes. This workaround sets a specific bit in
1103           the diagnostic register of the Cortex-A9 which causes the DMB
1104           instruction to behave as a DSB, ensuring the correct behaviour of
1105           the two writes.
1106 
1107 config ARM_ERRATA_742231
1108         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1109         depends on CPU_V7 && SMP
1110         depends on !ARCH_MULTIPLATFORM
1111         help
1112           This option enables the workaround for the 742231 Cortex-A9
1113           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1114           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1115           accessing some data located in the same cache line, may get corrupted
1116           data due to bad handling of the address hazard when the line gets
1117           replaced from one of the CPUs at the same time as another CPU is
1118           accessing it. This workaround sets specific bits in the diagnostic
1119           register of the Cortex-A9 which reduces the linefill issuing
1120           capabilities of the processor.
1121 
1122 config ARM_ERRATA_643719
1123         bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
1124         depends on CPU_V7 && SMP
1125         help
1126           This option enables the workaround for the 643719 Cortex-A9 (prior to
1127           r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
1128           register returns zero when it should return one. The workaround
1129           corrects this value, ensuring cache maintenance operations which use
1130           it behave as intended and avoiding data corruption.
1131 
1132 config ARM_ERRATA_720789
1133         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1134         depends on CPU_V7
1135         help
1136           This option enables the workaround for the 720789 Cortex-A9 (prior to
1137           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1138           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1139           As a consequence of this erratum, some TLB entries which should be
1140           invalidated are not, resulting in an incoherency in the system page
1141           tables. The workaround changes the TLB flushing routines to invalidate
1142           entries regardless of the ASID.
1143 
1144 config ARM_ERRATA_743622
1145         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1146         depends on CPU_V7
1147         depends on !ARCH_MULTIPLATFORM
1148         help
1149           This option enables the workaround for the 743622 Cortex-A9
1150           (r2p*) erratum. Under very rare conditions, a faulty
1151           optimisation in the Cortex-A9 Store Buffer may lead to data
1152           corruption. This workaround sets a specific bit in the diagnostic
1153           register of the Cortex-A9 which disables the Store Buffer
1154           optimisation, preventing the defect from occurring. This has no
1155           visible impact on the overall performance or power consumption of the
1156           processor.
1157 
1158 config ARM_ERRATA_751472
1159         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1160         depends on CPU_V7
1161         depends on !ARCH_MULTIPLATFORM
1162         help
1163           This option enables the workaround for the 751472 Cortex-A9 (prior
1164           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1165           completion of a following broadcasted operation if the second
1166           operation is received by a CPU before the ICIALLUIS has completed,
1167           potentially leading to corrupted entries in the cache or TLB.
1168 
1169 config ARM_ERRATA_754322
1170         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1171         depends on CPU_V7
1172         help
1173           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1174           r3p*) erratum. A speculative memory access may cause a page table walk
1175           which starts prior to an ASID switch but completes afterwards. This
1176           can populate the micro-TLB with a stale entry which may be hit with
1177           the new ASID. This workaround places two dsb instructions in the mm
1178           switching code so that no page table walks can cross the ASID switch.
1179 
1180 config ARM_ERRATA_754327
1181         bool "ARM errata: no automatic Store Buffer drain"
1182         depends on CPU_V7 && SMP
1183         help
1184           This option enables the workaround for the 754327 Cortex-A9 (prior to
1185           r2p0) erratum. The Store Buffer does not have any automatic draining
1186           mechanism and therefore a livelock may occur if an external agent
1187           continuously polls a memory location waiting to observe an update.
1188           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1189           written polling loops from denying visibility of updates to memory.
1190 
1191 config ARM_ERRATA_364296
1192         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1193         depends on CPU_V6
1194         help
1195           This options enables the workaround for the 364296 ARM1136
1196           r0p2 erratum (possible cache data corruption with
1197           hit-under-miss enabled). It sets the undocumented bit 31 in
1198           the auxiliary control register and the FI bit in the control
1199           register, thus disabling hit-under-miss without putting the
1200           processor into full low interrupt latency mode. ARM11MPCore
1201           is not affected.
1202 
1203 config ARM_ERRATA_764369
1204         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1205         depends on CPU_V7 && SMP
1206         help
1207           This option enables the workaround for erratum 764369
1208           affecting Cortex-A9 MPCore with two or more processors (all
1209           current revisions). Under certain timing circumstances, a data
1210           cache line maintenance operation by MVA targeting an Inner
1211           Shareable memory region may fail to proceed up to either the
1212           Point of Coherency or to the Point of Unification of the
1213           system. This workaround adds a DSB instruction before the
1214           relevant cache maintenance functions and sets a specific bit
1215           in the diagnostic control register of the SCU.
1216 
1217 config ARM_ERRATA_775420
1218        bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1219        depends on CPU_V7
1220        help
1221          This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1222          r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1223          operation aborts with MMU exception, it might cause the processor
1224          to deadlock. This workaround puts DSB before executing ISB if
1225          an abort may occur on cache maintenance.
1226 
1227 config ARM_ERRATA_798181
1228         bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1229         depends on CPU_V7 && SMP
1230         help
1231           On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1232           adequately shooting down all use of the old entries. This
1233           option enables the Linux kernel workaround for this erratum
1234           which sends an IPI to the CPUs that are running the same ASID
1235           as the one being invalidated.
1236 
1237 config ARM_ERRATA_773022
1238         bool "ARM errata: incorrect instructions may be executed from loop buffer"
1239         depends on CPU_V7
1240         help
1241           This option enables the workaround for the 773022 Cortex-A15
1242           (up to r0p4) erratum. In certain rare sequences of code, the
1243           loop buffer may deliver incorrect instructions. This
1244           workaround disables the loop buffer to avoid the erratum.
1245 
1246 endmenu
1247 
1248 source "arch/arm/common/Kconfig"
1249 
1250 menu "Bus support"
1251 
1252 config ISA
1253         bool
1254         help
1255           Find out whether you have ISA slots on your motherboard.  ISA is the
1256           name of a bus system, i.e. the way the CPU talks to the other stuff
1257           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1258           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1259           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1260 
1261 # Select ISA DMA controller support
1262 config ISA_DMA
1263         bool
1264         select ISA_DMA_API
1265 
1266 # Select ISA DMA interface
1267 config ISA_DMA_API
1268         bool
1269 
1270 config PCI
1271         bool "PCI support" if MIGHT_HAVE_PCI
1272         help
1273           Find out whether you have a PCI motherboard. PCI is the name of a
1274           bus system, i.e. the way the CPU talks to the other stuff inside
1275           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1276           VESA. If you have PCI, say Y, otherwise N.
1277 
1278 config PCI_DOMAINS
1279         bool
1280         depends on PCI
1281 
1282 config PCI_NANOENGINE
1283         bool "BSE nanoEngine PCI support"
1284         depends on SA1100_NANOENGINE
1285         help
1286           Enable PCI on the BSE nanoEngine board.
1287 
1288 config PCI_SYSCALL
1289         def_bool PCI
1290 
1291 config PCI_HOST_ITE8152
1292         bool
1293         depends on PCI && MACH_ARMCORE
1294         default y
1295         select DMABOUNCE
1296 
1297 source "drivers/pci/Kconfig"
1298 source "drivers/pci/pcie/Kconfig"
1299 
1300 source "drivers/pcmcia/Kconfig"
1301 
1302 endmenu
1303 
1304 menu "Kernel Features"
1305 
1306 config HAVE_SMP
1307         bool
1308         help
1309           This option should be selected by machines which have an SMP-
1310           capable CPU.
1311 
1312           The only effect of this option is to make the SMP-related
1313           options available to the user for configuration.
1314 
1315 config SMP
1316         bool "Symmetric Multi-Processing"
1317         depends on CPU_V6K || CPU_V7
1318         depends on GENERIC_CLOCKEVENTS
1319         depends on HAVE_SMP
1320         depends on MMU || ARM_MPU
1321         help
1322           This enables support for systems with more than one CPU. If you have
1323           a system with only one CPU, say N. If you have a system with more
1324           than one CPU, say Y.
1325 
1326           If you say N here, the kernel will run on uni- and multiprocessor
1327           machines, but will use only one CPU of a multiprocessor machine. If
1328           you say Y here, the kernel will run on many, but not all,
1329           uniprocessor machines. On a uniprocessor machine, the kernel
1330           will run faster if you say N here.
1331 
1332           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1333           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1334           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1335 
1336           If you don't know what to do here, say N.
1337 
1338 config SMP_ON_UP
1339         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1340         depends on SMP && !XIP_KERNEL && MMU
1341         default y
1342         help
1343           SMP kernels contain instructions which fail on non-SMP processors.
1344           Enabling this option allows the kernel to modify itself to make
1345           these instructions safe.  Disabling it allows about 1K of space
1346           savings.
1347 
1348           If you don't know what to do here, say Y.
1349 
1350 config ARM_CPU_TOPOLOGY
1351         bool "Support cpu topology definition"
1352         depends on SMP && CPU_V7
1353         default y
1354         help
1355           Support ARM cpu topology definition. The MPIDR register defines
1356           affinity between processors which is then used to describe the cpu
1357           topology of an ARM System.
1358 
1359 config SCHED_MC
1360         bool "Multi-core scheduler support"
1361         depends on ARM_CPU_TOPOLOGY
1362         help
1363           Multi-core scheduler support improves the CPU scheduler's decision
1364           making when dealing with multi-core CPU chips at a cost of slightly
1365           increased overhead in some places. If unsure say N here.
1366 
1367 config SCHED_SMT
1368         bool "SMT scheduler support"
1369         depends on ARM_CPU_TOPOLOGY
1370         help
1371           Improves the CPU scheduler's decision making when dealing with
1372           MultiThreading at a cost of slightly increased overhead in some
1373           places. If unsure say N here.
1374 
1375 config HAVE_ARM_SCU
1376         bool
1377         help
1378           This option enables support for the ARM system coherency unit
1379 
1380 config HAVE_ARM_ARCH_TIMER
1381         bool "Architected timer support"
1382         depends on CPU_V7
1383         select ARM_ARCH_TIMER
1384         select GENERIC_CLOCKEVENTS
1385         help
1386           This option enables support for the ARM architected timer
1387 
1388 config HAVE_ARM_TWD
1389         bool
1390         depends on SMP
1391         select CLKSRC_OF if OF
1392         help
1393           This options enables support for the ARM timer and watchdog unit
1394 
1395 config MCPM
1396         bool "Multi-Cluster Power Management"
1397         depends on CPU_V7 && SMP
1398         help
1399           This option provides the common power management infrastructure
1400           for (multi-)cluster based systems, such as big.LITTLE based
1401           systems.
1402 
1403 config MCPM_QUAD_CLUSTER
1404         bool
1405         depends on MCPM
1406         help
1407           To avoid wasting resources unnecessarily, MCPM only supports up
1408           to 2 clusters by default.
1409           Platforms with 3 or 4 clusters that use MCPM must select this
1410           option to allow the additional clusters to be managed.
1411 
1412 config BIG_LITTLE
1413         bool "big.LITTLE support (Experimental)"
1414         depends on CPU_V7 && SMP
1415         select MCPM
1416         help
1417           This option enables support selections for the big.LITTLE
1418           system architecture.
1419 
1420 config BL_SWITCHER
1421         bool "big.LITTLE switcher support"
1422         depends on BIG_LITTLE && MCPM && HOTPLUG_CPU
1423         select ARM_CPU_SUSPEND
1424         select CPU_PM
1425         help
1426           The big.LITTLE "switcher" provides the core functionality to
1427           transparently handle transition between a cluster of A15's
1428           and a cluster of A7's in a big.LITTLE system.
1429 
1430 config BL_SWITCHER_DUMMY_IF
1431         tristate "Simple big.LITTLE switcher user interface"
1432         depends on BL_SWITCHER && DEBUG_KERNEL
1433         help
1434           This is a simple and dummy char dev interface to control
1435           the big.LITTLE switcher core code.  It is meant for
1436           debugging purposes only.
1437 
1438 choice
1439         prompt "Memory split"
1440         depends on MMU
1441         default VMSPLIT_3G
1442         help
1443           Select the desired split between kernel and user memory.
1444 
1445           If you are not absolutely sure what you are doing, leave this
1446           option alone!
1447 
1448         config VMSPLIT_3G
1449                 bool "3G/1G user/kernel split"
1450         config VMSPLIT_2G
1451                 bool "2G/2G user/kernel split"
1452         config VMSPLIT_1G
1453                 bool "1G/3G user/kernel split"
1454 endchoice
1455 
1456 config PAGE_OFFSET
1457         hex
1458         default PHYS_OFFSET if !MMU
1459         default 0x40000000 if VMSPLIT_1G
1460         default 0x80000000 if VMSPLIT_2G
1461         default 0xC0000000
1462 
1463 config NR_CPUS
1464         int "Maximum number of CPUs (2-32)"
1465         range 2 32
1466         depends on SMP
1467         default "4"
1468 
1469 config HOTPLUG_CPU
1470         bool "Support for hot-pluggable CPUs"
1471         depends on SMP
1472         help
1473           Say Y here to experiment with turning CPUs off and on.  CPUs
1474           can be controlled through /sys/devices/system/cpu.
1475 
1476 config ARM_PSCI
1477         bool "Support for the ARM Power State Coordination Interface (PSCI)"
1478         depends on CPU_V7
1479         help
1480           Say Y here if you want Linux to communicate with system firmware
1481           implementing the PSCI specification for CPU-centric power
1482           management operations described in ARM document number ARM DEN
1483           0022A ("Power State Coordination Interface System Software on
1484           ARM processors").
1485 
1486 # The GPIO number here must be sorted by descending number. In case of
1487 # a multiplatform kernel, we just want the highest value required by the
1488 # selected platforms.
1489 config ARCH_NR_GPIO
1490         int
1491         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1492         default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \
1493                 SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210
1494         default 416 if ARCH_SUNXI
1495         default 392 if ARCH_U8500
1496         default 352 if ARCH_VT8500
1497         default 288 if ARCH_ROCKCHIP
1498         default 264 if MACH_H4700
1499         default 0
1500         help
1501           Maximum number of GPIOs in the system.
1502 
1503           If unsure, leave the default value.
1504 
1505 source kernel/Kconfig.preempt
1506 
1507 config HZ_FIXED
1508         int
1509         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \
1510                 ARCH_S5PV210 || ARCH_EXYNOS4
1511         default AT91_TIMER_HZ if ARCH_AT91
1512         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
1513         default 0
1514 
1515 choice
1516         depends on HZ_FIXED = 0
1517         prompt "Timer frequency"
1518 
1519 config HZ_100
1520         bool "100 Hz"
1521 
1522 config HZ_200
1523         bool "200 Hz"
1524 
1525 config HZ_250
1526         bool "250 Hz"
1527 
1528 config HZ_300
1529         bool "300 Hz"
1530 
1531 config HZ_500
1532         bool "500 Hz"
1533 
1534 config HZ_1000
1535         bool "1000 Hz"
1536 
1537 endchoice
1538 
1539 config HZ
1540         int
1541         default HZ_FIXED if HZ_FIXED != 0
1542         default 100 if HZ_100
1543         default 200 if HZ_200
1544         default 250 if HZ_250
1545         default 300 if HZ_300
1546         default 500 if HZ_500
1547         default 1000
1548 
1549 config SCHED_HRTICK
1550         def_bool HIGH_RES_TIMERS
1551 
1552 config THUMB2_KERNEL
1553         bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
1554         depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
1555         default y if CPU_THUMBONLY
1556         select AEABI
1557         select ARM_ASM_UNIFIED
1558         select ARM_UNWIND
1559         help
1560           By enabling this option, the kernel will be compiled in
1561           Thumb-2 mode. A compiler/assembler that understand the unified
1562           ARM-Thumb syntax is needed.
1563 
1564           If unsure, say N.
1565 
1566 config THUMB2_AVOID_R_ARM_THM_JUMP11
1567         bool "Work around buggy Thumb-2 short branch relocations in gas"
1568         depends on THUMB2_KERNEL && MODULES
1569         default y
1570         help
1571           Various binutils versions can resolve Thumb-2 branches to
1572           locally-defined, preemptible global symbols as short-range "b.n"
1573           branch instructions.
1574 
1575           This is a problem, because there's no guarantee the final
1576           destination of the symbol, or any candidate locations for a
1577           trampoline, are within range of the branch.  For this reason, the
1578           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1579           relocation in modules at all, and it makes little sense to add
1580           support.
1581 
1582           The symptom is that the kernel fails with an "unsupported
1583           relocation" error when loading some modules.
1584 
1585           Until fixed tools are available, passing
1586           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1587           code which hits this problem, at the cost of a bit of extra runtime
1588           stack usage in some cases.
1589 
1590           The problem is described in more detail at:
1591               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1592 
1593           Only Thumb-2 kernels are affected.
1594 
1595           Unless you are sure your tools don't have this problem, say Y.
1596 
1597 config ARM_ASM_UNIFIED
1598         bool
1599 
1600 config AEABI
1601         bool "Use the ARM EABI to compile the kernel"
1602         help
1603           This option allows for the kernel to be compiled using the latest
1604           ARM ABI (aka EABI).  This is only useful if you are using a user
1605           space environment that is also compiled with EABI.
1606 
1607           Since there are major incompatibilities between the legacy ABI and
1608           EABI, especially with regard to structure member alignment, this
1609           option also changes the kernel syscall calling convention to
1610           disambiguate both ABIs and allow for backward compatibility support
1611           (selected with CONFIG_OABI_COMPAT).
1612 
1613           To use this you need GCC version 4.0.0 or later.
1614 
1615 config OABI_COMPAT
1616         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1617         depends on AEABI && !THUMB2_KERNEL
1618         help
1619           This option preserves the old syscall interface along with the
1620           new (ARM EABI) one. It also provides a compatibility layer to
1621           intercept syscalls that have structure arguments which layout
1622           in memory differs between the legacy ABI and the new ARM EABI
1623           (only for non "thumb" binaries). This option adds a tiny
1624           overhead to all syscalls and produces a slightly larger kernel.
1625 
1626           The seccomp filter system will not be available when this is
1627           selected, since there is no way yet to sensibly distinguish
1628           between calling conventions during filtering.
1629 
1630           If you know you'll be using only pure EABI user space then you
1631           can say N here. If this option is not selected and you attempt
1632           to execute a legacy ABI binary then the result will be
1633           UNPREDICTABLE (in fact it can be predicted that it won't work
1634           at all). If in doubt say N.
1635 
1636 config ARCH_HAS_HOLES_MEMORYMODEL
1637         bool
1638 
1639 config ARCH_SPARSEMEM_ENABLE
1640         bool
1641 
1642 config ARCH_SPARSEMEM_DEFAULT
1643         def_bool ARCH_SPARSEMEM_ENABLE
1644 
1645 config ARCH_SELECT_MEMORY_MODEL
1646         def_bool ARCH_SPARSEMEM_ENABLE
1647 
1648 config HAVE_ARCH_PFN_VALID
1649         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1650 
1651 config HAVE_GENERIC_RCU_GUP
1652         def_bool y
1653         depends on ARM_LPAE
1654 
1655 config HIGHMEM
1656         bool "High Memory Support"
1657         depends on MMU
1658         help
1659           The address space of ARM processors is only 4 Gigabytes large
1660           and it has to accommodate user address space, kernel address
1661           space as well as some memory mapped IO. That means that, if you
1662           have a large amount of physical memory and/or IO, not all of the
1663           memory can be "permanently mapped" by the kernel. The physical
1664           memory that is not permanently mapped is called "high memory".
1665 
1666           Depending on the selected kernel/user memory split, minimum
1667           vmalloc space and actual amount of RAM, you may not need this
1668           option which should result in a slightly faster kernel.
1669 
1670           If unsure, say n.
1671 
1672 config HIGHPTE
1673         bool "Allocate 2nd-level pagetables from highmem"
1674         depends on HIGHMEM
1675 
1676 config HW_PERF_EVENTS
1677         bool "Enable hardware performance counter support for perf events"
1678         depends on PERF_EVENTS
1679         default y
1680         help
1681           Enable hardware performance counter support for perf events. If
1682           disabled, perf events will use software events only.
1683 
1684 config SYS_SUPPORTS_HUGETLBFS
1685        def_bool y
1686        depends on ARM_LPAE
1687 
1688 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
1689        def_bool y
1690        depends on ARM_LPAE
1691 
1692 config ARCH_WANT_GENERAL_HUGETLB
1693         def_bool y
1694 
1695 source "mm/Kconfig"
1696 
1697 config FORCE_MAX_ZONEORDER
1698         int "Maximum zone order" if ARCH_SHMOBILE_LEGACY
1699         range 11 64 if ARCH_SHMOBILE_LEGACY
1700         default "12" if SOC_AM33XX
1701         default "9" if SA1111 || ARCH_EFM32
1702         default "11"
1703         help
1704           The kernel memory allocator divides physically contiguous memory
1705           blocks into "zones", where each zone is a power of two number of
1706           pages.  This option selects the largest power of two that the kernel
1707           keeps in the memory allocator.  If you need to allocate very large
1708           blocks of physically contiguous memory, then you may need to
1709           increase this value.
1710 
1711           This config option is actually maximum order plus one. For example,
1712           a value of 11 means that the largest free memory block is 2^10 pages.
1713 
1714 config ALIGNMENT_TRAP
1715         bool
1716         depends on CPU_CP15_MMU
1717         default y if !ARCH_EBSA110
1718         select HAVE_PROC_CPU if PROC_FS
1719         help
1720           ARM processors cannot fetch/store information which is not
1721           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1722           address divisible by 4. On 32-bit ARM processors, these non-aligned
1723           fetch/store instructions will be emulated in software if you say
1724           here, which has a severe performance impact. This is necessary for
1725           correct operation of some network protocols. With an IP-only
1726           configuration it is safe to say N, otherwise say Y.
1727 
1728 config UACCESS_WITH_MEMCPY
1729         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1730         depends on MMU
1731         default y if CPU_FEROCEON
1732         help
1733           Implement faster copy_to_user and clear_user methods for CPU
1734           cores where a 8-word STM instruction give significantly higher
1735           memory write throughput than a sequence of individual 32bit stores.
1736 
1737           A possible side effect is a slight increase in scheduling latency
1738           between threads sharing the same address space if they invoke
1739           such copy operations with large buffers.
1740 
1741           However, if the CPU data cache is using a write-allocate mode,
1742           this option is unlikely to provide any performance gain.
1743 
1744 config SECCOMP
1745         bool
1746         prompt "Enable seccomp to safely compute untrusted bytecode"
1747         ---help---
1748           This kernel feature is useful for number crunching applications
1749           that may need to compute untrusted bytecode during their
1750           execution. By using pipes or other transports made available to
1751           the process as file descriptors supporting the read/write
1752           syscalls, it's possible to isolate those applications in
1753           their own address space using seccomp. Once seccomp is
1754           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1755           and the task is only allowed to execute a few safe syscalls
1756           defined by each seccomp mode.
1757 
1758 config SWIOTLB
1759         def_bool y
1760 
1761 config IOMMU_HELPER
1762         def_bool SWIOTLB
1763 
1764 config XEN_DOM0
1765         def_bool y
1766         depends on XEN
1767 
1768 config XEN
1769         bool "Xen guest support on ARM"
1770         depends on ARM && AEABI && OF
1771         depends on CPU_V7 && !CPU_V6
1772         depends on !GENERIC_ATOMIC64
1773         depends on MMU
1774         select ARCH_DMA_ADDR_T_64BIT
1775         select ARM_PSCI
1776         select SWIOTLB_XEN
1777         help
1778           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1779 
1780 endmenu
1781 
1782 menu "Boot options"
1783 
1784 config USE_OF
1785         bool "Flattened Device Tree support"
1786         select IRQ_DOMAIN
1787         select OF
1788         select OF_EARLY_FLATTREE
1789         select OF_RESERVED_MEM
1790         help
1791           Include support for flattened device tree machine descriptions.
1792 
1793 config ATAGS
1794         bool "Support for the traditional ATAGS boot data passing" if USE_OF
1795         default y
1796         help
1797           This is the traditional way of passing data to the kernel at boot
1798           time. If you are solely relying on the flattened device tree (or
1799           the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1800           to remove ATAGS support from your kernel binary.  If unsure,
1801           leave this to y.
1802 
1803 config DEPRECATED_PARAM_STRUCT
1804         bool "Provide old way to pass kernel parameters"
1805         depends on ATAGS
1806         help
1807           This was deprecated in 2001 and announced to live on for 5 years.
1808           Some old boot loaders still use this way.
1809 
1810 # Compressed boot loader in ROM.  Yes, we really want to ask about
1811 # TEXT and BSS so we preserve their values in the config files.
1812 config ZBOOT_ROM_TEXT
1813         hex "Compressed ROM boot loader base address"
1814         default "0"
1815         help
1816           The physical address at which the ROM-able zImage is to be
1817           placed in the target.  Platforms which normally make use of
1818           ROM-able zImage formats normally set this to a suitable
1819           value in their defconfig file.
1820 
1821           If ZBOOT_ROM is not enabled, this has no effect.
1822 
1823 config ZBOOT_ROM_BSS
1824         hex "Compressed ROM boot loader BSS address"
1825         default "0"
1826         help
1827           The base address of an area of read/write memory in the target
1828           for the ROM-able zImage which must be available while the
1829           decompressor is running. It must be large enough to hold the
1830           entire decompressed kernel plus an additional 128 KiB.
1831           Platforms which normally make use of ROM-able zImage formats
1832           normally set this to a suitable value in their defconfig file.
1833 
1834           If ZBOOT_ROM is not enabled, this has no effect.
1835 
1836 config ZBOOT_ROM
1837         bool "Compressed boot loader in ROM/flash"
1838         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1839         depends on !ARM_APPENDED_DTB && !XIP_KERNEL && !AUTO_ZRELADDR
1840         help
1841           Say Y here if you intend to execute your compressed kernel image
1842           (zImage) directly from ROM or flash.  If unsure, say N.
1843 
1844 choice
1845         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1846         depends on ZBOOT_ROM && ARCH_SH7372
1847         default ZBOOT_ROM_NONE
1848         help
1849           Include experimental SD/MMC loading code in the ROM-able zImage.
1850           With this enabled it is possible to write the ROM-able zImage
1851           kernel image to an MMC or SD card and boot the kernel straight
1852           from the reset vector. At reset the processor Mask ROM will load
1853           the first part of the ROM-able zImage which in turn loads the
1854           rest the kernel image to RAM.
1855 
1856 config ZBOOT_ROM_NONE
1857         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1858         help
1859           Do not load image from SD or MMC
1860 
1861 config ZBOOT_ROM_MMCIF
1862         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1863         help
1864           Load image from MMCIF hardware block.
1865 
1866 config ZBOOT_ROM_SH_MOBILE_SDHI
1867         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1868         help
1869           Load image from SDHI hardware block
1870 
1871 endchoice
1872 
1873 config ARM_APPENDED_DTB
1874         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1875         depends on OF
1876         help
1877           With this option, the boot code will look for a device tree binary
1878           (DTB) appended to zImage
1879           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1880 
1881           This is meant as a backward compatibility convenience for those
1882           systems with a bootloader that can't be upgraded to accommodate
1883           the documented boot protocol using a device tree.
1884 
1885           Beware that there is very little in terms of protection against
1886           this option being confused by leftover garbage in memory that might
1887           look like a DTB header after a reboot if no actual DTB is appended
1888           to zImage.  Do not leave this option active in a production kernel
1889           if you don't intend to always append a DTB.  Proper passing of the
1890           location into r2 of a bootloader provided DTB is always preferable
1891           to this option.
1892 
1893 config ARM_ATAG_DTB_COMPAT
1894         bool "Supplement the appended DTB with traditional ATAG information"
1895         depends on ARM_APPENDED_DTB
1896         help
1897           Some old bootloaders can't be updated to a DTB capable one, yet
1898           they provide ATAGs with memory configuration, the ramdisk address,
1899           the kernel cmdline string, etc.  Such information is dynamically
1900           provided by the bootloader and can't always be stored in a static
1901           DTB.  To allow a device tree enabled kernel to be used with such
1902           bootloaders, this option allows zImage to extract the information
1903           from the ATAG list and store it at run time into the appended DTB.
1904 
1905 choice
1906         prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1907         default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1908 
1909 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1910         bool "Use bootloader kernel arguments if available"
1911         help
1912           Uses the command-line options passed by the boot loader instead of
1913           the device tree bootargs property. If the boot loader doesn't provide
1914           any, the device tree bootargs property will be used.
1915 
1916 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1917         bool "Extend with bootloader kernel arguments"
1918         help
1919           The command-line arguments provided by the boot loader will be
1920           appended to the the device tree bootargs property.
1921 
1922 endchoice
1923 
1924 config CMDLINE
1925         string "Default kernel command string"
1926         default ""
1927         help
1928           On some architectures (EBSA110 and CATS), there is currently no way
1929           for the boot loader to pass arguments to the kernel. For these
1930           architectures, you should supply some command-line options at build
1931           time by entering them here. As a minimum, you should specify the
1932           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1933 
1934 choice
1935         prompt "Kernel command line type" if CMDLINE != ""
1936         default CMDLINE_FROM_BOOTLOADER
1937         depends on ATAGS
1938 
1939 config CMDLINE_FROM_BOOTLOADER
1940         bool "Use bootloader kernel arguments if available"
1941         help
1942           Uses the command-line options passed by the boot loader. If
1943           the boot loader doesn't provide any, the default kernel command
1944           string provided in CMDLINE will be used.
1945 
1946 config CMDLINE_EXTEND
1947         bool "Extend bootloader kernel arguments"
1948         help
1949           The command-line arguments provided by the boot loader will be
1950           appended to the default kernel command string.
1951 
1952 config CMDLINE_FORCE
1953         bool "Always use the default kernel command string"
1954         help
1955           Always use the default kernel command string, even if the boot
1956           loader passes other arguments to the kernel.
1957           This is useful if you cannot or don't want to change the
1958           command-line options your boot loader passes to the kernel.
1959 endchoice
1960 
1961 config XIP_KERNEL
1962         bool "Kernel Execute-In-Place from ROM"
1963         depends on !ARM_LPAE && !ARCH_MULTIPLATFORM
1964         help
1965           Execute-In-Place allows the kernel to run from non-volatile storage
1966           directly addressable by the CPU, such as NOR flash. This saves RAM
1967           space since the text section of the kernel is not loaded from flash
1968           to RAM.  Read-write sections, such as the data section and stack,
1969           are still copied to RAM.  The XIP kernel is not compressed since
1970           it has to run directly from flash, so it will take more space to
1971           store it.  The flash address used to link the kernel object files,
1972           and for storing it, is configuration dependent. Therefore, if you
1973           say Y here, you must know the proper physical address where to
1974           store the kernel image depending on your own flash memory usage.
1975 
1976           Also note that the make target becomes "make xipImage" rather than
1977           "make zImage" or "make Image".  The final kernel binary to put in
1978           ROM memory will be arch/arm/boot/xipImage.
1979 
1980           If unsure, say N.
1981 
1982 config XIP_PHYS_ADDR
1983         hex "XIP Kernel Physical Location"
1984         depends on XIP_KERNEL
1985         default "0x00080000"
1986         help
1987           This is the physical address in your flash memory the kernel will
1988           be linked for and stored to.  This address is dependent on your
1989           own flash usage.
1990 
1991 config KEXEC
1992         bool "Kexec system call (EXPERIMENTAL)"
1993         depends on (!SMP || PM_SLEEP_SMP)
1994         help
1995           kexec is a system call that implements the ability to shutdown your
1996           current kernel, and to start another kernel.  It is like a reboot
1997           but it is independent of the system firmware.   And like a reboot
1998           you can start any kernel with it, not just Linux.
1999 
2000           It is an ongoing process to be certain the hardware in a machine
2001           is properly shutdown, so do not be surprised if this code does not
2002           initially work for you.
2003 
2004 config ATAGS_PROC
2005         bool "Export atags in procfs"
2006         depends on ATAGS && KEXEC
2007         default y
2008         help
2009           Should the atags used to boot the kernel be exported in an "atags"
2010           file in procfs. Useful with kexec.
2011 
2012 config CRASH_DUMP
2013         bool "Build kdump crash kernel (EXPERIMENTAL)"
2014         help
2015           Generate crash dump after being started by kexec. This should
2016           be normally only set in special crash dump kernels which are
2017           loaded in the main kernel with kexec-tools into a specially
2018           reserved region and then later executed after a crash by
2019           kdump/kexec. The crash dump kernel must be compiled to a
2020           memory address not used by the main kernel
2021 
2022           For more details see Documentation/kdump/kdump.txt
2023 
2024 config AUTO_ZRELADDR
2025         bool "Auto calculation of the decompressed kernel image address"
2026         help
2027           ZRELADDR is the physical address where the decompressed kernel
2028           image will be placed. If AUTO_ZRELADDR is selected, the address
2029           will be determined at run-time by masking the current IP with
2030           0xf8000000. This assumes the zImage being placed in the first 128MB
2031           from start of memory.
2032 
2033 endmenu
2034 
2035 menu "CPU Power Management"
2036 
2037 source "drivers/cpufreq/Kconfig"
2038 
2039 source "drivers/cpuidle/Kconfig"
2040 
2041 endmenu
2042 
2043 menu "Floating point emulation"
2044 
2045 comment "At least one emulation must be selected"
2046 
2047 config FPE_NWFPE
2048         bool "NWFPE math emulation"
2049         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2050         ---help---
2051           Say Y to include the NWFPE floating point emulator in the kernel.
2052           This is necessary to run most binaries. Linux does not currently
2053           support floating point hardware so you need to say Y here even if
2054           your machine has an FPA or floating point co-processor podule.
2055 
2056           You may say N here if you are going to load the Acorn FPEmulator
2057           early in the bootup.
2058 
2059 config FPE_NWFPE_XP
2060         bool "Support extended precision"
2061         depends on FPE_NWFPE
2062         help
2063           Say Y to include 80-bit support in the kernel floating-point
2064           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2065           Note that gcc does not generate 80-bit operations by default,
2066           so in most cases this option only enlarges the size of the
2067           floating point emulator without any good reason.
2068 
2069           You almost surely want to say N here.
2070 
2071 config FPE_FASTFPE
2072         bool "FastFPE math emulation (EXPERIMENTAL)"
2073         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
2074         ---help---
2075           Say Y here to include the FAST floating point emulator in the kernel.
2076           This is an experimental much faster emulator which now also has full
2077           precision for the mantissa.  It does not support any exceptions.
2078           It is very simple, and approximately 3-6 times faster than NWFPE.
2079 
2080           It should be sufficient for most programs.  It may be not suitable
2081           for scientific calculations, but you have to check this for yourself.
2082           If you do not feel you need a faster FP emulation you should better
2083           choose NWFPE.
2084 
2085 config VFP
2086         bool "VFP-format floating point maths"
2087         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2088         help
2089           Say Y to include VFP support code in the kernel. This is needed
2090           if your hardware includes a VFP unit.
2091 
2092           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2093           release notes and additional status information.
2094 
2095           Say N if your target does not have VFP hardware.
2096 
2097 config VFPv3
2098         bool
2099         depends on VFP
2100         default y if CPU_V7
2101 
2102 config NEON
2103         bool "Advanced SIMD (NEON) Extension support"
2104         depends on VFPv3 && CPU_V7
2105         help
2106           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2107           Extension.
2108 
2109 config KERNEL_MODE_NEON
2110         bool "Support for NEON in kernel mode"
2111         depends on NEON && AEABI
2112         help
2113           Say Y to include support for NEON in kernel mode.
2114 
2115 endmenu
2116 
2117 menu "Userspace binary formats"
2118 
2119 source "fs/Kconfig.binfmt"
2120 
2121 config ARTHUR
2122         tristate "RISC OS personality"
2123         depends on !AEABI
2124         help
2125           Say Y here to include the kernel code necessary if you want to run
2126           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2127           experimental; if this sounds frightening, say N and sleep in peace.
2128           You can also say M here to compile this support as a module (which
2129           will be called arthur).
2130 
2131 endmenu
2132 
2133 menu "Power management options"
2134 
2135 source "kernel/power/Kconfig"
2136 
2137 config ARCH_SUSPEND_POSSIBLE
2138         depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \
2139                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2140         def_bool y
2141 
2142 config ARM_CPU_SUSPEND
2143         def_bool PM_SLEEP
2144 
2145 config ARCH_HIBERNATION_POSSIBLE
2146         bool
2147         depends on MMU
2148         default y if ARCH_SUSPEND_POSSIBLE
2149 
2150 endmenu
2151 
2152 source "net/Kconfig"
2153 
2154 source "drivers/Kconfig"
2155 
2156 source "fs/Kconfig"
2157 
2158 source "arch/arm/Kconfig.debug"
2159 
2160 source "security/Kconfig"
2161 
2162 source "crypto/Kconfig"
2163 
2164 source "lib/Kconfig"
2165 
2166 source "arch/arm/kvm/Kconfig"

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